Gigabyte GA-8ISPK-FJ Schematic REV.1.0

Page 1
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:06 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
1
99
1+
FOR REPAIR ONLY
PAGE 99:
RJ-45 CONNECTOR
PAGE 94:
LAN_VREG / LAN_DECOUPLING
PAGE 92:
LAN POPULATION OPTIONS
PAGE 91:
LAN - CONTROLLER INTEL - KENAI II CSA
PAGE 90:
VGA CONNECT.,FILTER TRANSLATION / ISOLATION
PAGE 85:
AGP CONNECTOR PAGE 80:
MIC IN (REAR), LINE IN AND HEADPHONE OUT
PAGE 75:
CD IN, S/PDIF OUT,
PAGE 73:
MONO-AMPLIFIER
PAGE 72:
AC97 CODEC PAGE 71:
CPU/AUX FAN, EXT.SMB INTRUSION, PWR CONTROL
PAGE 66:
SYSTEMMONITORING PIC PIC SUPPORT, MAX1617
PAGE 65:
PCI-BUS RISER SLOT
PAGE 53:
PCI-BUS SLOT 1 + SLOT SUPPORT
PAGE 52:
POWER CONN./DECOUPL. RESET GENERATION
PAGE 48:
FRONTPANEL & SWITCH
PAGE 47:
FWH PAGE 46:
CONNECTOR KBD/MOUSE
PAGE 45:
CONNECTOR PARALLEL
PAGE 44:
CONNECTOR SER1 / SER2
PAGE 43:
CONNECTOR FLOPPY
PAGE 42:
47M967 SUPER-IO
PAGE 40:
USB CONNECTORS USB BLUETOOTH CONNECTOR
PAGE 38:
USB CONNECTORS
PAGE 37:
PCI PULLUPS / GAP C
PAGE 35:
ICH GPIO PULLUPS /2
PAGE 34:
ICH GPIO PULLUPS /1
PAGE 33:
PCI - IDE 1/2 + 3/4 SERIAL ATA CONN.
PAGE 32:
ICH SUPPORT BATTERY
PAGE 31:
ICH5 PAGE 30:
DDR TERMINATION B
PAGE 28:
DDR TERMINATION A
PAGE 27:
MEMORY MODUL 2
PAGE 25:
MEMORY MODUL 1
PAGE 24:
GMCH PAGE 22:
MCH SUPPORT PAGE 21:
GMCH PAGE 20:
CLKSYNTHESIZER
PAGE 19:
VOLTAGE REGULATORS
PAGE 15:
VOLTAGE REGULATORS
PAGE 14:
CPU CORE VOLTAGE REG.
PAGE 13:
CPU SUPPORT PAGE 12:
ITP PAGE 11:
PRESCOTT CPU PAGE 10:
HISTORY PAGE 9:
BUSPINS PAGE 6:
BUSPINS PAGE 5:
NC-PINS PAGE 4:
HIDDENPOWERPINS
PAGE 3:
HIDDENPOWERPINS
PAGE 2:
CONTENTS PAGE 1:
A_BRASILIA D1534 WGS2
BRASILIA CONTENTS
Page 2
DATUM
T-NR.
NORM
GEPR.
NAME
F
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
G
F
E
D
C
B
A
A
B
C
E
D
1 2
3
12
13 14
4
5
6 7
8 9
10 11 15 16 17
18
ZUST
DATUM
NAME
SACHNUMMER
FRAME1 VERSION 1
CURRENT_LOGIC
HIGHEST_LOGIC
VORGANG
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
$
#
@
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:55 2003
DRAWING
VTERM_GTL D2000 A4,A5,A6,B5,B6,C5,C6,D5,D6,D7,E6,E7,F7
,E8,F11,F13,F15,F17,F19,F9
VCC_CPUCORE D1000 A10,A12,A14,A16,A18,A20,A8,AA10,AA12,AA14,AA16,AA18,AA8,AB11,AB13,AB15,AB17,AB19,AB7,AB9,AC10,AC12,AC14,AC16,AC18,AC8,AD11,AD13,AD15,AD17,AD19,AD7,AD9,AE10,AE12,AE14,AE16,AE18,AE20,AE6,AE8
VCC D4851 5
VCC D4320 20
VCC D4310 20
SHIELD_GND_2 X4320 10,11
SHIELD_GND X4300 10,11
P3V3P_DUAL D9120 8
P3V3P_DUAL D9000 A11,A3,A7,E1,K13,K3,N6,N8,P12,P2
P3V3P_DUAL D4880 14
P3V3P D8500 8
P3V3P D6560 14
P3V3P D4850 14
P3V3P D4600 25,27,32
P3V3P D4000 121,19,80
P3V3P D3000 M10,N10,P6,R13,V19,W15,W17,W24
P3V3P D3000 AD13,AD20,B5,F6,G1,G19,G21,H6,K6,L6
P2V5P_DUAL X2400 X2500 104,108,112,120,128,136,143,148,15,156,164,168,172,180,22,30,38,46,54,62,7,70,77,85,96
P2V5P_DUAL D2000 AL6,AL7,AM1,AM2,AM3,AM5,AM6,AM7,AM8,AN2,AN4,AN5,AN6,AN7,AN8,AP3,AP4,AP5,AP6,AP7,AR4,AR5,AR7
P1V5P D3000 W6,W7,W8,W9
P1V5P D3000 M15,N15,N23,P19,R10,R12,R6,W10,W11,W19
P1V5P D3000 E15,F14,F15,H24,J19,K10,K12,K13,K19,L19
P1V5P D2000 J6,J7,J8,J9,K6,K7,K8,K9,L10,L11,L6,L7,L9,M10,M11,M8,M9,N10,N11,N9,P10,P11,R11,T16,T17,T18,T19,T20,U16,U17,U20,V16,V18,V20,W16,W19,W20,Y16,Y17,Y18,Y19,Y20
P12VP_CORE D4310 1
P12VP D4320 1
P12VN D4320 10
P12VN D4310 10
GND X2400 X2500 100,11,116,124,132,139,145,152,160,176,18,26,3,34,42,50,58,66,74,81,89,93
GND D9120 5
GND D9000 B3,B7,C10,C12,D13,D5,D7,D8,E2,E5,E6,E7,E8,E9,F10,F11,F4,F6,F7,F8,F9,G10,G11,G14,G7,G8,G9,H10,H9,K12,L11,L6,M6,N12,P8
GND D8500 4
GND D6560 7
GND D4880 7
GND D4851 3
GND D4850 7
GND D4600 16,26,28
GND D4320 11
GND D4310 11
GND D4000 32,57,6,87,99
GND D3000 V1,V21,W16,W18,Y10,Y3,Y6,Y7,Y8
GND D3000 P13,P14,P15,P21,R11,R14,T23,T3,T6,U19
GND D3000 M5,N11,N12,N13,N14,N20,P1,P10,P11,P12
GND D3000 L15,L21,L23,M1,M11,M12,M13,M14,M22,M24
GND D3000 K14,K20,K22,K24,K3,L10,L11,L12,L13,L14
GND D3000 G20,G24,G6,H1,H19,H22,J21,J23,J6,K11
GND D3000 D22,D24,D6,E17,E19,E20,E21,E23,F3,F9
GND D3000 C18,C20,C22,C3,C8,D1,D11,D16,D18,D20
GND D3000 AD21,AD4,AD6,AD8,B13,B17,B19,B21,B23,C16
GND D3000 AB9,AC10,AC13,AC2,AC23,AC4,AC6,AC8,AD12,AD17
GND D3000 AA21,AA24,AA5,AA7,AA9,AB11,AB15,AB18,AB5,AB7
GND D3000 A1,A10,A15,A17,A19,A21,A23,A7,AA11,AA13
,K11,K12,K14,K16,K18,K20,K22,K25,K27,K29,K33,L24,L25,L26,L31,L35,M26,M27,M28,M3,M30,M33,M6,N1,N32,N35,N4,P26,P27,P28,P3,P30,P33,P6,P8,P9,R1,R32,R4,T1,T10,T26,T27,T28,T3,T30,T33,T35,T6,T8,T9,U18,U19,U32,U4,V10,V17,V19,V26,V27,V28,V3,V30,V33,V6,V8,V9,W
M13,AM15,AM17,AM19,AM21,AM23,AM25,AM27,AM29,AM35,AM9,AN10,AN12,AN14,AN16,AN18,AN20,AN22,AN24,AN26,AN28,AN30,AN32,AR11,AR13,AR16,AR20,AR23,C10,C12,C14,C16,C18,C20,C22,C24,C26,C28,C4,C8,D1,D11,D13,D15,D17,D19,D21,D23,D25,D27,D29,D31,D33,D35,D9,E1,E3,F1
GND D2000 A11,AD10,AD28,AD3,AD30,AD33,AD6,AD8,AD9,AE1,AE10,AE11,AE12,AE13,AE25,AE26,AE32,AE35,AE4,AF11,AF14,AF16,AF18,AF20,AF22,AF24,AF25,AF3,AF30,AF33,AF6,AF9,AG14,AG16,AG18,AG20,AG22,AG24,AG26,AG2
18,B20,B23,B26,B4,B8,C11,C13,C15,C17,C19,C2,C22,C25,C5,C7,C9,D10,D12,D14,D16,D18,D20,D21,D24,D3,D6,D8,E1,E11,E13,E15,E17,E19,E23,E26,E4,E7,E9,F10,F12,F14,F16,F18,F2,F22,F25,F5,F8,G21,G24,G3,G6,H1,H23,H26,H4,J2,J22,J25,J5,K21,K24,K3,K6,L1,L23,L26,L4,M
GND D1000 A11,A13,A15,A17,A19,A21,A24,A26,A3,A9,AA1,AA11,AA13,AA15,AA17,AA19,AA23,AA26,AA4,AA7,AA9,AB10,AB12,AB14,AB16,AB18,AB20,AB21,AB24,AB3,AB6,AB8,AC11,AC13,AC15,AC17,AC19,AC2,AC22,AC25,AC5,AC7,
..............................................................................................................
Hidden_Power_Pins
BRASILIA HIDDENPOWERPINS
Page 3
DATUM
T-NR.
NORM
GEPR.
NAME
F
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
G
F
E
D
C
B
A
A
B
C
E
D
1 2
3
12
13 14
4
5
6 7
8 9
10 11 15 16 17
18
ZUST
DATUM
NAME
SACHNUMMER
FRAME1 VERSION 1
CURRENT_LOGIC
HIGHEST_LOGIC
VORGANG
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
$
#
@
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:06 2003
DRAWING
BRASILIA HIDDENPOWERPINS
Page 4
DATUM
T-NR.
NORM
GEPR.
NAME
F
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
G
F
E
D
C
B
A
A
B
C
E
D
1 2
3
12
13 14
4
5
6 7
8 9
10 11 15 16 17
18
ZUST
DATUM
NAME
SACHNUMMER
FRAME1 VERSION 1
CURRENT_LOGIC
HIGHEST_LOGIC
VORGANG
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
$
#
@
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:06 2003
DRAWING
X8000 125,126,127,128,129
X7310 5
X5302 121,122
X4800 21,22
X4750 4
X4400 28
X4200 5
X3820 1,11
X3240 X3241 8,9
X3200 X3201 20
X2400 X2500 191,192,193,194,195,71,9
X2400 X2500 101,102,163,173,185,186,187,188,189,190
X1300 5,6
X1100 26
N6530 4,5
N1500 8
N1430 N1431 N1520 1,13,16,3,6,9
D2000 M31,R25
D2000 AR3,AR33,AR35,B2,B25,B34,C1,C23,C35,E26
D2000 A35,AF13,AF23,AG9,AJ12,AN1,AN35,AP2,AP34,AR1
D2000 933,934,935,936,937,938,939,940,A3,A33
D1000 479,480,481,482,A22,A7,AE21,AF24,AF25
B2000 B2001 B2002 B2003 2
......................................................................................
NC_Pins
BRASILIA NC-PINS
Page 5
DATUM
T-NR.
NORM
GEPR.
NAME
F
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
G
F
E
D
C
B
A
A
B
C
E
D
1 2
3
12
13 14
4
5
6 7
8 9
10 11 15 16 17
18
ZUST
DATUM
NAME
SACHNUMMER
FRAME1 VERSION 1
CURRENT_LOGIC
HIGHEST_LOGIC
VORGANG
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
$
#
@
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:06 2003
DRAWING
PAGE: 10 LOCATION: D1000
PIN GTL_RESP_L F4 2 G5 1 F1 0
PIN GTL_ADR_L AB1 35 Y1 34 W2 33 V3 32 U4 31 T5 30 W1 29 R6 28 V2 27 T4 26 U3 25 P6 24 U1 23 T2 22 R3 21 P4 20 P3 19 R2 18 T1 17 N5 16 N4 15 N2 14 M1 13 N1 12 M4 11 M3 10 L2 9 M6 8 L3 7 K1 6 L6 5 K4 4 K2 3
PIN GTL_ADRSTB_L R5 1 L5 0
PIN NC V5 1
PIN NC AC1 0
PIN GTL_CMD_L H3 4 J3 3 J4 2 K5 1 J1 0
PIN GTL_DATA_L AA24 63 AA22 62 AA25 61 Y21 60 Y24 59 Y23 58 W25 57 Y26 56 W26 55 V24 54 V22 53 U21 52 V25 51 U23 50 U24 49 U26 48 T23 47 T22 46 T25 45 T26 44 R24 43 R25 42 P24 41 R21 40 N25 39 N26 38 M26 37 N23 36 M24 35 P21 34 N22 33 M23 32 H25 31 K23 30 J24 29 L22 28 M21 27 H24 26 G26 25 L21 24 D26 23 F26 22 E25 21
F24 20 F23 19 G23 18 E24 17 H22 16 D25 15 J21 14 D23 13 C26 12 H21 11 G22 10 B25 9 C24 8 C23 7 B24 6 D22 5 C21 4 A25 3 A23 2 B22 1 B21 0
PIN GTL_DBI_L V21 3 P26 2 G25 1 E21 0
PIN NC L25 3
PIN NC K26 2
PIN NC K25 1
PIN NC J26 0
PIN CPU_BPM_L AB4 5 AA5 4 Y6 3 AC4 2 AB5 1 AC6 0
PIN CPU_VID_H AD3 5 AE1 4 AE2 3 AE3 2 AE4 1 AE5 0
PAGE: 20 LOCATION: D2000
PIN GTL_ADR_L G26 31 J26 30 G30 29 F31 28 E32 27 K24 26 H27 25 E28 24 F29 23 G27 22 J27 21 C34 20 F28 19 C32 18 D34 17 F25 16 J24 15 B33 14 E30 13 B31 12 J25 11 C31 10 C30 9 K23 8 B32 7 E29 6 L23 5 D30 4 D26 3
PIN GTL_CMD_L J21 4 C29 3 L22 2 J23 1 B29 0
PIN AGP_SBA_H T7 7 U5 6 U10 5 U9 4 R5 3 R3 2
P7 1 R6 0
PIN GTL_RESP_L B27 2 C27 1 G22 0
PIN GTL_DATA_L B8 63 D8 62 B9 61 C9 60 B10 59 E10 58 C11 57 D10 56 B11 55 C13 54 D14 53 B15 52 B12 51 B14 50 E14 49 B13 48 E9 47 G8 46 H10 45 J11 44 K13 43 E11 42 L15 41 G10 40 G12 39 K15 38 E13 37 F11 36 F13 35 J13 34 L16 33 J15 32 K17 31 E17 30 G14 29 J19 28 E21 27 E15 26 F15 25 F21 24 G18 23 G16 22 L18 21 J17 20 F19 19 E19 18 F17 17 G20 16 D18 15 E16 14 B17 13 B18 12 D16 11 B16 10 E20 9 E18 8 C21 7 B20 6 D22 5 B22 4 D20 3 B21 2 E22 1 B23 0
PIN ICH_HI_H AJ3 10 AH2 9 AJ2 8 AL4 7 AL2 6 AL3 5 AK5 4 AG5 3 AK2 2 AG3 1 AF5 0
PIN LAN_CSA_H AG6 10 AH9 9 AE9 8 AG7 7 AF8 6 AC10 5 AD7 4 AF7 3 AD11 2 AH7 1 AK7 0
PIN AGP_AD_H M2 31 P4 30 P5 29 P2 28
R2 27 T5 26 T4 25 T2 24 U3 23 W3 22 V2 21 Y5 20 W2 19 Y2 18 Y4 17 AA2 16 V7 15 W9 14 W6 13 AA11 12 W10 11 AA5 10 AA6 9 AA9 8 AB7 7 AB11 6 AC9 5 AA10 4 AE5 3 AD5 2 AC11 1 AE6 0
PIN AGP_C_BE_L U2 3 AA3 2 W5 1 Y7 0
PIN AGP_ST_H N2 2 N5 1 N3 0
PIN SMEMA_DAT_H F34 63 G34 62 J34 61 K31 60 F33 59 E33 58 H34 57 J33 56 L33 55 L34 54 P34 53 T31 52 K32 51 K34 50 T32 49 T34 48 U33 47 U34 46 AB32 45 AD31 44 V31 43 V32 42 AB31 41 AC34 40 AD34 39 AE34 38 AG33 37 AH31 36 AD32 35 AF32 34 AG34 33 AH32 32 AN34 31 AM31 30 AN29 29 AM28 28 AM33 27 AP33 26 AP29 25 AP28 24 AP27 23 AP25 22 AL22 21 AP21 20 AN27 19 AL24 18 AM22 17 AP22 16 AM18 15 AP18 14 AN15 13 AL14 12 AP19 11 AL18 10 AM14 9 AP14 8 AP13 7 AL12 6 AL10 5 AM10 4 AN13 3 AM12 2 AP11 1 AP10 0
PIN SMEMA_DM_H H32 7 M34 6 W33 5 AF31 4 AP30 3 AM24 2 AP16 1 AP12 0
PIN SMEMA_DQS_H H31 7 M32 6 V34 5 AF34 4 AM30 3 AP23 2 AP15 1 AN11 0
PIN SMEMB_DAT_H G32 63 J29 62 M25 61 N25 60 G33 59 F32 58 H29 57 K30 56 L32 55 P25 54 R26 53 R31 52 L30 51 K28 50 R30 49 P29 48 R27 47 U25 46 V29 45 AA31 44 T25 43 U27 42 W30 41 AA30 40 AA27 39 AA26 38 AB29 37 AE31 36 Y29 35 AC30 34 AC27 33 AE30 32 AF28 31 AD25 30 AJ27 29 AJ26 28 AF27 27 AG27 26 AH26 25 AK25 24 AE22 23 AJ24 22 AK21 21 AL19 20 AK23 19 AG23 18 AE20 17 AE19 16 AJ18 15 AJ16 14 AJ14 13 AK13 12 AL17 11 AK17 10 AL13 9 AE17 8 AG12 7 AK11 6 AF12 5 AL8 4 AE16 3 AL11 2 AE15 1 AJ10 0
PIN SMEMB_DM_H J31 7 M29 6 U31 5 AC31 4 AJ28 3 AE21 2 AG15 1 AG11 0
PIN SMEMB_DQS_H J30 7 L27 6 U30 5 AD29 4 AH27 3 AG21 2 AG13 1
AF15 0
PIN CLK_SMEMA_H P31 5 AM16 4 AK33 3 N33 2 AP17 1 AK32 0
PIN CLK_SMEMA_L P32 5 AL16 4 AK34 3 N34 2 AN17 1 AK31 0
PIN SMEMA_ADR_H AN21 12 AN23 11 AJ33 10 AP24 9 AP26 8 AN25 7 AL28 6 AL26 5 AL30 4 AN31 3 AK29 2 AL33 1 AJ34 0
PIN NC AM26 5
PIN NC AP31 4
PIN NC AP32 3
PIN NC AM34 2
PIN NC AL34 1
PIN SMEMA_CS_L W34 3 Y32 2 Y31 1 AA34 0
PIN SMEMA_CKE_H AP20 3 AM20 2 AN19 1 AL20 0
PIN SMEMA_BA_H AH34 1 AE33 0
PIN CLK_SMEMB_H N31 5 AK15 4 AJ30 3 N27 2 AF17 1 AG29 0
PIN CLK_SMEMB_L N30 5 AL15 4 AH29 3 N26 2 AG17 1 AG30 0
PIN SMEMB_ADR_H AJ20 12 AL21 11 AF29 10 AJ22 9 AL23 8 AF21 7 AL25 6 AG25 5 AK27 4 AE24 3 AD27 2 AJ31 1 AG31 0
PIN NC AE23 5
PIN NC AL27 4
PIN NC AL29 3
PIN NC
AD26 2
PIN NC AE27 1
PIN SMEMB_CS_L W25 3 V25 2 T29 1 U26 0
PIN SMEMB_CKE_H AE18 3 AG19 2 AF19 1 AK19 0
PIN SMEMB_BA_H AA25 1 Y25 0
PAGE: 24 LOCATION: X2400
PIN SMEMA_ADR_H 27 9 122 8 29 7 125 6 32 5 37 4 130 3 41 2 43 1 48 0 115 12 118 11
PIN SMEMA_DAT_H 99 7 98 6 95 5 94 4 8 3 6 2 4 1 2 0 110 15 109 14 106 13 105 12 20 11 19 10 13 9 12 8 123 23 121 22 117 21 114 20 31 19 28 18 24 17 23 16 133 31 131 30 127 29 126 28 40 27 39 26 35 25 33 24 151 39 150 38 147 37 146 36 60 35 57 34 55 33 53 32 162 47 161 46 155 45 153 44 69 43 68 42 64 41 61 40 171 55 170 54 166 53 165 52 80 51 79 50 73 49 72 48
179 63 178 62 175 61 174 60 88 59 87 58 84 57 83 56
PIN NC 144 7
PIN NC 142 6
PIN NC 135 5
PIN NC 134 4
PIN NC 51 3
PIN NC 49 2
PIN NC 45 1
PIN NC 44 0
PAGE: 25 LOCATION: X2500
PIN SMEMB_ADR_H 27 9 122 8 29 7 125 6 32 5 37 4 130 3 41 2 43 1 48 0 115 12 118 11
PIN SMEMB_DAT_H 99 7 98 6 95 5 94 4 8 3 6 2 4 1 2 0 110 15 109 14 106 13 105 12 20 11 19 10 13 9 12 8 123 23 121 22 117 21 114 20 31 19 28 18 24 17 23 16 133 31 131 30 127 29 126 28 40 27 39 26 35 25 33 24 151 39 150 38 147 37 146 36 60 35 57 34 55 33 53 32 162 47 161 46 155 45 153 44
69 43 68 42 64 41 61 40 171 55 170 54 166 53 165 52 80 51 79 50 73 49 72 48 179 63 178 62 175 61 174 60 88 59 87 58 84 57 83 56
PIN NC 144 7
PIN NC 142 6
PIN NC 135 5
PIN NC 134 4
PIN NC 51 3
PIN NC 49 2
PIN NC 45 1
PIN NC 44 0
PAGE: 30 LOCATION: D3000
PIN ICH_HI_H G22 11 K21 10 J22 9 L22 8 M20 7 N21 6 M21 5 M23 4 H23 3 J20 2 H21 1 H20 0
PIN IDE_PRI_DAT_H AB17 15 AA16 14 Y16 13 AC16 12 AA15 11 AD16 10 Y15 9 AD15 8 AB14 7 AD14 6 AC15 5 AA14 4 AC14 3 Y14 2 Y13 1 AB16 0
PIN IDE_SEC_DAT_H AA23 15 AB24 14 AC24 13 AB22 12 AA20 11 AC22 10 AD22 9 Y19 8 AC20 7 AB20 6 AC21 5 AB21 4 AD24 3 AD23 2
AB23 1 AA22 0
PIN PCI_AD_H P2 31 F4 30 P4 29 F5 28 N2 27 D3 26 P3 25 E6 24 N4 23 C4 22 N5 21 H3 20 P5 19 B2 18 L1 17 G4 16 G5 15 K1 14 G2 13 L5 12 H4 11 M4 10 F2 9 K5 8 J2 7 J3 6 H2 5 H5 4 K4 3 G3 2 J5 1 J4 0
PIN PCI_C_BE_L M2 3 N3 2 J1 1 E3 0
PIN IDE_PRI_ADR_H AC19 2 AD19 1 AA19 0
PIN IDE_SEC_ADR_H W21 2 W23 1 W22 0
PIN LPC_LAD U4 3 R3 2 R4 1 T5 0
PIN LAN_ICH_RXD C11 2 C9 1 C10 0
PIN LAN_ICH_TXD B12 2 E9 1 D9 0
PAGE: 40 LOCATION: D4000
PIN LPC_LAD 24 3 23 2 22 1 21 0
PIN LPT_DAT_H 91 7 90 6 89 5 88 4 86 3 85 2 84 1 83 0
PAGE: 46 LOCATION: D4600
PIN LPC_LAD 17 3 15 2
BRASILIA BUSPINS
Page 6
DATUM
T-NR.
NORM
GEPR.
NAME
F
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
G
F
E
D
C
B
A
A
B
C
E
D
1 2
3 12
13 144
5
6 7
8 9 10 11 15 16 17
18
ZUST
DATUM
NAME
SACHNUMMER
FRAME1 VERSION 1
CURRENT_LOGIC
HIGHEST_LOGIC
VORGANG
REG_PAGE
FUJITSU
SIEMENS
COMPUTERS
S26361-D1534-X-*-11
02
02A3842
SCU
$
#
@
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:07 2003
DRAWING
14 1 13 0
PAGE: 90 LOCATION: D9000
PIN LAN_CSA_H H1 10 G2 9 H3 8 N2 7 M1 6 M2 5 L3 4 K1 3 J3 2 J2 1 J1 0
D1534 D1534
BRASILIA BUSPINS
Page 7
ABBREV=D1534
D1534
LAST_MODIFIED=Fri Jan 17 05:29:05 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
9
99
7+
CHANGE R9420-R9422,R9401 TO 0402
ADD R1090 (0R) TO SIGNAL CPU_BOOTSEL_H (POPULATE IF ONLY NWD)
CHANGE V1481 FROM IDP20N03L TO IDP12N03L (LOWER RDS
ADD X4750 HEADER + JUMPER
ADD V6560,A6560,R6560,R6561,R6562,D6560
NEW ICH SIGNALS: EN_PRESCOTT_L GPIO34(F21)
PROC_HOT CIRCUIT
DELETE D3180,R3181
ICH_SYNC CIRCUIT
ADD A6630/2 TO SIGNAL MON_ON_H (REDUCE H-LEVEL)
C2250 => B82-V8 (ALU)
38 CHANGE L3825,L3826 TO V26813-B356-V50 (NO L-SHORT !)
D1369 DDR TERM
NOTE SELECT FOR D7100: DEVICE AD1980 V26808-B7758-V30
DON’T POPULATE A7501 MODIFY C1900,C1901 FROM 6P8 TO 33P
DELETE C7100
20 30
MODIFY R1482 => 27K (P2V5P_DUAL STABILITY)
DON’T POPULATE K4310,K4311,K4320,K4321
RECONNECT A1580 PIN6 FROM P2V5P_DUAL TO VCC_DUAL (BETTER U )
99
85
14
10
19
ADD R7150 (0R) DON’T POPULATE
14
71
ADD R9118 (SELECT ASPI EEPROM)
CE
65
14
14
14
92
SECTION A1580
15,19
15
RECONNECT V1521
65
48
30
13
48
66
72
92
19
PAGE
08.07.02
SCHUTZ
22 22
D1382 FIRST COPY D1451 AUDIO
91
MODIFY CHANGE MODIFY MODIFY MODIFY
31
30,65
47
15
91
71
10
80 13
14,21,22,30,31,35,80
14
19
14
15
DON’T POPULATE A1555-A1557 MODIFY C1005 FROM 100N TO 1U
REPLACE X8000 AGP CONNECTOR
14,15
91
91 48
DON’T POPULATE C4818
65
48
DEL A6520 (RAC)
22
RECONNECT A1580/3 TO V1521/3
CHANGE C1429 FROM 680U TO 22U
NEW SIGNAL P2V4P
SIGNALCHANGE P1V5P_AI --> P1V5P
DON’T POPULATE L1310,L1302,L1303
ADD L1320,L1322,L1323
(KOMBI-LAYOUT)
RECONNECT V1480 ANODE TO VCC_DUAL
14
45
DON’T POPULATE K4500
DON’T POPULATE C1020,C1023
43 44
DON’T POPULATE K4401,K4402
13
48
15 80
CHANGE R1423 FROM 24R9 TO 113R
75
)
LAN DISABLE CIRCUIT DEL D9150 ,R9150
DEL A9201,A9203
33 CHANGE WGS-ID
C1992 => B51-V7 (0603) C9111 => B51-V7 (0603) C9267 => B51-V7 (0603)
MODIFY R1333,R1531 TO 6K8 NTC
ON
MODIFY R1485 => 10K (P2V5P_DUAL STABILITY)
CHANGE N1410 FROM EZ1085 TO IRU1030CD (DPAK)
15
47
DON’T POPULATE A1432,C1490
CHANGE R4851-R4854 INTO A4851 (RAC 33R) CHANGE R9111 FROM 2K2K TO 1K
ADD R4856,C4851 (SIGNAL QUALITY) ADD NEW SIGNAL : PCI_RST_IDE3V_L
ADD R6521 (470R, SIGNAL QUALITY) ADD R1350-R1352 10R (DRIVER PERFORMANCE)
DEL A1330 (RAC), V1330 (SINGLE TR.)
CHANGE SIGNAL CPU_BOOTSEL_H --> _L
DEL V1421,V1422, A1400,A1401
CHANGE N1430,N1431,N1580 => LP2996 (V26811-B641-V40)
C2258 =>470U ALU V26803-B42-V53 (10MM)
71 DELETE C7100 (NOT REQUIRED)
REMOVE A4850/3 (PU ONLY 10MA, GOOD L-LEVEL)
85 CONNECT V8573,V8574 WITH THE CATHODE (PIN1) TO P3V3P (NOT 1V5)
SIGNAL-CHANGE AGND ->GND AT A7240/2/3/4 , C7241 (DIGITAL)
DON’T POPULATE R9900,R9901,V9900,R9915,R9918 (ONLY FOR REPAIR)
DON’T POPULATE ELKO C1451
MODIFY R1334 TO 1K62
DON’T POPULATE C4802
ADD A4700, R4702 AND RECONNECT (COST)
MODIFY R1522 FROM 1K5 5% TO 1K5 1%
91
PAR TO S4750
94
RECONNECT A4850/1 FROM P3V3P TO GND ( ENABLE BUFFER LVC125)
RECONNECT SIGNAL MON_ON_H FROM ICH GPO20(U22) TO GPO22(U20)
ADD A3180,V3180
(V26827-B470-V105)
CHANGE V1511 FROM IDP12N03L TO IDP20N03L (LOWER PRICE) MODIFY A1550-A1557 FROM 47R TO 470R (WRONG VALUE)
EN_STPCLK_L GPO20(U22)
DELETE R6521
RECONNECT C1483/1,R1482/2,N1480/5 FROM VCC_DUAL TO L1480/2
MODIFY C1482 1U FROM Y5V TO X5R (VOLTAGE DERATING)
DEL THERMAL CONTROL CIRCUIT FOR THE CPU CORE REGULATOR DEL GMCH-VTERM_GTL-REGULATOR REGULATOR (LP2996)
ADD CPU_BOOTSEL_L TO V1521/3 CHANGE D1900 FROM CK-409 TO CK-409-2 (REDUCE PIN-COUNT) ADD A1901 ( NEW CPU_BSEL CONNECTION) CHANGE R2260-R2262 TO RAC A2260
CHANGE D4850 FROM 74LVC125 TO 74LVC14 AND RECONNECT CHANGE A4850 FROM 470R TO 220R AND RECONNECT
CHANGE R4855 FROM RSHORT TO 33R CHANGE R4880,R4881 INTO RAC A4881
CHANGE R9152 FROM 10K TO 4K7 CHANGE V9150 FROM BCR133S TO BCR183S ADD A9152 (470R), V9151 (BCR183S) RECONNECT V9150,V9151,A9152
CHANGE D9110 TO EEPROM 2KX8 SPI CONNECT D9110 PIN3 AND PIN7 WITH R9111 PIN2 (ONLY ONE PU)
CHANGE TEXT IN 10R/8=1R25 0.5W ADD R6569 R-SHORT DON’T POPULATE
(ONLY FOR SHUTDOWN AND SOFTSTART) MODIFY R1490 FROM 470R TO R-SHORT MODIFY V1451 FROM SI4410 TOBSO4420 (RDSON=9MR)
DON’T POPULATE V6560,A6560,R6560,D6560 (NO PROC_HOT)
ADD R1330, V1330 (BCR119S) , SIGNAL CPU_BOOTSEL_H
NEW PCI RESET CIRCUIT
ADD D4851 74AHCT1G32 FOR IDE RESET 5V (DON’T POPULATE)
CHANGE N1020 TO V26811-B631-V40 (BETTER PERF.)
91 COMBINED R9105 AND R9106 INTO A9100
V8570-V8574, C8470-C8574
44 REPLACED R4410 WITH 2 ELEMENTS OF A4505
37 CHANGED L3826, L3856, L3855 TO L-SHORT
15 CHANGED N1500 TO LM1117-LGA8
AUDIO CHANGES
DON’T POPULATE R4700-R4702 (FOR ADJUSTMENT) ,C4700
MODIFY K7110 FROM 1N TO 270P
20 REMOVED SMEMA/B_C_ADR_H<5..1> SIGNALS
30,34 CONNECTED D3000/W4 AND A3440/7 TO LAN_CSA_PME_H
91 ADDED INVERTER FOR LAN_CSA_PME_L (V9120 AND R9120)
LAN WAKEUP FIX
DON’T POPULATE A1330,V1330,V1332 (NO CPU_BOOTSEL)
DON’T POPULATE V1521 (NO CPU_BOOTSEL)
POPULATE A7100,A7101,C7113,C7150,C7155,C7158
POPULATE R7500 MODIFY A1931 FROM 33R TO 22R , R1950 FROM 33R TO 10R
ADD SER RESISTOR 100R TO DUAL_OK_3V3_H (R3050) MODIFY R1480,R1481 (113R,49R9) TO GET 2,61V (NEW MEMORY VOLTAGE)
REMOVED SIGNALS NECESSARY FOR THE 2DIMM/CHANNEL SOLUTION ONLY:
45 CHANGED A4505 TO 1K 47 REPLACED A4750 WITH 2 ELEMENTS OF A7250 48 CHANGED C4810 TO NOT POPULATED
91 COMBINED R9100, R9109 AND R9110 INTO A9101 91 COMBINED R9111 AND R9107 INTO A9102
71 ADDED PAPERGATE P7149 TO CONNECT AGND & GND BELOW AC97 COCEC 72 CHANGED TO NOT POPULATED: V7200, A7200, A7240, C7240-C7241 72 CHANGED TO POPULATED: R7230 72 REMOVED X7230 (SPEAKER IS ON E383 NOW)
DON’T POPULATE V1410,R1412,V1411,R1413 (NO P3V3P_DUAL SWITCH)
75 COMBINED R7500 AND R7501 INTO A7502 71 EXPANDED K7110 TO C7120-C7123; CHANGED C7120-C7121 TO NOT POP.
NOTE X8000 = V26827-B432-V225 DON’T POPULATE C8570-C8572,V8573,V8574
DON’T POPULATE R7100,C7110,C7151,C7156
ADD R7105 (100R)
ADD SER RESISTOR 100R TO POWER_OK_3V3_H (R2010)
ADD R9420-R9422 DON’T POPULATE R9421,R9422
CHANGE R9154 FROM 619R T0 590R. PERFORMANCE OF THE KINNERETH.
REMOVE OF UNNEEDED DDR SIGNALS/PARTS
27 REMOVED R2712
MODIFY C1483,C1484 FROM 100N TO 1U/X5R (TO INCR. BOOT PERF)
38 CHANGED C3829 AND C3859 TO NOT POPULATED
38 COMBINED R3821, R3822 TO A3820
38 CHANGED L3725, L3726, L3706, L3705 TO L-SHORT
37 CHANGED C3709 AND C3729 TO NOT POPULATED
14,24 CHANGED TO 1M0-M-6V3-R070: C1489, C1491, 2413
28 REMOVED R2812, A2870, R2815-R2817
10 COMBINED R1090 AND R1092 IN A1090
COST REDUCTION
14 CHANGED TO UNPOPULATED: N1430 14 CHANGED TO POPULATED: A1430 AND A1431 14 CONNECTED V_TERM_A/B_SENSE TOGETHER VIA A1431 14 CONNECTED V_TERM_A/B_SENSE TOGETHER VIA A1431 (SINGLE DDR TERM)
INTEGRATED GTL TERM REGULATOR
19 REPLACED A1580 WITH A1901 (PU FOR CPU_SOCET_OCC_L)
15 ADDED N1520, A1520, C1520-C1522, V1520, V1521, R1520-R1522
15 REMOVED C151*, C152*, R151*, R152*, N1510, V151*, V152*, A1580
SINGLE DDR TERM REGULATOR
VARIOUS CHANGES
37 REMOVED V3700
19 REMOVED C1984
91 REMOVED R9117 13 ADDED NOTE TO FOR THE RIGHT PART NUMBER OF V1300-V1311
13 CHANGED V1302, V1309 AND V1310 TO NOT POPULATED
13 CHANGED R1300, R1312, R1314 (R-SHORT) TO 5R1 (NEW FET SUPPORT) 13 CHANGED R1350, R1351, R1352 (10R) TO 5R1 (RELAYABILITY) 14 REMOVED UNNEEDED PADS: P1432-P1435, P1442 AND P1443
19 ADDED P190* TO CONNECT THE GND ISLAND BELOW THE CKLSYNT TO GND 30 REMOVED R3030 (WORKAROUND FOR EARLY ICH5 STEPPINGS)
65 CONNECTED A6550/8 TO A6550/2 INSTEAD OF A6550/7 66 ADDED V6692 AS PLACEMENT OPTION FOR V6690 80 ADDED P1V5P BULK DECOUPLING FOR AGP & ICH5 (C8027)
SCHEMATIC DATE
72 CHANGED TO NOT POPULATED: C8510, A8411, C8522, C8523,
94 REMOVED STUFFING OPTION FOR LED SIGNALLING (R9420-R9422)
16.01.03
13 ADDED C1301 (UNPOPULATED) BECAUSE OF LAYOUT RESTRICTIONS
BRASILIA
HISTORY
Page 8
R1002
220R-J-W06
R1003
301R-F-W06
R1000
61R9-F-W06
R1009
61R9-F-W06
R1008
61R9-F-W06
A1080
AR2
4XS-1K0-J-W06
A1080
AR2
4XS-1K0-J-W06
A1080
AR2
4XS-1K0-J-W06
A1080
AR2
4XS-1K0-J-W06
C1011
10P-J-50V-COG-2
C1010
10P-J-50V-COG-2
C1020
1U0-Z-10V-Y5V
R1091
121R-F-W06
C1023
1U0-Z-10V-Y5V
C1005
1U0-Z-10V-Y5V
R1020
2K43-F-W06
A1060
4XS-56R-J-W06
A1060
4XS-56R-J-W06
A1060
4XS-56R-J-W06
A1060
4XS-56R-J-W06
A1061
4XS-56R-J-W06
A1061
4XS-56R-J-W06
A1061
4XS-56R-J-W06
A1061
4XS-56R-J-W06
2 3 4
5 6 7 8 9
10
VIDPWRGD
BOOTSELECT
OPTIMIZED/COMPAT
SKTOCC
12
11
ADDRESS/DATA
CONTROL
AGTL
TRANSFER
ARBITRATION
RESET
CLOCK/ERROR
VSS_SENSE
VCC_SENSE
VID<5:0>
TESTHI
TESTHI
VCC_IOPLL
VSS_A
COMP
VID GENERATION
CMOS (CPU_VCC)
DBR
PROC_HOT
BPM<5:0>
CMOS (CPU_VCC)
AP<1:0>
REQ<4:0>
ADSTB<1:0>
ADR<35:3>
DP<3:0>
D<63:0>
AGTL
RSP TRDY
1
0
VCC_A
THRMTRIP
THERMDC
TEST
IERR
IGNNE
DRDY
DBSY
HITM
HIT
ADS
DEFER
RS<2:0>
DBI<3:0>
VCCVIDLB
A20M
RESET
STPCLK
FERR
TCK
TDOTDI
TMS
TRST
NMI/LINT1
INTR/LINT0
SMI
PWRGOOD
PRESCOTT
BCLK0
INIT
SLP
THERMDA
BPRI BR0
MCERR
BINIT
BNR
LOCK
0 1
+
-
DSTB0
+
-
DSTB1
+
-
DSTB2
+
-
DSTB3
VCC_VID
ITP_CLK
0 1
0 1
BSEL
GTLREF
0 1 2 3 0 1
CV1,GND
PRESCOTT
D1000
PRESCOTT-BGA478
R1021
220R-J-W06
A1081
AR2
4XS-1K0-J-W06
A1081
AR2
4XS-1K0-J-W06
A1081
AR2
4XS-1K0-J-W06
A1081
AR2
4XS-1K0-J-W06
(1.2V)
VOUT
VIN EN GND
PWRGD
N1020
SN105125-SOT23
SN105125
R1095
R00-1A0
A1090
4XS-56R-J-W06
A1090
4XS-56R-J-W06
ABBREV=D1534
D1534
LAST_MODIFIED=Fri Jan 17 05:18:48 2003
DRAWING
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
10
99
8+
POPULATE R1095 IF ONLY NWD, BECAUSE OF NO PSC SUPPORT
VID VR
30MA PEAK
1.20 V
CPU
N.C.
CPU
CPU
(0,8-1,6V)
DO NOT POPULATE R1000 IN CASE OF ONBOARD DEBUG CONNECTOR
N.C.
N.C.
N.C.
N.C.
N.C.
SCHUTZ
N.C.
CPU
ICH
CPU
N.C.
CRB0.7: F20
N.C.
PLACE NEAR CPU
PLACE AS NEAR TO THE CPU AS POSSIBLE
ICH
FOR TESTABILITY
02A3083
08.07.02
10.10.02
SCU01
08.07.02
SOCKET 478 PULLUPS
CPU
PLACE NEAR ICH5
PLACE NEAR ICH5
N.C.
N.C.
N.C.
N.C.
TP REQUIRED TP REQUIRED
10 20
10 20 65
30 99
10 11 12 13 15 21
10 13
10 13
10 13
10 13
10 13
10
12 20
12
10
10 13 19
12
12
30
30
12
10 19 22
10 19 22
10
10
10 20
20 20
19
20
10 11 20
10 11 20
20
20
20
20
20
20
30 30 30
30
30 30
10 13
11 11 11
10 10
12 12
20 20
20 20
10 20 65 10 30
19
10 12
11
10 11
65
10 13
20
20
20
20
12
30 99
10 11 12 13 15 21
10 19 22
12
10 13
10 30
10 13
20
10 30
10 30
10 30
11
12
10 13 19
19
10 30
20
20
20
20
20
20
65
12
10 12
10 19 22
10 11
81
72
21
5
4
2
3
1
63
54
72
81
21
AD25
J6
A6
Y3
W4
U6
AB22
AA20
AC23
AD5
AD6
A4
AB2
A5
AE25
D5
AF26
C4
B3
A2
C3
B6
W22
W23
R22
P23
K22
J23
E22
E2
F21
E3
F3
H2
H5
G1
G4
G2
AA3
H6
V6
AC3
AC24
AC20
AC21
AA2
AD24
F6
F20
AA6
D2
AA21
AD20
AD22
AE23
P1
L24
AD2
AB23
AF3
AF4
AB25
AD26
AC26
C1
F7
E6
D4
AD1
Y4
AB26
B5
AF23
E5
D1
W5
B2
C6
AE26
AF22
81
72
54
63
54
63
72
81
21
21
21
21
21
21
21
63
54
72
81
21
21
21
21
21
CPU_BSEL0_H
CPU_TESTHI_G2D_H
CPU_TESTHI_G8U_H CPU_TESTHI_G9U_H
CPU_VID_H<5..0>
CPU_BPM_L<5..0>
CPU_BSEL1_H
CPU_TESTHI_G10U_H
CPU_TDI_H
P3V3P
CPU_VID_H<0>
CPU_BSEL0_H
CPU_THERMTRIP_L
CPU_FPU_ERR_L
POWER_OK_CPU_H
GTL_BUSREQ_L
GTL_DSTB_P_L2
GND
CPU_BOOTSEL_H
GND
CPU_VID_H<1>
CPU_BOOTSEL_H
POWER_OK_CPU_H
CPU_VID_H<4>
CPU_VID_H<5>
BRASILIA
PRESCOTT CPU
CPU_VCC_A
V26811-B631-V40
VID_VCC_GD_H
GND
CPU_VCC_IOPLL VREF_GTL
VCC_VID
CPU_BPM_L<5..0>
GTL_DBI_L<3..0>
GTL_HIT_L GTL_HIT_MODI_L
GTL_DATA_L<63..0>
COMP0_GTL_CPU
THRM_DIODE_NEG
CPU_SOCKET_OCC_L
CPU_FPU_ERR_L
CPU_THERMTRIP_L
CLK_100_CPU_L
CLK_100_CPU_H
VCC_CPUCORE
GND
GND
VCC_CPUCORE
C
C
5
4
3
1
2
0
CPU_TESTHI_G2D_H
CPU_TESTHI_G4U_H
CPU_TDO_H
THRM_DIODE_POS
CPU_PROC_HOT_L
GTL_DSTB_N_L3
GTL_DSTB_P_L3
GTL_DSTB_N_L2
GTL_DSTB_N_L1
GTL_DSTB_P_L1
GTL_DSTB_N_L0
GTL_DSTB_P_L0
GTL_DATRDY_L
GTL_DATBSY_L
GTL_BUSLOCK_L
GTL_BLOCKNR_L
CPU_VSS_A
COMP1_GTL_CPU
VID_VCC_GD_H
CPU_TMS_H
CPU_TRST_L
CPU_TCK_H
CPU_STOPCLK_L
CPU_SMI_L
CPU_NMI_H
CPU_INTR_H
CPU_INIT_L
CPU_IGNNE_L
CPU_A20MASK_L
GTL_CMD_L<4..0>
GTL_ADRSTB_L<1..0>
GTL_ADR_L<35..3> NO_SINGLE_CHECK=ON
GTL_TRDY_L
GTL_DEFER_L
GTL_RESET_L
CV1=VCC_CPUCORE
GTL_PRIREQ_L GTL_BUSREQ_L
GTL_RESP_L<2..0>
GTL_ADS_L
CPU_VID_H<2>
CPU_SLEEP_L
GND
COMP0_GTL_CPU
COMP1_GTL_CPU
P3V3P
GND
VCC_VID
GTL_RESET_L
CPU_VID_H<3>
CPU_TESTHI_G4D_H
CPU_BSEL1_H
CPU_TESTHI_G1D_H
CPU_PROC_HOT_L
CPU_TESTHI_G1U_H
GND
Page 9
R1110
R00-1A0
TDO
POWERON
GND
FBI
TCK
TRSTN
TMS
TDI
GND
DBRESET#
BSEN#
GND
BP[3]#/OA[3]#
BP[2]#/OA[2]#
PM[0]#/OA[0]#
GND
BCLK REF PREQ0#
BCLK
FBO
RESET#
PREQ0#
PRDY#
PM[1]#/OA[1]#
GND
C
25
26
2 1
18
1
24
C
22
20
14 16
10
8
6
4
2
25
23
21
19
17
15
13
11
9
7
5
3
12
XB482-V26
X1100
STSMT11-026
R1100
27R-J-W06
R1102
39R2-F-W06
R1103
51R1-F-W06
R1101
680R-J-W06
R1104
150R-F-W06
R1105
39R2-F-W06
R1112
1K5-J-W06
R1113
150R-F-W06
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
11
99
9+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:48 2003
DRAWING
PLACE NEAR CPU
R1100 REC. 27R4
PLACE NEAR CPU
ALWAYS POPULATE
TDO NOT REQUIRED WITHOUT ITP
N.C.
N.C.
= DON’T POPULATE
08.07.02 SCHUTZ
ITP700 TEST PORT
ROUTE TCK TO CPU AND BACK TO FBO PIN17 AT CONNECTOR
(5%)
BRASILIA
10 11
10 20
11
10 11
19
10 10
11
10
10
10
10
30 47 65
10 11
10 11 10 11 10 11 10 11
10 11
10 11 12 13 15 21 30 99
19
10 11
10 11
10 11
11
30 99
10 11 12 13 15 21
21
21
21
21
21
21
21
9
87
65
43
25
2423
2221
20
2
19
1817
1615
1413
1211
10
1
21
21
ITP
CPU_TCK_H
CPU_TMS_H
CPU_TDI_H
CPU_TDO_H
CLK_HOST_ITP_L
V26827-B482-V126
ITP_POWERGOOD_H
CPU_BPM_L<0> CPU_BPM_L<1>
CPU_BPM_L<4> CPU_BPM_L<5> ITP_RESET_L
VCC_CPUCORE
GND
CPU_TDO_H
CPU_TDI_H CPU_TMS_H CPU_TRST_L CPU_TCK_H
CPU_TCK_H
VCC_CPUCORE
GND
GND
R
R
CLK_HOST_ITP_H
BUTTON_RST_L
GTL_RESET_L ITP_RESET_L
CPU_TRST_L
NO_POWER_PINS
CPU_BPM_L<2> CPU_BPM_L<3>
ITP_RESET_L
Page 10
C1235
47P-J-50V-COG
C1232
22P-J-50V-COG
C1231
22P-J-50V-COG
C1238
47P-J-50V-COG
C1237
47P-J-50V-COG
C1236
47P-J-50V-COG
C1233
22P-J-50V-COG
R1211
169R-F-W06
A1220
AR2
4XS-56R-J-W06
A1220
AR2
4XS-56R-J-W06
A1220
AR2
4XS-56R-J-W06
A1220
AR2
4XS-56R-J-W06
A1221
AR2
4XS-56R-J-W06
A1221
AR2
4XS-56R-J-W06
A1221
AR2
4XS-56R-J-W06
A1221
AR2
4XS-56R-J-W06
C1212
100N-Z-25V-Y5V
L1200
10U-A06-R65
L1
L1201
10U-A06-R65
L1
R1210
200R-F-W06
C1230
22P-J-50V-COG
C1210
100N-Z-25V-Y5V
C1211
100N-Z-25V-Y5V
R1220
61R9-F-W06
C1200
1U0-Z-10V-Y5V
C1201
+
C1202
33U-M-6V3
ELKO
R1212
200R-F-W06
P1200
PAPERGATE
PAPERGATE
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
12
99
10+
ABBREV=D1534
D1534
LAST_MODIFIED=Fri Jan 17 05:28:49 2003
DRAWING
EMI C’S
PLACE NEAR CPU PIN
08.07.02 SCHUTZ
REC. 62R
PDG: 220P
PLACE NEAR MCH PIN
100MA
ESR<0R3
ESL<5NH
10UH 60MA
BRASILIA
10
10 12 20
10 11 12 13 15 21 30 99
10
10 11 12 13 15 21 30 99
10 11 12 13 15 21 30 99
10
10
10
10
10
10
10
10
10 11 12 13 15 21 30 99
10 12 20
15 19 21
10
21
21
2 1
21 21
21
21
21
21
21
21
21
21
21
21
21
21
21
54
72
63
81
81
72
63
54
21
2
1
21
CPU SUPPORT
VTERM_GTL
0.7
CPU_TESTHI_G1D_H
CPU_TESTHI_G4D_H
GND
V26803-B73-V2V26803-B73-V2
VREF_GTL
VCC_CPUCORE
V26803-B54-V121
CPU_TESTHI_G1U_H
CPU_TESTHI_G8U_H
VCC_CPUCORE
CPU_TESTHI_G2D_H
CPU_TESTHI_G9U_H
GND
CPU_TESTHI_G10U_H
C
VCC_CPUCORE
VREF_GTL
CPU_TESTHI_G4U_H
CPU_VSS_A
CPU_VCC_A
CPU_VCC_IOPLL
GND
VCC_CPUCORE
C
C
C
C
C
C
C
Page 11
C1306
1U0-Z-16V-Y5V
C1345
10U-M-6V3-X5R
C1344
10U-M-6V3-X5R
C1343
10U-M-6V3-X5R
C1342
10U-M-6V3-X5R
C1341
10U-M-6V3-X5R
C1340
10U-M-6V3-X5R
L1310
U86-23A-IO-258
L1
P48
P46
P44
P43
P49
P47
P45
P51
P50
P25 P27 P29 P31 P33
P37
P35
P24 P26
P32
P36
P34
P28 P30
L1302
U86-23A-IO-258
L1
C1328
1U0-Z-16V-Y5V
C1334
100N-K-16V-X7R
C1337
1U0-Z-16V-Y5V
L1303
U86-23A-IO-258
L1
C1321
1U0-Z-16V-Y5V
C1333
330P-J-50V-COG-2
C1331
10N-K-50V-X7R-2
R1303
49R9-F-W06
R1337
6K2-F-W06
R1308
130K-F-W06
C1332
1U-K-10V-X5R
C1364
10U-M-6V3-X5R
C1363
10U-M-6V3-X5R
C1362
10U-M-6V3-X5R
C1361
10U-M-6V3-X5R
C1360
10U-M-6V3-X5R
C1359
10U-M-6V3-X5R
C1358
10U-M-6V3-X5R
C1352
10U-M-6V3-X5R
C1353
10U-M-6V3-X5R
C1354
10U-M-6V3-X5R
C1355
10U-M-6V3-X5R
C1356
10U-M-6V3-X5R
C1357
10U-M-6V3-X5R
C1347
10U-M-6V3-X5R
C1346
10U-M-6V3-X5R
C1349
10U-M-6V3-X5R
C1350
10U-M-6V3-X5R
C1351
10U-M-6V3-X5R
C1336
1U0-Z-16V-Y5V
+
C1300
1M5-M-16V-R018
ELKO
P1309
P1307
P1310
P1329
P1327 P1328
P1308
P1306
P1305
P1325 P1326
P1304
P1303
P1302
P1321
P1323
P1322
P1324
P1318
P1337
P1336
P1317
P1335
P1316
P1313
P1315
P1314
P1312
P1311
P1332 P1333 P1334
P1331
P1330
+
C1384
2M2-M-6V3-R015
123
4
3
1 2
4
X1300
DIVST051-004
XB406-V104
C1398
C1399
100N-Z-25V-Y5V
+
C1317
2M2-M-6V3-R015
+
C1316
2M2-M-6V3-R015
+
C1315
2M2-M-6V3-R015
+
C1314
1M5-M-6V3-R026
+
C1318
1M5-M-6V3-R026
+
C1380
2M2-M-6V3-R015
+
C1383
1M5-M-6V3-R026
+
C1382
2M2-M-6V3-R015
+
C1381
1M5-M-6V3-R026
C1390
10U-M-6V3-X5R
C1391
10U-M-6V3-X5R
C1392
10U-M-6V3-X5R
C1393
10U-M-6V3-X5R
R1307
15K-J-W06
C1397
22N-K-25V-X7R
L1301
1U3-8A-IO-261
L1
C1396
10U-M-6V3-X5R
C1394
10U-M-6V3-X5R
C1395
10U-M-6V3-X5R
R1304
27K-F-W06
C1378
10U-M-6V3-X5R
C1376
10U-M-6V3-X5R
C1312
1N0-K-50V-X7R-2
R1315
3R3-J-W10
C1311
1N0-K-50V-X7R-2
R1318
3R3-J-W10
R1310
3R3-J-W10
C1310
1N0-K-50V-X7R-2
R1322
2K0-F-W06
R1323
2K0-F-W06
R1321
2K0-F-W06
P59
P56 P57 P58
P53 P54
P55
P52
C1325
100N-K-16V-X7R
D
S
G
V1306
IPD04N03L
FETN3P-3
D
S
G
V1308
IPD04N03L
FETN3P-3
D
S
G
V1300
IPD04N03L
FETN3P-3
D
S
G
V1311
IPD04N03L
FETN3P-3
D
S
G
V1309
IPD04N03L
FETN3P-3
D
S
G
V1310
IPD04N03L
FETN3P-3
D
S
G
V1302
IPD04N03L
FETN3P-3
D
S
G
V1301
IPD04N03L
FETN3P-3
D
S
G
V1307
IPD04N03L
FETN3P-3
+
C1329
1M5-M-16V-R018
ELKO
+
C1322
1M5-M-16V-R018
ELKO
+
C1304
1M5-M-16V-R018
ELKO
P1350 P1351 P1352 P1353 P1354 P1355
C1324
100N-K-16V-X7R
BOOT1
UGATE1
PVCC VCC
PHASE1 LGATE1
PGND
NC
NC
HIP6602BCR
PGNDTAB
PWM2
BOOT2
UGATE2
PHASE2 LGATE2
GND
PWM1
N1305
HIP6602BCR-LGA16
HIP6602BCR
LVCC
NC NC NC NC
PGND
NC NC
GNDTAB
GND
LGATE
PHASE
VCC
PVCC
UGATE
BOOT
PWM
HIP6604
N1302
HIP6604BCR-LGA16
HIP6604BCR
GNDTAB
GND
GND
VSEN
ENLL
RGND
VDIFF
COMP
FB
VID2
VID3
ISEN3
ISEN1
ISEN4
VCC
PWM4
FS
DAC
VID4
PGOOD
EN
ISL6556ACR
VID1
OVP
PWM3
GND
OFSOUT
REF
VID0
OFS
ISEN2
VID12.5
PWM1 PWM2
ISL6556ACR
N1303
ISL6556-LGA32
R1336
750R-F-W06
R1334
1K62-F-W06
C1330
470P-J-50V-COG-2
R1335
2K43-F-W06
R1332
1K0-F-W06
R1309
1K0-F-W06
R1301
12K-F-W06
R1302
1K62-F-W06
R1333
R-RT
NTC-6K8-J
+
C1305
1M5-M-16V-R018
ELKO
R1338
750R-F-W06
D
S
G
V1332
BSH112-SOT23
FETN3P-5
R1339
R00-1A0
R1344
R00-1A0
R1350
5R1-J-W06
R1351
5R1-J-W06
R1352
5R1-J-W06
R1330
10K-J-W06
4K7
4K7
V1330
BCR119S-SOT363
T-NPN-BCR119S
+
C1301
47U-M-16V
ELKO
R1300
5R1-J-W10
R1312
5R1-J-W10
R1314
5R1-J-W10
P1340
PAPERGATE
P1341
PAPERGATE
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
13 99 11+
D1534
Fri Jan 17 05:28:49 2003
DRAWING
C1313 REMOVED
FOR NWD-CPU= V26810-B789-V40
V1300, V1306, V1308: V1301, V1307, V1311:
FOR NWD-CPU= V26810-B785-V40
NC
ALU ELKO
V1330, V1332 AND R1330 ONLY NECESSARY FOR PRESCOTT SUPPORT
(OUTPUT)
2K2 PU ON PG.15
FROM CPU
L=NW
H=PC
NC
20.09.02
68A/78A
LOW ESR NECESSARY
SOCKET
DIE
33MOHM
BRASILIA
13 43 53 66
15
10 19
10
10
10
13 43 53 66
15
10
10
10
10
30 99
10 11 12 13 15 21
30 99
10 11 12 13 15 21
21
21
21
21
21
2 1
4
3
1
6
5
2
21
21
21
21
21 21
D
S
G
2 1
2 1
21
21
21
21
21
21
21
21
21
6
4 5
3
2
1
33
29 26 2532 24 23 19 20 21 22 17 16 15 14
31
13 28 1827
12
11
10
9
8
7
30
2
12
8
6
1
3
9
10
17
15
13
5
4
7
14
16
11
13
11
12
1
4
16
15
14
5 8
17
6
7
10
9
2
3
21
1
1
1
1
1
1
2 12 12 1
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
S
D
G
21
1
1
1
1
1
1
1
1
21
21
21
21
2
1
21 2121 21
21
21
21
212121
21
2121
21
21
21
21
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
21
21
4
3
2
1
2 1
1 1
1
1
1
1 1
1 1
1
1
1
1
1 1
1
1
1 1
1
1 1 1
1
1
1 1
1
1
1
1
1
1
1
2 1
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2 1
21
21
21
21
21
21
2 1
2 1
21
21
2 1
1
1
1 1
1
1
1
1 1
1
1
1
1
1
1
1
1 1 1
1
1 1 1
2 1
21
21
21
21
21
21
21
GND
GND
V26803-B42-V51
V26813-B1051-V1
V26803-B82-V5
V26801-B71-V7
V26803-B51-V8
V26813-B1055-V1
GND
V26803-B90-V1
GND
GND
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
V26803-B90-V1
C
V26803-B90-V1
C
C
V26803-B90-V1
C
V26810-B773-V40
0.7
0.7
VCC_CPUCORE
GND
SKORDEV
CPU CORE VOLTAGE REG.
GND
V26803-B42-V50V26803-B42-V50
CPU_BOOTSEL_L
CPU_BOOTSEL_H
GND
P12VP_CORE
GND
VCC_CPUCORE
P12VP_PHASE_1
P12VP_PHASE_2
P12VP_PHASE_3
P12VP_PHASE_3
GND
VCC
GND
GND
P12VP_FILTER
P12VP_CORE
GND
GND
PWM3_H
GND
PWM2_H
PWM1_H
GND
GND
GND
GND
GND
GND
P12VP_CORE
GND
GND
P12VP_PHASE_2
P12VP_PHASE_1
GND
GND
GND
PWM3_H
PWM2_H
PWM1_H
VCC
GND
VRM_PWR_OK_H
CPU_VID_H<4> CPU_VID_H<3> CPU_VID_H<2> CPU_VID_H<1>
V26810-B583-V3
V26813-B1055-V1
C C
C
C
C
V26803-B90-V1
CCC
C
C
C
P12VP_FILTER
P12VP_CORE
VID_VCC_GD_H
CPU_VID_H<5>
CPU_VID_H<0>
V26813-B1055-V1
V26803-B42-V50
GND
P12VP_CORE
V26803-B42-V50
GND
V26803-B42-V50
Page 12
A1441
AR2
4XS-4K7-J-W06
AR2
AR2
AR2
R1421
24R9-F-W06
R1420
121R-F-W06
C1422
1U0-Z-10V-Y5V
C1421
100N-Z-25V-Y5V
+
C1451
1M5-M-6V3-R026
ELKO
+
C1433
1M0-M-6V3-R070
ELKO
+
C1434
1M0-M-6V3-R070
ELKO
C1410
1U0-Z-16V-Y5V
C1411
1U0-Z-10V-Y5V
+
C1413
680U-M-6V3-R170
ELKO
R1410
200R-F-W06
C1417
100N-Z-25V-Y5V
R1411
121R-F-W06
P1413
P1415
P1414
P1412
P1411
P1410
PAD
PAD_0.70
P1431
P1430
PAD
PAD_0.70
P1439
P1438
P1437
P1436
PAD
PAD_0.70
SENSE
VOUT_TAB
VPWR
VOUT
VCTRL
ADJ
N1420
FAN1581M-DDPAK2
FAN1581M
C1423
1U0-Z-10V-Y5V
D
S
G
V1450
BSL211SP-TSO6
BSL211SP
V1410
SI4410DY-SO8
FETN8P
R1413
2K2-J-W06
R1412
10K-J-W06
V1411
BC846B
T-NPN
C1426
1U0-Z-10V-Y5V
R1422
121R-F-W06
R1423
113R-F-W06
SENSE
VOUT_TAB
VPWR
VOUT
VCTRL
ADJ
N1421
FAN1581M-DDPAK2
FAN1581M
C1427
1U0-Z-10V-Y5V
C1425
100N-Z-25V-Y5V
C1424
1U0-Z-10V-Y5V
P1423
PAD
P1424
PAD
P1441
P1440
A1430
AR2
4XS-0R-J-W06
R1430
R00-1A0
R1431
R00-1A0
R1432
R00-1A0
A1431
AR2
4XS-0R-J-W06
+
C1450
100U-M-6V3-R440
ELKO
A1432
A1432
AR2
4XS-10K-J-W06
C1436
1U0-Z-10V-Y5V
C1435
C1437
1U0-Z-10V-Y5V
C1438
1U0-Z-10V-Y5V
D
S
G
V1482
IPD20N03L
FETN3P-3
L1480
1U3-8A-IO-261
L1
L1481
IO-241-002
L1
VCC
ISL6520A
COMP/OCSET
FB GND
BOOT
UGATE
PHASE
LGATE
N1480
ISL6520A-SO8
ISL6520A
R1483
R00-1A0
C1486
470P-J-50V-COG-2
C1485
10N-K-50V-X7R-2
R1485
10K-J-W06
C1484
1U-K-10V-X5R
C1480
4U7-Z-16V-Y5V
C1483
1U-K-10V-X5R
C1487
1N0-K-50V-X7R-2
R1487
3R3-J-W10
+
C1481
2M2-M-6V3-R015
ELKO
R1482
27K-F-W06
R1481
1K8-F-W06
R1480
3K92-F-W06
R1484
1K0-J-W06
C1482
1U-K-10V-X5R
P1480
PAD_0.70
C1488
1U0-Z-10V-Y5V
P1482
P1483
P1487
P1486
P1485
P1484
PAD_0.70
P1493
P1492
P1491
P1490
PAD_0.70
V1480
D
BAT165
+
C1428
1M0-M-6V3-R070
ELKO
C1490
1U-K-10V-X5R
P1451
PAPERGATE
PAPERGATE
P1450
PAPERGATE
PAPERGATE
10K
10K
10K
10K
V1441
BCR133S-SOT363
T-NPN-BCR133S
10K
10K
10K
10K
V1483
BCR133S-SOT363
T-NPN-BCR133S
10K
10K
10K
10K
V1490
BCR133S-SOT363
T-NPN-BCR133S
D
S
G
V1481
IPD12N03L
FETN3P-3
+
C1429
22U-M-10V-2
ELKO
S
D
G
V1451
BSO4420-SO8
BSO4420
R1490
R-SHORT
R-SHORT-C0603
VDDQ
LP2996
AVIN
GND
VREF
VSENSE
VTT
PVIN
SD/NC
THRMPAD
VTT
PVIN
N1430
LP2996-LGA16
LP2996
VDDQ
LP2996
AVIN
GND
VREF
VSENSE
VTT
PVIN
SD/NC
THRMPAD
VTT
PVIN
N1431
LP2996-LGA16
LP2996
+VIN ADJ
+VOUT
+VOLTAGE
REGULATOR
CASE
N1410
EZ1085CM
EZ1085
+
C1489
1M0-M-6V3-R070
ELKO
+
C1491
1M0-M-6V3-R070
ELKO
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:50 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
14 99 12+
3.3 VOLT DUAL REGULATOR
=13MR
ON
RDS
MAX HEATSINK
POPULATE EITHER N1410 OR N1411
KUEHLFLAECHE MAXIMIEREN
KUEHLFLAECHE MAXIMIEREN
=9MR
5 VOLT
2.5 VOLT
MIN. LOAD P3V3P: 0,3A
VCC: 0,3A
CH A
DUAL CONTROL
CH B
DUAL SWITCH
VIH=2,4V
10A NOM. 14A PEAK
RDS
SKORDEV
20.09.02
ON
DUAL REGULATOR
SOFT-START
470R
DON’T POPULATE IF LP2996
1.25 VOLT REGULATOR
1.5 VOLT MCH REGULATOR
VIH=2,4V
2,61V
BRASILIA
25
14 15 19 21 22 24
25
14
14 15 19 21 22 24 25
27
30 47
14
14 15 19 21 22 24 25
48
14 30 37 38 65
14
14
14 30 37 38 65
14 48
24
43 48 65 71 80
48
19 30
14
14
14 48
14 15 19 21 22 24 25
14 30 37 38 65
14
14 30 37 38 65
14
85
15 20 21 22 30 31 35 80
90 91 92
38 40 47 48 53 65 66 80
19 24 25 30 31 34 35 37
28
2 1
2 1
4
2
1
3
15
14
5
7
2
12
11
10
4
17
8
15
14
5
7
2
12
11
10
4
17
8
21
3
2
1
8
7
6
5
4
2 1
S
D
G
4
3
1
6
5
2
4
3
1
6
5
2
4
3
1
6
5
2
21
21
21
2 1
A K
111
1
111
1 1
1
1
2 1
1
21
21
212
1
2
1
21
21
2 1
21
21
21
21
2 1
2 1
21
8 7 6 5 4
3
2
1
21
21
S
D
G
2 1
2 1
2 1
2 1
54
72
8 1
63
2 1
816372
54
21
21
21
546372
81
1
1
1
1
2 1
21
2 1
2
1
6
3
5
4
21
2
1
2 1
C
B
E
21
21
8
7
6
5
3
2
1
4
6
5
2
1
4
3
2 1
2
1
6
3
5
4
111
1
1
1
111
111
21
2 1
21
2 1
2 1
2 1
2 1
2 1
2 1
21
2 1
2121
635472
81
V26803-B42-V37
REF_LP2995
V26803-B42-V52
V26803-B42-V52
V_TERM_B_1V25
0.3
V26810-B304-V40
EN_AUX_L
P3V3P
V26803-B42-V52
V26803-B42-V52
V_TERM_B_SENSE
V26810-B755-V50
P2V5P_DUAL
V_TERM_A_SENSE
0.3
SD_2996_L
VCC_DUAL
P3V3P
GND
P2V4P
VCC
V26803-B73-V8
V26803-B54-V112
V26811-B419-V40
P3V3P_DUAL
VCC
V26811-B641-V40
V26811-B641-V40
P2V5P_DUAL
VCC_DUAL_FILTER
V26803-B82-V9
GND
VCC_DUAL
V26810-B768-V50
V26803-B42-V52
V26803-B82-V8
V26810-B772-V40
GND
SLEEP_S3-S5_L
PWR_GD_3V3_L
GND
PS_ON_L
GND
EN_AUX_L
P12VP
GND
GND
VCC_DUAL
VCC_AUX
GND
P2V5P_DUAL
GND
P3V3P
GND
GND
GND
P1V5P
GND
VCC
GND
V_TERM_A_1V25
VREF_SMEMB
GND
REF_LP2995
GND
GND
GND
EN_P3V3P_DUAL_H
P2V4P
VREF_SMEMA
VCC_DUAL
V26803-B42-V51
VOLTAGE REGULATORS
EN_AUX_L
V26810-B774-V40
GND
GND
SLEEP_S4-S5_L P2V5P_DUAL
PWR_GD_3V3_L
EN_AUX_L
GND
Page 13
A1555
AR2
4XS-470R-J-W06
A1555
AR2
4XS-470R-J-W06
A1555
AR2
4XS-470R-J-W06
A1554
AR2
4XS-470R-J-W06
A1554
AR2
4XS-470R-J-W06
A1554
AR2
4XS-470R-J-W06
A1554
AR2
4XS-470R-J-W06
A1553
AR2
4XS-470R-J-W06
A1553
AR2
4XS-470R-J-W06
A1553
AR2
4XS-470R-J-W06
A1553
AR2
4XS-470R-J-W06
A1552
AR2
4XS-470R-J-W06
A1552
AR2
4XS-470R-J-W06
A1552
AR2
4XS-470R-J-W06
A1552
AR2
4XS-470R-J-W06
A1551
AR2
4XS-470R-J-W06
A1551
AR2
4XS-470R-J-W06
A1551
AR2
4XS-470R-J-W06
A1551
AR2
4XS-470R-J-W06
A1556
AR2
4XS-470R-J-W06
A1556
AR2
4XS-470R-J-W06
A1556
AR2
4XS-470R-J-W06
A1557
AR2
4XS-470R-J-W06
A1557
AR2
4XS-470R-J-W06
A1557
AR2
4XS-470R-J-W06
A1557
AR2
4XS-470R-J-W06
A1550
AR2
4XS-470R-J-W06
A1550
AR2
4XS-470R-J-W06
A1550
AR2
4XS-470R-J-W06
A1550
AR2
4XS-470R-J-W06
A1556
AR2
4XS-470R-J-W06
A1555
AR2
4XS-470R-J-W06
C1502
1U0-Z-10V-Y5V
R1500
121R-F-W06
C1500
1U0-Z-10V-Y5V
R1501
43R2-F-W06
C1501
100N-Z-25V-Y5V
+
C1503
22U-M-10V-2
ELKO
R1502
R00-1A0
R1521
2K0-F-W06
C1521
1U0-Z-16V-Y5V
A1560
AR2
4XS-0R-J-W06
A1520
AR2
4XS-2K2-J-W06
10K
10K
10K
10K
V1520
BCR133S-SOT363
T-NPN-BCR133S
A1520
AR2
4XS-2K2-J-W06
A1520
AR2
4XS-2K2-J-W06
VDDQ
LP2996
AVIN
GND
VREF
VSENSE
VTT
PVIN
SD/NC
THRMPAD
VTT
PVIN
N1520
LP2996-LGA16
LP2996
V1521
BC846B
T-NPN
A1520
AR2
4XS-2K2-J-W06
R1520
360R-F-W06
+
C1522
22U-M-10V-2
ELKO
C1520
1U0-Z-16V-Y5V
IN
OUT
LM1117
ADJ
OUT IN IN
OUTTAB
OUT
N1500
LM1117-LGA8
LM1117
R1550
33R-J-1W0
R1551
33R-J-1W0
R1522
1K0-J-W06
ABBREV=D1534
D1534
LAST_MODIFIED=Fri Jan 17 05:28:50 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
15 99 13+
MCH GTL+ TERM REGULATOR
VO=1,25(1+R2/R1)
MIN. LOAD VCC = 0,3A
1,696V
VCC_DAC (1,7V) LINEAR REGULATOR
R2
08.07.02 SCHUTZ
R1
>
1,7V
1,25V
DON’T POPULATE
ON=MIN 1V
N.C.
BRASILIA
12 15 19 21
13
14 15 19 21 22 24 25
12 15 19 21
10 11 12 13 21 30 99
14 20 21 22 30 31 35 80 85
22
14 15 19 21 22 24 25
13
21
21
21
1
9
7
6
5
4
3
2
2 1
2 1
21
7 2
C
B
E
15
14
5
7
2
12
11
10
4
17
8
63
54
4
3
1
6
5
2
81
81
72
63
54
2 1
21
21
2 1
21
21
2 1
21
2 1
81
72
63
54
63
72
81
81
72
63
54
81
72
63
54
81
72
63
54
81
72
63
54
81
72
63
54
54 54
63
72
81
V26810-B304-V40
VCC_LP2996
GND
V26801-B84-V1
P2V5P_DUAL
GND
GND
GND
P3V3P
VTERM_GTL
VTERM_GTL
VCC_CPUCORE
GND
CPU_BOOTSEL_L
VRM_PWR_OK_H
P2V5P_DUAL
VCC
GND
P1V5P
VCC_DAC
VCC
GND
GND
VCC
GND
VCC
VOLTAGE REGULATORS
Page 14
+
C1970
22U-M-10V-2
ELKO
C1974
100N-Z-16V-Y5V-C0402
C1976
100N-Z-16V-Y5V-C0402
C1975
100N-Z-16V-Y5V-C0402
C1901
33P-J-50V-COG
C1900
33P-J-50V-COG
G1901
QUARZ
14M31818-30PPM-20PF
R1915
33R2-F-W06
R1911
33R2-F-W06
C1971
100N-Z-16V-Y5V-C0402
C1973
100N-Z-16V-Y5V-C0402
R1916
33R2-F-W06
R1912
33R2-F-W06
R1913
49R9-F-W06
R1914
49R9-F-W06
R1917
49R9-F-W06
R1910
49R9-F-W06
R1901
33R-J-W06
R1920
33R2-F-W06
R1919
33R2-F-W06
R1921
49R9-F-W06
R1918
49R9-F-W06
R1966
100R-J-W06
R1965
475R-F-W06
C1983
100N-Z-16V-Y5V-C0402
C1985
100N-Z-16V-Y5V-C0402
+
C1990
22U-M-10V-2
ELKO
C1991
100N-Z-16V-Y5V-C0402
C1992
10N-K-50V-X7R-2
L1970
120R-100M-A200-R2
L1
L1990
120R-100M-A200-R2
L1
R1902
33R-J-W06
R1990
R00-1A0
R1991
10R-J-W06
4K7
4K7
V1980
BCR119S-SOT363
T-NPN-BCR119S
R1900
R00-1A0
A1900
AR2
4XS-470R-J-W06
A1900
AR2
4XS-470R-J-W06
A1900
AR2
4XS-470R-J-W06
A1900
AR2
4XS-470R-J-W06
PD
2F
1F
CK-409-2
VSS
VSS
CPU0
XTAL_OUT
XTAL_IN
CLOCK-SYNTHESIZER
0F
FS_A/14MHZ REFO
VDDREF
VDDA
VSS
SCLK
RESET/66_BUFF0
SDATA
VTT_PWRGOOD
33MHZ PCI
+
-
IREF
VDDPCI VDDPCI VDD48
VDD
VDD3V66
VDDCPU
VSS VSS VSS VSS VSS
CPU1
+
CPU_ITP
-
+
-
2
1
MODE 0
33MHZ PCI
5
4
3
66_BUFF1 66_BUFF2
DOT_48MHZ USB_48MHZ
FS_B/REF1
SRC
+
-
VCH/66_BUFF3
CK-409-2
D1900
CK-409-2-SO48
A1901
AR2
4XS-10K-J-W06
A1901
AR2
4XS-10K-J-W06
A1901
AR2
A1901
4XS-10K-J-W06
C1930
10P-J-50V-COG-2
K1900
AC2
4XS-10P-K-25V-COG
R1930
33R-J-W06
A1930
4XS-33R-J-W06
K1900
AC2
4XS-10P-K-25V-COG
K1900
AC2
4XS-10P-K-25V-COG
K1900
AC2
4XS-10P-K-25V-COG
K1902
AC2
4XS-10P-K-25V-COG
K1902
AC2
4XS-10P-K-25V-COG
A1930
4XS-33R-J-W06
R1970
49R9-F-W06
A1930
4XS-33R-J-W06
A1930
4XS-33R-J-W06
R1973
49R9-F-W06
R1971
33R2-F-W06
R1972
33R2-F-W06
A1931
4XS-22R-J-W06
A1931
4XS-22R-J-W06
C1951
10P-J-50V-COG-2
C1950
10P-J-50V-COG-2
K1902
AC2
4XS-10P-K-25V-COG
K1902
AC2
4XS-10P-K-25V-COG
A1931
4XS-22R-J-W06
A1931
4XS-22R-J-W06
R1951
33R-J-W06
R1950
10R-J-W06
P1900
PAD
PAD_0.70
P1901
PAD
PAD_0.70
P1902
PAD
PAD_0.70
P1903
PAD
PAD_0.70
P1907
PAD
PAD_0.70
P1906
PAD
PAD_0.70
P1905
PAD
PAD_0.70
P1904
PAD
PAD_0.70
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:51 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
19
99
14+
AOL: CONNECT VID<4> PIN
CLK SYNTH MUST ALLWAYS
1
CYPRESS CY28409
SCHUTZ
08.07.02
CLOAD=20PF
(ITP) IS PRESENT
ONBOARD DEBUG CONN.
POPULATE ONLY IF
PAY ATTENTION
TO PAGE 11 TOO !
REC. 33R
REC. 33R
SET DRIVERSTRENGTH
L1970 MAX 500 MA
OK
DON’T POPULATE
MHZ
100
FS_B
133 166 200
0
0
1
0
1
0
?????
SUPPORTED
TO GND IF CPU ISN’T INSERTED
AOL PROBLEM:
RUN
FS_A
BSEL 0 1
SUPPORTED
1
CPU MISSING
REC. 33R
CPU MISSING CIRCUIT
BRASILIA
14 30
90
30
53
30
80
10 22
24 25 30 34 52 65 66 91
24 30 34 52 65 66 91
40
53
46
30
12 15 21
20
30
20
30 71
10 22
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
11
11
20
20
40
30
10
10
10 13
14 15 21 22 24 25
10
1
1
1
1
1
1
1
1
21
21
8 1
7 2
54
63
21
21
6 3
5 4
21
21
21
8 1
7 2
21
5 4
72
81
54
63
81
6 3
21
72
21
81
72
63
54
10
3
32
31
46
22
21
25
26
29
30
35
36
19
20
18
15
14
13
12
9
8
7
44
45
33
41
42
38
39
2
1
47
43
37
28
5
23
17
11
6
48
40
34
27
24
16
4
54
6 3
81
72
21
4
3
1
6
5
2
21
21
21
21
21
21
21
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2 1
P2V5P_DUAL
CPU_SOCKET_OCC_L
CPU_VID_H<4>
GND
SLEEP_S3-S5_L
GND
V26803-B54-V112
CPU_BSEL1_H
CPU_BSEL0_H
SMB_CLK_DUAL_H SMB_DATA_DUAL_H
GND
P3V3P_DUAL
CLK_PCI_SIO_H
GND
CLK_PCISIO_H CLK_PCISLOT1_H CLK_PCISLOT2_H
GND
GND
CLK_PCI_SLOT2_H
CLK_PCI_SLOT1_H
CLK_PCI_FWH_H
CLK_PCIFWH_H
GND
CLK_PCIICH_H
GND
CLK_PCI_ICH_H
V26801-B76-V25
V26801-B76-V528
V26801-B76-V528
V26801-B76-V528
V26801-B76-V528
V26823-B7-V17
V26801-B76-V528
V26801-B76-V528
V26813-B356-V15
V26803-B54-V112
C
P3V3P_DUAL
GND
CLK_HOST_ITP_L
GND
CLK_HOST_ITP_H
CLK_14M_ICH_H
CLK_14M_SIO_H
CLK_100_MCH_H
CLK_100_MCH_L
GND
GND
CLK_100_CPU_H
CLK_100_CPU_L
GND
GND
GND
GND
GND
P3V3P_CLK_48M
CLK_ITP_H
CLK_100CPU_L
GND
VTERM_GTL
CLK_100MCH_H CLK_100MCH_L
CLK_100CPU_H
CLK_14M_A_H CLK_14M_B_H
P3V3P_CLK_A
P3V3P_CLKSYNTH
GND
CLK_ITP_L
CLK_48_USB_AUD_H
CLK_100_SATA_P
CLK_100_SATA_N
CLK_66_LAN_H
CLK_66_MCH_H
CLK_66_ICH_H
CLK_66_AGP_H
CLK_48_DCLK_H
GND
GND
GND
GND
GND
GND
GND
CLK_48DCLK_H
CLK_66ICH_H CLK_66AGP_H
CLK_66LAN_H CLK_66MCH_H
CLK_100SATA_N
CLK_100SATA_P
CLK_48USB_H
CLKSYNTHESIZER
P3V3P_CLKSYNTH
V26811-B648-V40
V26801-B76-V528
GND
V26801-B76-V528
Page 15
C2000
100N-Z-25V-Y5V
C2005
10P-J-50V-COG-2
C2006
10P-J-50V-COG-2
C2007
10P-J-50V-COG-2
B2003
B2001
B2000
MECHANIK
B2002
V26898-B819-V10
C2050
100N-Z-25V-Y5V
C2060
100N-Z-25V-Y5V
C2070
100N-Z-25V-Y5V
1
0 1 2 3 4 5
VTT_FSB_CAP
VCC_DDR_CAP
MXRCOMP
MVREFA
CI_SWING
CSA INTERFACE
CI_RCOMP CI_VREF
CI<10:0>
P3V3P
HI_SWING
2
WE_A
MXRCOMPVOH
CAS_A
DQS_A<7:0>
DM_A<7:0>
CMDCLK_A<5:0>
DDR MEMORY INTERFACE A
HI_RCOMP HI_VREF
HISTRF HISTRS
HI<10:0>
HDRCOMP HDSWING HDVREF
DQ_A<63:0>
MAA_A<12:0>
CS_A<3:0>
MAB_A<5:1>
RAS_A
T
T
T
T
T
T
CPU ADDRESS/DATA
RS<2:0>
DEFER
CPURST
HADSTB1
HA<31:17>
GMCH SPRINGDALE
HCLKIN
RSTIN PWRGOOD
CLOCK & RESET
CPU INTERFACE
ADS DBSY DRDY HIT
+
HITM
-
HLOCK
BREQ0
BPRI
BNR
HTRDY
HA<16:3>
HREQ<4:0>
HADSTB0
PROCHOT
DINV3
HDSTB3
+
-
HD<63:48>
DINV2
HDSTB2
+
HD<47:32>
-
DINV1
HDSTB1
+
-
HD<31:16>
DINV0
HDSTB0
+
HD<15:0>
-
SM BUS INTERFACE
DDCA_DATA
MISC
EXTTS
GMCH SPRINGDALE
VCCDAC
POWER
VCCDAC
VCCA_DPLL
VCCA_AGP_CAP
VCCA_DAC VCCA_DDR VCCA_DDR VCCA_DDR
HUB INTERFACE
+
-
CV2 = VCC_DDR
CV1 = VTT
P1V5P = VCC
GND
CISTRF CISTRS
GVREF
GST<2:0>
GAD_STB1
-
+
+
-
GAD_STB0
G_GNT
G_PAR/ADDDETECT
G_C/BE<3:0>
G_AD<31:0>
-
+
GSBA<7:0>
GWBF
GSB_STB
GRBF
DBI_HI
G_REQ
G_STOP
G_TRDY
G_IRDY
G_DEVSEL
G_FRAME
AGP
GCLKIN
GVSWING
GRCOMP/DVOBCRCOMP
DBI_LO
DDCA_CLK
MXRCOMPVOL
CKE_A<3:0>
BA_A<1:0>
MYRCOMPVOH
MVREFB MYRCOMP
WE_B
CAS_B
DQS_B<7:0>
DM_B<7:0>
CMDCLK_B<5:0>
DDR MEMORY INTERFACE B
DQ_B<63:0>
MAA_B<12:0>
MAB_B<5:1>
CS_B<3:0>
RAS_B
+
-
MYRCOMPVOL
CKE_B<3:0>
BA_B<1:0>
BSEL0 BSEL1
VGA
DREFCLK
RED
GREEN
BLUE
HSYNC VSYNC
REFSET
ICH_SYNC
VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP
VSSA_DAC
VCCA_FSB
VCCA_AGP
VCCA_DDR_CAP
TESTIN
0 1 0
CV1,CV2,GND,P1V5P
GMCH-SPRINGD
D2000
GMCH-SPRINGDALE-BGA932
R2080
75R-F-W06
R2081
75R-F-W06
R2082
75R-F-W06
R2010
100R-J-W06
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:51 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
20
99
15+
<11..0>
NC
ANCHOR
NC
PLACE NEAR GMCH
08.07.02
N.C. (ONLY 1DIMM/CHANNEL)
N.C. (ONLY 1DIMM/CHANNEL)
BRASILIA
24 27
24 27
31 48
48
19
10
25 28
22
22
21 30
21
21 22
20 85
20 85
22
80 85
14 15 21 22 30 31 35
22 22 22
22
22
19
20 85
10 10 10 10 10 10
10
10
10
10
10
10 65
22 21
22
10 12
21 30
25 28
22
25 28
22 22
19
22
80 80 80 80 80 80 80 80 80 80
24
80 80
24
80
24 27
22 21
24 27
21 80
24 27 24 27
24 27
10 11
24 27
10
25
10 10
25
10
25 28
10
10
25 28
10
25 28
10
25 28
25 28
10
25 28
10
25 28
10 10 10
10
10 10 10
10
10 10 10
30
30 30
90
90 90
80
80
80
80
80 80 80 80
80
20 85
20 85
85
24 27
24 27
21 21
22
22
21
21
22 21 21 21
85
20 85
31 85 85
21
22
21
19
22
22
21
21
21
21
H3
F2
AJ8
D2
E2
G3
G6
G24
H7
G5
H6
E4
F4
V5
V4
AC5
AC6
E27
M7
AB2
AJ5
AJ6
AH4
AH5
F27
C19
B19
C17
K19
L19
L17
F9
G9
L12
L14
E12
D12
C15
D24
L21
B28
L13
B26
B24
E8
AP8
G4
AD2
AC3
AC2
T11
AE14
U11
R9
R10
M5
M4
N6
W11
AB5
V11
AB4
AK4
U6
H4
AF2
AF4
AG2
AE3
AE2
AD4
F23
AR15
AR21
AR31
AA35
R35
C25
C7
E35
A21
A15
AG10
Y11
B4
AC4
AC35
AC32
AC1
E24
AB9
AH33
AH30
AH3
AH24
AH22
AR9
AR32
AR29
AR27
L20
AR25
AB8
AB6
AB33
AB30
AB3
AB28
AB27
AB10
AB26
AA32
AA4
AA1
A9
A7
A32
A29
A27
A25
A23
B30
A20
A16
A13
D3
AL35 J1
Y1
L5
L4
L3
L2
L1
K5
K4
K3
K2
J5
J4
J3
J2
D28
W27
W31
W26
AB34
Y34
AC33
E25
AC26
AC25
AB25
C2
B3
A31
AG1
G2
G1
R33
E23
R34
AA33
AP9
AL9
AN9
AK9
E34
K21
B7
21
2 1
2 1
1
1 1
1
21
21
21
2 1
COMPXR_SMEM_VOL
COMPXR_SMEM_VOH
SMEMB_DM_H<7..0>
CLK_SMEMB_H<5..0>
SMEMA_DAT_H<63..0>
SMEMA_WE_L
SMEMA_CAS_L
GMCH
SCHUTZ
VTT_FSB_CAP1
COMPYR_SMEM_VOL
P1V5P
SWING_CSA_MCH
CLK_66_MCH_H
GND
GND
GND
CLK_48_DCLK_H
GND
COMP_CSA_MCH
GND
VGA_2FGREEN_H
VGA_2FRED_H
VGA_2FBLUE_H
P3V3P
GND
VREF_AGP
VREF_CSA_MCH
GND
GND
CLK_100_MCH_H
CV1=VTERM_GTL CV2=P2V5P_DUAL
VTT_FSB_CAP0
P1V5P
VCCA_FSB
SMEMA_DQS_H<7..0>
MCH_DDCDAT_H
MCH_DDCCLK_H
ICH_SYNC_L
VGA_REFSET
GND
VGA_2FBLUE_H
GND
VGA_2FGREEN_H
GND
VGA_2FRED_H
AGP_ST_H<2..0>
AGP_AD_STB1_L
AGP_AD_STB0_L
AGP_AD_STB0_H
AGP_GNT_L
AGP_PAR_H
AGP_C_BE_L<3..0>
AGP_AD_H<31..0>
GND
LAN_CSA_STRS_H
VCCA_SM_CAP
LAN_CSA_STRF_H
LAN_CSA_H<10..0>
VCCA_AGP_CAP1
ICH_HI_STRS_H
ICH_HI_STRF_H
ICH_HI_H<10..0>
GTL_DSTB_N_L0
GTL_DSTB_P_L0
GTL_DBI_L<0>
GTL_DATA_L<15..0>
GTL_DSTB_N_L1
GTL_DSTB_P_L1
GTL_DBI_L<1>
GTL_DATA_L<31..16>
GTL_DSTB_N_L2
GTL_DSTB_P_L2
GTL_DBI_L<2>
SMEMB_BA_H<1..0>
GTL_DATA_L<47..32>
SMEMB_CKE_H<3..0>
GTL_DSTB_N_L3
SMEMB_CS_L<3..0>
GTL_DSTB_P_L3
SMEMB_WE_L
SMEMB_CAS_L
GTL_DATA_L<63..48>
SMEMB_RAS_L
GTL_TRDY_L
GTL_RESP_L<2..0>
SMEMB_ADR_H<12..0>
GTL_DEFER_L
CLK_SMEMB_L<5..0>
GTL_BLOCKNR_L
GTL_PRIREQ_L
SMEMA_BA_H<1..0>
GTL_BUSREQ_L
SMEMA_CKE_H<3..0>
GTL_RESET_L
SMEMA_CS_L<3..0>
SMEMA_RAS_L
SWING_AGP
SMEMA_ADR_H<12..0>
AGP_SBA_H<7..0>
CLK_SMEMA_L<5..0>
AGP_SB_STB_L
AGP_SB_STB_H
CLK_SMEMA_H<5..0>
AGP_WBF_L
AGP_RBF_L
AGP_DBI_L
AGP_PIPE_L
AGP_REQ_L
AGP_STOP_L
VCCA_AGP_CAP0
AGP_TRDY_L
AGP_IRDY_L
AGP_DEVSEL_L
AGP_FRAME_L
SWING_HI_MCH_ICH
VREF_GTL
SWING_GTL_MCH
COMP_GTL_MCH
CPU_PROC_HOT_L
GTL_CMD_L<4..0>
GTL_ADRSTB_L<0>
GTL_ADR_L<16..3>
GTL_ADRSTB_L<1>
GTL_ADR_L<31..17>
GTL_BUSLOCK_L
GTL_HIT_MODI_L
GTL_HIT_L
GTL_DATRDY_L
GTL_DATBSY_L
GTL_ADS_L
VCCA_DPLL VCCA_DAC VCCA_SM
VCC_DDR_CAP0 VCC_DDR_CAP1 VCC_DDR_CAP2 VCC_DDR_CAP3
MCH_HSYNC_H MCH_VSYNC_H
GND
V26803-B73-V2
V26803-B73-V2
COMPYR_SMEM
COMPXR_SMEM
SMEMB_DAT_H<63..0>
SMEMB_DQS_H<7..0>
COMPYR_SMEM_VOH
VREF_SMEMB_MCH
VREF_SMEMA_MCH
AGP_AD_STB1_H
VCC_DDR_CAP5
VCC_DDR_CAP4
VTT_FSB_CAP2
VREF_HI_MCH_ICH
COMP_HI_MCH
V26808-B7739-V30
COMP_AGP_MCH
CLK_100_MCH_L
MCH_BSEL1_H
MCH_BSEL0_H
GTL_DBI_L<3>
SMEMA_DM_H<7..0>
PCI_RST_GMCH_L
POWER_OK_3V3_H
Page 16
R2180
60R4-F-W06
R2182
100R-F-W06
C2102
100N-Z-25V-Y5V
C2104
220N-K-16V-X7R-2
C2105
10U-M-6V3-X5R
C2106
4U7-Z-16V-Y5V
C2130
100N-Z-25V-Y5V
C2131
100N-Z-25V-Y5V
C2132
1U0-Z-10V-Y5V
C2133
1U0-Z-10V-Y5V
C2134
220N-K-16V-X7R-2
C2136
4U7-Z-16V-Y5V
C2121
10U-M-6V3-X5R
C2122
4U7-Z-16V-Y5V
C2100
100N-Z-16V-Y5V-C0402
C2152
100N-Z-10V-Y5V
C2151
100N-Z-10V-Y5V
C2150
100N-Z-10V-Y5V
R2171
102R-F-W06
R2170
301R-F-W06
R2192
113R-F-W06
R2191
147R-F-W06
R2190
226R-F-W06
C2191
100N-Z-25V-Y5V
C2195
10N-K-50V-X7R-2
C2194
10N-K-50V-X7R-2
C2190
100N-Z-25V-Y5V
C2193
10N-K-50V-X7R-2
C2192
10N-K-50V-X7R-2
C2135
220N-K-16V-X7R-2
C2153
100N-Z-10V-Y5V
C2171
10N-K-50V-X7R-2
R2181
39R2-F-W06
R2183
33R2-F-W06
C2180
100N-Z-25V-Y5V
C2181
10N-K-50V-X7R-2
C2101
220N-K-16V-X7R-2
C2103
100N-Z-25V-Y5V
C2120
100N-Z-25V-Y5V
R2140
150R-F-W06
R2141
150R-F-W06
C2140
1U0-Z-10V-Y5V
C2141
1U0-Z-10V-Y5V
C2142
1U0-Z-10V-Y5V
D
S
G
V2180
BSH112-SOT23
FETN3P-5
C2154
100N-Z-25V-Y5V
C2155
100N-Z-25V-Y5V
C2138
4U7-Z-16V-Y5V
C2109
10U-M-6V3-X5R
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:51 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
21
99
16+
GMCH DDR VREF
ADDITIONAL DECOUPLING - PLACE UNDER GMCH
DECOUPLING - CORE-LOGIC, HUBLINK, AGP, DAC
DECOUPLING - SYSTEM MEMORY
PLACE NEAR ICH
PLACE NEAR ICH
PLACE NEAR GMCH
PLACE NEAR GMCH
HXSWING AND HYSWING
CAP’S
PLACE NEAR GMCH
AGP 3.0: 0,35V
TO P12VP
PU 4K7
DECOUPLING - GTL TERM
PDG1.0 :PG257-259
ON PAGE 20,80
AGP 2.0: 0,75V
08.07.02
EDGE DECOUPLING
IN MIDPOINT OF BUS
DIVIDER AND CAPS
PLACE VOLTAGE
BRASILIA
35 80 85
14 15 20 21 22 30 31
20 30
35 80 85
14 15 20 21 22 30 31
20
20
12 15 19
14 15 20 21 22 30 31 35 80 85
80
20 80
20
20
20
20
20
10 11 12 13 15 30 99
20
20
14 15 19 21 22 24 25
20
20
20
14 15 20 21 22 30 31 35 80 85
20 30
20
14 15 19 21 22 24 25
21
21
2 1
2 1
D
S
G
21
21
21
21
2 1
2 1
2 1
2 1
21
21
2 1
2 1
21
21
2 1
2 1
2 12 1
2 1
2 12 1
212121
2121
21
21
21
21
21
21
21
2 1
21
21
21
21
21
21
2 1
2 1
21 2 1
P1V5P
P1V5P
GND
MCH SUPPORT
SCHUTZ
P2V5P_DUAL
VCCA_AGP_CAP0
GND
C
VTERM_GTL
GND
P2V5P_DUAL
GND
GND
VREF_SMEMB_MCH
GND
VREF_SMEMA_MCH
GND
VCC_CPUCORE
SWING_GTL_MCH
P1V5P
VREF_AGP
GND
SWING_HI_MCH_ICH
VREF_HI_MCH_ICH
GND
GND GND
GND
GND
GND
GND
SWING_AGP
GND
VCC_DDR_CAP5
P1V5P
C
VCC_DDR_CAP4
VCC_DDR_CAP3
V26803-B100-V1
VCCA_AGP_CAP1
V26810-B753-V40
GND
AGP_8X_H
VTT_FSB_CAP0
VCC_DDR_CAP0
VTT_FSB_CAP1
VTT_FSB_CAP2
Page 17
R2282
52R3-F-W06
+
C2250
100U-M-6V3-R440
ELKO
R2250
1R0-J-W06
C2251
100N-Z-25V-Y5V
C2255
100N-Z-25V-Y5V
C2253
100N-Z-25V-Y5V
R2281
20R-F-W06
R2283
43R2-F-W06
+
C2252
100U-M-6V3-R440
ELKO
L2262
1U-A85-R08
L1
L2261
820N-A035-2R1
L1
L2260
100N-A250-R3
L1
C2201
10N-K-50V-X7R-2
R2200
31K6-F-W06
R2201
10K-F-W06
C2203
10N-K-50V-X7R-2
R2203
31K6-F-W06
R2202
10K-F-W06
R2211
10K-F-W06
R2210
31K6-F-W06
R2213
31K6-F-W06
R2212
10K-F-W06
C2222
10N-K-50V-X7R-2
R2221
42R2-F-W06
R2220
42R2-F-W06
R2231
42R2-F-W06
R2230
42R2-F-W06
C2200
1U0-Z-10V-Y5V
C2202
1U0-Z-10V-Y5V
C2210
10N-K-50V-X7R-2
C2212
10N-K-50V-X7R-2
C2221
100N-Z-25V-Y5V
C2230
220N-K-16V-X7R-2
C2214
220N-K-16V-X7R-2
C2205
1U0-Z-10V-Y5V
C2204
1U0-Z-10V-Y5V
C2241
10N-K-50V-X7R-2
C2240
100N-Z-25V-Y5V
C2243
10N-K-50V-X7R-2
C2242
100N-Z-25V-Y5V
R2240
52R3-F-W06
R2251
130R-F-W06
C2259
100N-Z-25V-Y5V
L2264
100N-A250-R3
L1
R2252
1R0-J-W06
R2241
226R-F-W06
R2242
147R-F-W06
R2243
113R-F-W06
+
C2258
470U-M-6V3-R50
ELKO
C2257
10N-K-50V-X7R-2
+
C2254
100U-M-6V3-R440
ELKO
A2260
AR2
4XS-2K2-J-W06
A2260
AR2
4XS-2K2-J-W06
A2260
AR2
4XS-2K2-J-W06
A2260
AR2
4XS-2K2-J-W06
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
22 99 17+
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:29:03 2003
DRAWING
0
0
RESERVED
100 / 400
BSEL0_H BSEL1_H CORE / FSB
0
10MIL,VERY SHORT
CH A
ALU
ALU
ALU
ALU
REC 31K1
REC 31K1
REC 31K1
REC 31K1
0603
133 / 533
08.07.02
CH A
CH B
1 1 1
1
0
10MIL,VERY SHORT
124R - 137R
BRIGHTNESS DEPENDS ON R-VALUE
166 / 667
10MIL,VERY SHORT
REC:100NF
CH B
REC. 2K49
BRASILIA
35 80 85
14 15 20 21 22 30 31
20
20
10 19
14 15 20 21 22 30 31 35 80 85
10 19
20
20
20
20
20
20
20
20 20
20
20
20
20
14 15 19 21 24 25
20
35 80 85
14 15 20 21 22 30 31
20
20
20
20
20
20
15
54
6 3
81
7 2
21
21
21
21 21
21
21 21
21
21
21
21
21
21
21
21212121
2121 21 21 21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2 1
2 1
2 1
21
21
21
V26803-B42-V53
COMP_CSA_MCH
P1V5P
V26801-B76-V591
V26801-B76-V628
CPU_BSEL1_H
V26813-B356-V48
V26803-B73-V2
V26803-B73-V2
V26801-B76-V605
V26813-B356-V54
V26803-B73-V2
V26803-B51-V7
V26813-B356-V48
V26803-B73-V2
V26813-B356-V53
V26803-B82-V8
GND
P2V5P_DUAL
GND
GND
COMPXR_SMEM
COMPXR_SMEM_VOL
COMPXR_SMEM_VOH
COMPYR_SMEM_VOH
COMPYR_SMEM_VOL
GND
GND
VCC_DDR_CAP1
VCC_DDR_CAP2
VCCA_DPLL
VCCA_FSB
GND
GND
VCCA_SM
GNDGND
COMP_AGP_MCH
VGA_REFSET
GND
GND
VCCA_SM_CAP
VCCA_DAC
GNDGND
GND
GND
VREF_CSA_MCH
GND
COMP_HI_MCH
GND
P1V5P
VCC_DAC
GND
COMPYR_SMEM
GND
COMP_GTL_MCH
SWING_CSA_MCH
GND
CPU_BSEL0_H MCH_BSEL0_H
GND
MCH_BSEL1_H
GMCH
SCHUTZ
P1V5P
Page 18
R2401
100R-J-W06
R2460
220R-J-W06
R2430
75R-F-W06
R2431
75R-F-W06
C2430
100N-Z-25V-Y5V
A[12:11]
A10
A[9:0]
CB[7:0]
DQ[63:56]
DM8/DQS17
DQS8
DM7/DQS16
DQS7
DM6/DQS15
DQS6
DQ[55:48]
DM5/DQS14
DQS5
DQ[47:40]
DM4/DQS13
DQS4
DQ[39:32]
DM3/DQS12
DQS3
DM2/DQS11
DQ[31:24]
DQS2
DQ[23:16]
DM1/DQS10
DQS1
DQ[15:8]
DM0/DQS9
VDDSPD
EEPROM
S1
A13
S0
WE
CAS
RAS
RESET(LVTTL)
NC/CLK2_L
NC/CLK2_H
WP
VREF
NC/FETEN
SA2
DQS0
DQ[7:0]
BA2
VDDID
SA1
SA0
SDA
SCL
BA1
BA0
NC/CLK1_L
NC/CLK1_H
CLK0_L
CLK0_H
DDR MODUL STECKER REG
CKE0 CKE1
DDR-MEMORY
X2400
SIM15-184
GND,P2V5P
C2478
100N-Z-25V-Y5V
C2477
100N-Z-25V-Y5V
C2470
100N-Z-25V-Y5V
C2471
100N-Z-25V-Y5V
C2472
100N-Z-25V-Y5V
C2473
100N-Z-25V-Y5V
C2474
100N-Z-25V-Y5V
C2475
100N-Z-25V-Y5V
C2476
100N-Z-25V-Y5V
V2461
LED
LED-RD-0603
+
C2412
1M0-M-6V3-R070
ELKO
C2480
100N-Z-25V-Y5V
C2479
100N-Z-25V-Y5V
+
C2413
1M0-M-6V3-R070
ELKO
C2431
1U0-Z-10V-Y5V
C2432
1U0-Z-10V-Y5V
+
C2411
1M0-M-6V3-R070
ELKO
C2481
100N-Z-25V-Y5V
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
24
99
18+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:52 2003
DRAWING
PLACE DIVIDER NEAR DIMM
NEAR
MODULE 2
MODULE 1
0 0
SA2
SMB ADDRESS
LED RED ON BOARD
SUSPEND POWER INDICATION
STD= DON’T POPULATE
PREM= POPULATE
DECOUPLING DIMM MODULES
PIN1
X2400
MEMORY
PLACE NEAR DIMMS
CHANNEL A
MODULE 1
SA1
1
1
0
1
SA0
0 1
08.07.02
NC
WP PIN90 --> NC WP VIA SW
NC
NC
SMEM_REG_RESET_L
NC
0
NC NC NC
SMEM_REF_ENABLE_H
BULK DECOUPLING FOR ALL DIMM MODULES
BRASILIA
14 15 19 21 22 24 25
20 27
14 24
20 27
20 27
20 27 20 27
20
20
14 15 19 21 22 24 25
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20
20 27
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
24 25
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
20 27 20 27
20 27
20 27
20 27 20 27
19 25 30 34 52 65 66 91
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 27
20 20 20
24 25
20 27
20 27
14 15 19 21 22 24 25
19 30 34 52 65 66 91
14 24
2 1
21
21
21
2 1
21
21 2 1
2 1
21
21
21
21
21
21
21
21
21
111
21
10
75
140
47
177
86
169
78
76
159
67
149
56
129
36
119
17
25
107
14
97
5
184
183
16
182
181
90
91
92
82
103
1
113
52
138
59
167
141
158
157
63
65
154
137
21
21
21
21
21
P2V5P_DUAL
V26803-B42-V52
P3V3P_DUAL
SMEMA_DAT_H<63..56>
P3V3P_DUAL
SMB_DATA_2MEM_H
P2V5P=P2V5P_DUAL
SMB_DATA_2MEM_H
P2V5P_DUAL
C
C
C
C
C
C
C
C
C
C
P2V5P_DUAL
GND
C
C
SMB_DATA_DUAL_H
SMEMA_WE_L
SMEMA_CAS_L
CLK_SMEMA_H<1>
CLK_SMEMA_L<0>
CLK_SMEMA_H<0>
CLK_SMEMA_L<2>
GND
SMEMA_DAT_H<39..32>
SMEMA_DM_H<6>
SMEMA_DQS_H<7>
SMEMA_DAT_H<47..40>
SMEMA_DAT_H<55..48>
SMEMA_DQS_H<6>
SMEMA_DQS_H<5>
SMEMA_DQS_H<4>
SMEMA_DQS_H<3> SMEMA_DM_H<3>
SMEMA_DM_H<4>
SMEMA_DM_H<5>
SMEMA_DM_H<7>
SMEMA_DAT_H<7..0>
SMEMA_DAT_H<31..24>
SMEMA_DAT_H<23..16>
SMEMA_DQS_H<0> SMEMA_DM_H<0>
SMEMA_DM_H<2>
VREF_SMEMA
GND
GND
GND
SMEMA_CS_L<0> SMEMA_CS_L<1>
V26810-B757-V1
SMEMA_ADR_H<9..0> SMEMA_ADR_H<10> SMEMA_ADR_H<12..11>
SMEMA_BA_H<0> SMEMA_BA_H<1>
V26801-B76-V45
CLK_SMEMA_H<2>
SMEMA_CKE_H<0> SMEMA_CKE_H<1>
SMEMA_RAS_L
CLK_SMEMA_L<1>
SMEMA_DM_H<1>
SMEMA_DQS_H<1>
SMEMA_DAT_H<15..8>
SMEMA_DQS_H<2>
VREF_SMEMA
SMB_CLK_DUAL_H
SCHUTZ
MEMORY MODUL 1
V26803-B42-V52
V26803-B42-V52
Page 19
A[12:11]
A10
A[9:0]
CB[7:0]
DQ[63:56]
DM8/DQS17
DQS8
DM7/DQS16
DQS7
DM6/DQS15
DQS6
DQ[55:48]
DM5/DQS14
DQS5
DQ[47:40]
DM4/DQS13
DQS4
DQ[39:32]
DM3/DQS12
DQS3
DM2/DQS11
DQ[31:24]
DQS2
DQ[23:16]
DM1/DQS10
DQS1
DQ[15:8]
DM0/DQS9
VDDSPD
EEPROM
S1
A13
S0
WE
CAS
RAS
RESET(LVTTL)
NC/CLK2_L
NC/CLK2_H
WP
VREF
NC/FETEN
SA2
DQS0
DQ[7:0]
BA2
VDDID
SA1
SA0
SDA
SCL
BA1
BA0
NC/CLK1_L
NC/CLK1_H
CLK0_L
CLK0_H
DDR MODUL STECKER REG
CKE0 CKE1
DDR-MEMORY
X2500
SIM15-184
GND,P2V5P
C2575
100N-Z-25V-Y5V
C2574
100N-Z-25V-Y5V
C2573
100N-Z-25V-Y5V
C2572
100N-Z-25V-Y5V
C2571
100N-Z-25V-Y5V
C2570
100N-Z-25V-Y5V
C2577
100N-Z-25V-Y5V
C2576
100N-Z-25V-Y5V
C2530
100N-Z-25V-Y5V
R2531
75R-F-W06
R2530
75R-F-W06
C2531
1U0-Z-10V-Y5V
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
25
99
19+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:52 2003
DRAWING
PLACE DIVIDER NEAR DIMM
DECOUPLING DIMM MODULES
NC
NC
NCNC
NC
NC
NC
SMEM_REG_RESET_L
SMEM_REF_ENABLE_H
PIN1
NEAR X2500
MODULE 1 MODULE 2
10
SA0
0 0
SA1
CHANNEL B
MODULE 2
SMB ADDRESS
1
1
MEMORY
08.07.02
SA2
1 0 1
BRASILIA
47 48 53 65 66 80 90 91 92
14 19 24 30 31 34 35 37 38 40
20 28
20 28
20 28
20
20
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20 28
20
20 20
20 28
20 28
20 28
24
19 24 30 34 52 65 66 91
20 28
20 28
20 28
20
20 28 20 28
20 28
20 28 20 28
20 28
14 25
14 15 19 21 22 24 25
14 15 19 21 22 24 25
14 25
21
21
21
21
21
21
21
21
21
21
21
21
111
21
10
75
140
47
177
86
169
78
76
159
67
149
56
129
36
119
17
25
107
14
97
5
184
183
16
182
181
90
91
92
82
103
1
113
52
138
59
167
141
158
157
63
65
154
137
MEMORY MODUL 2
SCHUTZ
SMEMB_ADR_H<10>
GND
P3V3P_DUAL
P2V5P_DUAL
P2V5P_DUAL
GND
C
C
C
C
SMEMB_DM_H<7>
SMEMB_DQS_H<7>
SMEMB_RAS_L
C
C
C
C
GND
VREF_SMEMB
P2V5P=P2V5P_DUAL
SMEMB_DAT_H<31..24>
SMEMB_DAT_H<23..16>
SMEMB_DAT_H<15..8>
SMEMB_DAT_H<7..0>
SMEMB_DQS_H<0> SMEMB_DM_H<0>
SMEMB_DM_H<1>
SMEMB_DQS_H<2> SMEMB_DM_H<2>
SMEMB_DAT_H<39..32>
SMEMB_DQS_H<3> SMEMB_DM_H<3>
SMEMB_DM_H<4>
SMEMB_DQS_H<5>
SMEMB_DQS_H<6> SMEMB_DM_H<6>
CLK_SMEMB_H<0> CLK_SMEMB_L<0>
CLK_SMEMB_L<1> CLK_SMEMB_H<2> CLK_SMEMB_L<2>
SMEMB_CKE_H<1>
SMEMB_DQS_H<1>
SMEMB_DAT_H<47..40>
SMEMB_DM_H<5>
SMEMB_DAT_H<55..48>
SMEMB_DAT_H<63..56>
SMEMB_DQS_H<4>
SMB_DATA_2MEM_H
SMB_CLK_DUAL_H
VREF_SMEMB
SMEMB_BA_H<1>
SMEMB_BA_H<0>
SMEMB_ADR_H<12..11>
SMEMB_ADR_H<9..0>
SMEMB_CS_L<1>
SMEMB_CS_L<0>
SMEMB_WE_L
SMEMB_CAS_L
SMEMB_CKE_H<0>
CLK_SMEMB_H<1>
Page 20
A2703
A2700
A2700
A2700
4XS-56R-J-W06
A2702
A2704
A2722
A2702
A2704
A2702
A2703
4XS-56R-J-W06
A2722
A2704
A2703
AR2
4XS-56R-J-W06
A2703
A2704
AR2
A2724
A2722
A2706
A2706
A2724
A2706
A2724
A2707
A2706
A2707
A2723
A2708
A2728
A2725
A2708
A2708
A2723
A2728
A2707
AR2
A2722
A2723
AR2
A2723
A2728
A2728
A2725
A2712
A2712
A2714
A2713
A2713
A2712
A2714
A2725
A2715
A2714
A2714
A2715
A2713
A2725
A2715
A2712
R2711
R2715
R2710
56R-J-W06
R2714
R2713
R2717
R2716
A2750
A2752
A2750
A2751
A2752
A2752
A2753
A2753
A2753
A2750
AR2
A2752
A2753
AR2
A2751
A2754
A2754
A2754
A2754
A2750
A2751
A2751
C2709
C2719
C2729
C2739
C2708
C2707
C2706
C2705
C2718
C2717
C2728
C2727
C2716
C2715
C2726
C2725
C2704
C2703
C2702
C2701
1U0-Z-10V-Y5V
C2714
C2713
C2724
C2723
C2712
C2711
C2722
C2721
C2738
C2737
C2736
C2735
C2734
C2733
C2732
C2731
C2700
100N-Z-25V-Y5V
C2710
C2720
100N-Z-25V-Y5V
C2730
A2715
A2713
A2707
A2708
C2740 C2741 C2742 C2743
A2724
A2702
A2700
A2720
A2720
A2720
A2721
A2721
A2721
AR2
A2720
A2721
AR2
A2770
A2771
A2770
A2770
AR2
4XS-47R-J-W06
A2755
AR2
4XS-47R-J-W06
A2755
A2755
A2755
A2770
A2771
A2771
A2771
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
27
99
20+
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:53 2003
DRAWING
47R
47R
47R
DATA
47R
47R
A
14X 1U
30X 100N
47R
DQS
BRASILIA
14 27
14 27
14 27
14 27
14 27
14 27
14 27
20 24
20 24 20 24
20 24
20 24
20 24
20 24
20 24
20 24
20 24
6 3
7 2
8 1
8 1
7 2
6 3
8 1
5 4
5 4
6 3
5 4
7 2
5 4
5 4
6 3
7 2
8 1
6 3
7 2
8 1
7 2
7 2
6 3
2 1
2 1
2 1
2 1
6 3
5 4
6 3
5 4
2 1 2 1 2 1 2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1 2 1 2 1 2 1
81
72
8 1
6 3
8 1
7 2
5 4
54
5 4
6 3
5 4
6 3
7 2
8 1
5 4
8 1
63
6 3
7 2
7 2
21
21
21
21
21
21
21
6 3
8 1
6 3
8 1
7 2
8 1
5 4
6 3
5 4
7 2
5 4
7 2
5 4
6 3
7 2
8 1
8 1
6 3
7 2
7 2
8 1
5 4
8 1
5 4
5 4
5 4
7 2
7 2
8 1
8 1
6 3
6 3
7 2
7 2
7 2
8 1
5 4
5 4
6 3
7 2
8 1
6 3
7 2
6 3
5 4
8 1
5 4
8 1
8 1
6 3
6 3
7 2
5 4
8 1
6 3
5 4
8 1
15
SMEMA_CS_L<3..0>
SMEMA_CKE_H<3..0>
SMEMA_DM_H<7..0>
54
V_TERM_A_1V25
SMEMA_DAT_H<63..0>
GND
GND
V_TERM_A_1V25
GND
V_TERM_A_1V25
GND
GND
60
38
53
1
11 10
34
11
5
SMEMA_ADR_H<12..0>
50
SMEMA_BA_H<1..0>
45
61
62
58
59
48
49
51
52
47
42
43
44
46
40
41
39
37 36 35
30
31
33 32
29
26
27
28
24
25
23
19
22
18 17
20
21
16
12
13
14
8
9
4
5
6
7
3 2
4
5
6
7
1 0
3 2
12
10
9 8
4
6
7
3
0
1
2
1 0
0
1
7 6 5 4 3 2 1 0
1 0
SMEMA_DQS_H<7..0>
63
0
55
56
57
V_TERM_A_1V25
SMEMA_RAS_L
V26803-B73-V8
V_TERM_A_1V25
V_TERM_A_1V25
V_TERM_A_1V25
DDR TERMINATION A
SCHUTZ
SMEMA_CAS_L
SMEMA_WE_L
Page 21
C2809
C2808
C2819
C2818
C2829
C2828
C2838
C2807
C2806
C2805
C2804
C2817
C2816
C2827
C2837
C2826
C2836
C2815
C2814
C2825
C2835
C2824
C2834
C2803
C2802
C2801
1U0-Z-10V-Y5V
C2800
100N-Z-25V-Y5V
C2813
C2812
C2823
C2833
C2822
C2832
C2811
C2810
C2821
C2831
C2820
100N-Z-25V-Y5V
C2830
C2843
C2842
C2841
C2840
R2813
R2814
A2851
A2852
A2853
R2811
A2851
A2855
A2855
A2852
A2853
A2851
A2851
A2855
AR2
4XS-47R-J-W06
A2871
A2871
A2853
A2871
A2855
A2852
A2871
A2853
A2854
A2852
A2800
4XS-56R-J-W06
A2800
A2800
A2800
A2804
AR2
A2804
A2804
A2804
A2822
A2822
A2822
A2822
A2823
AR2
A2823
A2823
A2823
A2825
A2825
A2825
A2825
A2814
A2814
A2814
A2814
A2803
A2803
A2820
A2802
A2820
A2854
A2802
A2824
A2824
A2802
A2802
A2824
A2824
A2807
A2854
A2807
A2806
A2806
A2828
A2828
A2850
A2850
AR2
A2821
AR2
A2821
A2806
A2806
A2821
AR2
A2821
A2813
A2813
A2812
A2808
A2808
A2812
A2815
A2807
A2815
R2810
56R-J-W06
A2820
A2850
A2808
A2808
A2812
A2812
A2803
AR2
4XS-56R-J-W06
A2828
A2815
A2813
A2820
A2850
A2803
4XS-56R-J-W06
A2807
AR2
A2828
A2815
A2854
A2813
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
28
99
21+
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:54 2003
DRAWING
47R
DQS
DATA
08.07.02
14X 1U
30X 100N
47R
47R
47R 47R
B
BRASILIA
14 28
14 28
20 25 20 25
14 28
14 28
14 28
14 28
14 28
20 25
20 25
20 25
20 25
20 25
20 25
20 25
20 25
7 2
5 4
8 1
6 3
8 1
5 4
8 1
7 2
5 4
7 2
5 4
6 3
7 2
8 1
5 4
7 2
7 2
8 1
21
6 3
6 3
5 4
5 4
6 3
8 1
6 3
8 1
6 3
8 1
5 4
6 3
5 4
7 2
6 3
5 4
6 3
8 1
7 2
8 1
7 2
7 2
6 3
5 4
7 2
5 4
7 2
5 4
8 1
6 3
8 1
7 2
6 3
6 3
5 4
7 2
8 1
5 4
8 1
6 3
7 2
7 2
6 3
5 4
8 1
6 3
8 1
5 4
7 2
8 1
7 2
5 4
6 3
5 4
7 2
8 1
6 3
5 4
7 2
6 3
8 1
5 4
8 1
6 3
8 1
6 3
5 4
7 2
8 1
5 4
6 3
6 3
54
72
7 2
7 2
7 2
8 1
81
21
5 4
8 1
63
21
21
2 1
2 1
2 1
2 1
2 1 2 1
2 1 2 1
2 1
2 1
2 1 2 1
2 1 2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1 2 1
2 1 2 1
2 1
2 1
2 1 2 1
2 1 2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1 2 1
2 1
2 1
2 1
2 1
2 1
SMEMB_CS_L<3..0>
SMEMB_ADR_H<12..0>
0
SMEMB_CKE_H<3..0>
SMEMB_DAT_H<63..0>
SMEMB_BA_H<1..0>
DDR TERMINATION B
SCHUTZ
3
5
V26803-B73-V8
V_TERM_B_1V25
2
11
GND
1
19
14
1
SMEMB_RAS_L
57
59
60
62 61
58
56 55
63
V_TERM_B_1V25
V_TERM_B_1V25
V_TERM_B_1V25
V_TERM_B_1V25
V_TERM_B_1V25
27
SMEMB_CAS_L
SMEMB_WE_L
GND
GND
GND
48
53
47
42
43
44
45
46
40
41
39 38 37 36 35 34
30
31
33 32
29
26
28
24
25
23 22
18 17
20
21
16 15
10
12
8
9
4
5
6
7
3
0
1
4
5
6
7
1 0
3 2
8
4
2
0
0
7 6 5 4 3 2 1 0
SMEMB_DM_H<7..0>
SMEMB_DQS_H<7..0>
1
0
1
6
7
11
12
9
10
V_TERM_B_1V25
GND
52 51 50 49
54
13
Page 22
A3000
AR2
4XS-100R-J-W06
C3003
100N-Z-25V-Y5V
A3000
AR2
C3004
100N-Z-16V-Y5V-C0402
C3005
10U-M-6V3-X5R
C3000
10P-J-50V-COG-2
C3010
100N-Z-25V-Y5V
R3004
10K-J-W06
R3007
10K-J-W06
C3020
10P-J-50V-COG-2
A3011
AR2
4XS-10K-J-W06
A3011
AR2
4XS-10K-J-W06
R3010
52R3-F-W06
R3020
24R9-F-W06
R3080
470K-J-W06
R3081
470K-J-W06
SATALED
NC (XOR)
VCC_SUS/LAN3.3V
VCC_SUS/LAN3.3V
VCC_SUS/LAN3.3V
VCC_SUS/LAN1.5VC
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
VCC_SUS3.3V
V_CPU_IO
V_CPU_IO
VCC_SATAPLL
VCC_SATAPLL
VCC_1.5V
VCC_SUS1.5VA
VCC_SUS1.5VB
VCC_SUS1.5VB
SMB
5VREFSUS
H /GPI5
5VREF2
G /GPI4
5VREF1
F /GPI3
VCC_SUS3.3V
VCC_SUS1.5VB
E /GPI2
SMB_DATA
VCC_SUS/LAN1.5VC
SMB_CLK
(MOBILE
-
ONLY)
+
(1.5V TOLERANT)
+
(RESUME WELL)
-
USBP5
USBP4
5
4
RBIAS
PERR
PME
0
3
2
1
0
OC
V_CPU_IO
ICH5
EE_DOUT
EE_CS
EE_DIN
EE_SHCLK
EEPROM
-
+
+
-
0
USBP3
PAR
USBP2
C/BE<3:0>
0
AD<31:0>
HIVSWING
PLOCK
GNT
STOP
4
TRDY
3
IRDY
2
DEVSEL
1
FRAME
PCI_RST
4
3
2
1
0
REQ
D
C
A B
PIRQ
SERR
PCI_CLK
PCI
STPCLK
SMI
NMI
INTR
IGNNE
INIT
CPUSLP
A20M
RCIN
FERR
A20GATE
O H GNTA/GPO16
GPIO0/REQA I 5V
CPU
HI<11:0>
HIVREF
S
F
HI_STB
CLK66
HUB
I/O CONTROLLER HUB 5
ICH5
IDE-PRIMARY
PIORDY
IRQ14
PDD<15:0>
PDDREQ
1
3 PDIOR PDIOW
PDA<2:0>
PDDACK
IRQ15
IDE-SECONDARY
SIORDY
SDD<15:0>
SDDREQ
1
3 SDIOR
SDIOW
SDA<2:0>
LPC
SDDACK
1
LFRAME
LAD<3:0>
USBCLK48
USBP0
USBP1
­+
+
-
AC97 LINK
AC_RST
AC_SYNC
AC_SDATA_OUT
AC_BIT_CLK AC_SDATA_IN0
VCC_RTC
RTCX1
RSMRST
RTCRST
CLK14
SPEAKER
AC_SDATA_IN1
POWER/SYSTEM MANAGEMENT
VRM_PWRGD/VGATE
LAN_RST
RI THERM INTRUDER
GPO49/CPU_PWRGD
SLP_S3
SLP_S5
SUS_CLK
SUS_STAT
GPIO MAIN WELL (MW)
GPIO32 OH 3V
PDCS
LDRQ
SDCS
HIRCOMP
GPI6/AGPBUSY I 5V
GPI7 I 5V
O B STP_PCI/GPO18
O H B SLP_S1/GPO19
O H STP_CPU/GPO20 O H C3_STAT/GPO21 O Z CPUPERF/GPO22
GPIO (RESUME WELL)
O L SSMUXSEL/GPO23
GPI8 I 3V
GPI11/SMBALERT I3V
GPI12 I 3V GPI13 I 3V
O H CLKRUN/GPIO24
B 3V OH GPIO25 B 3V OH GPIO27 B 3V OH GPIO28
LANCLK
LAN
LAN_RXD<2:0>
LAN_RSTSYNC
LAN_TXD<2:0>
VCC_USBPLL
RBIAS
AC_SDATA_IN2
RTCX2
RTC
THERMTRIP
SYS_RST
SLP_S4
SMLINK1
SMLINK0
GPIO34 OH 3V
POWER
DPRSLPVR
DPSLP(mobile only)
SERIRQ
REQ5/REQB/GPIO1
/GPI40
GPO48
GPO17/GNTB/GNT5
/GPI41
7
6
/GPI9
/GPI10 /GPI14 /GPI15
-
+
+
-
USBP7
USBP6
PWROK
LINKALERT
TP0/BATLOW
PWRBTN
INTVRMEN
-
+
SATA0RX
-
+
SATA1RX
-
+
SATABIAS
-
+
CLK100
SATA0TX
-
+
SATA1TX
-
+
SATA
GND,P1V5P,P3V3P
ICH5
D3000
ICH5-BGA460
A3011
AR2
4XS-10K-J-W06
A3011
AR2
4XS-10K-J-W06
C3090
10P-J-50V-COG-2
R3090
33R-J-W06
R3091
33R-J-W06
R3050
100R-J-W06
D1534D1534
LAST_MODIFIED=Fri Jan 17 05:28:55 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
30
99
22+
(AUDIO_PRI_DN_L)
NO RAC BECAUSE OF LAYOUT
NORMAL MODE SELECTED
KRAUTER
02.09.02
2,5V
BECAUSE OF SPIKES ON CPU SIGNALS
ON D1192 (NEU)
(ORANGE)
IOL=4MA IOH=-2MA
R3004 :ICH TESTABILITY
PUSH PULL
(15MA)
(AC_SD_IN0_H)
(LED_OEM_ON_L) (LED_MSG_ON_L)
(GREEN)
(AC_SD_IN1_H)
BRASILIA
34 53
65
66
65
31
31
31
31
35 80 85
14 15 20 21 22 30 31
14 37 38 65
14 15 20 21 22 30 31 35 80 85
32
71
20
47
34
10
34 53
34 40
34
99
10 11 12 13 15 21
38
31 47
34
31
32
32
38
92
53 65 66 80 90 91
35 37 38 40 47 48
14 19 24 25 31 34
31 72
91
31 91
91
91
91
47
91
46
32
34
31
32
40 65
14 47
14 19
10
31
53
53
53
35 53
35 53
35 53
35 80 85
14 15 20 21 22 30 31
35 53
35 53
35 53
35 53
48
10
10
10
19
10
91
10
91
10
91
10
10
34 91
34 40
31
31
30 31 34
34
37
30 31
37
30 31
71
38
37
38
37
37
37
19 30 71
37
19
37
19
37
37
38
32
38
32
32
38
38
38
32
32
32
32
32
32
32
32
32
32
35
32
32
35
32
35
32
35
32
32
35 53
32
35
32
35 53
35 53
32
35 90
35 53
35 53
35 80
35 80
53 80
35 53
19
34 40
34 40
20 21
66 91
19 24 25 34 52 65
34
91
19 24 34 52 65 66
30
19 30 71
30 31 34
30 31
71
30 31
71
40
35 53
20 34
38
47
71
53
53
14 15 20 21 22 30 31 35 80 85
10
20 21
20
19
31
11 47 65
34 65
34
38 45 47 65
30
47
91
48 65 91
40 46
40 46
32
38
32 47
21
21
21
21
63
54
Y18
AB19
B4
E8
A4
C7
B7
A3
D4
U24
F1
K2
L2
E5
E4
M3
L3
D2
V4
T22
R24
T24
V24
R22
U23
R23
R21
P22
V23
F23
L24
P20
AC12
AA12
AB12
AC11
AB13
AD11
A13
D12
E12
L20
D8
A24
B24
C24
C13
D13
A14
B14
C14
D14
N24
D15
C15
F24
AD5
AC5
Y9
Y11
AD9
AC9
AD7
AC7
R2
U5
Y20
Y21
Y24
AC17
AA18
J24
Y17
E7
A5
C6
B6
C5
C1
D5
T19
R19
R15
F11
B1
F10
E11
V6
U6
F18
F17
F16
E18
E14
E13
E2
K23
K15
B15
E24
A12
B9
B10
D10
W2
V3
A6
W3
AC1
F22
U20
R1
U22
T20
U21
AD10
AB2
D7
AB1
Y1
AA3
U2
W1
P24
V5
AA2
AD3
AD1
C2
AD2
E16
W14
A8
AB6
AA6
F8
F7
E22
F19
A2
Y5
AB4
AA4
F20
B11
E10
W5
W4
AC3E1
Y2
A11
F21
G23
T1
U3
R5
T21
Y12
T2
B3
AB3
Y4
AA1
R20
U1
A9
B8
C12
B16
A16
V2
D17
C17
B18
A18
D19
C19
B20
A20
D21
C21
L4
B22
A22
D23
C23
AB10
AA10
AB8
AA8
T4
N1
W20
Y22
Y23
V20
V22
AC18
AA17
AD18
P23
N22
21
21
21
21
81 7 2
21
21
21
21
21
21
21
54
21
81
72 63
LAN_CSA_PME_H
CASE_SWITCH_PRES_L
DUAL_OK_3V3_H
LAN_DIS_L
POWER_OK_ICH_H
BUTTON_POWER_L
INTRUSION_L
PWDSKIP_L
WAKE_ON_LAN_L SLOWDOWN_CPU_L
P1V5P
ICH_HI_STRF_H
USB_CCR_PWRON_EN_L
EN_STPCLK_L
P1V5P_DUAL_B
P1V5P_DUAL_A
P1V5P_DUAL_C
P1V5P
P1V5P
USB_ICH_RBIAS
ICH5
MON_ON_H
SMB_ALERT_L
GPIO_LAN_DIS_L
PCI_AD_H<31..0>
PCI_GNT_L<0>
KBD_A20_EN_H
HI_RCOMP_ICH
PCI_PME_L
GND
LAN_ICH_CLK_H
LPC_PME_L
AC_SD_OUT_ICH_H
AC_SD_OUT_AC97_H
AC_SYNC_ICH_H
AC_SYNC_AC97_H
CLK_48_USB_AUD_H
LAN_KIN_EEDIN_H
RTC_RST_L
P3V3P_DUAL
GND
CLK_14M_ICH_H
USB2-3_OVRCUR_L
SMB_CLK_DUAL_H
P3V3P
GND
GND
GND
INTVR_EN_H
PCI_REQ_L<5>
VREF_5V_ICH
GND
VCC_CPUCORE
P3V3P_DUAL
SMB_DATA_LAN_H
SMB_DATA_DUAL_H
GND
C
VCC_DUAL
5V_DIVIDER2V5
SATA_BIAS
VBATTRTC
USB4-5_OVRCUR_L
USB0-1_OVRCUR_L
GND
GND
SPEAKER_H
LAN_KIN_EECLK_H
LAN_KIN_EEDOUT_H
LAN_KIN_EECS_H
LAN_ICH_TXD<2..0>
LAN_ICH_RSTSYNC_H
LED_SLEEP_ON_L
FWH_WP_L
LED_POWER_ON_L
INTVR_EN_H
IDE_PRI_CS3_L
ICH_TP0_H
ICH_BUS_ISOLATE_L
IDE_PRI_CS1_L
SUS_CLK_32KHZ_H
GPO16_STRAP
SLEEP_S4-S5_L
SLEEP_S3-S5_L
POWER_OK_CPU_H
LINK_ALERT_L
PCI_GNT_L<1>
PCI_C_BE_L<3..0>
PCI_PAR_H
PCI_PERR_L
PCI_PLOCK_L
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_DEVSEL_L
PCI_FRAME_L
PCI_RST_ICH_L
CPU_STOPCLK_L
CPU_SMI_L
CPU_NMI_H
CPU_INTR_H
CPU_INIT_L
LAN_ICH_RXD<2..0>
CPU_IGNNE_L
CPU_SLEEP_L
CPU_A20MASK_L
SER_IRQ_H
ICH_RTC_X2
RECOVER_L
CPU_THERMTRIP_L
AC_SD_OUT_ICH_H
AC_SYNC_ICH_H
AC_RESET_L
USB_PORT7_NEG
USB_PORT7_POS
USB_PORT6_NEG
USB_PORT6_POS
CLK_48_USB_AUD_H
USB_PORT5_NEG
USB_PORT5_POS
CLK_100_SATA_P
USB_PORT4_NEG
USB_PORT4_POS
USB_PORT3_NEG
USB_PORT3_POS
USB_PORT2_NEG
SATA_0_RXP
USB_PORT2_POS
USB_PORT1_NEG
USB_PORT1_POS
LPC_LDRQ0_L
USB_PORT0_POS
IDE_SEC_DAT_H<15..0>
SATA_1_TXN
IDE_SEC_IORDY_H
SATA_1_TXP
IDE_SEC_IRQ_H
SATA_0_TXN
IDE_PRI_DRQ_H
SATA_0_TXP
LPC_LAD<3..0>
IDE_PRI_IORDY_H
IDE_PRI_IRQ_H
LPC_LFRAME_L
IDE_SEC_DAK_L
IDE_SEC_ADR_H<2..0>
ICH_GPI0_H
IDE_SEC_IOW_L
PCI_REQ_L<4>
IDE_SEC_IOR_L
PCI_REQ_L<3>
IDE_SEC_CS3_L
PCI_REQ_L<2>
IDE_SEC_CS1_L
PCI_REQ_L<1>
IDE_PRI_DAK_L
PCI_REQ_L<0>
IDE_PRI_ADR_H<2..0>
PCI_IRQ_LINE_8_L
IDE_PRI_IOW_L
PCI_IRQ_LINE_7_L
PCI_IRQ_LINE_6_L
IDE_PRI_IOR_L
PCI_IRQ_LINE_5_L
PCI_IRQ_LINE_4_L
PCI_IRQ_LINE_3_L
PCI_IRQ_LINE_2_L
PCI_IRQ_LINE_1_L
PCI_SERR_L
CLK_PCI_ICH_H
VREF_HI_MCH_ICH
IDE_PRI_DAT_H<15..0>
BUTTON_RST_L
SMB_CLK_LAN_H
EN_PRESCOTT_L
CLK_100_SATA_N
SATA_1_RXN
SATA_1_RXP
USB6-7_OVRCUR_L
ICH_RTC_X1
AC_SD_IN2_H
AC_BITCLK_H
IDE_SEC_DRQ_H
SATA_0_RXN
VBATTRTC
P1V5P
KBD_RESET_L
CPU_FPU_ERR_L
SWING_HI_MCH_ICH
ICH_HI_H<11..0>
ICH_HI_STRS_H
CLK_66_ICH_H
USB_PORT0_NEG
FP_LED_HD_ON_L
Page 23
C3141
10P-J-50V-COG-2
C3140
10P-J-50V-COG-2
G3140
QRZ3-32.768KHZ
QUARZ4
R3141
10M-J-W06
P3141
PAD64
P3140
PAD64
V3150
D-SCHOTTKY
BAT254-KOMBI
C3150
1U0-Z-10V-Y5V
R3150
1K0-J-W06
C3102
100N-Z-25V-Y5V
R3192
1K0-J-W06
R3193
1K0-J-W06
R3190
1K0-J-W06
R3191
1K0-J-W06
C3151
100N-Z-25V-Y5V
C3100
100N-Z-25V-Y5V
C3101
100N-Z-25V-Y5V
C3110
100N-Z-25V-Y5V
C3111
100N-Z-25V-Y5V
C3112
100N-Z-25V-Y5V
C3114
100N-Z-10V-Y5V
C3115
100N-Z-10V-Y5V
C3121
100N-Z-25V-Y5V
C3130
100N-Z-25V-Y5V
C3131
100N-Z-25V-Y5V
C3132
100N-Z-25V-Y5V
C3134
100N-Z-25V-Y5V
C3135
100N-Z-25V-Y5V
C3136
100N-Z-10V-Y5V
C3137
100N-Z-10V-Y5V
C3155
100N-Z-25V-Y5V
C3113
100N-Z-25V-Y5V
- +
X3160
P-N106
STBAT-1
C3163
1U-K-10V-X5R
R3161
1K0-J-W06
V3160
D3KK
BAT64
R3162
22K-J-W06
C3162
1U0-Z-10V-Y5V
R3120
10K-J-W06
C3116
100N-Z-10V-Y5V
C3123
100N-Z-10V-Y5V
C3124
100N-Z-10V-Y5V
R3194
1K0-J-W06
R3195
4K7-J-W06
R3180
220R-J-W06
R3121
R00-1A0
TR1
TR2
V3180
BC846S-SOT363
T-NPN-BC846S
A3180
AR2
4XS-470R-J-W06
A3180
AR2
4XS-470R-J-W06
A3180
AR2
4XS-470R-J-W06
A3180
AR2
4XS-470R-J-W06
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:56 2003
DRAWING
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
31
99
23+
&
_
_
_
BLOCKING FOR VCC_PLL SUPPLYS
SATA PLL
DON’T POPULATE
UNDER ICH
UNDER ICH
ICH 5V VREF
R3180 IS 220R BECAUSE OF TESTABILITY
DON’T POPULATE
V3180
DON’T POPULATE
PLACE CLOSE TO ICH5
STRAPS
FOR SERVER USE OTHER BATTERY HOLDER V26898-B540-V304
TAU = 0.018 - 0.025
C3163 = 0.1U
EVA-SHEMATICS: R3162 = 180K
R3161: 1K FOR UL,MEASUREMENT AND ICH BUGFIX
TO ICH
PD: 1K-2K2
(15K PU)
08.07.02
L: TOP SWAP OVERRIDE
H: DISABLE TCO TIMER / NO REBOOT
L: RESERVED
H: ASF ENABLED
KNOPFZELLE: V26898-B540-V3
H: CPU SPEED = SAVE
EDS 1.0 PG59
(9K PD)
L: RESERVED
PLACE NEAR AD6 (GND)
TO ICH
PLACE NEXT
UNDER ICH
PLACE NEXT
PLACE UNDER ICH
PLACE
PLACE NEXT
PLACE
(9K PD)
(9K PD)
(15K PU)
ICH RTC
TO ICH
PLACE NEAR ICH
PLACE
PLACE NEXT
SMD:
TAU = 0,022
PROBLEM WITH ISOLATE SIGNAL
WORKAROUND FOR ICH
USB PLL
C3122: PLACE NEAR PIN V1
ICH DECOUPLING
TO ICH
PLACE NEAR D24 (GND)
ALTERNATIVE: V26823-B1-V65
BRASILIA
30
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
30
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
30 30
30
30
30
30 72
30
30
30
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
30 91
30
65
30 34
30 47
20 48
80 85
14 15 20 21 22 30 31 35
30
40
80 85
14 15 20 21 22 30 31 35
20
72
63 54
81
4
3
1
6
5
2
21
2 1
21
21
2 1
2 1
2 1
21
21
21
1
3
221
21
2 1
21
21
2 1
2 1
21
21
21
21
21
21
2 1
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
A K
1 1
21
3
2
4
1
21 21
ICH_SYNC_L
P1V5P
V26803-B73-V2
V26803-B100-V1
V26803-B73-V2
P1V5P_DUAL_C
P3V3P_DUAL
V26803-B73-V2
V26803-B73-V2
GND
AC_SYNC_ICH_H
V26803-B73-V2
SPEAKER_H
V26801-B76-V138
VREF_5V_ICH
LINK_ALERT_L
P3V3P_DUAL
ICH_RTC_X1
GND
VBATT
P3V3P_DUAL
GND
P3V3P
ICH_RTC_X2
VCC
GND
GNDGND
VBATTRTC
GND
RTC_RST_L
GND
P3V3P
C
C
V26803-B73-V8
V26898-B540-V300
C
V26803-B100-V1
C
V26803-B100-V1
V26803-B73-V2
V26803-B73-V2
C
V26803-B73-V2
V26803-B73-V2
V26810-B610-V50
V26823-B5-V1
V26803-B73-V2
C
P1V5P_DUAL_B
P1V5P_DUAL_A
BUS_ISOLATE_L
GND
V26803-B73-V2
C
V26803-B100-V1
C
V26803-B100-V1
GND
ICH_BUS_ISOLATE_L
LAN_KIN_EEDOUT_H
GPO16_STRAP
AC_SD_OUT_ICH_HP3V3P
V26810-B604-V40
P3V3P
POWER_OK_ICH_H
POWER_OK_3V3_H
V26810-B720-V40
ICH SUPPORT
SCHUTZ
BATTERY
P3V3P
V26803-B100-V1
V26803-B100-V1
P1V5P
Page 24
C3203
10N-K-50V-X7R-2
C3202
10N-K-50V-X7R-2
C3201
10N-K-50V-X7R-2
C3200
10N-K-50V-X7R-2
V3201
D3AA
BAW56
A3210
AR2
4XS-10K-J-W06
A3210
AR2
4XS-10K-J-W06
A3210
AR2
4XS-10K-J-W06
A3210
AR2
4XS-10K-J-W06
A3220
AR2
4XS-10K-J-W06
A3220
AR2
4XS-10K-J-W06
A3220
AR2
4XS-10K-J-W06
A3220
AR2
4XS-10K-J-W06
A3215
AR2
4XS-47K-J-W06
A3215
AR2
4XS-47K-J-W06
A3215
AR2
4XS-47K-J-W06
A3215
AR2
4XS-47K-J-W06
1 3 5 7 9
13
11
15 17 19 21 23 25 27 29
33
31
35 37 39
1
2
39
40
C
4
2
6
8 10 12 14 16 18
22 24 26 28 30 32 34 36 38 40
C
XB431-V40
X3201
FKSTKRCO-039
1 3 5 7 9
13
11
15 17 19 21 23 25 27 29
33
31
35 37 39
1
2
39
40
C
4
2
6
8 10 12 14 16 18
22 24 26 28 30 32 34 36 38 40
C
XB431-V40
X3200
FKSTKRCO-039
1
TXN
TXP
GND
RXN RXP GND
GND
7
X3240
DIVST074-007
XB392-V428
1
TXN
TXP
GND
RXN RXP GND
GND
7
X3241
DIVST074-007
XB392-V428
A3205
AR2
4XS-33R-J-W06
A3205
AR2
4XS-33R-J-W06
A3205
AR2
4XS-33R-J-W06
A3205
AR2
4XS-33R-J-W06
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
32
99
24+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:56 2003
DRAWING
WITH GND REFERENCE
PRI/SEC IDE CHANNEL
(12MA)
REQUIRED ON SEC_DRQ
NO EXTERNAL PULL-DOWNS
V3201 NOTWENDIG ZUR ENTKOPPLUNG
IN ICH5-DESIGNS
AND SEC_DAT<7>
IN SOME IDE DRIVES
BECAUSE OF 10K PULL UP
A3215 CHANGED TO 47K
IN SOME IDE DRIVES
BECAUSE OF 10K PULL UP
A3215 CHANGED TO 47K
SERIAL ATA CONNECTOR 1
IDE-CONNECTOR IDE-CONNECTOR
REQUIRED ON PRI_DRQ
IDE 1/2
PLACE NEAR TO
SECONDARY
PLACE NEAR TO
PRIMARY
IDE 3/4
AND PRI_DAT<7> IN ICH5-DESIGNS
C’S FOR IDE-SIGNAL-ROUTING ON COMPONENT-SIDE
(12MA)
08.07.02 SCHUTZ
NO EXTERNAL PULL-DOWNS
CSEL = GND
CSEL = GND
SERIAL ATA CONNECTOR 0
NOT NECESSARY IF ROUTED
BRASILIA
30
30 30
30
30
30
30
40
32
30
30
30
30 47
32
30
30
30 30
30
30
30
30
30
30
30 30
30
30
30
30
30
30
30
30
30
30
40
30
30 30
30 30
30
30
30
30
30
30
30
30
30
30
30
32
30
30 30
32
30 30
30
30
30
30
30
30
30
30
30
32 48
32 48
63
72
81
54
7
6
5
4
3
2
1
7
6
5
4
3
2
1
7 2
6 3
54
81
81
726354
8 1
54
63
72
1
3
2
21
21
21
21
17
15
13
11
9
7
40
38
36
34
32
30
28
26
24
22
5
18
16
14
12
10
8
6
4
2
39
3
37
35
33
31
29
27
25
23
21
19
1
17
15
13
11
9
7
40
38
36
34
32
30
28
26
24
22
5
18
16
14
12
10
8
6
4
2
39
3
37
35
33
31
29
27
25
23
21
19
1
PCI_RST_IDE5V_L
PCI_RST_IDE5V_L
IDE_PRI_DAT_H<5> IDE_PRI_DAT_H<4> IDE_PRI_DAT_H<3>
IDE_PRI_DAT_H<1>
SATA_0_RXN
IDE_PRI_DAT_H<6>
IDE_PRI_DAT_H<7>
PCI - IDE 1/2 + 3/4
SERIAL ATA CONN.
P3V3P
IDE_PRI_DAT_H<8>
GND
GND
IDE_SEC_DAT_H<7>
FP_LED_HD12_ON_L
IDE_SEC_DAT_H<8>
IDE_SEC_DAT_H<0>
IDE_SEC_DRQ_H
SATA_1_RXN
IDE_SEC_DAT_H<12>
P3V3P
IDE_SEC_DAT_H<6> IDE_SEC_DAT_H<5> IDE_SEC_DAT_H<4>
FP_LED_HD34_ON_L
IDE_SEC_DAT_H<14> IDE_SEC_DAT_H<15>
IDE_PRI_ADR_H<1>
IDE_SEC_DAT_H<1>
SATA_0_TXP SATA_0_TXN
SATA_0_RXP
SATA_1_TXP SATA_1_TXN
SATA_1_RXP
GND
GND
V26827-B431-V40
P3V3P
IDE_SEC_IORDY_H
IDE_PRI_IORDY_H
IDE_PRI_DRQ_H IDE_PRI_IOW_L IDE_PRI_IOR_L
IDE_PRI_DAK_L IDE_PRI_IRQ_H
IDE_PRI_ADR_H<0> IDE_PRI_CS1_L
IDE_PRI_DAT_H<9> IDE_PRI_DAT_H<10> IDE_PRI_DAT_H<11> IDE_PRI_DAT_H<12> IDE_PRI_DAT_H<13> IDE_PRI_DAT_H<14> IDE_PRI_DAT_H<15>
IDE_PRI_DAT_H<2>
IDE_PRI_DAT_H<0>
IDE_SEC_DAT_H<2>
IDE_SEC_DAT_H<3>
IDE_SEC_CS1_L
IDE_SEC_IOR_L
IDE_SEC_IOW_L
C
C
C
C
GND
V26827-B431-V40
IDE_PRI_ATA66_DET_L
IDE_PRI_ADR_H<2> IDE_PRI_CS3_L
IDE_SEC_DAT_H<9> IDE_SEC_DAT_H<10> IDE_SEC_DAT_H<11>
IDE_SEC_DAT_H<13>
IDE_SEC_ATA66_DET_L
IDE_SEC_ADR_H<2> IDE_SEC_CS3_L
FP_LED_HD_ON_L
IDE_SEC_DAK_L IDE_SEC_IRQ_H IDE_SEC_ADR_H<1> IDE_SEC_ADR_H<0>
FP_LED_HD12_ON_L
FP_LED_HD34_ON_L
Page 25
A3310
AR2
4XS-10K-J-W06
A3310
AR2
4XS-10K-J-W06
A3310
AR2
4XS-10K-J-W06
A3310
AR2
4XS-10K-J-W06
R3313
470R-J-W06
R3312
470R-J-W06
R3311
470R-J-W06
R3310
470R-J-W06
R3302
470R-J-W06
R3303
470R-J-W06
R3304
470R-J-W06
A3301
AR2
4XS-10K-J-W06
A3301
AR2
4XS-10K-J-W06
A3301
AR2
4XS-10K-J-W06
A3300
4XS-10K-J-W06
A3300
4XS-10K-J-W06
A3301
AR2
4XS-10K-J-W06
R3300
470R-J-W06
R3301
470R-J-W06
R3314
470R-J-W06
R3315
10K-J-W06
A3300
4XS-10K-J-W06
A3300
AR2
4XS-10K-J-W06
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
33
99
25+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:57 2003
DRAWING
-
-
-
-
0 0 0 0
BRASILIA
D1534 - A:
03 02 01 00
-
-
-
-
-
-
-
-
X X
-
-
X
-
-00
0
0
X
0
0
0 0 1
1
0
1
1
0 0 0
ID R3304 R3303 R3302 R3301 R3300 BIT3BIT4
BOARD-ID
BIT2 BIT1 BIT0
GS03 GS01
GS00
-
-
GS02
-
-
GS04
-
-
-
GS11
GS12 GS10
GS09
GS05
GS07 GS06
GS08
-
-
-
-
-
-
-
-
- -
-
-
- -
X-
-
X X X
-
X
X
-
-
-
X
X X
-
X
-
-
XX
-
- X
-
X
--
-
-
X
X
-
X
X
-
X
-
X
-
­X
­X
0 0
0
000
0
0
0 0
1
1
1
1
0
0
0
0 0 0
0 0
0 0 0
1
GS13
- 0XX -X 1
GS15 GS14
GS16
GS17
GS18
X
X X
-
-
GS19
GS20XX
GS21
X
GS22
GS23
GS24
GS25
GS26
GS27
GS28
GS29
X
X X
X X
X
X X
X
-
X X
-
-
-
-
-
X X
-
-
-
X-
X
X X
-
X
-
X X
X
X
-
-
-
-
X X
GS30
X XX
GS
GS31
R3314XR3313XXR3312
GS-ID
­X
X
X
X
-
-
X
-
-
-
X
X
-
X-
X
-
X
­X
X
-
-
X
­X
-
-
X
X
-
1 0
1
1
0
110
0
0
0
0
1
1
1 0
111
1 1
1 1 1 1
1 1
0
1 1
0
1
1-X 1
1
BIT4R3310R3311
XX 1
BIT3
1
000
0
0
0 1
01
0
1 1 1
0
0
0
1 0
0
1 1
1
0 1 0
0
0
0 1
1
0
1
0
1
0
1 1
0
0 11
1
0
0
0
1
1111
0 0 0
1 0
01
0 1
1
0
0
0
1 1
1
0 1
0
1
1
0
0
0
1
0
1 0
0
1
0
1 1
1
1
0
1
0 0
1 01
1 1
BIT1BIT2 BIT0
1
BOARD-ID
WGS BEACHTEN
100
P3V3P
GNDGND==>
1
P3V3P
P3V3P GND
GND
BIT0
08.07.02
0 1
1
1
0
0
0 0 1 1
1
1
0
1
1
1
1
0
0
0
P3V3P GND P3V3P
GND
GND GND P3V3P P3V3P
P3V3P
GND
P3V3P
P3V3P
GND
GS-ID
WGS-ID
GND
P3V3P
P3V3P
4
3
2
GND
PIN8
WGS-ID
BIT1BIT2PIN6PIN7
WGS
0
BRASILIA
40
46
40
40
40
40
40
40
40
46
46
46
46
5 4
8 1
21
21
21
21
5 4
6 3
7 2
8 1
7 2
6 3
21
21
21
21
21
21
21
8 1
7 2
6 3
5 4
GND
SCHUTZ
ICH GPIO PULLUPS /1
P3V3P
BOARD_ID_L<2>
BOARD_ID_L<1>
WGS_ID_L<0>
GND
WGS_ID_L<1>
GS_ID_L<0>
R
R
R
R
R
R
R
R
R
R
WGS_ID_L<2>
P3V3P
BOARD_ID_L<3>
GS_ID_L<3>
GS_ID_L<1>
P3V3P
GS_ID_L<4>
GND
GND
BOARD_ID_L<4>
GS_ID_L<2>
BOARD_ID_L<0>
R
Page 26
A3430
AR2
4XS-10K-J-W06
A3430
AR2
4XS-10K-J-W06
A3440
AR2
4XS-10K-J-W06
A3440
AR2
4XS-10K-J-W06
A3499
AR2
4XS-4K7-J-W06
A3499
AR2
4XS-4K7-J-W06
R3450
470K-J-W06
A3430
AR2
4XS-10K-J-W06
R3414
61R9-F-W06
A3499
AR2
4XS-4K7-J-W06
A3499
AR2
4XS-4K7-J-W06
A3440
AR2
4XS-10K-J-W06
A3430
AR2
4XS-10K-J-W06
A3440
AR2
4XS-10K-J-W06
R3462
10K-J-W06
R3425
22R6-F-W06
R3432
10K-J-W06
R3440
10K-J-W06
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:57 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
34
99
26+
ALWAYS POPULATE BECAUSE OF LOWER BATTERY CURRENT
08.07.02
ALWAYS POPULATE
PLACE R3425 NEAR ICH5
WITHIN THE ICH5
SMB AND SMLINK IS CONNECTED TOGETHER
WITH WIRE OR LOGIC ?
NOTE FOR ATX DESIGN: PD (10K) ON AC_SD_IN2_H IS REQUIRED FOR CNR SUPPORT
BRASILIA
30 40
30
19 24 25 30 52 65 66 91
30
30 40
30 65
30 40
19 24 30 52 65 66 91
30 91
30
30
90 91 92
38 40 47 48 53 65 66 80
14 19 24 25 30 31 35 37
30
30 31
30
30
30 53
30
30 40
30 53
21
21
21
21
6 3
81
5 4
72 54
21
72
21
63
81
8 1
7 2
54
63
LAN_CSA_PME_H
LPC_PME_L
WAKE_ON_LAN_L
SMB_CLK_LAN_H
SMB_DATA_DUAL_H
SMB_CLK_DUAL_H
SMB_ALERT_L
USB_ICH_RBIAS
ICH GPIO PULLUPS /2
SCHUTZ
ICH_TP0_H
SMB_DATA_LAN_H
CASE_SWITCH_PRES_L
SER_IRQ_H
R
ICH_HI_H<11>
R
P3V3P
SLOWDOWN_CPU_L
KBD_A20_EN_H
KBD_RESET_L
ICH_GPI0_H
INTRUSION_L
VBATTRTC
GND
P3V3P_DUAL
GND
Page 27
A3500
AR2
4XS-4K7-J-W06
A3500
AR2
4XS-4K7-J-W06
A3502
AR2
4XS-4K7-J-W06
A3502
AR2
4XS-4K7-J-W06
A3503
AR2
4XS-4K7-J-W06
A3510
AR2
4XS-4K7-J-W06
A3500
AR2
4XS-4K7-J-W06
A3500
AR2
4XS-4K7-J-W06
A3502
AR2
4XS-4K7-J-W06
A3502
AR2
4XS-4K7-J-W06
A3503
AR2
4XS-4K7-J-W06
A3503
AR2
4XS-4K7-J-W06
A3510
AR2
4XS-4K7-J-W06
A3503
AR2
4XS-4K7-J-W06
A3510
AR2
4XS-4K7-J-W06
A3510
AR2
4XS-4K7-J-W06
A3501
AR2
4XS-4K7-J-W06
A3501
AR2
4XS-4K7-J-W06
A3501
AR2
4XS-4K7-J-W06
A3501
AR2
4XS-4K7-J-W06
R3503
4K7-J-W06
R3505
100R-J-W06
R3500
4K7-J-W06
A3511
AR2
4XS-4K7-J-W06
A3511
AR2
4XS-4K7-J-W06
A3511
AR2
4XS-4K7-J-W06
A3511
AR2
4XS-4K7-J-W06
C3500
100N-Z-25V-Y5V
C3550
100N-Z-25V-Y5V
C3551
100N-Z-25V-Y5V
C3552
100N-Z-25V-Y5V
C3553
100N-Z-25V-Y5V
C3554
100N-Z-25V-Y5V
C3501
100N-Z-25V-Y5V
C3502
100N-Z-25V-Y5V
C3555
100N-Z-25V-Y5V
C3556
100N-Z-25V-Y5V
C3503
100N-Z-25V-Y5V
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:28:57 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
35
99
27+
SERIAL ATA
JORDAN IF
FOR USB PORT 0-3 AT ICH5
PROBLEMS WITH PARITY SIGNALISATION
SCHUTZ
08.07.02
ONLY POPULATE R3505 FOR SERVER
ALL PCI CHANGES LAYER
ALL PCI CHANGES LAYER
CLK_100_SATA JUMP FROM GND TO P3V3P
GAP C’S
SIGNAL CROSS LAYER C’S
ALL PCI CHANGES LAYER
ALL PCI CHANGES LAYER
FOR AC_BITCLK_H; NEAR A3011
FOR AC_SD_IN2_H & CLK_48_USB_AUD_H; NEAR R3190
BRASILIA
35 80 85
14 15 20 21 22 30 31
66 80 90 91 92
37 38 40 47 48 53 65
14 19 24 25 30 31 34
30 53
30
30 53
30 53
30 53
30
30
30
30 53
30 53
30 53
30 53
30 53
30
30 80
30 53
30 90
30 53
30 53
30 53
30 80
30 53
53
35 80 85
14 15 20 21 22 30 31
35 80 85
14 15 20 21 22 30 31
2 1
21
21
21
21
21
21
21
21
21
21
63
54
72
81
21
21
21
5 4
6 3
8 1
7 2
54
81
7 2
63
8 1
5 4
81
63
6 3
8 1
72
6 3
54
72
7 2
5 4
P1V5P
P1V5P
P1V5P
PCI PULLUPS / GAP C
P3V3P
VCC
GND
P3V3P_DUAL
GND
P3V3P GND
P3V3P
P3V3P
GND
GND
GND
GND
P3V3P GND
P3V3P GND
GND
PCI_IRDY_L
P3V3P
P3V3P
PCI_REQ_L<1>
PCI_REQ_L<0>
PCI_REQ_L<3>
PCI_REQ_L<2>
PCI_REQ_L<4>
PCI_REQ_L<5>
PCI_FRAME_L
PCI_SERR_L
PCI_PERR_L
PCI_PLOCK_L
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_IRQ_LINE_8_L
PCI_IRQ_LINE_7_L
PCI_IRQ_LINE_6_L
R
R
PCI_ACK64_L
P3V3P
PCI_IRQ_LINE_5_L
PCI_IRQ_LINE_4_L
PCI_IRQ_LINE_3_L
PCI_IRQ_LINE_2_L
PCI_IRQ_LINE_1_L
Page 28
+
C3727
1M0-M-6V3-R070
ELKO
C3729
10N-K-50V-X7R-2
L3721
50R-100M-3A0-R03
R3720
R-RT
MICROSMD150
A1 A2 A3 A4 GND1 GND2 B1 B2 B3 B4 GND3 GND4
A1 A4
B4B1
XB478-V8
X3700
BUUSB1-008
C3709
10N-K-50V-X7R-2
R3700
R-RT
MICROSMD150
+
C3707
1M0-M-6V3-R070
ELKO
L3701
50R-100M-3A0-R03
V3720
4ESD41206
41206ARRAY4X
V3720
4ESD41206
41206ARRAY4X
V3720
4ESD41206
41206ARRAY4X
V3720
4ESD41206
41206ARRAY4X
C3700
180P-J-50V-COG-2
C3720
180P-J-50V-COG-2
USB REC.
B
A
C
B A
18
SHIELD SHIELD
GND
1 4
41
GND
VBUS
+
-
­+
USB
VBUS
SHIELD SHIELD
USB
XB391-V221
X3720
BUUSBLAN4-022-1000
P3720
PAPERGATE
PAPERGATE
P3700
PAPERGATE
PAPERGATE
W2
W1
L3726
90R-100M-A20-R19-SHORT
L2-4-SHORT
W2
W1
L3725
90R-100M-A20-R19-SHORT
L2-4-SHORT
W2
W1
L3706
90R-100M-A20-R19-SHORT
L2-4-SHORT
W2
W1
L3705
90R-100M-A20-R19-SHORT
L2-4-SHORT
D1534D1534
Fri Jan 17 05:28:58 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
37
99
28+
USB 2.0
USB 2.0
USB 2.0
REAR
USB 2.0
REAR
08.07.02
BRASILIA
30
30
30
30
30
30
30
37 43 44 45 85 94
14 30 37 38 65
37 43 44 45 85 94
47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 38 40
30
14 30 37 38 65
30
37 43 44 45 85 94
30
34
21
34
21
34
21
34
21
21
21
7
6
5
24
23
4
3
2
26
25
8
1
2 1
2 1
54
81
72
63
21
2 1
21
2 1
B3
B2
B1
6
5
A4
A3
A2
12
11
B4
A1
21 21
2 1
2 1
V26813-B356-V12
VCC_USB4-5
USB_PORT6_POS
USB_PORT6_NEG
USB_PORT7_POS
USB_PORT7_NEG
V26827-B478-V8
SHIELD_GND
P3V3P_DUAL
C
V26810-B397-V60
0.12
0.12
USB6-7_OVRCUR_L
USB4-5_OVRCUR_L
VCC_DUAL
USB5_NEG USB5_POS
USB4_NEG
USB6_POS
USB6_NEG
USB7_POS
USB7_NEG
SHIELD_GND
V26813-B356-V12
CC
C
GND
VCC_DUAL
GND
VCC_USB4-5_2X
VCC_USB6-7_2X
SHIELD_GND
S1-BUUSB1
VCC_USB6-7
V26810-B397-V60
SCHUTZ
USB CONNECTORS
USB4_POS
V26810-B769-V40
USB_PORT5_NEG
USB_PORT5_POS
USB_PORT4_NEG
USB_PORT4_POS
Page 29
C3829
10N-K-50V-X7R-2
L3821
50R-100M-3A0-R03
+
C3827
1M0-M-6V3-R070
ELKO
R3820
R-RT
MICROSMD150
V3820
4ESD41206
41206ARRAY4X
V3820
4ESD41206
41206ARRAY4X
V3820
4ESD41206
41206ARRAY4X
V3820
4ESD41206
41206ARRAY4X
CCR_ON
OC
OC
GND
VCC
+
­USB
C C
2
12
DUAL USB PORT
GND
VCC
+
­USB
INTEL COMPLIANT
XB470-V812
X3820
MST2GFK4-010
A3840
AR2
4XS-22K-J-W06
A3840
AR2
4XS-22K-J-W06
A3840
AR2
4XS-22K-J-W06
A3840
AR2
4XS-22K-J-W06
C3850
180P-J-50V-COG-2
C3859
10N-K-50V-X7R-2
L3851
50R-100M-3A0-R03
V3850
4ESD41206
41206ARRAY4X
V3850
4ESD41206
41206ARRAY4X
V3850
4ESD41206
41206ARRAY4X
V3850
4ESD41206
41206ARRAY4X
+
C3857
1M0-M-6V3-R070
ELKO
R3850
R-RT
MICROSMD150
3 5
2 4 6
1
2
5
6
1
X3825
MST2AFKS-006
XB465-V6
1 2 3 4
1 4
GND1 GND2
X3850
BUUSB1-004
XB478-V4
1 2 3 4
1 4
GND1 GND2
X3851
BUUSB1-004
XB478-V4
P3820
PAPERGATE
PAPERGATE
P3850
PAPERGATE
PAPERGATE
C3820
47P-J-50V-COG
C3821
47P-J-50V-COG
4K7
4K7
V3840
BCR119S-SOT363
T-NPN-BCR119S
C3851
180P-J-50V-COG-2
W2
W1
L3825
L2-4
90R-100M-A20-R19
W2
W1
L3826
90R-100M-A20-R19-SHORT
L2-4-SHORT
W2
W1
L3855
90R-100M-A20-R19-SHORT
L2-4-SHORT
W2
W1
L3856
90R-100M-A20-R19-SHORT
L2-4-SHORT
A3820
AR2-2XS
2XS-0R-J-W06
A3820
AR2-2XS
2XS-0R-J-W06
D1534D1534
Fri Jan 17 05:28:58 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
38
99
29+
PLACE R3821+R3822 NEAR L3825
USB 2.0
CH 3
CH 2
08.07.02
N.C.
USB 2.0
CONNECTOR
USB 2.0
FRONT
BLUETOOTH
(LED)
(USB_ON)
BRASILIA
30
30
30
30
30
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
30
30
30
30
38 75
14 30 37 38 65
91 92
48 53 65 66 80 90
34 35 37 38 40 47
14 19 24 25 30 31
14 30 37 38 65
30 45 47 65
30
91 92
48 53 65 66 80 90
34 35 37 38 40 47
14 19 24 25 30 31
38 75
30
3 4
2 1
34
21
34
21
34
21
34
21
21
4
3
1
6
5
2
2 1
2 1
21
21
6
5
4
3
2
1
6
5
4
3
2
1
6
4
2
5
3
1
21
2 1
54
63
72
81
21
2 1
21
63
54
7 281
12
10
8
6
4
9
7
5
2
3
63
72
81
54
21
2 1
21
2 1
USB2_POS
USB2_NEG
USB_PORT2_NEG
USB_PORT2_POS
V26813-B356-V50
A1-CHIPRAC
C
GND
V26813-B356-V12
USB_PORT3_POS
USB3_BT_POS
USB_PORT3_NEG
USB3_BT_NEG
SHIELD_GND_3
GND
GND
P3V3P_DUAL
V26827-B465-V6
GND
0.12
VCC_USB0-1
V26813-B356-V12
S1-SMALL
V26827-B470-V812
GND
USB_CCR_PWRON_EN_L
BUTTON_POWER_L
GND
GND
GND
VCC_USB2-3_2X
V26810-B769-V40
USB0-1_OVRCUR_L
VCC_DUAL
USB2-3_OVRCUR_L
VCC_USB2-3
V26810-B397-V60
P3V3P_DUAL
USB1_NEG
USB0_POS
VCC_DUAL
SHIELD_GND_3
P3V3P_DUAL
V26810-B397-V60
GND
VCC_USB0-1_2X
USB1_POS
USB0_NEG
0.12
C
C
C
GND
V26810-B769-V40
USB3_NEG
USB3_POS
USB BLUETOOTH CONNECTOR
USB CONNECTORS
SCHUTZ
USB_PORT1_POS
USB_PORT1_NEG
USB_PORT0_POS
USB_PORT0_NEG
Page 30
C4082
100N-Z-25V-Y5V
C4081
100N-Z-25V-Y5V
C4080
100N-Z-25V-Y5V
A4040
4XS-10K-J-W06
A4040
4XS-10K-J-W06
A4040
4XS-10K-J-W06
C4000
10P-J-50V-COG-2
A4040
4XS-10K-J-W06
C4004
100N-Z-25V-Y5V
C4003
100N-Z-25V-Y5V
C4002
100N-Z-25V-Y5V
GPIO44 GPIO45
GPIO11 GPIO12 GPIO17 GPIO20
PURPOSE
GENERAL PURPOSE
(RESUME WELL)
GPIO86/LA_OUT1
GENERAL
GPIO46/SMI
GPIO74/IRQ7
GPIO73/IRQ6
GPIO33/WDO
GPIO24/SYSOPT
RING/GPIO23
GPRST2/GPIO61
INTRUDER/GPIO25
SLP_S5/GPIO64 GPRST1/GPIO60
SLP_S3/GPIO63
LA_IN0/GPIO32
GPIO27/LA_IN2
LA_IN1/GPIO26
RISER2/GPIO72
RISER1/GPIO71
EVENT6/GPIO16
EVENT5/GPIO15
PME_IN/GPIO13
PWRBTN_IN/GPIO62
R_OFF/GPIO70
DDRC/GPIO43
WOL/GPIO14
GPIO66/PWRBTN_OUT
GPIO42/PME
GPIO67/PS_ON
GPIO30/LED_COLOR
GP41
GPIO31/LED_BLINK
GP36
VBAT
GPIO52 GPIO53
TXD1RXD1
47M967
SUPER I/O LPC
CLKI (14M318) CLKI32 (32K768)
CLOCKS
LCLK LRESET LFRAME LPD
LAD<3:0>
SERIAL PORT1 DSR1 CTS1
RI1
DCD1
SERIAL PORT2
RXD2/IRRX/
DSR2/GPIO54 CTS2/GPIO56 DCD2/GPIO51 RI2/GPIO50
PARALLEL PORT
SLCT
BUSY
PE
ACK ERROR
SER_IRQ
LOW PIN COUNT
LDRQ
DTR1 RTS1
TXD2/IRTX/
GPIO55/RTS2
GPIO57/DTR2
INIT SLIN
ALF STB
PD<7:0>
KEYBOARD/MOUSE KDAT KCLK
MCLK
MDAT
FLOPPY-DISK
INDEX TRK0 WRTPRT RDATA DSKCHG
RESET GENERATOR 5VIN 12VIN MR
INFRARED
IRRX2/
GPIO36/KBDRST
GPIO40/DENSEL0
MTR0
DS0 DIR
STEP WDATA WGATE HDSEL
RSMRST
POWERGOODA
GPIO75/POWERGD_SD
IRTX2/
POWER
VTR (3V DUAL)
AGND
GPIO35GPIO34
GPIO37/A20M
POWERGOODB
GPIO76/POWERGD_SD2
GPIO65/LA_OUT2 GPIO85/LA_OUT3
GP37
GPIO10 GPIO21
GPIO22
GND,P3V3P
LPC47M967
D4000
LPC47M967-QFPR128
D1534D1534
Fri Jan 17 05:28:58 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
40
99
30+
140-560MS
DEFAULT LOW
EDGE TRIGGERED
EDGE TRIGGERED
LPC NOT 5V TOL
NC
SCHUTZ
08.07.02
NC
NC
NC
NC
NC
NC
NC
(ATX)
NC
NC
PULL UP IN ICH
GPIO AS OUTPUT
BIOS MUST PROGRAMM
SUPER I/O TESTABILITY
SYSOP FOR 0X02EH
NC
DEFAULT VALUE AFTER RESET LOW
NC
BRASILIA
32
48
40 45
32
45
43 43
42
42
42
42 42
40
46 48 30 46
19
30 65
30 34
33
33
33
33
33
42
42
30 34
44
43
43
43
43
30
30 34
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
42
42
40 42
42
42
45
45
44
44
44
44
44
43
43
43
43
43
43
43
43
30 46
19
48
42
30 34
44
44
44
44
43
43
31
45
80 90 91 92
37 38 40 47 48 53 65 66
14 19 24 25 30 31 34 35
33
33 33
40 42
40
40 45
48
8
14
111
10
11
41
40
35
34
33
114
104
103
54
45
44
29
18
17
3
2
112
53
49
48
47
102
101
39
38
37
36
100
1
46
52
56
106
105
110
4
5
28
69
68
67
66
65
64
62
60
79
78
25
98
97
82
81
126
128
124
115
117
27
113
26
31
15
55
108
109
107
63
73
30
72
71
70
77
76
75
74
96
95
94
16
93
92
120
122
127
125
123
118
51
119
50
43
42
59
58
61
13
12
7
9
116
20
2 1
2 1
2 1
5 4
21
63
7 2
8 1
21
21
21
PWR_OK_SIO_3V3_H
GND
IDE_SEC_ATA66_DET_L
IDE_PRI_ATA66_DET_L
47M967 SUPER-IO
KEY_OFF_PROTECT_H
GND
GND
KEY_OFF_PROTECT_H
SIO_GPIO24_SYSOP
XMOUSEDAT_L
XKBDCLK_L
LPT_PEMTY_H
LPT_SELECT_H
COM2_CTS_L
COM2_DSR_L
LPC_PME_L
WGS_ID_L<1>
WGS_ID_L<0>
GS_ID_L<4>
GS_ID_L<3>
FDC_RD_DATA_L
DUAL_OK_SIO_3V3_H
P3V3P_DUAL
LPC_LDRQ0_L
PCI_RST_FWHSIO_L
BUS_ISOLATE_L
LPC_LFRAME_L
CLK_PCI_SIO_H
SUS_CLK_32KHZ_H
CLK_14M_SIO_H
COM1_RTS_L
COM2_SOUT_H
COM2_DTR_L COM2_RTS_L
LPT_INIT_L LPT_SEL_L LPT_AUTOFD_L LPT_STROBE_L
KBD_A20_EN_H
FDC_DENSEL_L
LPC_LAD<3..0>
COM1_SIN_H COM1_DSR_L COM1_CTS_L COM1_DCD_L COM1_RI_L
COM2_SIN_H
COM2_DCD_L COM2_RI_L
LPT_BUSY_H LPT_ACK_L LPT_ERROR_L
XKBDDAT_L
XMOUSECLK_L
FDC_INDEX_L FDC_TRACK0_L FDC_DRV_WP_L
FDC_DISKCHG_L
P3V3P
SER_IRQ_H
COM1_SOUT_H COM1_DTR_L
LPT_DAT_H<7..0>
KBD_RESET_L
FDC_EN_MOT0_L FDC_SEL_DRV0_L FDC_STEPDIR_L FDC_STEPPULSE_L FDC_WR_DATA_L FDC_EN_WRITE_L FDC_SEL_HEAD1_L
GS_ID_L<0> GS_ID_L<1> GS_ID_L<2> WGS_ID_L<2>
GND
POWERGOOD_H
P3V3P_DUAL
VCC
GND
C
GND
P3V3P
P3V3P
FDC_DRV_WP_L
SIO_GPIO24_SYSOP
Page 31
A4200
AR2
4XS-1K0-J-W06
1 3
7 9 11 13 15 17 19
23
21
25 27 29 31 33
2 4 6
10
8
12 14 16 18
22 24 26 28 30 32 34
20
C
1
2
33
34
C
XB431-V34
X4200
FKSTKRCO-033
A4200
AR2
4XS-1K0-J-W06
A4200
AR2
4XS-1K0-J-W06
A4200
AR2
4XS-1K0-J-W06
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
42
99
31+
D1534D1534
Fri Jan 17 05:28:59 2003
DRAWING
08.07.02
FDC_DRV_WP PU ON PAGE 40
(SONY MODE)
FDC_DRATE1_L
FDC_SEL_DRV1 AND FDC_EN_MOT1 SIGNALS ARE NO LONGER REQUIRED
ONLY 1 FD AND 1 FD TAPE STREAMER IS SUPPORTED, AND SO
BRASILIA
40
40 40
40
40
40
40
40
40
40 40 40 40
726354
19
17
15
13
11
9
34
32
30
28
7
26
24
22
20
18
16
14
12
10
8
3
6
4
2
33
31
29
27
25
23
21
1
81
CONNECTOR FLOPPY
SCHUTZ
FDC_WR_DATA_L
FDC_STEPPULSE_L
FDC_STEPDIR_L
FDC_SEL_DRV0_L
FDC_EN_MOT0_L
FDC_INDEX_L
FDC_DISKCHG_L
FDC_SEL_HEAD1_L
FDC_TRACK0_L
FDC_EN_WRITE_L
P3V3P
FDC_RD_DATA_L
FDC_DENSEL_L
FDC_DRV_WP_L
GND
V26827-B431-V34
Page 32
C4300
100N-Z-25V-Y5V
K4310
AC2
K4310
AC2
K4310
AC2
4XS-180P-K-25V-COG
K4310
AC2
K4311
AC2
K4311
AC2
K4311
AC2
K4311
AC2
C4302
100N-Z-25V-Y5V
C4312
100N-Z-25V-Y5V
C4311
100N-Z-25V-Y5V
C4310
100N-Z-25V-Y5V
X9P
TRASTUSB-COL-009
X4300
9
8
7
6
5
4
3
2
1
GD75232-TSO20
GND,P12VN,P12VP,VCC GD75232
D4310
DA DY
RY
RA
D4310
GD75232
GD75232-TSO20
GD75232-TSO20
GD75232
D4310
DA DY
GD75232-TSO20
GD75232
D4310
DA DY
RY
RA
D4310
GD75232
GD75232-TSO20
RY
RA
D4310
GD75232
GD75232-TSO20
RY
RA
D4310
GD75232
GD75232-TSO20
RY
RA
D4310
GD75232
GND,P12VN,P12VP,VCC
GD75232-TSO20
C4301
100N-Z-25V-Y5V
RY
RA
D4320
GD75232
GND,P12VN,P12VP,VCC
GD75232-TSO20
K4320
AC2
4XS-180P-K-25V-COG
RY
RA
D4320
GD75232
GD75232-TSO20
RY
RA
D4320
GD75232
GD75232-TSO20
K4320
AC2
K4320
AC2
RY
RA
D4320
GD75232
GD75232-TSO20
RY
RA
D4320
GD75232
GD75232-TSO20
K4321
AC2
K4321
AC2
K4321
AC2
X9P
TRASTUSB-COL-009
X4320
9
8
7
6
5
4
3
2
1
K4321
AC2
K4320
AC2
GD75232-TSO20
GND,P12VN,P12VP,VCC GD75232
D4320
DA DY
GD75232-TSO20
GD75232
D4320
DA DY
GD75232-TSO20
GD75232
D4320
DA DY
D1534D1534
Fri Jan 17 05:28:59 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
43
99
32+
SER2 EXTERNAL
POPULATE K4310 AND K4311
CONNECT SHIELD_GND_2
SCREW HOLE
TO GND AT NEAR BY
BECAUSE OF EMI !!
BECAUSE OF EMI !!
SCHUTZ
08.07.02
SER1 EXTERNAL
POPULATE K4310 AND K4311
BRASILIA
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
14 48 65 71 80
43 47 48 53
37 44 45 85 94
43 47 48 53
13 53 66
47
5
16
8
13
6
15
54
63
9
8
7
6
5
4
3
2
1
81
5 4
7 2
12
9
14
7
8 1
6 3
19
2
17
4
7 2
18
3
18
3
19
2
14
7
12
9
8
13
5
16
17
4
6
15
9
8
7
6
5
4
3
2
1
2 1
2 1
21
7 2
63
81
5 4
54
7 2
8 1
6 3
2 1
2 1
21
C
P12VN
V26808-B7659-V50
GND=SHIELD_GND_2
V26827-B214-V205
P12VP_CORE
CONNECTOR
SER1 / SER2
P12VP=P12VP_CORE
P12VP=P12VP_CORE
P12VP=P12VP_CORE
SHIELD_GND_2
P12VN
COM2_RTS_L
SHIELD_GND
VCC
C
COM2_RI_L
COM1_RI_L
P12VP=P12VP_CORE
P12VP=P12VP_CORE
P12VP=P12VP_CORE
P12VP=P12VP_CORE
COM1_DTR_L
GND-2P
P12VP=P12VP_CORE
P12VP
VCC
COM1_SOUT_H
V26808-B7659-V50
C
COM2_CTS_L
COM2_DCD_L
COM2_DTR_L
COM2_SIN_H
COM2_DSR_L
COM2_SOUT_H
GND-2P
COM1_RTS_L
COM1_CTS_L
COM1_SIN_H
COM1_DCD_L
COM1_DSR_L
V26827-B214-V205
GND=SHIELD_GND
GND
C
C
C
GND
Page 33
K4400
4XS-180P-K-25V-COG
K4402
4XS-180P-K-25V-COG
K4402
4XS-180P-K-25V-COG
K4402
4XS-180P-K-25V-COG
K4402
4XS-180P-K-25V-COG
K4401
4XS-180P-K-25V-COG
K4401
4XS-180P-K-25V-COG
K4400
4XS-180P-K-25V-COG
K4400
4XS-180P-K-25V-COG
K4400
4XS-180P-K-25V-COG
K4401
4XS-180P-K-25V-COG
K4401
4XS-180P-K-25V-COG
K4403
4XS-180P-K-25V-COG
K4403
4XS-180P-K-25V-COG
K4403
4XS-180P-K-25V-COG
K4403
4XS-180P-K-25V-COG
C4404
180P-J-50V-COG-2
V4410
BAS216-KOMBI
D
A4400
AR2
4XS-33R-J-W06
A4400
AR2
4XS-33R-J-W06
A4400
AR2
4XS-33R-J-W06
A4400
AR2
4XS-33R-J-W06
A4402
AR2
4XS-33R-J-W06
A4401
AR2
4XS-33R-J-W06
A4401
AR2
4XS-33R-J-W06
A4401
AR2
4XS-33R-J-W06
A4401
AR2
4XS-33R-J-W06
A4402
AR2
4XS-33R-J-W06
A4402
AR2
4XS-33R-J-W06
A4402
AR2
4XS-33R-J-W06
1
2
3
4
14
15
16
17
18
5
GND1
GND2
6
7
8
19
20
PARALLEL FEMALE HIGH RIS
9
10
11
12
13
21
22
23
24
25
XB395-V25
X4400
TRADOC10B-COL-025
A4410
AR2
4XS-2K2-J-W06
A4410
AR2
4XS-2K2-J-W06
A4421
AR2
4XS-2K2-J-W06
A4421
AR2
4XS-2K2-J-W06
A4411
AR2
4XS-2K2-J-W06
A4411
AR2
4XS-2K2-J-W06
A4421
AR2
4XS-2K2-J-W06
A4421
AR2
4XS-2K2-J-W06
A4420
AR2
4XS-2K2-J-W06
A4420
AR2
4XS-2K2-J-W06
A4420
AR2
4XS-2K2-J-W06
A4420
AR2
4XS-2K2-J-W06
A4411
AR2
4XS-2K2-J-W06
A4411
AR2
4XS-2K2-J-W06
A4410
AR2
4XS-2K2-J-W06
A4410
AR2
4XS-2K2-J-W06
R4430
R00-1A0
C4405
180P-J-50V-COG-2
A4505
AR2
4XS-1K0-J-W06
A4505
AR2
4XS-1K0-J-W06
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
44
99
33+
D1534D1534
Fri Jan 17 05:28:59 2003
DRAWING
IF EMV FILTERS ARE NECESSARY
SWAP A4400 -- L4400
DON’T POPULATE
SCHUTZ
08.07.02
HIGHRISE
FLOPPY AT LPT
DELETED!
A4402 -- L4402
A4401 -- L4401
40
37 43 45 85 94
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
8 1 72
21
21
5 4
6 3
81
72
72
81
63
54
72
54
54
63
63
81
8 1
7 2
9
8
7
6
5
4
3
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
72
63
54
54
63
72
81
81
63
72
81
54
A K
2 1
54
63
72
81
6 3
8 1
7 2
6 3
5 4
7 2
5 4
8 1
7 2
6 3
5 4
8 1
LPT_ERROR_L
CONNECTOR PARALLEL
GND
LPT_SELECT_H
VCC_PARALLEL
LPT_DAT_H<4>
LPT_AUTOFD_L
LPT_STROBE_L
LPT_DAT_H<0>
VCC
LPT_DAT_H<5>
LPT_DAT_H<3>
LPT_DAT_H<2>
LPT_DAT_H<1>
LPT_SEL_L
LPT_INIT_L
LPT_ACK_L
LPT_BUSY_H
LPT_PEMTY_H
V26827-B395-V225
V26810-B611-V50
LPT_DAT_H<6>
LPT_DAT_H<7>
SHIELD_GND
Page 34
L4505
600R-100M-1A0-0R4
L1
C4500
10N-K-50V-X7R-2
GND3
GND26GND1
12
4
5
A
3
X4500
DIVBU19-COL-017
XDIO6P3M
XDIO6P3M
DIVBU19-COL-017
X4500
B
3
GND26GND1
12
4
5
A4500
AR2
4XS-2K2-J-W06
A4500
AR2
4XS-2K2-J-W06
A4500
AR2
4XS-2K2-J-W06
A4500
AR2
4XS-2K2-J-W06
K4501
AC2
4XS-180P-K-25V-COG
K4501
AC2
4XS-180P-K-25V-COG
K4501
AC2
4XS-180P-K-25V-COG
K4501
AC2
4XS-180P-K-25V-COG
K4500
AC2
4XS-180P-K-25V-COG
K4500
AC2
4XS-180P-K-25V-COG
K4500
AC2
4XS-180P-K-25V-COG
K4500
AC2
4XS-180P-K-25V-COG
C4501
10N-K-50V-X7R-2
V4500
BAS216-KOMBI
D
R4510
R-RT
MICROSMD075
L4500
AL2
120R-100M-A125-R4
L4500
AL2
120R-100M-A125-R4
L4500
AL2
120R-100M-A125-R4
L4500
AL2
120R-100M-A125-R4
A4505
AR2
4XS-1K0-J-W06
A4505
AR2
4XS-1K0-J-W06
D1534D1534
Fri Jan 17 05:29:00 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
45
99
34+
CONNECTOR
MOUSE-
PLACE K4500 AGAINST BURST
R4502 CLOSE TO CONNECTOR
CONNECT SHIELD GND AND GND AT NEARBY SCREW HOLE
ALSO POSSIBLE
ESD DIODE V26810-B769-V40 INSTEAD OF K4500
PROBLEMS WITH SOME MICE!
DON’T CONNECT PIN B6 WITH A6
CONNECTOR
KEYBOARD-
12
MOUSE
4
6
6 4
3
12
3
5
5
KEYBOARD
08.07.02
OTHER ELEMENTS OF A4505 ARE ON PAGE 44
BRASILIA
37 43 44 85 94
40
85
40
40
30 38 47 65
40
40
6354
54
63
81
72
21
AK
2 1
81
72
63
54
54
63
72
81
81
54
63
72
B1
B3
B5
17
B2
B4
B6
16
13
A1
A3
A5
15
A2
A4
A6
14
21
21
VCC_KBD
MOUSECLK_L
V26827-B389-V205
KEY_OFF_PROTECT_H
BUTTON_POWER_L
KEYON_L
DIVBU19-017
V26810-B397-V59
VCC
SCHUTZ
CONNECTOR KBD/MOUSE
V26813-B356-V20
GND
C
V26827-B389-V205
DIVBU19-017
C
SHIELD_GND
SHIELD_GND SHIELD_GND
KBDCLK_L
XKBDCLK_L
KBDDAT_L
XKBDDAT_L
XMOUSECLK_L
MOUSEDAT_L
XMOUSEDAT_L
VCC_KBD_VGA
GND
Page 35
A4600
AR2
4XS-470R-J-W06
A4600
AR2
4XS-470R-J-W06
A4600
AR2
4XS-470R-J-W06
A4600
AR2
4XS-470R-J-W06
FIRMWAREHUB
0
PROGRAMM/OPERATE
1 2 3
WRITE_PROTECT TOP_BLOCK_LOCK
PCIRST CPUINIT CLK33 LFRAME
0 1 2 3 4
VPP
LAD<3:0>
ID
GPI
RFU RFU RFU RFU RFU
FWH
D4600
FWH512KB-PLCC32-STM
GND,P3V3P
C4600
100N-Z-25V-Y5V
A4601
AR2
4XS-470R-J-W06
A4601
AR2
4XS-470R-J-W06
A4601
AR2
4XS-470R-J-W06
A4601
AR2
4XS-470R-J-W06
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
46
99
35+
D1534D1534
Fri Jan 17 05:29:00 2003
DRAWING
TESTABILITY
3 MBIT FOR OEM SST V26808-B7670-V30
4 MBIT SST & STM V26808-B7487-V50 8 MBIT FOR SERVER
PLCC-SOCKET: V26827-B361-V25
4 MBIT SST & INTEL V26808-B7487-V43
2 MBIT SST V26808-B7643-V20
INTEGRATED
PULLDOWNS
08.07.02 SCHUTZ
BRASILIA
19
30 40
33
33
33
33
33
40 48
30 40
30
72
63
54
81
21
24
2
8
7
9
10
11
22
21
20
19
12
18
1
30
3
4
5
6
23
31
29 8 1 7 2 6 3 5 4
FWH
BOARD_ID_L<2>
FWH_WP_L
CLK_PCI_FWH_H LPC_LFRAME_L
V26808-B7487-V50
A1-SMD.SOCKEL
V26803-B73-V2
C
GND
BOARD_ID_L<1>
BOARD_ID_L<3>
P3V3P
P3V3P
LPC_LAD<3..0>
PCI_RST_FWHSIO_L
BOARD_ID_L<4>
BOARD_ID_L<0>
GND
Page 36
C4700
10N-K-50V-X7R-2
A7250
AR2
4XS-22K-J-W06
A7250
AR2
4XS-22K-J-W06
S4750
V23756-A3002-A4K
S8DIL
1 2
1 2
X4730
MST1GLC-002
XB463-V2
1 2
1 2
X4700
MST1GLC-002
XB463-V2
E4701
LED
LGT670-KL-GN
10K
10K
10K
10K
V4700
BCR183S-SOT363
T-PNP-BCR183S
SHLD SHLD
S4701
S1PCLOSESHLD
DTSA-61K
4K7
4K7
V4740
BCR119S-SOT363
T-NPN-BCR119S
C4701
10N-K-50V-X7R-2
GREEN
ORANGE
E4700
LOG-T671-ORGR
LED2-OG
R4710
220R-J-W06
R4711
220R-J-W06
5216
125
6
C
J
C3
X4750
MST2GFK1-005-1J
XB470-V105
R4702
220R-J-W06
A4700
AR2
4XS-100R-J-W06
A4700
AR2
4XS-100R-J-W06
A4700
AR2
4XS-100R-J-W06
A4700
AR2
4XS-100R-J-W06
D1534D1534
Fri Jan 17 05:29:00 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
47
99
36+
DON’T POPULATE
(MAX. 20MA)
(MAX. 20MA)
DON’T POPULATE
IF=12MA
IF=12MA
(FROM ICH RESUME WELL)
POWER BUTTON
FOR SOEM.
FOR FACTORY PURPOSES
CONFIGURATION SWITCH
RESET BUTTON
(FROM ICH RESUME WELL)
(GREEN)
(GREEN)
(ORANGE)
FSC + FJ JAPAN
POWER
ON
OFF
SHOULD BE ON FOR ORANGE COLOUR ORANGE=GREEN + RED
S0 TO S3
S0 TO S1
ON(ON)
OFF
OFF
(ON)
SIGNAL SLEEP_S4-S5_L
ONS0
LED
OFF
OFF
S4
S3
S1HWG1
G0
OFF
ONLY FOR DEBUG
G2G3S5
OFF
OFF
LED
OFF
SLEEP
SW
08.07.02 SCHUTZ
PC PROFESSIONAL
EMI
BRASILIA
30
30 38 45 65
30
30
11 30 65
43 48 53
14 30
30 32
43
30 31
30
90 91 92
37 38 40 48 53 65 66 80
14 19 24 25 30 31 34 35
54
6 3
72
81
21
6
2
5
3
1
21
21
A1 K1
A2 K2
2 1
4
3
1
6
5
2
4
3
21
4
3
1
6
5
2
AK
2
1
2
1
5
6
7
8
4
3
2
1
81
72
2 1
BUTTON_POWER_L
GND
C
P3V3P
V26810-B744-V1
GND
RTC_RST_L
GND
PWDSKIP_L
P3V3P
SHIELD_GND_2
SLEEP_S4-S5_L
FP_LED_HD_ON_L
LED_SLEEP_ON_L
LED_POWER_ON_L
V26817-B129-V4
V26810-B784-V1
GND
BUTTON_RST_L
P12VN
P3V3P_DUAL
GND
V26817-B89-V42
GND
RECOVER_L
GND
V26827-B470-V105
FRONTPANEL & SWITCH
Page 37
C4803
180P-J-50V-COG-2
C4815
10N-K-50V-X7R-2
C4811
10N-K-50V-X7R-2
C4810
10N-K-50V-X7R-2
C4821
10N-K-50V-X7R-2
+
C4814
680U-M-6V3-R170
ELKO
11 12 13 14
16
15
17 18 19
1 2 3 4
5 6 7 8 9
20 10
11
1
10 20
XB406-V120
X4800
DIVST051-020
C4880
100N-Z-25V-Y5V
D4880
74LVC14-3V3-TSO14
74LVC14
D4880
74LVC14-3V3-TSO14
74LVC14
R4810
470R-J-W06
+
C4818
47U-M-16V
ELKO
+
C4819
47U-M-16V
ELKO
+
C4820
680U-M-6V3-R170
ELKO
C4802
10N-K-50V-X7R-2
C4801
180P-J-50V-COG-2
R4850
R-SHORT-C0603
C4850
100N-Z-25V-Y5V
D4880
74LVC14-3V3-TSO14
74LVC14
D4880
74LVC14-3V3-TSO14
74LVC14
A4880
AR2
4XS-470R-J-W06
A4880
AR2
4XS-470R-J-W06
A4880
AR2
4XS-470R-J-W06
A4880
AR2
4XS-470R-J-W06
A4881
AR2
4XS-10K-J-W06
A4881
AR2
4XS-10K-J-W06
1
GND,VCC
D4851
74AHCT1G32-TSO5
74AHCT1G32
R4856
R00-1A0
GND,P3V3P
D4850
74LVC14-3V3-TSO14
74LVC14
74LVC14-3V3-TSO14
GND,P3V3P
D4850
74LVC14
GND,P3V3P
D4850
74LVC14-3V3-TSO14
74LVC14
GND,P3V3P
D4850
74LVC14-3V3-TSO14
74LVC14
GND,P3V3P
D4850
74LVC14-3V3-TSO14
74LVC14
GND,P3V3P
D4850
74LVC14-3V3-TSO14
74LVC14
A4850
AR2
4XS-220R-J-W06
A4850
AR2
4XS-220R-J-W06
A4850
AR2
4XS-220R-J-W06
A4850
AR2
4XS-220R-J-W06
D4880
74LVC14-3V3-TSO14
74LVC14
D4880
74LVC14-3V3-TSO14
74LVC14
A4881
AR2
4XS-10K-J-W06
A4881
AR2
4XS-10K-J-W06
A4851
AR2
4XS-33R-J-W06
A4851
AR2
4XS-33R-J-W06
A4851
AR2
4XS-33R-J-W06
A4851
AR2
4XS-33R-J-W06
C4851
100N-Z-25V-Y5V
R4855
33R-J-W06
ABBREV=D1534TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:01 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
48 99 37+
EXCEED 1,0V
(FROM SIO)
WHEN SUPPLY VOLTAGE
FOR TEST
KEEP RESET LOW
SIO: STABLE SIGNAL
SIO:140MS
FOR TEST
2K2 PULL UP IN PS
FOR TEST
PCI_RST BUFFER
TYP.400MS
PLACE R4856,D4851,C4851 NEAR IDE CONNECTOT
CMOS INPUTS
HD DRIVE
IDE= PG. 32
EXCEED 1,0V
FOR TEST
SIO:140MS
AT PWR RAMPUP
74LVC14 OPERATES FROM 1,65V TO 3,6V
H = VI>0,8V
(EN_AUX)
EMV
SCHUTZ
EMI
EMI
POWER INPUT
MAIN P3V3P-
TO VCC
08.07.02
100-500MS
AGAINST BACKDRIVING
ADD 10MA LOAD
R4810 FOR ASTECH SV
POWERGOOD_H
EMI
TO VCC_AUX
4K7 PULL UP IN PS
WHEN SUPPLY VOLTAGE
SIO: STABLE SIGNAL
(FROM SIO)
AT PWR RAMPUP
KEEP RESET LOW
H = VI>0,8V
C4880: PLACE AT D4880
VH >3,5V
BRASILIA
65
14
20 31
14 43 48 65 71 80
40 46
20
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
43 47 48 53
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
30
91
30 65 91
40
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
32
14
43 47 48 53
80
53
40
40
14 43 48 65 71 80
14
21
21
81
72
63
54
81
72
1213
21
63
54
81
72
43
65
89
1011
21
1213
21
4
2
1
63
54
5 4
8 1
7 2
6 3 65
89
21
21
2 1
2 1 2 1
21
1011
43
21
2 1
21
21
21
21
21
21
21
9
8
7
6
5
4
3
20
2
19
18
17
16
15
14
13
12
11
10
1
GND
V26827-B406-V120
P12VN
P3V3P=P3V3P_DUALP3V3P=P3V3P_DUAL
P3V3P=P3V3P_DUALP3V3P=P3V3P_DUAL
POWERGOOD_H
VCC_AUX
PCI_RST_IDE3V_L PCI_RST_IDE5V_L
GND
VCC GND
P3V3P
GND
GND
P3V3P=P3V3P_DUAL
POWER_OK_3V3_HPWR_OK_SIO_3V3_H
PCI_RST_ICH_L
PCI_RST_AGPSL_L
DUAL_OK_SIO_3V3_H
GND
V26803-B82-V9
PCI_RST_FWHSIO_L
PCI_RST_RISER_L
PCI_RST_GMCH_L
RESET GENERATION
POWER CONN./DECOUPL.
P3V3P=P3V3P_DUAL
GND
P3V3P
PWR_GD_3V3_L
P12VP
P12VP
PS_ON_L
P3V3P
GND
GND
VCC
GND
GND
DUAL_OK_3V3_H
P12VN
GNDGND
VCC
P3V3P_DUAL
P3V3P_DUAL
C
C
C
C
C
PCI_RST_LAN_L
P3V3P_DUAL
V26803-B82-V5
Page 38
A5210
AR2
4XS-4K7-J-W06
A5210
AR2
4XS-4K7-J-W06
A5210
AR2
4XS-4K7-J-W06
A5210
AR2
4XS-4K7-J-W06
C5211
10N-K-50V-X7R-2
C5210
10N-K-50V-X7R-2
P5210
PAPERGATE
PAPERGATE
P5211
PAPERGATE
PAPERGATE
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
52
99
38+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:01 2003
DRAWING
MECHANICAL SLOT 1
PAGE IS EMPTY
BECAUSE OF AGP SLOT
08.07.02
BOUNDARY SCAN
BRASILIA
53
53
53
53
53
53
53
91
19 24 25 30 34 65 66
53
19 24 30 34 65 66 91
21
21
54
63
81
72
21
21
SCHUTZ
+ SLOT SUPPORT
PCI-BUS SLOT 1
JTAG_TRST_L
0.12
0.12
SMB_DATA_DUAL_H
SMB_DATA_PCISLOT_H
SMB_CLK_DUAL_H
SMB_CLK_PCISLOT_H
PCI_PRSNT2_S1_L
PCI_PRSNT1_S1_L
JTAG_TDI_H
JTAG_TMS_H
GND
P3V3P
JTAG_TCK_H
GND
Page 39
C5311
100N-Z-25V-Y5V
C5310
100N-Z-25V-Y5V
C5301
100N-Z-25V-Y5V
C5300
100N-Z-25V-Y5V
+
C5312
1M0-M-6V3-R070
ELKO
+
C5315
100U-M-6V3-R440
ELKO
KEY
B A
44
43
AB
60
59
47
46
42
39
30
29
31
28
B A
58
57
56
55
54
53
52
62
61
49
48
41
45
40
38
37
36
35
34
33
32
26 27
25
24
23
22
21
20
19
18
16 17
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PCI
B A
X120P-PCI
X5302
DIRPCI-120
+
C5313
1M0-M-6V3-R070
ELKO
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:01 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
53
99
39+
BLOCKING IS DONE ON THE RISER CARD
TAKE THE PCI CLOCK LENGTH ON THE RISER CARD IN ACCOUNT, WHEN ADJUSTING THE PCI CLK LENGTHS
08.07.02
PCI RISER SLOT 1
MECHANICAL SLOT 2
TDO
RSVD
RSVD
RSVD
RSVD
REQ64#
BRASILIA
30 34
90 91 92
37 38 40 47 48 65 66 80
14 19 24 25 30 31 34 35
48
19
19
30 35
30 35
52
30 35
43 47 48
30 35
30 35
30 35
30 35
30 35
30
52
30
52 52
30 35
13 43 66
52
35
30 35
30 35
30 35
30 35
30
30
52
30
30
30 80
30 34
52
30
7252
30 35
72
30
2 1
2 1
2 1
21
21
21
21
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
B9
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
B8
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
B7
A9
A8
A7
A6
A5
A4
A3
A2
A1
B62
B6
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B5
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B4
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
A62
B12
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
B11
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
B10
B1
AUDIO_SPKROUT_POS
AUDIO_SPKROUT_NEG
PCI_IRQ_LINE_3_L
PCI_PRSNT2_S1_L
CASE_SWITCH_PRES_L
PCI_GNT_L<0>
SCHUTZ
PCI-BUS RISER SLOT
P3V3P
V26803-B42-V52
V26803-B42-V52
14
PCI_C_BE_L<1>
PCI_RST_RISER_L
P3V3P_DUAL
PCI_REQ_L<0>
CLK_PCI_SLOT1_H
CLK_PCI_SLOT2_H
PCI_REQ_L<1>
PCI_PRSNT1_S1_L
PCI_IRQ_LINE_6_L
JTAG_TCK_H
INTRUSION_L
30
PCI_IRQ_LINE_7_L
P12VP_CORE
PCI_SERR_L
P3V3P
PCI_ACK64_L
V26827-B454-V2
GND
C
VCC
C
PCI_IRQ_LINE_4_L
P3V3P
PCI_GNT_L<1>
VCC
GND
PCI_C_BE_L<2>
PCI_IRDY_L
PCI_DEVSEL_L
PCI_PLOCK_L PCI_PERR_L
P12VN
PCI_C_BE_L<3>
JTAG_TDI_H
JTAG_TMS_H
JTAG_TRST_L
PCI_PME_L
PCI_TRDY_L
PCI_FRAME_L
PCI_PAR_H
SMB_DATA_PCISLOT_H
SMB_CLK_PCISLOT_H
PCI_AD_H<31..0>
GND
VCC
PCI_C_BE_L<0>
26
28
24
20
22
18 16
15
13 11
6
9
4
2 0
29
31
27 25
23
21
17
19
12 10
8 7
5 3
1
C
PCI_STOP_L
C
Page 40
REF
AU
N6530
TL431CD-SO8
TL431CD
R6533
1K0-F-W06
R6532
330R-J-W06
R6531
100R-J-W06
R6512
6K8-F-W06
R6553
1K0-F-W06
R6552
3K92-F-W06
R6551
1K0-F-W06
R6550
1K0-F-W06
C6530
100N-Z-25V-Y5V
+
C6531
22U-M-10V-2
ELKO
STBY
DXN
DXP
REMOTE SENSOR
MAX1617
GND
TEMPERATURE
GND
VCC
NC
NC
NC
NC
NC
SMBCLK
SMBDATA
ALERT
ADD1
ADD0
SM-BUS
D6540
MAX1617MEE-SO16
MAX1617MEE
C6540
1N0-K-50V-X7R-2
C6541
100N-Z-25V-Y5V
C6570
47P-J-50V-COG
C6571
47P-J-50V-COG
C6512
22P-J-50V-COG
R6500
220R-J-W06
D
S
G
V6520
BSH112-SOT23
FETN3P-5
L6534
120R-100M-A200-R2
L1
A6570
AR2
4XS-2K2-J-W06
A6570
AR2
4XS-2K2-J-W06
A6570
AR2
4XS-2K2-J-W06
A6570
AR2
4XS-2K2-J-W06
RX/DT/7
TX/CK/6
SDO/5
SDA/SDI/4
T1OSI/CCP2/1
T1OSO/T1CKI/0
PIC16LF73
0/AN0 1/AN1
CCP1/2
PORT A
PORT B
PORT C
GND
7
6
5
4
3
2
1
0/INT
5/AN4/SS
4/TOCKI
3/AN3/VREF
2/AN2
GND
VDD
OSC2/CLKOUT
OSC1/CLKIN
MCLR/VPP
SCL/SCK/3
PIC16LF73
D6510
PIC16LF73-SO28
A6511
4XS-100R-J-W06
A6511
AR2
4XS-100R-J-W06
A6511
4XS-100R-J-W06
A6511
AR2
4XS-100R-J-W06
A6510
4XS-100R-J-W06
A6510
4XS-100R-J-W06
A6510
4XS-100R-J-W06
A6510
4XS-100R-J-W06
A6550
AR2
4XS-100R-J-W06
A6550
AR2
4XS-100R-J-W06
A6550
AR2
4XS-100R-J-W06
A6550
AR2
4XS-100R-J-W06
R6520
R00-1A0
1
EN
D6560
74LVC125
GND,P3V3P
74LVC125-3V3-TSO14
4K7
4K7
V6560
BCR119S-SOT363
T-NPN-BCR119S
A6560
AR2
4XS-1K0-J-W06
R6561
R-SHORT
R-SHORT-C0603
R6562
R-SHORT
R-SHORT-C0603
R6560
22K-J-W06
A6560
AR2
4XS-1K0-J-W06
A6560
AR2
4XS-1K0-J-W06
A6560
AR2
4XS-1K0-J-W06
1
EN
D6560
74LVC125
GND,P3V3P
74LVC125-3V3-TSO14
1
EN
D6560
74LVC125
GND,P3V3P
74LVC125-3V3-TSO14
1
EN
D6560
74LVC125
GND,P3V3P
74LVC125-3V3-TSO14
R6569
R-SHORT
R-SHORT-C0603
R6521
470R-J-W06
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:02 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
65
99
40+
BUT DO NOT POPULATE
CLOSE TO PIN 20 OF PIC
R6500 MUST BE 220R
PLACE R6520 NEAR CPU
R1=0,32*R2
R2
H30
ADD1=GND
ADD0=GND
AHN
MAX 14MA
IF POWER OFF
PLACE NEAR PIC
07.12.01
NC
DISCONNECT VBATT FROM PIC
(FROM ICH)
(FROM ICH)
IOL= MIN 13MA
(H=0.8-1.6V)
PROC_HOT
<-->
VO=2,5(1+R1/R2)
R1
BRASILIA
65
65
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
65
65
30 48 91
66
30 38 45 47
19 24 25 30 34 52 66 91
66
11 30 47
65
65
65
65
30
14 43 48 71 80
30 34
30
65
65
65
10
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
14 30 37 38
19 24 30 34 52 66 91
65 65 66
66
65
65
65
65
30 40
65
10 20
65
31
65
48
66
65
10
65
65
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
65
21
21
8
9
10
6
5
4
11
12
13
81
72
63
21
21
21
54
4
3
1
6
5
2
3
2
1
21
54
63
8 1
72
7 2 8 1
63 54
54
81
72
63
23
22
21
7
6
5
4
19
8
18
17
16
15
14
13
12
3
11
20
10
9
1
28
27
26
25
24
2
5 4
6 3
81
72
21
D
S
G
21
21
21
21
21
21
11
8
7
2
6
10
15
4
16
13
9
5
1
14
12
3
2 1
21
21
21
21
2121
21
2121
6
7
8
3
2
1
P3V3P_DUAL
GND
PCI_RST_IDE3V_L
CPU_PROC_HOT_L
P3V3P_PIC
CLK_4M_PIC_H
DUAL_OK_3V3_H
FANPS1_SENSE_H
SMB_DATA_DUAL_H
SMB_CLK_DUAL_H
FANPS_CTRL_H
TRUE
P3V3P_PIC
5V_DIV_A 12V_DIV_A
SUS_CLK_32KHZ_H VBATT_PIC
FANPS2_SENSE_H
SMB_PIC_DATA_H
PCI_RST_PIC_L
VBATT
GND
V26811-B148-V40
BUTTON_POWER_L
V26803-B73-V2
V26803-B51-V8
R
GND
SMB_PIC_CLK_H
FAN1_CTRL_H
FAN1_SENSE_H
GND
R
R
R
R
C
C
C
C
V26808-B7674-V30
BUTTON_RST_L
GND
P3V3P_PIC
GND GND
SMB_PIC_DATA_H
SMB_PIC_CLK_H
GND
SMB_PIC_CLK_H
GND
SMB_PIC_DATA_H
P12VP
12V_DIV_A
GND
VCC
5V_DIV_A
GND
CLK_4M_PIC_H
VBATT_PIC
VCC_DUAL
PIC_PIN2
P3V3P_PIC
PIC_PIN24
THRM_DIODE_NEG
THRM_DIODE_POS
C
V26803-B73-V2
V26811-B438-V40
P3V3P_DUAL
VCC
P3V3P_DUAL
PROC_HOT_L
P3V3P
PCI_RST_PIC_L
PIC_SLOWDOWN_CPU_L
GND
PROC_HOT_L
GND
PROC_HOT_L
GND
EN_STPCLK_L
SYSTEMMONITORING PIC
PIC SUPPORT, MAX1617
SLOWDOWN_CPU_L
PIC_SLOWDOWN_CPU_L
EN_PRESCOTT_L
Page 41
C6600
1U0-Z-10V-Y5V
R6605
10K-J-W06
A6630
AR2
4XS-4K7-J-W06
A6630
AR2
4XS-4K7-J-W06
A6630
AR2
4XS-4K7-J-W06
A6630
AR2
4XS-4K7-J-W06
V6601
BC846B
T-NPN
1 2 3
1
3
X6600
DIVST058-003
XB351-V103
3
8
7
2
1
81
5
4
6
X6630
DIVST08-008
XB351-V28
A6600
AR2
4XS-4K7-J-W06
A6601
AR2
4XS-1K0-J-W06
C6631
47P-J-50V-COG
R6606
100K-J-W06
C6630
47P-J-50V-COG
R6603
R00-1A0
G
S
D
V6690
SPD08P06P
FETN3P-6
A6631
AR2
A6631
AR2
4XS-56R-J-W06
A6631
AR2
4XS-56R-J-W06
A6631
AR2
4XS-56R-J-W06
A6601
AR2
4XS-1K0-J-W06
A6601
AR2
4XS-1K0-J-W06
A6601
AR2
4XS-1K0-J-W06
A6600
AR2
4XS-4K7-J-W06
A6600
AR2
4XS-4K7-J-W06
A6600
AR2
4XS-4K7-J-W06
V6692
BSP250-SOT223
FETP4P
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
66
99
41+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:02 2003
DRAWING
FAN 1 CONTROL AND SUPERVISION
CONTROL
10K PU TO VCC IN PS
EMI
AHN
07.12.01
SYS FAN
AGAINST SHORT CIRCUIT
BSP250,MAX HS FAN MAX 180MA
-B718-V40
AT 12V (166MA) MAX 2W
PC98
3K3+2K2 PD IN PS
2K2 PU TO VCC IN PS
A6630/2: REDUCE HIGH FROM 3.47V TO 3.41V
POWERSUPPLY
BRASILIA
30
65 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
65
65
65
91
19 24 25 30 34 52 65 19 24 30 34 52 65 91
65
65
13 43 53
D1
D2
G
S
8 172
63
81
7 2
6 3
72
5 4
81
63
S
D
G
72
54
63
81
21
2 1
21
2 1
54
54
8
7
6
5
4
3
2
1
3
2
1
C
B
E
21
21
FAN1_CTRL_H
GNDCGND
C
V26827-B351-V28
C
R
P3V3P
GND
R
V26827-B351-V103
FAN1_SENSE_H
SMB_DATA_DUAL_H
FANPS_CTRL_H
GND
P3V3P_EEPROM
GND
FANPS2_SENSE_H
P3V3P_DUAL
P3V3P
CPU/AUX FAN, EXT.SMB
INTRUSION, PWR CONTROL
MON_ON_H
SMB_CLK_DUAL_H
FANPS1_SENSE_H
V26810-B767-V50
VCC_FAN1
R
P12VP_CORE
Page 42
A7102
AR2
4XS-33R-J-W06
A7102
AR2
4XS-33R-J-W06
C7106
47P-J-50V-COG
A7102
AR2
4XS-33R-J-W06
P7106
PAD
PAD_0.70
P7105
PAD
PAD_0.70
P7101
PAD
PAD_0.70
P7100
PAD
PAD_0.70
+
C7150
22U-M-10V-2
ELKO
C7112
100N-Z-25V-Y5V
CONST
OUT
V
GND
IN
N7140
MC7805
BA178M05-TO252AA
R7140
R00-1A0
C7140
100N-Z-25V-Y5V
C7152
100N-Z-25V-Y5V
C7105
47P-J-50V-COG
R7101
2K2-J-W06
C7153
100N-Z-25V-Y5V
C7159
100N-Z-25V-Y5V
R7110
4K7-J-W06
A7100
4XS-2K2-J-W06
A7100
4XS-2K2-J-W06
A7100
4XS-2K2-J-W06
C7157
100N-Z-25V-Y5V
A7100
4XS-2K2-J-W06
R7141
R00-1A0
A7101
AR2
4XS-0R-J-W06
A7101
AR2
4XS-0R-J-W06
A7101
AR2
4XS-0R-J-W06
A7101
AR2
4XS-0R-J-W06
R7100
R00-1A0
C7158
100N-Z-25V-Y5V
AFILT4/CAP2
AFILT3/NC
AFILT2
ID1/CID1 ID0/CID0
VIDEO_L/JS1 VIDEO_R/JS0
AVSS3/GPIO1GPIO0/AVDD3
NC/AVDD4 AVSS4/NC
AVSS1AVDD1
HEADPHONE_OUT_R
HEADPHONE_OUT_L
AVDD2
DVDD2 DVSS2
DVSS1DVDD1
SPDIF
VREFOUT
VREF
ANALOG VCC
DIGITAL VCC
FILTER & REFERENCES
MONO_OUT
EAPD
SDATA_IN
BITCLK
LINE_OUT_R
LINE_OUT_L
LINE_IN_R
LINE_IN_L
MIC1/MIC
CD_R
CD_L CD_GND
AFILT1
PHONE
ANALOG I/O
DIGITAL I/O
RESET
SYNC
SDATA_OUT
XTAL_OUT
XTAL_IN
AC97-CODEC
AUX_L AUX_R
AVSS2/HP_COMM
MIC2/NC PC_BEEP/NC AVSS2/NC
STAC9750/AD1981A
STAC9750
D7100
STAC9750-TQFPQ48
C7113
1U-K-10V-X5R
C7156
1U0-Z-10V-Y5V
C7151
1U0-Z-10V-Y5V
C7110
100N-Z-25V-Y5V
A7102
AR2
4XS-33R-J-W06
+
C7155
22U-M-10V-2
ELKO
C7101
10P-J-50V-COG-2
R7102
220R-J-W06
R7150
R00-1A0
R7105
100R-J-W06
P7140
PAD
P7241
C7120
270P-J-50V-COG-2
C7121
270P-J-50V-COG-2
C7122
270P-J-50V-COG-2
C7123
270P-J-50V-COG-2
P7149
PAPERGATE
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
SACHNUMMER
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
AC97 CODEC
BRASILIA
42+
99
71
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:03 2003
DRAWING
NOT NEEDED
POP IF N7140
C7150
A7101
A7100
COMPONENT
STAC9750-PINS 31, 33 AND 34 ARE VENDOR SPECIFIC TEST INPUTS
C7120-C7121
270PF; DON’T
C7155
C7151
C7110
C7113
C7158
C7156
C - 1UF
C - 1UF
DON’T POPULATE
DON’T POPULATE
C - 100NF
DON’T POPULATE
DON’T POPULATE
C - 100NF
C - 1UF
C - 22UF
DON’T POPULATE
C - 22UF
DON’T POPULATE
DON’T POPULATE
FILTER-CAPS
VREF-CAP
DECOUPLING-CAP
DECOUPLING-CAP
DECOUPLING-CAP
DECOUPLING-CAP DECOUPLING-CAP
C7120-C7123
C - 1NF
DON’T POPULATE
R - 4.7K OHM
DIFFERENCES BETWEEN STAC9750 AND AD1981A:
GENERATING ANALOG VCC
FOR USE OF 48MHZ CLOCK
(= SOFTWARE RESET)
FOR TEST
(FROM ICH5)
DON’T POPULATE
N.C.
N.C.
N.C.
N.C.
N.C.
AVDD4 AVDD1
WEIMANN
FOR ADI:
PLACE NEAR -
AVDD2 AND AVDD3
08.02.02
PURPOSE
SUPPLY
CLK-INPUT JACKSENSE
S/PDIF-ENABLE
R - 0 OHM
DON’T POPULATE
STAC9750
SIGMATEL
NAME
FILTER-CAPS
N.C.
N.C.
N.C.
NC
N.C.
AD1981A:
WITH INTEGRATED PULL-DOWN.
AD1981A(B)
ANALOG DEVICES
DON’T POPULATE
R - 0 OHM
R7100
R7110
STAC9750:
V26808-B7686-V30
AD1980: V26808-B7758-V30
R - 2.2K OHM
R7101:
CAP VALUES ARE RIGHT FOR AD1980
CONNECTION BETWEEN DIG. GND AND ANALOG GND
PLACE NEAR TO CODEC
PLACE PAPERGATE BELOW CODEC
14 43 48 65 80
71
71
71
75
30 30
75
19 30
71
71
73
75
71 72 75
71 72 73 75
72
71 72 73 75
72 75
30
71 72 73 75
71 72 73 75
71
71
71 72 73 75
75
72
71 72 75
71
71 71
71 72 73 75
30 30
73 73 73 75
75
71 72 75
71 72 73 75
21
21
21
21
21
1
1
21
21
21
21
1
1
1
1
63
21
54
81
72
21
21
21
21
20
19
18
13
11
42
12
22
33
44
40
26
7
4
10
28
27
47
37
41
39
36
35
48
8
5
6
34
43
38
25
9
1
15
14
32
3
31
30
29
46 45
16 17
24
23
21
2
21
72
816 354
21
81
54
63
72
21
21
21
21
3
2
1
21
2 1
2 1
21
21
21
21
21
21
0.7
GND
GND
CLK_48_USB_AUD_H
AGND
P3V3P
AVCC
GND
AUDIO_MONO_OUT
AUDIO_FLT_PIN32
AGND
AUDIO_FLT_PIN31
AGND
AUDIO_AFILT2
AUDIO_AFILT1
AUDIO_VREF
AVCC
P3V3P
AGND
GND
GND
GND
AUDIO_HEAD_OUT_L
SPDIF_OUT
AUDIO_FLT_PIN32
AUDIO_FLT_PIN31
GND
AGND
GND
AGND
C
C
C
C
C
C
C
C
C
C
VCC
AGND
AUDIO_JS1_H
AC_RESET_L
C
AUDIO_VREFOUT
GND
AC_BITCLK_H AC_SD_IN2_H
AUDIO_HEAD_OUT_R
C
C
C
C
C
AUDIO_AC_LIN_L
AUDIO_AC_MIC
AUDIO_AC_CD_R
AUDIO_AC_CD_GND
AUDIO_AC_CD_L
AC_SYNC_AC97_H
AC_SD_OUT_AC97_H
AUDIO_AFILT2
AUDIO_AFILT1
AUDIO_VREF
AUDIO_PC_BEEP
AUDIO_AC_LIN_R
V26808-B7708-V30
CLK_48_USB_R_AUD_H
AVCC
GND
P12VP
V26811-B406-V40
AGND
Page 43
C7230
1U0-Z-10V-Y5V
VDD
VO1
LM4871
IN+
IN-
VO2
BYPASS
GND
SHUTDOWN
N7230
LM4871-SO8
LM4871
C7232
1U0-Z-10V-Y5V
R7234
100K-J-W06
C7250
1U0-Z-10V-Y5V
A7250
AR2
4XS-22K-J-W06
A7250
AR2
4XS-22K-J-W06
A7200
AR2
4XS-1K0-J-W06
A7200
AR2
4XS-1K0-J-W06
A7200
AR2
4XS-1K0-J-W06
A7200
AR2
4XS-1K0-J-W06
R7230
R00-1A0
C7231
100N-Z-25V-Y5V
C7240
1U0-Z-10V-Y5V
C7242
1U0-Z-10V-Y5V
A7240
AR2
4XS-10K-J-W06
A7240
A7240
A7240
C7241
100N-Z-25V-Y5V
10K
10K
10K
10K
V7200
BCR183S-SOT363
T-PNP-BCR183S
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
72
99
43+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:03 2003
DRAWING
ANALOG / DIGITAL
CONNECTOR
OTHER ELEMENTS OF A7250 ARE ON PAGE 47
AC97-CODEC
PC-BEEP VIA
AMPLIFIER ON = 0
PLACE C7231 CLOSE TO N7230
SPEAKER
INTERNAL
08.02.02
* DO NOT POPULATE*
MUTE FOR INT. SPEAKER WITH JACKSENSE:
A7200, V7200, V7201, R7200
R7230
* DO NOT POPULATE*
* DO NOT POPULATE*
MUTE FOR INT. SPEAKER DISABLED:
(MONO-AMPLIFIER POPULATED)
R7211, X7210
AMPLIFIER-SHUTDOWN
WEIMANN
C7240, A7211, V7210, V7211, C7210
MONO-AMPLIFIER FOR INTERNAL SPEAKER
AUDIO AT INT. SPEAKER:
AMPLIFIER OFF = 1
BRASILIA
71 73 75
71
71 75
71 75
30 31 72
30 31 72
71
53 53
4
3
1
6
5
2
2 1
54
63
72
81 2121
21
54
63
81
72
6 35 421
2121
8
5
7
6
1
2
3
4
2 1
2 1
SPEAKER_H
C
AUDIO_PC_BEEP
C
C
C
C
AUDIO_MONO_OUT
AGND
SPEAKER_H
R
R
C
C
AVCC
AGND
GND
MONO-AMPLIFIER
V26811-B584-V40
AUDIO_SPKROUT_NEG
AUDIO_SPKROUT_POS
AUDIO_JS1_H
Page 44
A7310
AR2
4XS-4K7-J-W06
A7311
AR2
4XS-2K2-J-W06
A7310
AR2
4XS-4K7-J-W06
A7310
AR2
4XS-4K7-J-W06
A7310
AR2
4XS-4K7-J-W06
A7311
AR2
4XS-2K2-J-W06
A7311
AR2
4XS-2K2-J-W06
A7311
AR2
4XS-2K2-J-W06
4 1
4
3
2
1
X7310
DIVST067-004
XB479-V204
C7312
1U0-Z-10V-Y5V
C7311
1U0-Z-10V-Y5V
C7310
1U0-Z-10V-Y5V
R7341
121R-F-W06
R7340
200R-F-W06
C7341
100N-Z-25V-Y5V
C7340
470P-J-50V-COG-2
1 2 3
1 3
X7340
DIVST073-003
XB479-V3
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
73
99
44+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:04 2003
DRAWING
OUTPUT
S/PDIF
INTERNAL
05.12.01 WEIMANN
CD AUDIO IN
TO CODEC
PLACE NEAR
ADISIG
470PF
-
4.7NF
300R
-
C7340 C7341 C7342 R7340 R7341
­100NF 100NF 200R 110R
BRASILIA
71
71
71
71
71 72 75
3
2
1
21
2121
21
21
21
21
4
3
2
1
81
72
6 3
81
54
72
5 4
63
CD IN, S/PDIF OUT,
VCC
AUDIO_AC_CD_GND
AUDIO_AC_CD_L
SPDIF_CON_OUT
SPDIF_OUT
GND
AGND
AUDIO_AC_CD_R
AUDIO_CON_CDX_GND
AUDIO_CON_CD_L
AUDIO_CON_CD_GND
AUDIO_CON_CD_R
C
Page 45
K7500
AC2
4XS-180P-K-25V-COG
K7500
AC2
4XS-180P-K-25V-COG
K7500
AC2
4XS-180P-K-25V-COG
K7500
AC2
4XS-180P-K-25V-COG
A7510
AR2
4XS-4K7-J-W06
A7510
AR2
4XS-4K7-J-W06
A7510
AR2
4XS-4K7-J-W06
A7510
AR2
4XS-4K7-J-W06
L7500
L1-SHORT
L1-SHORT-C0603
L7520
L1-SHORT
L1-SHORT-C0603
L7521
L1-SHORT
L1-SHORT-C0603
C7511
1U0-Z-10V-Y5V
C7510
1U0-Z-10V-Y5V
C7501
1U0-Z-10V-Y5V
C7505
100N-Z-25V-Y5V
R7505
R-SHORT
R-SHORT-C0603
C7590
1U0-Z-10V-Y5V
A7520
AR2
4XS-10R-J-W06
A7520
AR2
4XS-10R-J-W06
A7520
AR2
4XS-10R-J-W06
A7520
AR2
4XS-10R-J-W06
A7501
AR2
4XS-2K2-J-W06
A7501
AR2
4XS-2K2-J-W06
A7501
AR2
4XS-2K2-J-W06
A7501
AR2
4XS-2K2-J-W06
RECHTS
LINKS
X7500
DIVBU21-PINK-005
XB441-V5
RECHTS
LINKS
X7501
DIVBU21-LIME-005
XB441-V5
RECHTS
LINKS
X7503
DIVBU21-LIBLUE-005
XB441-V5
RECHTS
LINKS
X7502
DIVBU21-LIME-005
XB441-V5
A7521
AR2
4XS-470R-J-W06
A7521
AR2
4XS-470R-J-W06
A7521
AR2
4XS-470R-J-W06
+
C7520
100U-M-6V3-R440
ELKO
A7521
AR2
4XS-470R-J-W06
+
C7521
100U-M-6V3-R440
ELKO
L7531
L1-SHORT
L1-SHORT-C0603
L7530
L1-SHORT
L1-SHORT-C0603
K7530
AC2
4XS-180P-K-25V-COG
K7530
AC2
K7530
AC2
4XS-180P-K-25V-COG
K7530
AC2
A7502
AR2
4XS-2K2-J-W06
A7502
AR2
4XS-2K2-J-W06
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:04 2003
DRAWING
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
75
99
45+
A7502
PLACE NEAR CONNECTOR
PLACE NEAR CONNECTOR
FRONT
FOR ADI CHANGE A7520 TO 150 OHM
PULL-DOWN’S FOR
JACKSENSE-FUNCTIONALITY
FOR TESTABILITY
FROM/TO FRONTPANEL-
STAC9750
IF L7500, L7520 AND
PLACE K7500,K7530 NEAR
(A7501, C7590)
PLACE NEAR CONNECTOR
PLACE NEAR CODEC
LIME
--REAR--
LINE-IN LIGHT BLUE
NC
MIC-PHANTOM
USE FOR MIC LOW PASS FILTER:
120R-100M-A200-R2
L7521 NECESSARY USE
V26813-B356-V15
SUPPLY FOR
CONNECTOR FOR SECOND MIC-IN
R7505 = 100 OHM C7501 = 100 NF C7505 = 100 NF
--FRONT--
MIC-IN
PINK
TO THE AUDIO-CONNECTOR
MICROPHONE
HP OUT
05.12.01 WEIMANN
HEADPHONE-OUT
--REAR--
NECESSARY !
LIME
HEADPHONE-OUT
--FRONT--
LINE IN
BRASILIA
71
71 72
71
71 72
71 72 73 75
38 75
71 72 73 75
71
71
71
71
71 72 73 75
38 75
72
81
63
81
54
72
21
21
21
6 3
21
72
81
54
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
81
72
6 3
5 4
72
54
63
81
21
21
21
21
21
21
21
21
21
54
81
7 2
6 3
63
72
54
81
AUDIO_HEADOUT_F_R
AUDIO_HEADOUT_L
AUDIO_HEADOUT_R_R
SHIELD_GND_3
AUDIO_AC_LIN_L
MIC IN (REAR), LINE IN AND HEADPHONE OUT
AUDIO_MIC_IN
AUDIO_HEADOUT_R_L
AUDIO_MIC_AVCC
AUDIO_MIC_CONN
V26827-B441-V505
SHIELD_GND_2
SHIELD_GND_2
AGND
AUDIO_MIC_IN_JACK
AUDIO_JS1_H
SHIELD_GND_2
SHIELD_GND_3
AGND
AGND
V26803-B82-V8
AUDIO_HEADOUT_F_L
AUDIO_HEAD_OUT_L
V26827-B441-V505
AVCC
AGND
AUDIO_LIN_JACK_L
AUDIO_LIN_JACK_R
AUDIO_AC_LIN_R
V26827-B441-V605
SHIELD_GND_3
C
V26827-B441-V405
C
AGND
SHIELD_GND_3
AUDIO_HEADOUT_R
AUDIO_LIN_A_JACK_R
AUDIO_LIN_A_JACK_L
SHIELD_GND_2
AUDIO_AC_MIC
C
AUDIO_HEAD_OUT_R
AUDIO_VREFOUT
Page 46
C8000
100N-Z-25V-Y5V
680U-M-6V3-R170
C8013
ELKO
+
C8011
100N-Z-25V-Y5V
C8010
100N-Z-25V-Y5V
C8021
100N-Z-25V-Y5V
C8022
100N-Z-25V-Y5V
C8023
100N-Z-25V-Y5V
C8033
100N-Z-25V-Y5V
C8031
100N-Z-25V-Y5V
C8030
100N-Z-25V-Y5V
C8026
100N-Z-25V-Y5V
C8025
100N-Z-25V-Y5V
C8024
100N-Z-25V-Y5V
C8012
100N-Z-25V-Y5V
4K7
4K7
V8050
BCR119S-SOT363
T-NPN-BCR119S
A8050
AR2
4XS-4K7-J-W06
R8050
100R-J-W06
A8050
AR2
4XS-4K7-J-W06
A8050
AR2
4XS-4K7-J-W06
A8050
AR2
4XS-4K7-J-W06
ST2 RBF
SBA0#
SBA2#
SB_STBF
VDDQ1.5 VDDQ1.5
VDDQ1.5 VDDQ1.5
SBA7#
SBA5#
SBA1#
1.5V
C#/BE0
PAR
PME#
STOP
TRDY
FRAME
VREFGC
VDDQ1.5
VDDQ1.5
C#/BE3
VDDQ1.5
AD_STBS1
AD0
AD2
AD4
AD6
AD_STBS0
AD9
AD11
AD15
AD13
AD16
AD18
AD20
AD22
AD24
AD26
AD28
AD30
VCC3.3
VCC3.3
SB_STBS
SBA3#
VCC3.3
WBF
DBI_HI
GND
GND
GND
GND
GND
GND
GND
GND
MB_DET#
RSVD
RSVD
VREFCG
AD_STBF0
SERR C#/BE1
PERR
DEVSEL
IRDY
C#/BE2
VDDQ1.5
VDDQ1.5
VDDQ1.5
VDDQ1.5
AD1
AD_STBF1
AD3
AD5
AD7
AD8
AD10
AD12
AD14
AD17
AD21 AD19
AD23
AD25
AD27
AD29
AD31
3.3VAUX
SBA6#
SBA4#
5.0V
GND
OVRCNT#
25
24
23
22
AB
AGP CONN
1 2 3 4 5 6 7 8 9
12
14
13
15 16 17 18 19 20 21
26
28
27
29 30 31 32 33 34 35 36
38
37
39 40 41
46 47 48 49 50
52
51
54 55 56 57 58 59
61 62
64
63
AB
KEY
53
11
10
60
65 66
5.0V USB+
INTB# CLK REQ VCC3.3 ST0
12V
TYPEDET#
GC_DET#
USB-
GND
INTA#
RST#
GNT
VCC3.3
ST1
GND
GND
GND
GND
GND
GND
GND
GND
VCC3.3
VCC3.3
VCC3.3
DBI_LO
RSVD
XAGP8X-1V5
X8000
DIRHD1-1V5-124-8X
680U-M-6V3-R170
C8027
ELKO
+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:04 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
80 99 46+
AGP VREF GENERATION IS ON PAGE 21
1.5 V ONLY
X8000: V26827-B432-V225
MECHANICAL SLOT 1
(VREF IN)
S1 NOPART FUER SPERRFLAECHE BEI BOHRUNG (ALTERNATIVE)
AGP MODE DETECTION
USB_AGP_NEG
TO MOSFET
TYPEDETECT
RESERVED RESERVED
RESERVED
OVERCURRENT
AGP 4X / 8X ONLY
(AGP_3.0_L)
MB_DET
08.07.02
(VREF OUT)
USB_AGP_POS
DECOUPLING
BRASILIA
21
20
14 15 20 21 22 30 31 35 80 85
80
20
20
20
80
14 43 48 65 71 80
80
20
20
20
20 20
20
20
20
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
35 80 85
14 15 20 21 22 30 31
80
31 35 80 85
14 15 20 21 22 30
80
80
14 43 48 65 71 80
20
30 53
20
20
20 21
20
20
20
30 35 48 20
20 20
20
30 35
19
20
20
20
14 43 48 65 71 80
35 80 85
14 15 20 21 22 30 31
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
20
20
2 1
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
A9
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
A8
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
A7B7
B6
B5
B4
B3
B2
B1
A66
A65
A64
A6
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A5
A53
A52
A51
A50
A49
A48
A47
A46
A41
A40
A4
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
B66
B65
B64
B63
B62
A12
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
A11
B51
B50
B49
B48
B47
B46
B41
B40
B39
B38
A10
A1
54
63
81
2 1
72
4
3
1
6
5
2
2 1
21
21
21
21
21
21
21
21
21
21
21
21
21
PCI_IRQ_LINE_1_L
P1V5P
P12VP
VCC
P3V3P
AGP_AD_STB1_L
3031
4 6
0
2
0
2
6
4
15
13 11
9
5
3
1
7
28
26 24
22 20
18 16
1
3
7
5
8
10
12
14
17
19
21
23
25
29
SNR#AGP8X-1V5
S1-NOPART
AGP_AD_H<31..0> AGP_SBA_H<7..0>
AGP_DEVSEL_L
AGP_AD_STB0_H
GNDGND
AGP_C_BE_L<1>
PCI_PME_L
AGP_FRAME_L
AGP_AD_STB1_H
P12VP
AGP_8X_H
AGP_PERR_L
AGP_8X_L
AGP_SERR_L
GND
GND
GND
P3V3P_DUAL
P3V3P_DUAL
AGP_SB_STB_H
AGP_DBI_L
AGP_RBF_L
AGP_ST_H<2>
AGP_REQ_L
VCC
AGP_AD_STB0_L
AGP_C_BE_L<0>
AGP_STOP_L
AGP_TRDY_L
AGP_C_BE_L<3>
AGP_PERR_L
AGP_C_BE_L<2>
AGP_SB_STB_L
AGP_WBF_L
AGP_PIPE_L
GND
AGP_ST_H<1>
P3V3P
AGP_GNT_L
AGP_8X_L
P12VP
AGP_PAR_H
AGP_ST_H<0>
CLK_66_AGP_H
PCI_IRQ_LINE_2_L
AGP CONNECTOR
SCHUTZ
AGP_SERR_L
VREF_AGP
P1V5P
P1V5P
P1V5P
AGP_IRDY_L
27
PCI_RST_AGPSL_L
Page 47
C8520
100N-Z-25V-Y5V
C8503
10P-J-50V-COG-2
C8504
10P-J-50V-COG-2
C8505
10P-J-50V-COG-2
C8500
10P-J-50V-COG-2
C8501
10P-J-50V-COG-2
C8502
10P-J-50V-COG-2
A8510
AR2
4XS-47R-J-W06
A8510
AR2
4XS-47R-J-W06
A8510
AR2
4XS-47R-J-W06
15511
1
GND2
GND1
15
5
10
14
4
9
13
3
8
12
2
7
1
11
6
XB163-V315
X8500
TRABUDBLB2-015
A8512
4XS-2K2-J-W06
A8512
4XS-2K2-J-W06
A8511
AR2
4XS-2K2-J-W06
A8511
AR2
4XS-2K2-J-W06
K8520
4XS-22P-K-25V-COG
K8520
4XS-22P-K-25V-COG
K8520
AC2
4XS-22P-K-25V-COG
K8520
4XS-22P-K-25V-COG
A8512
4XS-2K2-J-W06
A8512
4XS-2K2-J-W06
C8509
1N0-K-50V-X7R-2
A8511
AR2
4XS-2K2-J-W06
A8511
AR2
4XS-2K2-J-W06
D
S
G
V8517
BSH112-SOT23
FETN3P-5
D
S
G
V8516
BSH112-SOT23
FETN3P-5
C8510
100N-Z-25V-Y5V
A8510
AR2
4XS-47R-J-W06
L8500
A05-47N-R3
L1
L8502
L1
L8501
L1
&
D8500
NC7WZ08-TSO8
NC7WZ08
&
D8500
NC7WZ08-TSO8
NC7WZ08
C8531
3P3-C-50V-COG
C8532
3P3-C-50V-COG
L8530
L1-SHORT
L1-SHORT-C0603
L8531
L1-SHORT
L1-SHORT-C0603
L8532
L1-SHORT
L1-SHORT-C0603
C8530
3P3-C-50V-COG
R8511
R-SHORT
R-SHORT-C0603
V8570
D3KA
BAT64-04
V8571
D3KA
BAT64-04
V8572
D3KA
BAT64-04
C8570
100N-Z-25V-Y5V
C8571
100N-Z-25V-Y5V
C8572
100N-Z-25V-Y5V
R8510
R-SHORT
R-SHORT-C0603
C8521
180P-J-50V-COG-2
C8574
100N-Z-25V-Y5V
C8573
100N-Z-25V-Y5V
V8574
D3KA
BAT64-04
V8573
D3KA
BAT64-04
C8522
100N-Z-25V-Y5V
C8523
100N-Z-25V-Y5V
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
85
99
47+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:05 2003
DRAWING
FOR RGB-PLANE DECOUPLING
PLACE BETWEEN RGB FILTER
RGB FILTER AND 75R TERMINATION
REC.100R
L8500-L8502 MULTILAYER FERRITE BEADS
REC: 3P3
C8500-C8505
ESD
VGA CONNECTOR
SMALL BLUE
DDC
07.12.01
REC.100P
HSYNC, VSYNC
V26808-B2804-V42 = LVC08
L-ARRAY IF NECESSARY
REC.100R
50 - 100 MA PIN 9
ESD
KIENTSCH
3.3V TO 5V TRANSLATION ISOLATION
PLACE CLOSE TO D8500
BRASILIA
85
85
85
85
20
20 85
85
20 85
85
85
85
20 85
85
20 85
31 35 80
14 15 20 21 22 30
20 85
20 85
20
85
85
85
85
37 43 44 45 94
45
85
20 85
20 85
20 85
20 85
21
21
1
3
2
1
3
2
21
21
21
21
21
21
21
1
3
2
1
3
2
1
3
2
21
21
21
21
21
21
21
3
6
5
7
2
1
21
21
21
54
21
D
S
G
D
S
G
54
63
2 1
81
72
728163
54
8 1
72
6354
9
8
7
6
5
4
3
2
17
16
15
14
13
12
11
10
1
72
63
81
21
21
21
21
21
21
21
P3V3P
MCH_HSYNC_H
V26813-B356-V122
MCH_VSYNC_H
POWER_GROUP=VCC=P3V3P
VGA_2FBLUE_H
GND
VGA CONNECT.,FILTER
TRANSLATION / ISOLATION
P3V3P
V26808-B2804-V42
VCC
GND
VGA_2FRED_H
VCC
V26827-B163-V515
GND
VCC_KBD_VGA
GND
VGA_BLUE
VGA_GREEN
VGA_RED
POWER_GROUP=VCC=P3V3P
MCH_HSYNC_H
MCH_VSYNC_H
V26804-B1187-V2
VGA_DDCCLK_H
VGA_2FGREEN_H
GND
P1V5P
VGA_3BLUE_H
VCC
VGA_3GREEN_H
P3V3P
VCC
VGA_HSYNC_L
VGA_VSYNC_L
VGA_GREEN
GND
VGA_2FRED_H
VGA_2FGREEN_H
VGA_2FBLUE_H
C
P3V3P
VGA_VSYNC_L
VGA_HSYNC_L
C
SHIELD_GND
GND
C
P3V3P
P3V3P
GND
DDCDAT_5V_H
GND
MCH_DDCDAT_H
VGA_DDCDAT_H
VGA_DDCDAT_H
GND
VGA_BLUE
VGA_3RED_H
MCH_DDCCLK_H
P3V3P
DDCCLK_5V_H
VGA_DDCCLK_H
VGA_RED
Page 48
NC
NC
NC
NC
JORDAN INTERFACE TX
ADV10 ( )
JORDAN INTERFACE RX
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
GND CSA
GND CSA
GND
NC
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P3V3P
P1V2P
P1V2P
P1V2P
NC
P1V2P
NC
P1V2P
NC
P1V2P
P1V2P
NC
P1V2P
NC
P1V2P
NC
P1V2P
NC
P1V2P
NC
P1V2P
NC
P1V2P ANALOG
P1V2P ANALOG
XTAL_CAP
CLKR_CAP
RSVD
IEEE TEST-
IEEE TEST+
CTRL_P1V8P
CTRL_P1V2P
KINNERETH R(+)
P1V8P
82562EZ(EX)
TEST_IN( )
NC NC
NC NC
NC
NC
82547EI/82562EX/82562EZ
82547EI KENAI II CSA
POWER
GND
KINNERETH R(+)
FL_SCK
TMS
FL_SI
TDI
0
TCK
1
TRST
2
MDI A <0>
3
+
EE CS
-
SDP
PLL_P1V8P
NC
25MHZ 50PPM
NC
X1 X2
PLL_CAP
CSA_VREF
CSA_VSWING
CSA_RCOMP
CSA_STRF
CSA_STRS
AUX_PWR
CLK_CSA
CSA_DATA<10:0>
RST LAN_PWR_GOOD
INT_A
PME
NC
NC
NC
NC
NC
NC
NC
NC
RX
X2
TX
X1
82562EZ(EX)
NC NC
NC
NC
NC
NC
NCNC
NC NC NC
NC
ACTIVITY
TEST_OUT
LINK
SPEED
LINK1000
ACTIVITY
LINK
LINK100
TEST
EE CLK
82547EI/82562EX/82562EZ
EE DI
82547EI KENAI II CSA
CSA-PORT INTERFACE
PHY SIGNALS
MDI A <1>
+
-
MDI A <2>
+
MDI A <3>
­+
-
NC
NC
JTAG INTERFACE/
JTXD2 JRSTSYNC NC
TDO
JTXD1
TEST_EN
JTXD0
SOFTWARE DEFINED PINS/
JRXD2 JRXD1 JRXD0
JCLK
SMBUS V2.0 INTERFACE
DATA
CLK
NC NC NC
ALERT
EEPROM INTERFACE
EE MODE
EE DO
NC
NC NC
NC
NC
FLASH INTERFACE
FL_SO/LAN_DISABLE
NC
FL_CE
NC
NC
NOT CONNECTED
NC
P1V8P
P1V8P
P1V8P
P1V2P CSA P1V2P CSA P1V2P CSA P1V2P CSA
NC
R_BIAS100
NC
R_BIAS10 TEST_CLK( ) TEST_EXE( )
NC NC
P1V2P ANALOG P1V2P ANALOG
P1V2P
P1V2P
P1V2P
P1V2P P1V2P P1V2P P1V2P P1V2P P1V2P P1V2P P1V2P
P3V3P
P1V2P
P3V3P P3V3P P3V3P P3V3P P3V3P P3V3P P3V3P P3V3P
P3V3P
P3V3P
P3V3P P3V3P P3V3P
GND CSA GND CSANCGND
RESERVED
RSVD 3.3V RSVD GND RSVD GND RSVD GND RSVD GND RSVD GND RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
P3V3P GND GND GND GND GND NC NC NC NC NC
GND,P3V3P 82547EI-KOMBI
D9000
82547EI-BGA196
C9000
18P-J-50V-COG-2
C9001
18P-J-50V-COG-2
G9000
QUARZ
25M0-30PPM-20PF
C9010
10P-J-50V-COG-2
FRAME1 VERSION 2
SACHNUMMER
NAME
DATUM
VORGANG
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
CURRENT_LOGIC
HIGHEST_LOGIC
REG_PAGE
FUJITSU
SIEMENS
S26361-D1534-X-*-11
02
02A3842
SCU
90 99 48+
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:05 2003
DRAWING
KINNERTH R: V26808-B7750-V30
KENAI II CSA: V26808-B7698-V40
THE SDP<3..0> PINS OF THE KENAI2 HAVE TO BE PROGRAMMED AS OUTPUT
KENAI IEEE -
KENAI IEEE +
NEAR CONTROLLER
PLACE TOGETHER AND
NEAR D9000 FOR IEEE TESTING
WANNER
22.08.02
N.C.
N.C.
N.C.
N.C.
AND
LAN_ISOL_TCLK_KIN_H TOGETHER
AND
PLACE TP FOR LAN_RBIAS10
N.C.
P1V2P
N.C.
DETECT
BOUNDARY SCAN
1K PU AT P3V3P_DUAL
BRASILIA
20
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
91
19
91
90 91 92
91
91
91
91
91
91
20
90
90
91
90 92 94
91 92
90 92 94
90 91 92
90 91 92
91
91
91
94
94
30 35
91
92
91
91
91
91
91 92
91
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
91
91
91
91
91
91
91
94
94
94
91
20
90
91
94
94
94
94
94
91
94
94
90
91
91
21
21
21
21
P11
C6
C5
C3
C2
C1
B8
B6
B5
B4
P3
B2
B1
A8
A5
A4
F5
E10
E4
D6
D4
N3
K4
K2
H2
J10
J9
J8
J7
J6
J5
H8
H7
H6
H5
G6
G5
E12
E11
M4
J4
H4
L2
G4
J13
G12
D12
D11
P14
P1
M11
N9
M9
L1
P10
M10
P7
B10
N14
P13
N13
M12
M14
A13
J12
B12
B11
C11
A12
H14
H13
F14
F13
E14
E13
A9
C14
C13
A6
A2
A14
A1
P9
N10
C4
C9
B9
A10
L13
L12
M13
L14
P6
P5
M5
P4
N11
N7
M8
M7
L8
L7
G3
F3
F2
N5
F1
E3
D9
D3
D2
D1
C8
C7
N1
M3
J14
L10
L9
L5
L4
K11
K10
K9
K8
K7
K6
K14
K5
J11
H11
G13
H12
F12
D10
D14
B14
B13
N4
G1
LAN_25_XTAL1
LAN_PLL_CAP
LAN - CONTROLLER
INTEL - KENAI II CSA
KINNERTH R(+)
LAN_DIS_KENAI_L
CLK_66_LAN_H
LAN_KENAI_EECS_H
LAN_SMB_DATA_H
LAN_SMB_CLK_H
LAN_KIN_RSTSYNC_H
LAN_KIN_TXD<2>
LAN_KIN_TXD<1>
LAN_EE_MODE
LAN_KENAI_EEDOUT_H
P1V2P_LAN
V26823-B7-V16
LAN_CSA_H<10..0>
LAN_CSA_VREF
GND
LAN_POWERGOOD_H
PCI_IRQ_LINE_5_L
LAN_KENAI_EEDIN_H
LAN_CSA_PME_L
LAN_CSA_VSWING
P3V3P=P3V3P_DUAL
LAN_MDI0_H
LAN_MDI1_H
LAN_MDI0_L
LAN_MDI3_L
LAN_MDI3_H
LAN_MDI2_L
LAN_MDI2_H
LAN_MDI1_L
LAN_LINK100_L
LAN_ACTIVITY_L
S1-HC49
LAN_KIN_CLK_H
LAN_KIN_RXD<0>
LAN_KIN_RXD<1>
LAN_KIN_RXD<2>
LAN_CSA_RCOMP
LAN_TEST_EN_KIN_H
LAN_KENAI_EECLK_H
GND GND
LAN_25_XTAL2LAN_25_XTAL1
LAN_25_XTAL2
SMB_ALERT_LAN_H
GND
GND
P3V3P_DUAL
GND
LAN_KIN_TXD<0>
LAN_CTRL_P1V8P LAN_R_BIAS10
LAN_CLKR_CAP
LAN_CTRL_P1V2P
LAN_XTAL_CAP
LAN_ISOL_TCLK_KIN_H LAN_ISOL_TEXE_KIN_H
LAN_LINK1000_L
LAN_LINK_L
P1V2P_LAN
P1V8P_LAN
P1V8P_LAN
LAN_ISOL_TIN_KIN_H
P1V2P_LAN
LAN_PCI_RST_L
P3V3P_DUAL
LAN_CSA_STRF_H
LAN_CSA_STRS_H
Page 49
C9107
1N0-K-50V-X7R-2
C9106
10U-M-6V3-X5R
A9110
AR2
4XS-100R-J-W06
A9110
A9110
A9110
4XS-100R-J-W06
R9152
4K7-J-W06
A9152
AR2
4XS-470R-J-W06
10K
10K
10K
10K
V9150
BCR183S-SOT363
T-PNP-BCR183S
10K
10K
10K
10K
V9151
BCR183S-SOT363
T-PNP-BCR183S
A9152
AR2
4XS-470R-J-W06
A9152
AR2
4XS-470R-J-W06
A9152
AR2
4XS-470R-J-W06
2KX8 SPI
CS
SI
SCL
SO WP HOLD VCC GND
EEPROM
D9110
EEPROM2KX8SPI-SO8
EEPROM2KX8SPI
A9100
AR2
4XS-1K0-J-W06
A9100
AR2
A9100
AR2
4XS-1K0-J-W06
A9100
AR2
4XS-1K0-J-W06
A9101
AR2
4XS-220R-J-W06
A9101
AR2
4XS-220R-J-W06
A9101
AR2
4XS-220R-J-W06
A9102
AR2
4XS-1K0-J-W06
A9102
AR2
4XS-1K0-J-W06
A9102
AR2
4XS-1K0-J-W06
A9102
AR2
4XS-1K0-J-W06
V9120
BC846B
T-NPN
R9120
4K7-J-W06
R9101
30R1-F-W06
A9150
AR2
4XS-33R-J-W06
A9150
A9150
A9150
A9151
AR2
4XS-33R-J-W06
A9151
A9151
A9151
A9153
AR2
4XS-100R-J-W06
A9153
A9153
A9153
R9108
R00-1A0
A9154
AR2
4XS-0R-J-W06
A9154 A9154
A9154
R9154
590R-F-W06
R9155
549R-F-W06
R9111
1K0-J-W06
DU
S_CLK
ORG
EEPROM
64X16 SER
DO
CS DI
GND,VCC
D9120
EEPROM64X16-SER3-SO8
EEPROM64X16SE3
R9156
220R-J-W06
R9157
2K2-J-W06
R9102
604R-F-W06
R9103
665R-F-W06
R9104
523R-F-W06
C9100
100N-Z-25V-Y5V
C9101
100N-Z-25V-Y5V
C9111
1N0-K-50V-X7R-2
C9110
10U-M-6V3-X5R
C9105
1N0-K-50V-X7R-2
C9104
10U-M-6V3-X5R
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:05 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
91 99 49+
BECAUSE OF CF9 RESET
INVERTER NECESSARY
PU ON PAGE 34
DETECT POWER OFF
FOR KENAI AND KINNERETH
POPULATE V9150 & V9151 & A9152
VSWING = 0.533*1.5V = 0.80V +-2%
POPULATE WITH KENAI
FOR TEST
IF USING A SPI
EEPROM PULL UP
VREF = 0.233*1.5V = 0.35V +-2%
PERFORMANCE OF THE KINNERETH WE USE 590R.
TYPICAL VALUE IS 619R, BUT FOR BETTER OUTPUT
POPULATE WITH KINNERETH
1
= RSMRST_L
FOR TEST
DON’T POPULATE
POPULATE V26808-B7384-V40
WITH KINNERTH R+ (82562 EX)
PLACE NEAR ICH5
WANNER
26.08.02
PLACE NEAR KENAI
ALLWAYS POPULATE V9150, V9151, A9152 FOR ONBOARD-LAN
FOR TEST
BRASILIA
90 91 92
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
90
30 91
90
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
90
90
19 24 30 34 52 65 66
90
19 24 25 30 34 52 65 66
48
90 91
30 91
30 48 65
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
30 91
90
90
90
90
90 91
30
30
90
3090
90 91
90
30
90
30
30
30
30
30
30
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
30 31
90
90 91 92
90
90 91 92
90 91
90 92
90
90
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
90
90 92
30
90
90
90
90
90
30 91
90 91
90
90 91
90
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
90
30 34
90
21
C
B
E
7 254 81
63
63
72
81
5 4
7 2
63
81
2
4
8
7
3
5
6
1
6 3
7 2
5 4
4
3
1
6
5
2
4
3
1
6
5
2
8 1
21
5 4 63
72
81
21
21
21
21
21
21
21 21
21 21 21
21
21
4
7
6
3
1
2
21
21
21
81
72
63
54
21
72
81
63
54
81
54
72
63
54
81
72
63
21
P3V3P_DUAL
GND
GND
LAN_CLKR_CAP
LAN_CSA_PME_H
LAN_CSA_PME_L
P3V3P_DUAL
GPIO_LAN_DIS_L
V26810-B304-V40
LAN_XTAL_CAP
SMB_ALERT_LAN_H
LAN_KIN_TXD<2>
LAN_KIN_TXD<1>
LAN_CSA_VREF
P3V3P_DUAL
LAN_EE_MODE
LAN_KENAI_EECLK_H
SMB_CLK_DUAL_H
LAN_KENAI_EECS_H
LAN_TEST_EN_KIN_H
P3V3P
PCI_RST_LAN_L
GND
P1V2P_LAN
LAN_KENAI_EEDIN_H
GND
LAN_DIS_L
DUAL_OK_3V3_H
LAN_ISOL_TCLK_KIN_H
LAN_ISOL_TEXE_KIN_H
LAN_ISOL_TIN_KIN_H
LAN_TEST_EN_KIN_H
LAN POPULATION OPTIONS
SMB_DATA_DUAL_H
V26803-B51-V8
LAN_PCI_RST_L
GND
VCC=P3V3P_DUAL
GND
GND GND
GND
P1V2P_LAN
LAN_CSA_RCOMP
LAN_CSA_VSWING
P3V3P_DUAL
GND
LAN_KIN_RXD<2>
LAN_KIN_RXD<1>
LAN_KIN_RXD<0>
LAN_KIN_EEDIN_H
LAN_ICH_RXD<0>
LAN_KIN_TXD<1>
LAN_KIN_RSTSYNC_H
LAN_ICH_CLK_H
LAN_ICH_RXD<2>
LAN_ICH_RXD<1>
LAN_ICH_TXD<1> LAN_ICH_TXD<2>
LAN_ICH_RSTSYNC_H
LAN_ICH_TXD<0>
LAN_KIN_TXD<2>
LAN_KIN_TXD<0>
V26808-B6350-V45
LAN_KIN_CLK_H
P1V2P_LAN
LAN_SMB_DATA_H
LAN_SMB_CLK_H
LAN_PLL_CAP
P3V3P_DUAL
V26808-B7759-V40
GND
GND
GPIO_LAN_DIS_L
P3V3P_DUAL
GND
LAN_CTRL_P1V8P
LAN_KIN_EEDOUT_H
LAN_KIN_EECS_H
LAN_KIN_EECLK_H
LAN_R_BIAS10
GND
LAN_KENAI_EEDOUT_H
LAN_POWERGOOD_H
LAN_DIS_L
LAN_DIS_KENAI_L
Page 50
V9200
BCP51-16-SOT223
T-PNP-4P
V9201
BCP51-16-SOT223
T-PNP-4P
C9200
10U-M-6V3-X5R
C9202
10U-M-6V3-X5R
C9203
10U-M-6V3-X5R
C9204
10U-M-6V3-X5R
C9205
100N-Z-25V-Y5V
C9253
100N-Z-16V-Y5V-C0402
C9206
10N-K-50V-X7R-2
C9250
10U-M-6V3-X5R
C9251
10U-M-6V3-X5R
C9261
10U-M-6V3-X5R
C9262
100N-Z-16V-Y5V-C0402
C9265
100N-Z-16V-Y5V-C0402
C9264
100N-Z-16V-Y5V-C0402
C9267
1N0-K-50V-X7R-2
C9273
100N-Z-16V-Y5V-C0402
C9272
100N-Z-16V-Y5V-C0402
C9270
10U-M-6V3-X5R
C9271
10U-M-6V3-X5R
C9201
100N-Z-25V-Y5V
A9200
AR2
4XS-10R-J-W06
A9202
AR2
R9230
R00-1A0
C9252
100N-Z-16V-Y5V-C0402
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:15 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
92
99
50+
10R/8 = 1R25 0.5W
POPULATE WITH KENAI
(500MA)
26.08.02 WANNER
BRASILIA
65 66 80 90 91 92
35 37 38 40 47 48 53
14 19 24 25 30 31 34
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
90 91
90
90 91 92
90 91
90 92 94
90 92 94
90 92 94
90 91 92
40 47 48 53 65 66 80 90 91 92
14 19 24 25 30 31 34 35 37 38
21
72 81
54
63
72 81
63
54
21
21
21
2 1
2 1
21
2 1
2 1
2 1
21
21
21
21
21
21
21
21
21
4
C
B
E
4
C
B
E
2 1
2 1
P3V3P_DUAL
P3V3P_DUAL_LAN_R2
LAN_DECOUPLING
LAN_VREG /
V26803-B51-V8
LAN_ISOL_TIN_KIN_H
P1V8P_LAN
LAN_CTRL_P1V2P
P1V8P_LAN
GND
P3V3P_DUAL
GND
GND
P1V2P_LAN
GND
GND
P3V3P_DUAL
P1V8P_LAN
LAN_CTRL_P1V8P
P1V2P_LAN
GND
GND
Page 51
R9405
49R9-F-W06
R9406
49R9-F-W06
R9407
49R9-F-W06
R9408
49R9-F-W06
R9409
49R9-F-W06
R9410
49R9-F-W06
R9411
49R9-F-W06
R9412
49R9-F-W06
R9401
R00-1A0
R9403
R00-1A0
C9400
10N-K-50V-X7R-2
C9401
10N-K-50V-X7R-2
C9402
10N-K-50V-X7R-2
C9403
10N-K-50V-X7R-2
BUUSBLAN4-022-1000
X3720
XB391-V221
1
LAN RECTIFIER C
75R
1.5NF
MX1
-
+
C_MD1
LAN_SHIELD
MD1(TX)
-
+
GREEN
YELLOW
MX2
-
+
C_MD2
MD2(RX)
-
+
MX3
-
+
C_MD3
MD3
-
+
MX4
-
+
C_MD4
MD4
-
+
GREEN
250R
250R
100NF
100NF
100NF
100NF
8
7
5
4
6
3
2
CONN
1
GND
C B
A
8 1
1 4
4
R9402
R00-1A0
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:19:02 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
94
99
51+
POPULATE WITH KENAI
PLACE R9402 NEAR CONNECTOR
SINGLE C’S HAD BEEN CHOOSEN BECAUSE OF ROUTING CONSTRAINS ON THE D1534 DESIGN
LAN CONTROLLER
LAN WITH USB: PAGE 37
WITH KINNERTH POPULATE
WANNER
26.08.02
PLACE NEAR
V26827-B391-V222
POPULATE WITH KINNERTH
POPULATE WITH KENAI
WITH KINNERTH POPULATE 60R4
V26801-B76-V596
90
90 92
90
90
37 43 44 45 85
90
90
90
90
90 90
90
90
90
2 1
30
29
28
27
22 21
2019
18
17
16
15
14
13
12
11
10
9
21
21
21
21
21
21
21
21
21
21
21
21
21
21
LAN_LINK100_L
LAN_LINK1000_L
LAN_MDI1_L
LAN_MDI1_H
BRASILIA RJ-45 CONNECTOR
P1V8P_LAN_CON
LAN_MDI2_L
LAN_MDI0_H
P1V8P_LAN
LAN_MDI2_H
GND
P3V3P_DUAL
SHIELD_GND
GND
LAN_LINK_L
LAN_MDI3_L
LAN_MDI3_H
LAN_MDI0_L
LAN_ACTIVITY_L
V26827-B391-V221
Page 52
P9900
PAD
PAD_1.00_0.50
R9900
1K0-J-W06
P9901
PAD
PAD_1.00_0.50
R9901
1K0-J-W06
P9916
PAD
PAD_1.00_0.50
P9918
PAD
PAD_1.00_0.50
R9918
1K0-J-W06
R9915
1K0-J-W06
P9920
PAD
PAD_1.00_0.50
P9922
PAD
PAD_1.00_0.50
P9929
PAD
PAD_1.00_0.50
P9927
PAD
PAD_1.00_0.50
P9925
PAD
PAD_1.00_0.50
P9921
PAD
PAD_1.00_0.50
P9917
PAD
PART_TYPE=PAD_1.00_0.50
P9919
PAD
PAD_1.00_0.50
D
S
G
V9900
BSH112-SOT23
FETN3P-5
P9931
PAD
PAD_1.00_0.50
ABBREV=D1534
TITLE=D1534
LAST_MODIFIED=Fri Jan 17 05:29:06 2003
DRAWING
SACHNUMMER
FUJITSU
SIEMENS
REG_PAGE
VORGANG
HIGHEST_LOGIC
CURRENT_LOGIC
FRAME1 VERSION 1
NAME
DATUM
ZUST
18
1716151110
98
76
5
4
1413
12
3
21
D
E
C
B
A
A
B
C
D
E
F
G
WEITERGABE SOWIE VERVIELFAELTIGUNG DIESER UNTERLAGE, VERWERTUNG UND
MITTEILUNG IHRES INHALTS NICHT GESTATTET, SOWEIT NICHT AUSDRUECKLICH
ZUGESTANDEN. ZUWIDERHANDLUNGEN VERPFLICHTEN ZU SCHADENERSATZ. ALLE
RECHTE FUER DEN FALL DER PATENTERTEILUNG ODER GM-EINTRAGUNG VORBEHALTEN.
COPYING OF THIS DOCUMENT, AND GIVING IT TO OTHERS AND THE USE OR COMMUNICATION
OF THE CONTENTS THEREOF, ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY. OFFENDERS
ARE LIABLE TO THE PAYMENT OF DAMAGES. ALL RIGHTS ARE RESERVED IN THE EVENT
OF THE GRANT OF A PATENT OR THE REGISTRATION OF A UTILITY MODEL OR DESIGN.
F
NAME GEPR. NORM T-NR.
DATUM
S26361-D1534-X-*-11
02
02A3842
SCU
99
99
52-
04.08.98
G293
06.12.01
NOELDGE
DO NOT POPULATE THIS SIDE
BRASILIA
10 11 12 13 15 21 30
1
D
S
G
1
1
1
1
1
1
1 1
21
211
1
211
211
FOR REPAIR ONLY
R
R
R
R
GND
VCC_CPUCORE
VCC
P3V3P
GND
GND
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