Gibson SBC6120 User Manual

SBC6120

SER'S

Second Edition

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ANUAL

Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.1 published by the Free Software Foundation; with no invariant sections; with the

front cover text “Portions Copyright  2001-2003 by Spare Time Gizmos” and our URL, and with no back cover text. A copy of this license may be obtained from http://www.gnu.org/licenses/fdl.txt.

ONTENTS

VERVIEW

1.1 R

1.2 S

1.3 W

SSEMBLY

2.1 E

2.2 P

2.3 S

2.4 A

2.5 F

2.6 C

2.7 J

2.8 T

ARDWARE DESCRIPTION

3.1 P

3.2 M

3.3 C

3.4 RAM D

3.5 IDE I

3.6 POST C

OFTWARE DESCRIPTION

................................................................................................................................. 1

EGULATORY WARNING AFETY WARNING

ARRANTY

......................................................................................................................... 2

...................................................................................................... 2

............................................................................................................... 2

................................................................................................................................. 3

RRATA

.............................................................................................................................. 3

ART SELECTION OCKETS AND SOLDERING SSEMBLY HINTS

INAL CHECKOUT

ONNECTORS

UMPERS

EST POINTS

............................................................................................................................ 9

................................................................................................................ 3

................................................................................................... 4

................................................................................................................ 6

..................................................................................................................... 7

...................................................................................................................... 9

......................................................................................................... 11

ROCESSOR

EMORY MANAGEMENT

ONSOLE TERMINAL

NTERFACE

..................................................................................................................... 11

..................................................................................................... 12

.......................................................................................................... 13

ISK

........................................................................................................................ 13

................................................................................................................. 14

ODE DISPLAY

....................................................................................................... 15

......................................................................................................... 17

4.1 POST............................................................................................................................... 17

ISK SUPPORT

OADING

ISK SUPPORT

OOTSTRAP

OS/8

......................................................................................................... 18

.......................................................................................................... 18

............................................................................................................. 20

ONTO THE

............................................................................................................ 25

PECIAL CHARACTERS

EMORY COMMANDS

EGISTER COMMANDS

REAKPOINT COMMANDS

ONTROL COMMANDS

ERMINAL COMMANDS

OAD/DUMP COMMANDS

AND

RAM D

ISCELLANEOUS COMMANDS

RROR MESSAGES

UNCTION CALLS

ROM V

EAD/WRITE ET

RAM D

EAD/WRITE ET

IDE D

OPY MEMORY

ERSION

RAM D

ISK SIZE ISK BATTERY STATUS

IDE

ISK SIZE

ISK PARTITION MAPPING

................................................................................................................. 41

OS/8

FOR THE

...................................................................................................... 25

........................................................................................................ 26

....................................................................................................... 29

................................................................................................... 30

....................................................................................................... 31

....................................................................................................... 32

.................................................................................................... 33

ISK COMMANDS

........................................................................................................ 36

............................................................................................................ 39

.......................................................................................................... 39

ISK

.................................................................................................... 39

......................................................................................................... 40

DISK

...................................................................................................... 40

........................................................................................................... 40

SBC6120 ...................................................................................... 43

.......................................................................................................................... 47

........................................................................................................................ 49

EFERENCE

................................................................................................................... 51

SBC6120.................................................................................. 21

........................................................................................ 33

............................................................................................. 36

..................................................................................... 40

.................................................................................... 41

................................................................................... 41

4.2 RAM D

4.3 ATA D

4.4 OS/8 B

4.5 L

OMMAND REFERENCE

5.1 S

5.2 M

5.3 R

5.4 B

5.5 C

5.6 T

5.7 L

5.8 IDE

5.9 M

5.10 E

6ROM F

6.1 G

6.2 R

6.3 G

6.4 G

6.5 R

6.6 G

6.7 S

6.8 G

6.9 C

A. B B. P C. S

UILDING ARTS LIST ILK SCREEN

D. IOT R

Page i

Spare Time Gizmos SBC6120 User's Manual

1 O

The SBC6120 is a conventional single board computer with the typical complement of RAM, EPROM, and interfaces. What makes it unique is that the CPU is the Harris HD-6120 “PDP-8 on a chip.” Yes, a real PDP-8! The 6120 is the second generation of single chip PDP-8 compatible microprocessors, and was used in Digital’s DECmate-I, II, III and III+ “personal” computers.

The SBC6120 can run all standard DEC paper tape software, such as FOCAL-69, with no changes what so ever. Simply use the ROM firmware on the SBC6120 to download FOCAL69.BIN from a PC connected to the console port (or use a real ASR-33 and read the real FOCAL-69 paper tape, if you’re so inclined!), start at 00200, and you’re running.

OS/278, OS/78 and, yes - OS/8 V3D or V3S - can all booted and run on the SBC6120 using either RAM disk or IDE disk as mass storage devices. Since the console interface in the SBC6120 is KL8E compatible and does not use a HD-6121, there is no particular need to use OS/278 and real OS/8 V3D runs perfectly well. Of course, you must still avoid using the KT8A extensions in the OS/8 DEVEXT kit as the KT8A IOTs conflict with the 6120 stack instructions.

VERVIEW

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Figure 1 – The SBC6120

Spare Time Gizmos SBC6120 User's Manual

1.1 R

In the United States, the Federal Communications Commission requires that devices that use and radiate radio frequency energy be certified in accordance with CFR Title 47, Parts 2 and 15. Other countries will have different requirements.

The SBC6120 design is not in finished product form and has NOT been approved by the FCC or any other regulatory agency worldwide. The user understands that approvals may be required prior to the operation of the SBC6120, and agrees to utilize the SBC6120 in keeping with all laws governing its operation in the country of use.

1.2 S

The RAMDISK board uses two Lithium coin cell batteries. There is a danger of explosion if this type of battery is incorrectly replaced. Replace with only the same or equivalent type recommended by the manufacturer. Dispose of used batteries only in accordance with the manufacturer's instructions.

1.3 W

ACCURACY OF THE IMPLIED

SOFTWARE OR FIRMWARE SUPPLIED IN CONJUNCTION WITH THE

APPLICATION COMPLETENESS, AND USEFULNESS OF THE OTHER INFORMATION PROVIDED BY PERFORMANCE OF THE

EGULATORY WARNING

AFETY WARNING

ARRANTY

PARE TIME GIZMOS OFFERS NO WARRANTY, EXPRESS OR IMPLIED, AS TO THE RELIABILITY OR

SBC6120

AS TO THE ACCURACY OF THE INFORMATION PRESENTED IN THIS DOCUMENT

IZMOS OFFERS NO WARRANTY, EXPRESS OR IMPLIED, AS TO THE SUITABILITY OR CORRECTNESS OF ANY

PARE TIME GIZMOS MAKES NO REPRESENTATIONS AS TO THE SUITABILITY OF THE

T IS SOLELY AND EXCLUSIVELY YOUR RESPONSIBILITY TO EVALUATE THE ACCURACY

. I

SBC6120

DESIGN

IS ASSUMED SOLELY BY YOU

PARE TIME GIZMOS OFFERS NO WARRANTY, EXPRESS OR

. S

PARE TIME

. S

SBC6120.

SBC6120

PARE TIME GIZMOS. THE ENTIRE RISK AS TO THE USE AND

AND ALL RELATED DESIGNS, SOFTWARE, AND

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HE WARRANTIES AND CORRESPONDING REMEDIES AS STATED IN THIS SECTION ARE EXCLUSIVE AND IN

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OME JURISDICTIONS DO NOT ALLOW THE EXCLUSION OF

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OU MAY HAVE OTHERS, WHICH

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WITHOUT LIMITATION, DAMAGES FOR COSTS OF PROCUREMENT OF SUBSTITUTE

LOST PROFITS, LOSS OF DATA, INTERRUPTION OF BUSINESS, OR LOSS OF USE

SBC6120

THE ABOVE LIMITATION MAY NOT APPLY TO YOU

PARE TIME GIZMOS AND ACCEPTED BY SPARE TIME GIZMOS FOR THE USE OF THE

OR RESULTS FROM MISTAKES, OMISSIONS, INTERRUPTIONS

TORT, STRICT LIABILITY OR OTHERWISE, EVEN IF SPARE

ECAUSE SOME

. B

SBC6120.

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Spare Time Gizmos SBC6120 User's Manual

2 A

Many thanks to Steve Loboyko, Paul Schmidt, John Wren, Jim Kearney and the other SBC6120 builders who contributed their experiences and suggestions to this chapter.

2.1 E

2.2 P

RRATA

There are no known errors in Revision D of the SBC6120 board.

ART SELECTION

The complete parts list for the SBC6120 is contained in Appendix B and, with the exception of the HD6120 CPU, all parts are common, modern, devices that should be readily available. Most part values are non-critical and substitutions should not be a problem, however when changing connectors or switches use care that the replacements will fit the footprint on the PC board. The SBC6120 is intended to use all CMOS devices. Be sure to use 74HC parts for all 74xx logic, CMOS 22V10 and 16V8 GALs, 27C64 or 27C256 CMOS EPROMs, and a CMOS 82C55 PPI. Be particularly careful of the latter, since NMOS 8255s are very common.

2.2.1 SRAMs

The HM6208 SRAMs used in the SBC6120 were originally intended for use as cache memories with Intel 486 processors and are available in 25, 35 and 45 ns speeds. All of these are ridiculously fast by HD-6120 standards, and any version of the HM6208 may be used.

SSEMBLY

2.2.2 EPROMs

Two EPROMs are used to hold the BTS6120 ROM monitor and bootstrap. Either 8K byte, 27C64 style, or 32K byte, 27C256 style, EPROMs may be used without any circuit changes or jumper settings, however be warned that not all 27C64 EPROMs will work in this circuit! Those which define V held at V National NM27C64 EPROMs do not. This problem applies only to 8K EPROMs – all makes of 32K 27C256 EPROMs should work without difficulty.

2.2.3 GALs

Three GALs are used in the SBC6120 – two 22V10 types for IOT decoding and one 16V8 type for memory decoding. Atmel ATF22V10 and ATF16V8 parts were used in the SBC6120 prototype because these devices are flash memory based and may be erased and reprogrammed any number of times; however any GALs with the appropriate organization will work.

2.2.4 EconoReset

The DS1221 EconoReset comes in two versions – one with a 5% Vcc tolerance and another with a 10% tolerance. The 10% version is recommended as the 5% version has a tendency to cause spurious RESETs whenever there is a slight drop in the V picofuse, which has sufficient internal resistance to drop 0.2 to 0.3 volts at the 300mA draw of the SBC6120. It will be made worse if you are using a 2.5” laptop style hard disk, since these drives use +5V to power the motor. Even though the disk isn’t powered from the SBC6120, if you power both from the same supply it can cause a deep enough drop in V drive spins up. The 10% version of the DS1221 provides a wide enough tolerance to avoid these problems.

as a “don’t care” during read will work fine, however those which require that Vpp be

during reading will not work. In particular, AMD AM27C64 EPROMs work fine;

. This situation is exacerbated by the

to reset the DS1221 when the

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Spare Time Gizmos SBC6120 User's Manual

2.2.5 82C55 PPI

You must use at least the 5 MHz version of the 82C55 (as indicated by an A5, or -5 suffix); slower parts will not work.

2.2.6 LED display

Please be aware that the quad LED display specified for D2 has internal dropping resistors. Be sure you do not accidentally substitute a part without these resistors!

2.2.7 Fuse

The picofuse (F1) and the zener diode (D1) are there to protect you against accidental over voltage or reverse polarity of the power supply. Yes, it will work without them, but they're cheap insurance that you must replace it with a wire jumper; you can’t simply leave it open!

2.2.8 Oscillators

The SBC6120 uses two TTL oscillators, one to generate the baud rate clock for the console UART and another to generate the CPU clock. The baud rate generator, U23, must always be exactly 4.9152 MHz if we are to generate standard baud rates. U1 generates the CPU clock and should nominally be 5.0 MHz. These oscillators come in two versions – one with an ENABLE pin and one without – and either version may be used in the SBC6120.

and I strongly recommend you use them. If you decide to omit the fuse, remember

Harris specified the HD-6120 to work up to a maximum clock frequency of 5.1MHz, however DEC actually ran the DECmates at 8 MHz. Whether they were using specially selected parts or all 6120s would go this fast I have no way of knowing, but I have regularly run my SBC6120 at 8 MHz without problems. This can easily be changed by substituting an 8 MHz oscillator for U1.

2.3 S

Every kit that I have ever built, all the way from the legendary Heathkit2 on down, has always said that 90% of the kits that don’t work after they’re assembled fail because of the soldering. This is especially true of the SBC6120 – it is not an easy project to solder. The four layer PC board has internal power plans; this makes it difficult to solder power pins because the internal planes act as a heat sink and draw the heat away. The PC board was laid out with “8 and 8” design rules, which means that the traces are only 8 mils (that’s 0.008 inches!) wide and, in some places, there is only 8 mils of “air gap” between adjacent traces or pads. The SBC6120 is definitely not a “learn to solder” project – if you’ve never soldered a board like this before, then it’d be a good idea to find something cheaper to practice on!

When it comes to soldering, having the proper tools makes all the difference. A temperature controlled soldering station with a 30 mil tip will can be purchased for about $100 and will make the job much more pleasant. The right solder is important too – “63/37” solder is preferable to the traditional “60/40” because it has a slightly lower melting point and requires less heat. You should not be using anything larger than 31 mil (0.031 inch) diameter solder. And finally, you’ll want a nice pair of wire cutters for trimming the leads on components after you’ve soldered them. Get the kind that’s made for trimming wires on PC boards – they have a special cutting face that cuts flush with the PC board without leaving any wire “stubs” sticking up.

OCKETS AND SOLDERING

On more than one occasion I have accidentally connected +12V to the +5 input on the SBC6120 and, although I wish I could say that I was just testing and I did it on purpose, in truth it was simple stupidity. I have blown several of the fuses but never fried a chip

Yes, I’m old enough to have built one or two. I missed their golden years, though.

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Spare Time Gizmos SBC6120 User's Manual

You’ll want to wash the bare PC board before you start soldering to remove any grease or oils from fingerprints. If you don’t wash them off, these oils will make the solder take longer to “flow” and will require more heat and flux to get a good solder joint. I prefer to use a mildly abrasive cleaner such as a Brillo pad, or Comet cleanser with a sponge, for cleaning. They do a better job removing oils, but remember to rub lightly – heavy scrubbing will remove the plating or the silkscreen! Lastly and most importantly, make sure the board is completely dry before you start soldering. Even a tiny amount of water left in a hole will turn to steam when soldering heat is applied and blow the solder right out of the hole! If you have it, compressed air or canned air is ideal for removing water from the holes and can be used to accelerate the drying process.

The SBC6120 PC board does not have a solder mask and you must use care to avoid solder bridges to adjacent traces and pads. There are a few pins where vias come up close to a pad and these are especially likely candidates for shorts. A few to watch out for are U18 pin 1, U16 pin 27, U15 pin 11, U13 pin 9, and there are several places inside J4. There are other places have traces running close to pins; some of these are U5 pin 35 to trace running below pin, U3 pin 1 to trace running above pin, and U18 pin 1 to trace to right of the pin. Some of the bypass caps are also very close to traces and, when you nip the leads on these, check that your cutters cut cleanly and don’t cause shorts. And finally, be careful not to use too much solder on the pins; excessive solder can “wick” up the pin to the top side of the board and cause invisible (because they’re hidden under the IC socket) shorts there.

I strongly advise using good, high machined pin sockets for all ICs3. These sockets are admittedly expensive; a 16 pin DIP socket might cost 50 cents and a 40 pin DIP more than dollar, but they’re worth it if you ever need to replace an IC. Some people may object to the idea of putting a 25 cent 74HC74 IC into a 50 cent socket, but it’s not the IC you are protecting – it’s the PC board. If you ever fry that 74HC74 (and a single slip of the scope probe is all it takes!) then it will require significant skill and equipment to unsolder that dead IC without damaging the board. With a socket it takes only a few seconds to pop out the dead one a pop in a new one.

The only possible exceptions to the “socket everything” rule are the two crystal oscillators. These may be socketed if you wish, but because of their height they will extend far above the other ICs and because of their metal cans they may short to any daughter boards mounted on the expansion connector. If you do decide to socket them, put a piece of electrical tape over them for insulation.

When soldering IC sockets and connectors, especially the larger ones, start by holding the part tightly to the board and then soldering only two pins on diagonal corners. This will hold the part in place temporarily while you turn the board over and make sure the part is flush against the PC board. If it isn’t, then apply pressure to the part while using your iron to re-melt the solder on the closest pin. The worst thing is to solder all 40 pins on a connector only to turn it over and find that it’s all skewed. It’s pretty much impossible to desolder all those pins and repair the error at that point.

Lastly, clean the board again after you’re finished soldering by using a commercial flux remover or, if you’ve used a solder with water soluble flux, by washing with a toothbrush and warm water. Some water soluble fluxes are corrosive in the long term and should not be left on the board. Traditional rosin fluxes won't actually hurt anything, but the residue obscures the traces and makes it harder to find shorts. Make sure everything is completely dry before you begin installing parts in the sockets; once again, compressed air can be used to accelerate the drying process.

Please don’t solder your only 6120 chip to the board!

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Spare Time Gizmos SBC6120 User's Manual

2.4 A

Don’t install any ICs until you’ve read the next section, and when you do install the ICs notice that they are all oriented with pin one to the top or right, except IOT2 (U11, a 22V10). This one had to be oriented “backwards” to improve the trace routing.

Many people have had difficulty getting the correct EPROM into the correct socket. It does no harm to reverse them, but it won’t work either! Remember that the PDP-8 numbers its bits “backward” from the usual convention, so the EPROM containing bits DX0..5 is the “HIGH” EPROM and bits DX6..11 are the “LOW” EPROM. In the silk screen (see Appendix C) U9, the one closest to the RESET push button, is the HIGH EPROM and U10 is the LOW,

Seven 10K ohm resistors and one 4.7K resistor are used in the SBC6120; the lone 4.7K resistor is the one located between the UART and the IOT2 GAL. Don’t waste your time looking for R7 and R9 – they do not exist in this revision of the SBC6120.

Twenty-two 0.1µF 50VDC monolithic bypass capacitors are used in the SBC6120. These are not identified in the silk screen, however their positions are shown in red in Appendix C.

Capacitors C29, C30, C31 and C32 (1µF 25V tantalum) are polarized devices and must be installed correctly. The polarization is not shown on the silk screen, however if you hold the SBC6120 PC board so that the component side is up and the connectors are on your right, then the following diagram shows the correct orientation for these capacitors:

SSEMBLY HINTS

C32 C31 C29 C30

- + - + - + + -

Capacitor C37 is also polarized, however the correct orientation for it is shown on the silk screen.

2.5 F

After you finish assembly, apply power before installing any ICs. Check that the power LED lights; that +5 is present on the power pins of the IC sockets, and (if you soldered them in) that the oscillators are running. Next, install all the chips except the precious 6120 and measure the +5V current. It should be around 250mA - if it's more than 300mA, you have a problem somewhere that you should fix before risking your CPU. Lastly install the CPU, being careful to disconnect the power first and careful to take precautions against static damage to the 6120!

Verify that you have set your baud rate correctly (refer to section 2.7.2); connect a terminal; apply power and you should see the LEDs count down in the binary sequence 7 6 5 .. 1. When the LEDs reach 1 you should see the BTS6120 sign on message:

The POST will pause for a moment on 4 - that's the memory test and it's normal for it to take a few seconds. Also note that the POST will fail on the console UART test (#2) if you've forgotten to install one of the baud rate jumpers (J11 .. J14).

MAX232

INAL CHECKOUT

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Spare Time Gizmos SBC6120 User's Manual

2.6 C

2.6.1 Power

J1 is the main power connector, and is compatible with a standard PC floppy/hard disk power cable. The following illustration shows the pin out of the power connector if you hold the SBC6120 board with the component side up and the rear connectors facing you.

Power consumption for the SBC6120 is less than one watt, approximately 175 mA at 5V. Fuse F1 and Zener diode D1 protect the SBC6120 from reverse polarity and over voltage on the +5V supply. The SBC6120 does not use +12V and it is unconnected on the board.

2.6.2 IDE

J2 is used to connect an IDE hard disk and, like J1, its configuration is compatible with the PC equivalent. A standard 40 pin IDE ribbon cable may be used to connect this connector to the hard disk.

If a hard disk is not to be used with the SBC6120 then J2 may be used as a general purpose, twenty four bit, parallel I/O interface. Pins 1, 23, 25, 37 and 38 are inverted by the 74HC04 on the SBC6120 and can be used only as outputs, but the remaining pins may configured for either input or output by programming the 8255 PPI appropriately.

ONNECTORS

+12 VDC Ground Ground +5 VDC

Figure 2 - Connector J1

Pin Signal PPI Pin Signal PPI

DRESET L PC5

DD7 PB7

DD6 PB6

DD5 PB5

DD4 PB4

DD3 PB3

DD2 PB2

DD1 PB1

DD0 PB0

GND

N/C

DIOW L PC4

DIOR L PC3

N/C

DA1 PC1

DA0 PC0

CS1FX L PC6

GND

DD8 PA0

DD9 PA1

DD10 PA2

DD11 PA3

DD12 PA4

DD13 PA5

DD14 PA6

DD15 PA7

N/C

GND

N/C

GND

N/C

DA2 PC2

CS3FX L PC7

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Spare Time Gizmos SBC6120 User's Manual

Pin Signal PPI Pin Signal PPI

DASP L

GND

Table 1 - Connector J2

2.6.3 Console

J3 is a ten pin header which connects to the console terminal and is intended to be used with a standard PC DB9 (or DB25, if you prefer) cable. Note that only TXD, RXD, and ground are connected.

Pin Signal

TXD

RXD

GND

Table 2 - Connector J3

J3 has exactly the same pin out as a PC, and therefore if you intended to connect the SBC6120 to a PC’s COM port you will want to use a null modem serial cable with female DB9 (or DB25) connectors on both ends.

2.6.4 Expansion

J4 is a general purpose expansion connector which can be used for the RAM disk daughter board or other I/O expansion options. If you design your own expansion board to fit this connector then use care to minimize loading since these signals are not buffered on the SBC6120. In particular, it would probably not be a good idea to connect a long ribbon cable to this connector!

Pin Signal Type Pin Signal Type

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33

VCC RD SR L SKIP L C0 L INTREQ L READ L WRITE L LOAD DAR H GND N/C EMA2 MA4 MA5 MA6 MA7 MA8 MA9

PWR 2

OD 8 OD 10

O 12 O 14 O 16

PWR 18

O 22 O 24 O 26 O 28 O 30 O 32 O 34

4 6

VCC WR SR L BYTE READ L C1 L INTGNT L IOCLR L LXDAR L DISK CE L GND N/C N/C N/C MA3 MA2 MA0 MA1 DX0

PWR

O OD OD

PWR

This signal is not connected to the PPI, however it may be tested by the SDASP (64118) IOT.

Output (driven by the SBC6120).

Open drain input with a 10K pull up located on the SBC6120.

Bi-directional (Tristate).

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Spare Time Gizmos SBC6120 User's Manual

Pin Signal Type Pin Signal Type

35 37 39 41 43 45 47 49

EMA0 MA10 MA11 EMA1 DX5 DX6 DX7 GND

O 36 O 38 O 40 O 42 B 44 B 46 B 48

PWR 50

Table 3 - Connector J4

DX1 DX2 DX3 DX4 DX11 DX10 DX9 DX8

2.7 J

2.7.1 Break Enable

J10 causes the 6120’s CPREQ input to be asserted whenever a framing error is detected on the console port. This allows you to break into the SBC6120 ROM monitor at any time simply by pressing the BREAK key on the console terminal. To disable this feature, remove J10.

2.7.2 Baud Rate

Jumpers J11 through J14 select the console baud rate according to this table:

2.8 T

Test point TP1 is connected to RESET L. If you mount your SBC6120 in a box, you can connect this point to a second RESET push button on the front panel. The other side of the push button should be connected to ground. This test point can also be used with an EPROM emulator to allow the system to be reset when new code is downloaded.

UMPERS

Jumper Baud

J11 38,400 J12 9,600 J13 1,200 J14 300

Table 4 - Baud Rate Jumpers

WARNING!

Only one of these jumpers should be installed at any time!

EST POINTS

Test point TP3 is connected to ground and TP2 is connected to VCC (+5V). They are convenient places to connect the ground lead of your scope probe or the power leads of your logic probe.

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Spare Time Gizmos SBC6120 User's Manual

]

3 H

Besides the HD-6120 CPU, the SBC6120 has:

ARDWARE

64KW (that's 64K twelve bit words) of RAM - 32KW for panel memory and 32KW for conventional memory.

8KW of EPROM which contains the BTS6120 firmware. Up to 32KW of EPROM can be supported by the SBC6120, however the firmware currently uses only 8K.

Up to 2Mb (real eight bit bytes this time) of battery backed up, non-volatile SRAM which is bank switched and mapped into 6120 panel memory space. This memory is normally used as a RAM disk for OS/8, two megabytes being roughly equivalent to one RK05 disk pack!

An elaborate memory management system that controls the mapping of RAM, EPROM and RAM disk into panel memory.

A real, straight-8 compatible console terminal interface. The logic for this interface is implemented in a GAL - no 6121 is used and no software emulation is required

An IDE/ATA disk interface implemented with an 8255 PPI and programmed I/O.

Four LEDs, used to show POST error codes.

Memory

CPU

6120

Map

ESCRIPTION

RAM

64K x 12

EPROM

8K x 12

Daughter Board

RAM

Disk

2M x 8

3.1 P

The HD-6120 is a general purpose, high speed, CMOS 12 bit microprocessor designed to recognize the instruction set of Digital Equipment Corporation’s PDP-8/E minicomputer. Many

DAR

MA[0:11], EMA[0:2]

DX[0:11

POST

Console

Display

PPI

8255

ATA Disk

UART

6402

Figure 3 - SBC6120 Block Diagram

ROCESSOR

Mistakes that caused endless software compatibility problems in all models of the DECmate.

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Spare Time Gizmos SBC6120 User's Manual

architectural, functional and processing enhancements have been designed into the 6120 such that it can provide much higher system performance than its predecessor, the Intersil IM6100.

The HD-6120 features include:

A completely PDP-8/E compatible instruction set

Built in KM8E compatible memory management

A separate control panel memory for a bootstrap/monitor

Two on-chip stack pointers

A 2.75µs add cycle time with a 5.1MHz clock

3.2 M

The SBC6120 has three memory subsystems - 64K words of twelve bit RAM, 8K words of 12 bit EPROM

The HD-6120 on the other hand, has only two memory spaces - panel memory and main memory, and each of these is limited to 32K words. The EPROM is a further problem because the PDP-8 instruction set makes it difficult, if not impossible, to get by without some read/write memory in every 4K field. The SBC6120 implements a simple memory mapping scheme to allow all three memory subsystems to fit in the available address space.

The memory map in use is selected by four IOT instructions, MM0, MM1, MM2 and (what else?) MM3. Memory map changes take place immediately with the next instruction fetch - there's no delay until the next JMP the way there is with a CIF instruction.

The four memory maps implemented by the SBC6120 are:

•

EMORY MANAGEMENT

, and up to 2Mb of 8 bit of SRAM with a battery backup for a RAM disk.

IOT Function

MM0 MM1 MM2 MM3

Map 0 uses the EPROM for all direct memory accesses, including instruction fetch, and uses the RAM for all indirect memory accesses. This is the mapping mode selected by the hardware after power on or a reset.

6400 Select memory map 0 6401 Select memory map 1 6402 Select memory map 2 6403 Select memory map 3

Table 5 - Memory Mapping IOTs

Map 1 uses the RAM for all direct memory accesses, including instruction fetch, and uses the

• EPROM for all indirect memory references. This mode is the "complement" of map 0, and it's used by the ROM firmware initialization code to copy the EPROM contents to RAM.

Map 2 uses the RAM for all memory accesses and the EPROM is not used. This is the

• normal mapping mode used after the ROM firmware initialization.

Map 3 is the same as map 2, except that the RAM disk memory is enabled for all indirect

• accesses. RAM disk memory is only eight bits wide and reads and writes to this memory space only store and return the lower byte of a twelve bit word. This mode is used only while we're accessing the RAM disk.

The memory mapping mode affects only HD-6120 control panel memory accesses. Main memory is always mapped to RAM regardless of the mapping mode selected.

The EPROM is actually 16 bits wide, but the hardware simply throws away the extra four bits.

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IMPORTANT!

Spare Time Gizmos SBC6120 User's Manual

3.3 C

The console terminal interface of the SBC6120 is software compatible with the traditional PDP-8 interface, and is a proper subset of the KL8E. The only difference between the SBC6120 and the KL8E are that the KCF, TFL, KIE and TSK interrupts are permanently enabled, as they were in the original PDP-8.

The console interface in the SBC6120 does not use a 6121, so there'll be none of the “skip-onflag-and-clear-it” nonsense with KSF or TSF that plagued the DECmate family!

If a daughter board is to be installed which will replace the standard PDP-8 console (e.g. a VT52 video terminal emulator), then SBC6120 onboard serial port must be disabled to prevent any conflicts. The SBC6120 implements two special IOTs which allow the device codes used by the onboard serial port to be changed.

ONSOLE TERMINAL

IOT Function

KSF KCC KRS KRB TSF TCF TPC TLS

6031 Skip if the console receive flag is set 6032 Clear the receive flag and AC 6034 OR AC with the receive buffer but don’t clear the flag 6036 Read the receive buffer into AC and clear the flag 6041 Skip if the console transmit flag is set 6042 Clear transmit flag, but not the AC 6044 Load AC into transmit buffer, but don't clear flag 6046 Load AC into transmit buffer and clear the flag

instructions are omitted from the SBC6120. Console

Table 6 - Console Terminal IOTs

SSLUCM SSLUSM

Executing the SSLUSM IOT would cause the SBC6120 onboard serial port to respond to device codes 36/37 (e.g. KSF would become 6361; TLS would be 6476, etc), which allows an external device on the expansion bus to respond to the standard console 03/04 IOTs. Executing the SSLUCM IOT would return the onboard serial port to its normal console, 03/04, assignment. A normal program would ordinarily never worry about this – BTS6120 automatically detects, at startup, whether a secondary console device is present and configures the SBC6120 onboard serial port accordingly.

The SSLUCM and SSLUSM IOTs were first implemented in revision 2 of the IOT2 PLD. The original version of the SBC6120 did not have these instructions; the onboard SLU device codes were fixed at 03/04. The software can easily determine which version of the PLD is installed by setting the AC to a non-zero value and then executing either SSLUCM or SSLUSM. On the original SBC6120 both these IOTs are NOPs which will leave the AC unchanged, however with the revision 2 PLD the AC will be cleared.

3.4 RAM D

A daughter board is available which plugs into the SBC6120 expansion header and contains a DS1221 SRAM controller, one or two Lithium backup batteries and sockets for up to four, byte wide, low power CMOS SRAM chips. Each socket can contain a 512kb SRAM, a 128kb SRAM,

IOT Function

6412 Select SLU console mode (device codes 03/04) 6413 Select SLU secondary mode (device codes 36/37)

Table 7 – Onboard Serial Port Mode IOTs

ISK

Or SPI, depending on which manual you read.

03/09/2003 1:35 PM Page 13

+ 39 hidden pages

Gibson SBC6120 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual