Gennum Corporation GS9025-CTM, GS9025-CQM Datasheet
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
Revision Date: November 2000 Document No. 521 - 63 - 05
PRELIMINARY DATA SHEET
GS9025
FEATURES
• SMPTE 259M compliant
• operational to 540Mb/s
• automatic cable equalization (typically greater than
350m of high quality cable at 270Mb/s)
• adjustment-free operation
• auto-rate selection (5 rates) with manual override
• single external VCO resistor for operation with five
input data rates
• data rate indication output
• system friendly: serial data outputs muted and serial
clock remains active when input data is lost
• operation independent of SAV/EAV sync signals
• signal strength indicator output
• output 'eye' monitor (OEM ) with large sig nal amplitude
and power down option
• carrier detect with programmable threshold level
• power savings mode (output serial clock disable)
• 44 pin MQFP
APPLICATIONS
Cable equalization plus clock and data recovery for all high
speed serial digital interface applications involving SMPTE
259M and other data standards.
DESCRIPTION
The GS9025 provides automatic cable equalization and
high performance clock and data recovery for serial digital
signals. The GS9025 receives either single-ended or
differential serial digital data and outputs differential clock
and retimed data signals at PECL levels (800mV). The onboard cable equalizer provides up to 40dB of gain at
200MHz which typically results in equalization of greater
than 350m of high quality cable at 270Mb/s.
The GS9025 operates in either auto or manual data rate
selection mode. In both modes, the GS9025 requires only
one external resistor to set the VCO centre frequency and
provides adjustment free operation.
The GS9025 has dedicated pins to indicate signal
strength/carrier detect, LOCK and data rate. Optional
external resistors allow the carrier detect threshold level to
be customized to the user's requirement. In addition, the
GS9025 provides an 'Output Eye Monitor' (OEM) which
allows the verification of signal integrity after equalization,
prior to reslicing. The serial clock outputs can be disabled
to reduce power consumption. The GS9025 operates from a
single +5 or -5 volt supply.
BLOCK DIAGRAM
ORDERING INFORMATION
PART NUMBER PACKAGE TEMPERATURE
GS9025-CQM 44 pin MQFP Tray 0°C to 70°C
GS9025-CTM 44 pin MQFP Tape 0°C to 70°C
LF+ LFS LF- CBG R
VCO
CARRIER DETECT
PHASELOCK
HARMONIC
FREQUENCY
ACQUISITION
VCO
DIVISION
3 BIT
COUNTER
LOCK
SDO
SDO
CLK_EN
SCO
SCO
SMPTE
AUTO/MAN
SS0
SS1
SS2
MUTE
COSC
A/D
PHASE
DETECTOR
DECODER
LOGIC
ANALOG
DIGITAL
MUX
DDI
+
-
DDI
SDI
SDI
OEM
AGC CAP CD_ADJ
AUTO EQ
CONTROL
EYE
MONITOR
VARIABLE
GAIN EQ
STAGE
CHARGE
PUMP
+
-
+ -
SSI/CD
GENLINX
™
II
GS9025
Serial Digital Receiver
GENNUM CORPORATION
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GS9025
ABSOLUTE MAXIMUM RATINGS
PARAMETER VALUE
Supply Voltage (V
S
)5.5V
Input Voltage Range (any input) V
CC
+0.5 to VEE-0.5V
Operating Temperature Range 0°C ≤ T
A
≤ 70°C
Storage Temperature Range -65°C ≤ T
S
≤ 150°C
Lead Temperature (soldering, 10 sec) 260°C
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0v, VEE = 0V, TA = 0°C to 70°C unless otherwise shown.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
TEST
LEVEL
Supply Voltage V
CC
4.75 5.0 5.25 V 1
Supply Current
Ι
S
CLK_EN = 0 - 115 - mA 1
CLK_EN = 1 - 125 - mA 1
CLK_EN = 0,
OEM active
- 135 - mA 1
CLK_EN = 1,
OEM active
- 145 - mA 1
SDI/SDI
Common Mode
Volta ge
-2.5-V 1
DDI/DDI
Common
Mode Input Voltage
Range
VEE+(V
DIFF
/2) 0.4 to 4.6 VCC-(V
DIFF
/2) V 1 1
DDI/DDI
Differential
Drive
200 800 2000 mV 1
AGC+/AGC- Common
Mode Voltage
-2.7-V 1
OEM Bias Potential - 4.5 - V
SSI/CD Output Current V
SSI/CD
= 2.4V - +120 - µA 3
V
SSI/CD
= 0.4V (Muted) - -1.0 - mA
AUTO/MAN
,
SMPTE,
SS[2:0] Input
Volta ge
High 2.0 - - V 3 1
Low - - 0.8 V
CLK_EN Input
Volta ge
High 2.5 - - V 1
Low - - 0.8 V
LOCK Output Sink
Current
500 - - µA 4 1
SS[2:0] Output
Volta ge
High 4.4 4.7 - V 3 1
Low - 0.2 0.4 V
SS[2:0] Source Current Auto Mode 180 300 - µA 3 1
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GS9025
Fig. 1 Test Setup for Figures 6 - 11
SS[2:0] Sink Current Auto Mode 0.6 1 - mA 3 1
SS[2:0] Source Current Manual Mode - - 0 µA 3 1
SS[2:0] Sink Current Manual Mode - 0.8 5 µA 3 1
NOTES
1. V
DIFF
is the differential input signal swing.
2. See DESCRIPTION.
3. Pins SS[2:0] are outputs in AUTO mode and inputs in MANUAL mode.
4. LOCK is an open collector output and requires an external pullup resistor.
TEST LEVELS
1. 100% tested at 25°C.
2. Guaranteed by design.
3. Inferred or correlated value.
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, VEE = 0V, TA = 0°C to 70°C unless otherwise shown. RLF = 1kΩ, C
LF1
= 15nF, C
LF2
= 5.6pF
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
TEST
LEVELS
Data Rate 143 - 540 Mb/s 1
Maximum Equalizer Gain at 200MHz - 40 - dB
Additive Jitter t
J
270Mb/s, 300m - 300 - ps p-p see Figs
7-11
1
540Mb/s, 100m - 275 - ps p-p
Jitter Transfer Function
Peaking
--0.1dB 2
Frequency Drift when PLL
loses lock
-±15 % 2
Lock Time Synchronous
Switch
t
SWITCH
< 0.5µs,
270Mb/s
-1- µs 1 2
0.5µs<t
SWITCH
<10ms - 1 - ms
t
SWITCH
> 10ms - 4 - ms
Lock Time Asynchronous
Switch
-10- ms 2 2
SDO
/SDO, SCO/SCO Output
Signal Swing
75Ω DC Load 600 800 1000 mVp-p 3 1
SDO to SCO Synchronization -200 0 200 ps 2
SDO
/SDO, SCO/SCO Rise &
Fall Times
20 - 80%, TA =25°C 200 300 400 ps 2
NOTES
1. Synchronous switching refers to switching the input data from one source to another
source which is at the same data rate (ie: line 10 switching for component NTSC).
2. Asynchronous switching refers to switching the input data from one source to another
source which is at a different data rate.
3. Assuming 75Ω pullup resistors on SDO
/SDO and SCO/SCO.
TEST LEVELS
1. 100% tested at 25°C.
2. Guaranteed by design.
3. Inferred or correlated value.
4. Evaluated using test setup Figure 1.
DC ELECTRICAL CHARACTERISTICS (Continued)
VCC = 5.0v, VEE = 0V, TA = 0°C to 70°C unless otherwise shown.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
TEST
LEVEL
EB9025
BOARD
GS9028
CABLE
DRIVER
TEKTRONIX
GigaBERT
1400
ANALYZER
TEKTRONIX
GigaBERT
1400
TRANSMITTER
BELDEN 8281
CABLE
DATA
DATA
CLOCK
TRIGGER
GENNUM CORPORATION
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GS9025
PIN CONNECTIONS
PIN DESCRIPTIONS
NUMBER SYMBOL TYPE DESCRIPTION
1, 2 DDI/DDI
I Digital data inputs (Differential ECL/PECL).
3, 44 V
CC
_75 I Power supply connection for internal 75Ω pullup resistors connected to DDI/DDI.
4, 8, 13, 22, 35 V
CC
I Most positive power supply connection.
5, 9, 14, 18, 27,
30, 33, 34, 37
V
EE
I Most negative power supply connection.
6, 7 SDI/SDI
I Differential analog data inputs.
10 CD_ADJ I Carrier detect threshold adjust.
11, 12 AGC-, AGC+ I External AGC capacitor.
15 LF+ I Loop filter component connection.
16 LFS I Loop filter component connection.
17 LF- I Loop filter component connection.
19 R
VCO
_RTN I Frequency setting resistor return connection.
20 R
VCO
I Frequency setting resistor connection.
21 CBG I Internal bandgap voltage filter capacitor.
23, 24, 25 SS[2:0] I/O Data rate indication (auto mode) or data rate select (manual mode). TTL/CMOS
compatible I/O. In auto mode these pins can be left unconnected.
26 AUTO/MAN
I Auto or manual mode select. TTL/CMOS compatible input.
DDI
DDI
V
CC
_75
V
CC
V
EE
SDI
SDI
V
CC
V
EE
CD_ADJ
AGC-
SDO
SDO
V
EE
SCO
SCO
V
EE
AUTO/MAN
SS0
SS1
SS2
GS9025
TOP VIEW
AGC+
V
CC
V
EE
LF+
LFS
LF-
V
EE
R
VCO
_RTN
R
VCO
CBG
V
CC
V
CC
_75
OEM
SMPTE
A/D
SSI/CD
LOCK
COSC
V
EE
CLK_EN
V
CC
V
EE
V
EE
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34
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GS9025
28, 29 SCO/SCO O Serial clock output. SCO/SCO are differential current mode outputs and require
external 75Ω pullup resistors.
31, 32 SDO
/SDO O Equalized and reclocked serial digital data outputs. SDO/SDO are differential current
mode outputs and require external 75Ω pullup resistors.
36 CLK_EN I Clock enable. When HIGH, the serial clock outputs are enabled.
38 COSC I Timing control capacitor for internal system clock.
39 LOCK O Lock indication. When HIGH, the GS9025 is locked. LOCK is an open collector output
and requires an external 10kΩ pullup resistor.
40 SSI/CD O Signal strength indicator/Carrier detect.
41 A/D
I Analog/Digital select.
42 SMPTE I SMPTE/Other data rate select. TTL/CMOS compatible input.
43 OEM O Output ‘Eye’ monitor. OEM is a single ended current mode output and requires an
external 50Ω pullup resistor.
PIN DESCRIPTIONS (Continued)
NUMBER SYMBOL TYPE DESCRIPTION
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