Gennum Corporation GF9102ACTM, GF9102ACPM Datasheet



MultiGENGEN

™

GF9102A

Decimating/Interpolating Digital Filter

DATA SHEET

FEATURES

• improved performance over TMC2242 in applications
not requiring 1:1 low pass filtering

• low power (60mA typical at ƒ = 20MHz)

• 40 MHz maximum clock rate

• single device exceeds CCIR 601 lowpass filter
requirements

• true unity gain (0.0 dB) at DC

• reduced output ringing with constant input in
interpolation mode

• built-in TRS code protection

• 12 bit inputs and 16 bit outputs in 2's complement
signed or unsigned formats

• user-selectable 8 to 16 bit output rounding

• can also be operated as a 9 or 21 tap chroma
bandpass filter under user control

• single +5 V power supply

• three state outputs

APPLICATIONS

• CCIR 601-compliant oversampling video A/D and
D/A conversion

• 2:1 interpolation and decimation

• 4:2:2 to 4:4:4 format conversion

• Chroma bandpass filtering

ORDERING INFORMATION

Part Number Package Type Temperature Range

GF9102ACPM 44 Pin PLCC 0° to 70° C
GF9102ACTM 44 Pin PLCC Tape 0° to 70° C

DEVICE DESCRIPTION

The GF9102A is a linear phase FIR digital filter that is usable
in a variety of video signal processing applications. The device
contains three separate fixed coefficient filters and can be
operated in three basic modes: 53 tap low pass filter, 9 tap
chroma bandpass filter or 21 tap chroma bandpass filter.

In the 53 tap low pass filter mode, the GF9102A can replace the
TMC2242 in all applications, except those requiring 1:1 low
pass filtering, for improved performance and full CCIR 601
compatibility. Specific improvements include true unity gain at
DC, 12.4 dB attenuation at ƒs/4 with a single device, reduced
output ringing with constant input in interpolate mode, support
for signed and unsigned data formats, rounding to 10 and 8 bit
CCIR 601 data formats, masking of serial digital TRS codes in
the data stream, and elimination of the non-saturated-type
overflow condition. The device can be operated in both
TMC2242 compatible modes and in GF9102A enhanced
modes.

When used as a decimating post-filter with a double speed
oversampling analog-digital converter, the device greatly
reduces the cost and complexity of the associated analog
anti-aliasing pre-filter. In a similar fashion, when used as an
interpolating pre-filter with a double speed oversampling digital­analog converter, the GF9102A simplifies the analog
reconstruction post-filter. The GF9102A also exceeds the
requirements for conversion between 4:2:2 and 4:4:4 signal
formats.

For chroma filtering applications, the GF9102A can be operated
as a 9 or 21 tap bandpass filter by selecting the appropriate
operating mode.

The GF9102A is packaged in a 44 pin PLCC and is pin
compatible with the TMC2242. The device operates with a
single +5 V supply.

CLK



DATA IN

SI

11..0

Revision Date: February 1996

GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. [phone] fax: [phone]

Gennum Japan Corporation: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan tel. [phone] fax [phone]

PROCESSING

DEC

TIMING CONTROLS

INPUT

UNIT

SYNC

INT

BPF1

BPF2

53 TAP LPF

FUNCTIONAL BLOCK DIAGRAM

RND

2..0

OUTPUT FORMAT

M
U

X

TCO

OUTPUT

PROCESSING

UNIT

SO

3..0


DATA OUT

OE

Document No. 521 - 26 - 02

SO

15..0

PIN DESCRIPTION

SYMBOL PIN NO. TYPE DESCRIPTION

CLK 42 I System Clock. TTL input. All timing specifications are referenced to the rising edge of clock.

SYNC 43 I Data Synchronization. TTL input with internal pull-up. This input is used to synchronize the

incoming data with the GF9102A by holding SYNC high on clock N and low on clock N+1 when
the first data word is presented to the input SI
resynchronization is desired, or it may be clocked at half the clock rate.

. SYNC may be held low until

11..0

SI

40, 37, 36, 35, I Input Data Port. TTL inputs with internal pull-downs. Data is presented to this registered 12-bit

11..0

34, 33, 32, 31, data input port. This port can be programmed as two’s complement signed or unsigned binary

30, 27, 26, 25 format. See the following section on input data format. Data is latched internally on every clock in

decimate mode, and on every other clock in interpolate mode. SI11 is the MSB.

TCO 2 I

Two’s Complement Output Format Control. TTL input with internal pull-down. When TCO is high,
output data is presented in two’s complement format. When TCO is low, the output is inverted

INT 44 I

offset binary, obtained by inverting bits SO

Interpolate. Active low TTL input with internal pull-up. When the interpolate control is low, data

through SO0, leaving SO15 unchanged.

14

is input at full clock speed and the chip inserts zeros between samples, padding the input to
match the output rate. The GF9102A then interpolates between these alternate input data points to
achieve full output data rate.

DEC 1 I Decimate. Active low TTL input with internal pull-down. When the decimate control is low, the

output register is driven at half system clock speed, decimating the output data stream. When
DEC and INT are low, the GF9102A will be programmed as a 21 tap or 9 tap bandpass filter
depending on the state of the SYNC input. See Operation Mode Control below for more detail.

RND

2..0

22, 23, 24 I

Output Rounding Control. TTL inputs with internal pull-down. These pins set the position of the
effective least significant bit of the output port by adding a rounding bit to the next lower internal bit
and zeroing all outputs below the rounding bit. Additional rounding functions are added with the
SO1 control input. See Table 6.

SO

15..0

4, 5, 6, 7, O

8, 9, 10, 11,

14, 15, 16, 17,

18, 19, 20, 21

SO

18, 19, 20, 21 I/O

3..0

OE 3 I

VDD 13, 29, 38

GND 12, 28, 39, 41

521 - 26 - 02

Output Data Port. TTL outputs (SO

are bi-directional pins with an internal pull-down). The

3..0

filtered result is available at this registered 16-bit output port, half LSB rounded as determined by
the rounding control word RND

. SO15 is the MSB. The SO

2..0

control inputs enable additional

3..0

formatting and rounding features as described below.

Output Data Port. TTL bi-directional pins with internal pull-down. The SO0 control input enables
the unsigned input and output format. The SO1 control input enables 8-bit rounding or CCIR 601
8-bit and 10-bit modes of operation. SO

are reserved for future functions.

3..2

Output Enable. Active low TTL input with internal pull-up. When this asynchronous input is high,
the output data port is in the high impedance state.

+5 V ± 5% power supply.

Ground

2

SO

SO

SO

SO

13

6 5 4 3 2 1 44 43 42 41 40

12

11

7 



8 

15

14

TCOSO

INT

DECOE

SI

GNDCLKSYNC

11

39

38 

GND

V

DD

SO

SO

SO

GND

V

SO

SO

SO

SO

DD

10

9

8

9 

10 

11 

GF9102A

12 

13 

7

6

5

4

14 

15 

16 

17

18 19 20 21 22 23 24 25 26 27 28



SO

SO

3

SO

2

1

TOP VIEW

RND

SO

0

RND

2

RND

1

0

SI

SI

0

SI

1

37 

36 

35 

34 

33 

32 

31 

30 

29



GND

2

SI

10

SI

9

SI

8

SI

7

SI

6

SI

5

SI

4

SI

3

V

DD

Fig. 1 GF9102A Pin Connections

LOWPASS FILTER CHARACTERISTICS at SAMPLING FREQUENCY OF 27MHz

PARAMETER VALUE

Filter Order 53
Pass Band Ripple < ± 0.02 dB

Pass Band Edge 5.75 MHz

DC Gain 0.00 dB

6.75 MHz (ƒs/4) Attenuation 12.4 dB

Minimum Stop Band Attenuation >58 dB

Stop Band Edge 7.4 MHz

3

521 - 26 - 02

02468101214

0123456

0

0

CCIR601

-10

-10

-20

-20

-30

-30

dB

-40

-40

-50

-50

-60

-60

MAGNITUDE (dB)

-70

-70

-80

-80
0 2 4 6 8 10 12 14

CCIR601

GF9102

GF9102A

FREQUENCY (MHz)

0.05

0.0375

0.025

0.0125

0

-0.0125

MAGNITUDE (dB)

-0.025

-0.0375

-0.05
0 1 2 3 4 5 6

CCIR601

CCIR601

CCIR601
GF9102

GF9102A

FREQUENCY (MHz)

Fig. 2 Frequency Response of the Decimation/Interpolation

Filter (Sampling at 27 MHz)

110
100

90
80
70
60
50
40
30

% FULL SCALE

20
10

0

-10

0 10 20 30 40 50 60 70 80

SAMPLE NUMBER

Fig. 4 Step Response of Decimation Filter

Fig. 3 Frequency Response of the Decimation/Interpolation

Filter Passband (Sampling at 27 MHz)

0

-20

-40

-60

-80

MAGNITUDE (dB) 21 TAP BPF

-100
0 1 2 3 4 5 6 7

21 TAP BPF

21 TAP BPF

9 TAP BPF

9 TAP BPF

FREQUENCY (MHz)

Fig. 5 Frequency Response of the Bandpass

Filter (Sampling at 14.31818 MHz)

6

-15

-36

-58

-79

MAGNITUDE (dB) 9 TAP BPF

-100

0

-1

-2

-3

-4

-5

-6

-7

-8

MAGNITUDE (dB) 21 TAP BPF

-9

21 TAP BPF

21 TAP BPF
9 TAP BPF

9 TAP BPF

-10

1.5 2 2.5 3 3.5 4 4.5 5 5.5

FREQUENCY (MHz)

Fig. 6 Frequency Response of the Bandpass

Filter Transition Band (Sampling at 14.31818 MHz)

521 - 26 - 02

6

0

5

4

3

-0.005

2

1

-0.01

0

-1

-2

MAGNITUDE (dB) 9 TAP BPF

-3

-4

-0.015

MAGNITUDE (dB) 21 TAP BPF

-0.02

2.579545 3.079545 3.579545 4.079545 4.579545

4

6.02

6.015

6.01

6.005

21 TAP BPF

21 TAP BPF

9 TAP BPF

9 TAP BPF

frequency (MHz)

6.00

FREQUENCY (MHz)

Fig. 7 Frequency Response of the Bandpass Filter

Passband (Sampling at 14.31818 MHz)

MAGNITUDE (dB) 9 TAP BPF