GEC Plessey Semiconductors NJ8821BA, NJ8821MA Datasheet

THIS DOCUMENT IS FOR MAINTENANCE
PURPOSES ONLY AND IS NOT
RECOMMENDED FOR NEW DESIGNS
NJ8821
NJ8821
FREQUENCY SYNTHESISER (MICROPROCESSOR INTERFACE)
WITH RESETTABLE COUNTERS
PROGRAM
ENABLE (PE)
OSC IN
OSC OUT
D0 D1 D2 D3
F
IN
V
DD
V
SS
LATCH 1 LATCH 2 LATCH 3
‘M’ COUNTER
(10 BITS)
CONTROL LOGIC
LATCH 4 LATCH 5
‘A’ COUNTER
(7 BITS)
FREQUENCY/
PHASE
DETECTOR
V
SS
PDA
PDB
LOCK DETECT (LD)
MODULUS CONTROL OUTPUT (MC)
RB CH
15 16 17
f
v
REFERENCE COUNTER
(11BITS)
LATCH 6 LATCH 7 LATCH 8
42
SAMPLE/HOLD
PHASE
DETECTOR
f
r
LATCH SELECT
LOGIC
DS0 DS1 DS2
14
7
8
9 10 11 12
4
6
5
TO
INTERNAL
LATCHES
DATA SELECT INPUTS
19 20
1
2
3
18
  
DATA
INPUTS
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VDD2V
SS
Input voltage Open drain output, pin 3 All other pins Storage temperature
Storage temperature
20·5V to 7V
7V
V
SS
20·3V to VDD10·3V
265°C to 1150°C
(DG package, NJ8821MA)
255°C to 1125°C
(DP and MP packages, NJ8821)
ORDERING INFORMATION
NJ8821 BA DP Plastic DIL Package NJ8821 BA MP Miniature Plastic DIL Package NJ8821 MA DG Ceramic DIL Package
T
he NJ8821 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance. It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold comparators, 10-bit programmable ‘M’ counter, 7-bit programmable ‘A’ counter and the necessary control and latch circuitry for accepting and latching the input data.
Data is presented as eight 4-bit words under external control
from a suitable microprocessor..
It is intended to be used in conjunction with a two-modulus prescaler such as the SP8710 series to produce a universal binary coded synthesiser.
The NJ8821 is available in Plastic DIL (DP) and Miniature Plastic DIL (MP) packages, both with operating temperature range of 230
°
C to 170°C. The NJ8821MA is available only in Ceramic DIL package with operating temperature range of 240°C to 185°C.
FEATURES
Low Power Consumption
Microprocessor Compatible
High Performance Sample and Hold Phase Detector
>10MHz Input Frequency
CH
RB
MC
DS2
DS1
DS0
PE
NC
D3
D2
PDA
PDB
LD
F
IN
V
SS
V
DD
OSC IN
OSC OUT
D0
D1
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
NJ8821
DS3278-1.3
Fig.1 Pin connections - top view
DP20, MP20
DG20
Loading...
+ 4 hidden pages