Universal Dummy Cell 3
Operator's Manual
Copyright 2005, Gamry Instruments, Inc. All rights reserved. Printed in the USA.
Revision 1.1
December 27, 2005
Copyrights and Trademarks
UDC3 Universal Dummy Cell 3 Operator’s Manual Copyright 2003-5 Gamry Instruments, Inc. All rights
reserved. Printed in the USA.
Gamry Framework Copyright 1989-2005 Gamry Instruments, Inc.
Universal Dummy Cell, Universal Dummy Cell 3, UDC3, PCI4,Reference 600, Gamry Framework,
DC105, EIS300, and Gamryare trademarks of Gamry Instruments, Inc.
No part of this document may be copied or reproduced in any form without the prior written consent of
Gamry Instruments, Inc.
i
ii
--Introduction--
Introduction
The Universal Dummy Cell 3 (UDC 32) is a printed circuit board used for calibration and troubleshooting of a
Gamry potentiostat. It has 3 “test cells” equipped with terminals, arranged around the boarders of the printed
circuit board.
The terminals are marked with labels corresponding to the leads on a Gamry Cell Cable. The FAS2 has fewer
cell leads than a PCI4 or Reference 600, so some terminals will have no connection to an FAS2.
This document applies to the UDC 3, engineered to work with Gamry’s PCI4 family of potentiostats and the
newer Reference 600 Potentiostat. The UDC3 is clearly labeled with the text “Universal Dummy Cell 3”
written diagonally across its printed circuit card.
AC calibration of a Reference 600 Potentiostat should always be done using a UDC3. Stray capacitance on an
older UDC2 will cause significant phase errors at 1 MHz.
Calibration
The calibration circuit is a 2 k precision resistor (with some protection components). It is accurate to better
than 1 . Because potentiostats are not perfectly accurate, its value measured with a Gamry potentiostat is
typically between 1.994 k and 2.006 k.
Very early revision UDCs had a 100 resistor in the calibration circuit. PCI4 family potentiostats and the
Reference 600 require a 2 k resistor. 100 Universal Dummy Cells (shipped before May 2003) will not
calibrate a PCI4 family potentiostat or a Reference 600 to its full accuracy.
AC calibration of a Reference 600 Potentiostat should always be done using a UDC3. Stray capacitance on an
older UDC2 will cause significant phase errors at 1 MHz.
You can also use the calibration circuit to test for proper operation of your potentiostat. Use any technique.
The current at any potential should be given by Ohm’s law, I = E/R. At 1 Volt, the current should be 500 A.
More specifically, we recommend you use one of these techniques if you have concerns about your
potentiostat’s health:
DC105 Polarization Resistance
EIS300 Potentiostatic EIS
PHE200 Cyclic Voltammetry
EIS
The EIS Dummy Cell is a Randle’s cell (as described in Gamry’s Help system). If you have a license for
Gamry’s EIS300 Electrochemical Impedance Spectroscopy software, you can record this cell’s EIS spectrum to
check your system’s EIS operation.
Figure 1, a circuit diagram of the EIS cell is shown below. Figure 2 is a typical spectrum of the cell in Bode
format.
A visual examination of the spectrum is usually sufficient to determine if your EIS system is working. Most
system malfunctions totally prevent recording of the spectrum or cause gross errors that dramatically change the
shape of the curve.
1
--EIS--
Figure 1
EIS Dummy Cell Schematic Diagram
1 uF
10%
3.01 k
200
47
1%
WORKING
WORKING_SENSE
1%
5%
REFERENCE
COUNTER
COUNTER_SENSE
Figure 2
Bode Plot of EIS Dummy Cell Spectrum
If you want a numerical confirmation of the system’s performance, fit the dummy cell’s spectrum to the
Randle’s model in the EChem Analyst. The calculated values should be between:
Rp 2.95 k -- and -- 3.07 k
Ru 196 -- and -- 204
Cf 0.90 F – and – 1.10 F
2
--DC Corrosion--
DC Corrosion
The UDC 2’s DC Corrosion circuit simulates current versus voltage behavior of an ideal corrosion cell. A
voltage scan on this cell, with current range auto-ranging enabled, is particularly useful when testing
potentiostat operation because almost all current ranges will be used during the scan.
Figure 3
DC Corrosion Dummy Cell Schematic Diagram
SR106
SR106
1 M
1%
270 uF
100
1%
1 k
5%
270 uF
WORKING
REFERENCE
COUNTER
WORKING_SENSE
COUNTER_SENSE
The circuit diagram of the DC Corrosion cell is shown in Figure 3.
Current through a Schottky diode is proportional to the logarithm of the applied voltage, modeling a kinetically
controlled electrochemical process. Unfortunately a Schottky diode based dummy cell does not model
corrosion perfectly. A corroding electrode has a non-zero I
(corrosion current) while I
corr
is essentially zero for
corr
this test cell.
You must have a license for Gamry’s DC105 software to fully utilize this cell. You can run the CHECK105
script provided with the DC105 application.
If you want to test your system using a standard DC105 technique, we recommend using the Tafel technique.
Your scan should be slow (0.50 mV/sec) and should use a Sample Period of 0.5 second per point.
This cell gives acceptable log I versus E linearity for potentials 175 mV of E
interrupt iR compensation during the scan expands the linear region to 300 mV but adds noise to the data.
(zero volts on this cell). Current
corr
3
--DC Corrosion--
A Tafel fit of a typical scan (both with and without iR compensation) can be seen below. Both the anodic and
cathodic Tafel constants were calculated to be between 60 and 70 mV per decade. The calculated corrosion
rate is quite small (about 10-3 mm/year) because of the very small I
(about 10
corr
-10
Amps/cm2).
Note that the Schottky diodes used to produce the linear log current versus potential behavior have a fairly high
variability. Both the current at zero volts and the slope of the log current versus potential plot vary significantly
diode to diode.
For this reason, you should use the results obtained with the DC Corrosion Test cell with some caution. The
shape of the Tafel curve is important, but the values obtained in a Tafel fit are not.
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