FUJITSU SIEMENS V6535 Schematics

D45/D46 Block Diagram

4 4

DDR2 socket

DDR2 socket

3 3

Headphone Out

MIC In

29

INT.MIC

29

INT.SPKR

2 2

RJ11

A

CLK GEN.

ICS9LPRS365YGLFT-GP

RTM875T-606-VD-GRT

12,13

12,13

Codec

ALC269

MDC Card

3

800/667MHz

800/667MHz

29

MODEM

22

AZALIA

B

Mobile CPU

Penryn

HOST BUS

Cantiga

AGTL+ CPU I/F
DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

71.CNTIG.00U

X4 DMI
400MHz

ICH9M

6 PCIe ports
PCI/PCI BRIDGE
ACPI 1.1
4 SATA
12 USB

High Definition Audio
LPC I/F
Serial Peripheral I/F

71.ICH9M.00U

SATA

SATA

4, 5

667/800/1066MHz@1.05V

PCI-EG

6,7,8,9,10,11

C-Link0

PCI-E/USB 2.0

PCI-E

PCI-E

PCI-E /USB 2.0

PCI-E /USB 2.0

USB0

SATA

16,17,18,19

USB

LPC BUS

BlueTooth

G7921

C

Project code: 91.4J001.001--D45

91.4K001.001--D46
PCB P/N : 07248
REVISION : SA

20

ATI

M82M

VRAMx4

USB Cardreader

256MB

41~47

New card

JMICRO380

LAN

TRL8111C

22

25

23

KBC

Winbond

WPC773

LVDS

RGB CRT

S-Video

G577

MS/MS Pro/

26

MMC/SD

1394

24

TXFM

Mini Card

a/b/g/n

Kedron

Mini Card

UMTS(3G)

SPI I/F

28

WXGA/SXGA+
15"LCD

4 in 1

RJ45

25

25

D

CRT

S-Video

25

26

24

BIOS

4M byte

E

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

34

OUTPUTS

5V_S5(5A)
3D3V_S5(5A)

SYSTEM DC/DC

TPS51124

PCB STACKUP

TOP
VCC

S
S

GND

14

BOTTOM

13

13

LPC

DEBUG

28

CONN.

27

INPUTS OUTPUTS

DCBATOUT

RT9026

1D8V_S3

G9131

3D3V_S0 2D5V_S0

APL5912

1D8V_S3

NB DC/DC

DCBATOUT

CHARGER

DCBATOUT

INPUTS

DCBATOUT

1D05V_M(11A)
1D8V_S3(10A)

ISL6263A

BQ24745

CPU DC/DC

ISL6266A

OUTPUTS

VCC_CORE_S0

0~1.3V 47A

36

35

DDR_VREF_S0
(1.5A)

DDR_VREF_S3

35

(300mA)

35

1D5V_S0

37

OUTPUTSINPUTS

GFX_CORE

38

OUTPUTSINPUTS
CHG_PWR

18V 4.0A

UP+5V

5V 100mA

33

<Core Design>

<Core Design>

1 1

A

HDD

21

CDROM

21

eSATA
/USB

B

USB
3 Port

22

CAMERA

22 14

C

Touch
Pad

INT.
KB

27 27

D

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

D45/D46

D45/D46

D45/D46

147Friday, March 14, 2008

147Friday, March 14, 2008

147Friday, March 14, 2008

of

of

of

E

PD

PD

PD

A

ICH9M Functional Strap Definitions

Usage/When Sampled

XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK

PCIE config1 bit0,
Rising Edge of PWROK.

PCIE config2 bit2,
Rising Edge of PWROK.

Reserved
ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block
Swap Override.
Rising Edge of PWROK.

Boot BIOS Destination
Selection 0:1.
Rising Edge of PWROK.

Integrated TPM Enable,
Rising Edge of CLPWROK

DMI Termination Voltage,
Rising Edge of PWROK.

PCI Express Lane
Reversal. Rising Edge
of PWROK.

No Reboot.
Rising Edge of PWROK.

XOR Chain Entrance.
Rising Edge of PWROK.

Flash Descriptor
Security Override Strap
Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)

This signal should not be pulled high.
ESI compatible mode is for server platforms only.

This signal should not be pulled low for desttop
and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled.
Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

The signal is required to be low for desktop
applications and required to be high for
mobile applications.

Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the
"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

This signal should not be pull low unless using
XOR Chain testing.

Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.

4 4

3 3

Signal

HDA_SDOUT

HDA_SYNC

GNT2#/
GPIO53

GPIO20
GNT1#/

GPIO51

GNT3#/
GPIO55

GNT0#:
SPI_CS1#/
GPIO58

SPI_MOSI

GPIO49

SATALED#

SPKR

TP3

GPIO33/
HDA_DOCK
_EN#

ICH9 EDS 642879 Rev.1.5

Comment

2 2

PCI Routing

G:CARDBUS

AD22TI7412

B:1394
F:Flash Media
G:SD Host

1 1

PCIE Routing

MiniCard WLAN

LANE2
LANE3 NewCard WLAN

page 17

INT REQ

0 0

GNTIDSEL

USB Table

USB

Pair

Device

Combo(ESATA/USB)

0

NC

1

USB2

2

USB4

3

USB3

4

BLUETOOTH

5

WEBCAM6
FT

7
8

MINICARD

9 NEW1

A

B

SMBus

B

page 92

KBC

ICH9M

C

ICH9M Integrated Pull-up
and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0]
CL_DATA[1:0]
CL_RST0#
DPRSLPVR/GPIO16
ENERGY_DETECT
HDA_BIT_CLK
HDA_DOCK_EN#/GPIO33
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20]
GPIO[49]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI
SPI_MISO
SPKR
TACH_[3:0]
TP[3]
USB[11:0][P,N]

SMBC_G792

BAT_SCL

SMB_CLK

SMBC_ICH

Thermal

BATTERY

The pull-up or pull-down active when configured for native
GLAN_DOCK# functionality and determined by LAN controller

MXM

LAN

CK505

DDR

C

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K

PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 15K

Cantiga chipset and ICH9M I/O controller
Hub strapping configuration

D

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]

CFG5
CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

SDVO_CTRLDATA

L_DDC_DATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency
Select

Reserved

DMI x2 Select
iTPM Host

Interface

Intel Management
engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIe

SDVO Present

Local Flat Panel
(LFP) Present

UMA

UMA

UMA

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)

Configuration

000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

1=The iTPM Host Interface is disalbed(default)

0 = Transport Layer Security (TLS) cipher
suite with no confidentiality

1 = TLS cipher suite with
confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane
Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled
0 = Normal operation(Default):

Lane Numbered in Order

0 = Only Digital Display Port
or PCIE is operational (Default)

1 =Digital display Port and PCIe are
operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled

Reference

Reference

Reference

D45/D46

D45/D46

D45/D46

D

E

page 218

(Default)

(Default)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

247Friday, March 14, 2008

of

247Friday, March 14, 2008

of

247Friday, March 14, 2008

E

PD

PD

PD

3D3V_S0

1 2

PD

A

3D3V_48MPWR_S0 3D3V_CLKPLL_S0

R582

R582
0R0603-PAD

0R0603-PAD

12

12

C721

C721

C730

C730

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

EC110

DY

DY

EC110

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

C704

C704

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C400

C400
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

B

12

C702

C702

C

3D3V_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C724

C724

SCD1U16V2ZY-2GP

12

C718

C718

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C722

C722

R2820R0603-PADR2820R0603-PAD

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C399

C399

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

12

C393

C393
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

12

C719

C719

D

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C723

C723

SCD1U16V2ZY-2GP

3D3V_CLKGEN_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C703

C703

1 2

12

C701

C701

E

R2790R0603-PADR2790R0603-PAD

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_S0

12

C397

C397

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

4 4

3D3V_S0

DY

DY

VGA_27M_PH

VGA_27M_PH

R296

R296
10KR2J-3-GP

10KR2J-3-GP

1 2

R289

R289
10KR2J-3-GP

10KR2J-3-GP

1 2

3 3

2 2

ICS9LPRS365YGLFT setting table

PIN NAME DESCRIPTION

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME
PCI3

1 1

PCI4/27M_SEL
PCI_F5/ITP_EN

SRCT3/CR#_C

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

DY

R294

R294
10KR2J-3-GP

10KR2J-3-GP

1 2

UMA

UMA

1 2

A

DY

R292

R292
10KR2J-3-GP

10KR2J-3-GP

1 2

DY

DY

R288

R288
10KR2J-3-GP

10KR2J-3-GP

1 2

Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

0 =SRC8/SRC8#
1 = ITP/ITP#

Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair

DY

DY

R287

R287
10KR2J-3-GP

10KR2J-3-GP

R286

R286
10KR2J-3-GP

10KR2J-3-GP

1 2

PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5

R284

R284
10KR2J-3-GP

10KR2J-3-GP

1 2

CL=20pF±0.2pF

SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

C382

C382

1 2

C381

C381

1 2

EC51

EC51

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

GEN_XTAL_IN

12

X4

X4

X-14D31818M-35GP

X-14D31818M-35GP

GEN_XTAL_OUT_R

12

12

EC52

EC52

EC53

EC53

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

CLK_MCH_OE#7

PCLK_FWH27
PCLK_KBC28
PCLK_ICH17

R268 10MR2J-L-GP

R268 10MR2J-L-GP

1 2

CLK48_ICH17

CPU_SEL04,7

CPU_SEL14,7
CPU_SEL24,7

12

12

EC54

EC54

EC49

EC49

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

B

DY

DY

CLK_ICH1417

PCLK_FWH
PCLK_KBC
PCLK_ICH
CLK48_ICH
CLK_ICH14

12

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

R283 475R2F-L1-GP

R283 475R2F-L1-GP

R291

R291
R293

R293
R295

R295

12

R267

R267
0R0402-PAD

0R0402-PAD

R298 33R2J-2-GPR298 33R2J-2-GP

R273

R273
R274

R274

PD

CLK_PCIE_MINI2 CLK_PCIE_MINI2#

PIN NAME DESCRIPTION

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

3D3V_CLKGEN_S0
3D3V_48MPWR_S0

3D3V_CLKPLL_S0

DY

DY

1 2

TP127TP127
TP68TP68

22R2J-2-GP

22R2J-2-GP
22R2J-2-GP

22R2J-2-GP
22R2J-2-GP

22R2J-2-GP

GEN_XTAL_OUT

R299

R299
2K2R2J-2-GP

2K2R2J-2-GP

10KR2J-3-GP

10KR2J-3-GP
33R2J-2-GP

33R2J-2-GP

12

DY

DY

U18

U18

2

VDDPCI

9

VDD48

16

VDDPLL3

61

VDDREF

39

VDDSRC

55

VDDCPU

12

VDD96_IO

20

VDDPLL3_IO

26

VDDSRC_IO

36

VDDSRC_IO

45

VDDSRC_IO

49

PCLKCLK0
PCLKCLK1
PCLKCLK2

C372

C372

PCLKCLK3
PCLKCLK4
PCLKCLK5

CLK48

CPU_SEL2_R

CPU_SEL2_R

12

C375

DY

DY

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

C375

PD

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

Byte 5, bit 1
0 = SRC3 enabled (default)
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair

Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6

Byte 6, bit 6
0 = SRC7 enabled (default)
1= CR#_F controls SRC8

Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9

Byte 6, bit 4
0 = SRC11 enabled (default)
1= CR#_H controls SRC10

C

12
12
12

12
12

12
12

VDDCPU_IO

1

PCI0/CR#_A

3

PCI1/CR#_B

4

PCI2/TME

5

PCI3

6

PCI4/27_SELECT

7

PCI_F5/ITP_EN

59

X2

60

X1

10

USB_48MHZ/FSLA

57

FSLB/TEST_MODE

62

REF0/FSLC/TEST_SEL

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

42

GNDSRC

52

GNDCPU

58

GNDREF

29

GNDSRC

ICS9LPRS365YGLFT-GP

ICS9LPRS365YGLFT-GP

71.09365.00W

71.09365.00W

SRCT0/DOTT_96

SRCC0/DOTC_96

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

SRCT2/SATAT

SRCC2/SATAC

SRCT3/CR#_C
SRCC3/CR#_D

CPU_STOP#

SRCT7/CR#_F

SRCC7/CR#_E

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

CK_PWRGD/PD#

SRCC11/CR#_G

SRCT11/CR#_H

DREFSSCLK_1

DREFSSCLK#_1 OSC_SPREAD

SDATA

SCLK

SRCT4
SRCC4

PCI_STOP#

SRCT6
SRCC6

CPUT1_F
CPUC1_F

CPUT0
CPUC0

NC#48

SRCT9
SRCC9

SRCT10
SRCC10

63
64

13
14

17
18

21
22

24
25

27
28

38
37

41
40

44
43

47
46

51
50

54
53

56
48

30
31

32
33

34
35

SB

VGA_27MSS

VGA_27MSS

VGA_27M

VGA_27M

1 2

SMBD_ICH 12,19

SMBC_ICH 12,19

DREFCLK_1
DREFCLK#_1

DREFSSCLK_1
DREFSSCLK#_1

CLK_PCIE_SATA_1

CLK_PCIE_SATA_1#

CLK_MCH_3GPLL_1

CLK_MCH_3GPLL_1#

CLK_PCIE_MINI_12

CLK_PCIE_MINI_12#

CLK_PCIE_ICH_1

CLK_PCIE_ICH_1#

CLK_PCIE_CARD_R
CLK_PCIE_CARD#_R

CLK_CPU_XDP_R
CLK_CPU_XDP#_R

CLK_MCH_BCLK_1

CLK_MCH_BCLK_1#

CLK_CPU_BCLK_1

CLK_CPU_BCLK_1#

CLK_PWRGD 17

1 2

CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

CLK_PCIE_PEG_1

CLK_PCIE_PEG_1#

R581 33R2J-2-GP

R581 33R2J-2-GP

1 2

VGA_XIN1

R580 33R2J-2-GP

R580 33R2J-2-GP

D

UMA

UMA

RN39

RN39

1

DY

DY

UMA

UMA

4

2 3
1

2 3
1

2 3
1

2 3
1

PM_STPPCI# 17
PM_STPCPU# 17

1
2 3

SB

1
2 3

1
2 3

1
2 3

1
2 3

R270

R270
10KR2J-3-GP

10KR2J-3-GP

2 3
1

2 3
1

2 3
1

VGA_XIN1 42

SEL2
FSC

1
0

SRN0J-6-GP

SRN0J-6-GP

23

RN40

RN40

SRN0J-6-GP

SRN0J-6-GP

4

RN41

RN41
SRN0J-6-GP

SRN0J-6-GP

4

RN42

RN42
SRN0J-6-GP

SRN0J-6-GP

4

RN43

RN43
SRN0J-6-GP

SRN0J-6-GP

4

RN35

RN35

4

SRN0J-6-GP

SRN0J-6-GP
RN60

RN60

4

SRN0J-6-GP

SRN0J-6-GP
RN34

RN34

4

SRN0J-6-GP

SRN0J-6-GP
RN33

RN33

4

SRN0J-6-GP

SRN0J-6-GP
RN32

RN32

4

SRN0J-6-GP

SRN0J-6-GP

RN44

RN44

SRN0J-6-GP

SRN0J-6-GP

4

RN38

RN38

SRN0J-6-GP

SRN0J-6-GP

4

RN36

RN36

VGA

VGA

SRN0J-6-GP

SRN0J-6-GP

4

OSC_SPREAD 42

SEL1
FSB

01
01

SEL0
FSA

0101

00 0

UMA

UMA

UMA

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Clock Generator

Clock Generator

Clock Generator

D45/D46

D45/D46

D45/D46

DREFCLK 7
DREFCLK# 7

DREFSSCLK 7
DREFSSCLK# 7

CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

CLK_PCIE_MINI1 25
CLK_PCIE_MINI1# 25

CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17

CLK_PCIE_CARD 26
CLK_PCIE_CARD# 26

CLK_PCIE_MINI2 25
CLK_PCIE_MINI2# 25

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

3D3V_S0

CLK_PCIE_NEW 25
CLK_PCIE_NEW# 25

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23

CLK_PCIE_PEG 41
CLK_PCIE_PEG# 41

CPU

100M
133M
166M

01

200M

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

347Tuesday, March 18, 2008

347Tuesday, March 18, 2008

347Tuesday, March 18, 2008

E

FSB

X
533M
667M
800M

1067M266M

PD

PD

of

of

of

PD

A

B

C

D

E

TP18TP18
TP17TP17
TP16TP16
TP13TP13
TP31TP31
TP29TP29
TP24TP24
TP30TP30
TP27TP27
TP22TP22

TP32TP32

R95

R95

12

0R2J-2-GP

0R2J-2-GP

H_A#[35..3]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_STPCLK#_R

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10

RSVD_CPU_11

1 OF 4

1 OF 4

U35A

U35A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

ADDR GROUP 0

ADDR GROUP 0

ADDR GROUP 1

ADDR GROUP 1

ICH

ICH

RESERVED

RESERVED

62.10079.001

62.10079.001

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL
THERMAL

THERMAL

THERMTRIP#

HCLK

HCLK

ADS#
BNR#
BPRI#

DEFER#

DRDY#

DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0#
RS1#
RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

TDO
TMS

TRST#

DBR#

PROCHOT#

THRMDA
THRMDC

BCLK0
BCLK1

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing

( No stub)

SB use 62.10053.401

XDP_TMS
XDP_TDI
XDP_BPM#5
XDP_TDO
H_CPURST#

XDP_DBRESET#

XDP_TCK
XDP_TRST#

R67

R67

1 2

R75

R75

1 2

R60

R60

1 2

R72 54D9R2F-L1-GP

R72 54D9R2F-L1-GP

1 2

DY

DY

R97 54D9R2F-L1-GP

R97 54D9R2F-L1-GP

1 2

DY

DY

R96

R96

1 2

DY

DY

R64

R64

1 2

R74

R74

1 2

All place within 2" to CPU

B

TP20TP20

H_ADS# 6
H_BNR# 6

H_BPRI# 6

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 16,27
H_LOCK# 6

H_CPURST# 6

H_TRDY# 6
H_HIT# 6

H_HITM# 6

TP3TP3
TP2TP2
TP4TP4
TP7TP7
TP6TP6
TP5TP5
TP8TP8
TP12TP12
TP11TP11
TP9TP9
TP10TP10
TP26TP26

CPU_PROCHOT#_R

H_THERMDA 20
H_THERMDC 20

R98

R98
0R0402-PAD

0R0402-PAD

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

54D9R2F-L1-GP

54D9R2F-L1-GP
54D9R2F-L1-GP

54D9R2F-L1-GP
54D9R2F-L1-GP

54D9R2F-L1-GP

150R2F-1-GP

150R2F-1-GP

54D9R2F-L1-GP

54D9R2F-L1-GP
54D9R2F-L1-GP

54D9R2F-L1-GP

12

1D05V_S0

3D3V_S0

1D05V_S0

12

R93

R93
56R2J-4-GP

56R2J-4-GP

H_RS#[2..0] 6

Place testpoint on
H_IERR# with a GND

0.1" away

TP25TP25

R92

R92

12

68R2-GP

68R2-GP

PM_THRMTRIP-A# 7,16

Layout Note:
"CPU_GTLREF0"

0.5" max length.

C

H_THERMDA

H_THERMDC

1D05V_S0

CPU_PROCHOT#_R 32

1D05V_S0

R386

R386
1KR2F-3-GP

1KR2F-3-GP

1 2
12

R387

R387

2KR2F-3-GP

2KR2F-3-GP

1 2

DY

DY

1KR2J-1-GP

1KR2J-1-GP

R99

R99

1 2

DY

DY

1KR2J-1-GP

1KR2J-1-GP

R411

R411

12

C471

C471

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C113

C113
SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

DY

DY

CPU_GTLREF0

12

DY

DY

C475

C475

CPU_SEL03,7
CPU_SEL13,7

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

CPU_SEL23,7

TEST1

TEST2

TEST4

U35B

U35B

H_D#0

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24

J24

J23
H22
F26
K22
H23

J26
H26
H25

N22
K25
P26
R23

L23
M24

L22
M23
P25
P23
P22
T24
R24

L25
T25
N25

L26
M26
N24

AD26

C23
D25
C24

AF26

AF1
A26

B22
B23
C21

D

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

BSEL0
BSEL1
BSEL2

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14

H_DSTBN#06
H_DSTBP#06
H_DINV#06

H_DSTBN#16
H_DSTBP#16
H_DINV#16

TP28TP28
TP78TP78

TP86TP86

Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals

H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

TEST1
TEST2

RSVD_CPU_12

TEST4
RSVD_CPU_13
RSVD_CPU_14

H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

2 OF 4

2 OF 4

D32#
D33#
D34#
D35#

DATA GRP0 DATA GRP1

DATA GRP0 DATA GRP1

D36#
D37#
D38#
D39#
D40#
D41#
D42#

DATA GRP2DATA GRP3

DATA GRP2DATA GRP3

D43#
D44#
D45#
D46#

D47#
DSTBN2#
DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63#
DSTBN3#
DSTBP3#

DINV3#
COMP0

MISC

MISC

COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

ZZZZ

ZZZZ

ZZZZ

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25
Y26
AA26
U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23
AE25
AF24
AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1
E5

B5
D24
D6
D7
AE6

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

CPU (1 of 2)

CPU (1 of 2)

CPU (1 of 2)

D45/D46

D45/D46

D45/D46

H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6

R404 27D4R2F-L1-GPR404 27D4R2F-L1-GP

1 2

R403 54D9R2F-L1-GPR403 54D9R2F-L1-GP

1 2

R79 27D4R2F-L1-GPR79 27D4R2F-L1-GP

1 2

R80 54D9R2F-L1-GPR80 54D9R2F-L1-GP

1 2

H_DPRSTP# 7,16,32
H_DPSLP# 16
H_DPWR# 6
H_PWRGD 16
H_CPUSLP# 6
PSI# 32

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

PD

PD

of

447Friday, March 14, 2008

of

447Friday, March 14, 2008

of

447Friday, March 14, 2008

PD

H_A#[35..3]6

4 4

H_ADSTB#06
H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#16

H_FERR#16

H_IGNNE#16

H_STPCLK#16

2 2

1 1

H_INTR16
H_NMI16
H_SMI#16

A

A

VCC_CORE

4 4

3 3

2 2

1 1

U35C

U35C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC

AA10

VCC

AA12

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA18

VCC

AA20

VCC

AB9

VCC

AC10

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB15

VCC

AB17

VCC

AB18

VCC

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

3 OF 4

3 OF 4

A

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCCA
VCCA

VCCSENSE

VSSSENSE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

VCC_CORE

CPU_G21
CPU_V6

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

C104

C104

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

R94 0R0402-PADR94 0R0402-PAD

1 2

1 2

R81 0R0402-PADR81 0R0402-PAD

12

C69

C69

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_VID[6..0] 32

VCC_CORE

12

12

R65

R65
100R2F-L1-GP-U

100R2F-L1-GP-U

R58

R58
100R2F-L1-GP-U

100R2F-L1-GP-U

B

VCC_CORE

12

C105

C105

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

C487

C487

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

DY

DY

12

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

VCC_SENSE 32

VSS_SENSE 32

12

C106

C106

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C491

C491

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

L21

L21

1 2

HCB1608KF121T30-GP

HCB1608KF121T30-GP

C501

C501
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C54

C54

VCC_CORE

C100

C100

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

DY

DY

1D05V_S0

layout note: "1D5V_VCCA_S0"
as short as possible

C486

C486

C91

C91

12

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

DY

DY

12

TC16

TC16

ST220U6D3VDM-15GP

ST220U6D3VDM-15GP

1D5V_VCCA_S0

12

C500

C500

Layout Note:

VCCSENSE and VSSSENSE lines
should be of equal length.

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

B

C

12

C55

C55

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C490

C490

C80

C80

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

1D5V_S0

C97

C97

C81

C81

12

12

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

1D05V_S0

12

12

12

C84

C84

C77

C77

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C

12

12

C102

C102

C82

C82

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C67

C67

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C78

C78

C99

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C99

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

D

4 OF 4

4 OF 4

U35D

U35D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

12

C94

C94

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

CPU (2 of 2)

CPU (2 of 2)

CPU (2 of 2)

D45/D46

D45/D46

D45/D46

E

P6

VSS

P21

VSS

P24

VSS

R2

VSS

R5

VSS

R22

VSS

R25

VSS

T1

VSS

T4

VSS

T23

VSS

T26

VSS

U3

VSS

U6

VSS

U21

VSS

U24

VSS

V2

VSS

V5

VSS

V22

VSS

V25

VSS

W1

VSS

W4

VSS

W23

VSS

W26

VSS

Y3

VSS

Y6

VSS

Y21

VSS

Y24

VSS

AA2

VSS

AA5

VSS

AA8

VSS

AA11

VSS

AA14

VSS

AA16

VSS

AA19

VSS

AA22

VSS

AA25

VSS

AB1

VSS

AB4

VSS

AB8

VSS

AB11

VSS

AB13

VSS

AB16

VSS

AB19

VSS

AB23

VSS

AB26

VSS

AC3

VSS

AC6

VSS

AC8

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC19

VSS

AC21

VSS

AC24

VSS

AD2

VSS

AD5

VSS

AD8

VSS

AD11

VSS

AD13

VSS

AD16

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE1

VSS

AE4

VSS

AE8

VSS

AE11

VSS

AE14

VSS

AE16

VSS

AE19

VSS

AE23

VSS

AE26

VSS

A2

VSS

AF6

VSS

AF8

VSS

AF11

VSS

AF13

VSS

AF16

VSS

AF19

VSS

AF21

VSS

A25

VSS

AF25

VSS

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

547Friday, March 14, 2008

547Friday, March 14, 2008

547Friday, March 14, 2008

E

TP77TP77

TP79TP79
TP33TP33

TP87TP87

of

of

of

PD

PD

PD

5

H_SWING

C519

C519

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_RCOMP

1D05V_S0

12

12

R438

R438
221R2F-2-GP

221R2F-2-GP

R437

R437
100R2F-L1-GP-U

100R2F-L1-GP-U

D D

H_SWING routing Trace width and
Spacing use 10 / 20 mil

H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )

12

C C

H_RCOMP routing Trace width and
Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

24D9R2F-L-GP

R138

R138

Place them near to the chip ( < 0.5")

B B

1D05V_S0

R445

R445
1KR2F-3-GP

1KR2F-3-GP

1 2

12

R442

R442
2KR2F-3-GP

2KR2F-3-GP

4

H_AVREF

12

C524

C524

H_D#[63..0]

H_CPURST#4
H_CPUSLP#4

R444

R444

1 2

0R0402-PAD

0R0402-PAD

PD

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_DVREF

AD14

AA13
AA11

AD11
AD10
AD13
AE12

AE14

AE11

AG2

M11

N12

P13

Y10
Y12
Y14

AA8

AA9

AE9
AA2
AD8
AA3
AD3
AD7

AF3
AC1
AE3
AC3

AE8
AD6

E11

A11
B11

F2

G8

F8

E6
G2
H6
H2

F6
D4
H3
M9

J1

J2

J6

P2

L2
R2
N9

L6
M5

J3
N2
R1
N5
N6

N8

L7

N10

M3

Y3

Y6

Y7
W2

Y9

C5

E3

C12

H_D#[63..0]4

DY

DY

3

U43A

U43A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

HOST

HOST

1 OF 10

1 OF 10

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

H_A#[35..3]

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4
H_HIT# 4
H_HITM# 4

H_LOCK# 4
H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

1

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

D45 SB use 71.CNTIG.H0U

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

A A

5

4

3

D46 SB use 71.CNTIG.G0U

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (1 of 6)

Cantiga (1 of 6)

Cantiga (1 of 6)

D45/D46

D45/D46

D45/D46

1

of

647Friday, March 14, 2008

of

647Friday, March 14, 2008

of

647Friday, March 14, 2008

PD

PD

PD

5

1D8V_S3

12

R452

R452
80D6R2F-L-GP

80D6R2F-L-GP

Cantiga

Cantiga

M_RCOMPP

D D

3D3V_S0

R196 2K21R2F-GP

R196 2K21R2F-GP

1 2

DY

DY

R183 4K02R2F-GP

R183 4K02R2F-GP

1 2

DY

DY

R177 4K02R2F-GP

R177 4K02R2F-GP

1 2

DY

DY

R156 2K21R2F-GP

R156 2K21R2F-GP

1 2

DY

DY

R155 2K21R2F-GP

R155 2K21R2F-GP

1 2

DY

DY

R185 2K21R2F-GP

R185 2K21R2F-GP

1 2

DY

DY

R168 2K21R2F-GP

R168 2K21R2F-GP

1 2

DY

DY

R167 2K21R2F-GP

R167 2K21R2F-GP

1 2

DY

DY

R178 2K21R2F-GP

R178 2K21R2F-GP

1 2

DY

DY

R166 2K21R2F-GP

R166 2K21R2F-GP

1 2

DY

DY

R173 2K21R2F-GP

R173 2K21R2F-GP

1 2

DY

DY

R158 2K21R2F-GP

R158 2K21R2F-GP

1 2

DY

DY

R159 2K21R2F-GP

3D3V_S0

3D3V_S0

4

SRN10KJ-5-GP

SRN10KJ-5-GP

4

SRN10KJ-5-GP

SRN10KJ-5-GP

UMA

UMA

R215

R215
10KR2J-3-GP

10KR2J-3-GP

R159 2K21R2F-GP

1 2

DY

DY

R160 2K21R2F-GP

R160 2K21R2F-GP

1 2

DY

DY

R157 2K21R2F-GP

R157 2K21R2F-GP

1 2

DY

DY

R169 2K21R2F-GP

R169 2K21R2F-GP

1 2

DY

DY

R180 2K21R2F-GP

R180 2K21R2F-GP

1 2

DY

DY

R179 2K21R2F-GP

R179 2K21R2F-GP

1 2

DY

DY

RN18

RN18

PM_EXTTS#0

1

PM_EXTTS#1

23

RN16

RN16

LCTLA_CLK

1

LCTLB_DATA

23

3D3V_S0

12

CLK_MCH_OE#

5

C C

B B

A A

12

Cantiga

Cantiga

CFG18
CFG19
CFG20

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

M_RCOMPN

R450

R450
80D6R2F-L-GP

80D6R2F-L-GP

PM_SYNC#17

H_DPRSTP#4,16,32

VGATE_PWRGD17,32

PWROK17,20

PLT_RST1#17,25,26,27,28

PM_THRMTRIP-A#4,16

PM_DPRSLPVR17,32

TP48TP48
TP49TP49
TP46TP46
TP51TP51

1 2

R440 0R0402-PADR440 0R0402-PAD

12

DY

DY

0R2J-2-GP

0R2J-2-GP

R234

R234

1 2

R232 0R0402-PADR232 0R0402-PAD

12

100R2J-2-GP

100R2J-2-GP

R152

R152

1 2

R164 0R0402-PADR164 0R0402-PAD

12

DY

DY

ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS

CPU_SEL03,4
CPU_SEL13,4
CPU_SEL23,4

H_DPRSTP#_MCH

PM_EXTTS#0
PM_EXTTS#1
PWROK_GD
RSTIN#
NB_THERMTRIP#
PM_DPRSLPVR

C166

C166
SC100P50V2JN-3GP

SC100P50V2JN-3GP

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

4

AH10
AH12
AH13

AL34
AK34
AN35
AM35

AY21

BG23
BF23
BH18
BF18

AT40
AT11

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43

4

U43B

U43B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13

K12

RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

RESERVED#AY21

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1
PWROK
RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

2 OF 10

2 OF 10

AP24
AT21
AV24
AU20

AR24
AR21
AU24
AV20

BC28
AY28
AY36
BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_RCOMPP
M_RCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

DDR3_DRAMRST#

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2

DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

GFXVR_EN

CLPWROK_MCH

MCH_CLVREF

CLK_MCH_OE#

TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

M_CLK_DDR0 12
M_CLK_DDR1 12
M_CLK_DDR2 12
M_CLK_DDR3 12

M_CLK_DDR#0 12
M_CLK_DDR#1 12
M_CLK_DDR#2 12
M_CLK_DDR#3 12

M_CKE0 12,13
M_CKE1 12,13
M_CKE2 12,13
M_CKE3 12,13

M_CS0# 12,13
M_CS1# 12,13
M_CS2# 12,13
M_CS3# 12,13

M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13

R446 499R2F-2-GPR446 499R2F-2-GP

1 2

CLK_MCH_3GPLL 3

CLK_MCH_3GPLL# 3

DMI_TXN0 17
DMI_TXN1 17
DMI_TXN2 17
DMI_TXN3 17

DMI_TXP0 17
DMI_TXP1 17
DMI_TXP2 17
DMI_TXP3 17

DMI_RXN0 17
DMI_RXN1 17
DMI_RXN2 17
DMI_RXN3 17

DMI_RXP0 17
DMI_RXP1 17
DMI_RXP2 17
DMI_RXP3 17

SB

1 2

1 2

R447

R447

EC98

EC98

12

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

DY

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK# 3

MCH_ICH_SYNC# 17

56R2J-4-GP

56R2J-4-GP

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0

RSVD

RSVD

SB_CKE_1
SA_CS#_0

SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

CLK

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1

DMI

DMI

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

NC

NC

SDVO_CTRLCLK

SDVO_CTRLDATA

MISC

MISC

DREFCLK

1 2

R228

R228

DREFCLK#

1 2

R227

R227

DREFSSCLK

1 2

R233

R233

DREFSSCLK#

1 2

R235

R235

DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

DY

DY

DY

DY

DY

DY

DY

DY

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

CFG

CFG

PM

PM

3

DDR_VREF_S3

TP50TP50

GFX_VID0GFX_VID0GFX_VID0GFX_VID0GFX_VID0
GFX_VID1GFX_VID1GFX_VID1GFX_VID1GFX_VID1
GFX_VID2GFX_VID2GFX_VID2GFX_VID2GFX_VID2
GFX_VID3GFX_VID3GFX_VID3GFX_VID3GFX_VID3
GFX_VID4GFX_VID4GFX_VID4GFX_VID4GFX_VID4

R229

R229
0R0402-PAD

0R0402-PAD

CLK_MCH_OE# 3

1D05V_S0

TP56TP56
TP62TP62
TP108TP108
TP132TP132
TP135TP135

GFXVR_EN

3

GFX_VID[4..0] 36

CL_CLK0 17

CL_DATA0 17
PWROK 17,20
CL_RST#0 17

PD

3D3V_S0

12

R659

R659
30KR2F-GP

30KR2F-GP

DY

DY

R657

R657
100KR2F-L1-GP

100KR2F-L1-GP

1 2

1D8V_S3

DY

DY

12

DY

DY

1KR2F-3-GP

1KR2F-3-GP

12

DY

DY

1KR2F-3-GP

1KR2F-3-GP

C311

C311

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R238

R238

R237

R237

GMCH_DDCCLK15
GMCH_DDCDATA15
GMCH_HSYNC15

1.25V_1.05V_CANTIGA

12

GMCH_BL_ON28

CLK_DDC_EDID14
DAT_DDC_EDID14

GMCH_LCDVDD_ON14

TP96TP96

TP95TP95

TP53TP53

TP52TP52

1 2

R206

R206

1 2

R218

R218

GMCH_BLUE15

GMCH_GREEN15

GMCH_RED15

GMCH_VSYNC15

R207 1K02R2F-1-GP

R207 1K02R2F-1-GP

R230

R230
1KR2F-3-GP

1KR2F-3-GP

1 2

FOR Cantiga:500 ohm
Teenah: 392 ohm

12

R223

R223

499R2F-2-GP

499R2F-2-GP

GFXVR_EN 36

PD

LBKLT_CTRL

TP45TP45

LCTLA_CLK

TP44TP44

LCTLB_DATA

TP47TP47

CLK_DDC_EDID
DAT_DDC_EDID

GMCH_LCDVDD_ON

LIBG

L_LVBG

TP97TP97

GMCH_TXACLK-14
GMCH_TXACLK+14
GMCH_TXBCLK-14
GMCH_TXBCLK+14

GMCH_TXAOUT0-14
GMCH_TXAOUT1-14
GMCH_TXAOUT2-14

GMCH_TXAOUT3-

GMCH_TXAOUT0+14
GMCH_TXAOUT1+14
GMCH_TXAOUT2+14

GMCH_TXAOUT3+

GMCH_TXBOUT0-14
GMCH_TXBOUT1-14
GMCH_TXBOUT2-14

GMCH_TXBOUT3-SM_REXT

GMCH_TXBOUT0+14
GMCH_TXBOUT1+14
GMCH_TXBOUT2+14

GMCH_TXBOUT3+

TV_DACA
TV_DACB
TV_DACC

TV_DCONSEL0

0R2J-2-GP

0R2J-2-GP

TV_DCONSEL1

0R2J-2-GP

0R2J-2-GP

GMCH_BLUE
GMCH_GREEN
GMCH_RED

GMCH_DDCCLK
GMCH_DDCDATA

CRT_IREF

1 2

UMA

UMA

FOR Cantiga: 1.02k_1% ohm
Teenah: 1.3k ohm

CRT_IREF routing Trace
width use 20 mil

12

DIS

DIS

1 2

R204

R204

DIS

DIS

1 2

R203

R203

DIS

DIS

1 2

R199

R199

1D8V_S3

12

C549

C549

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C543

C543

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

R456 1KR2F-3-GPR456 1KR2F-3-GP

12

R457

R457
3K01R2F-3-GP

3K01R2F-3-GP

R454

R454
1KR2F-3-GP

1KR2F-3-GP

1 2

GMCH_HSYNC

GMCH_VSYNC

CRT_IREF

U43C

U43C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

2

SM_RCOMP_VOH

12

C552

C552
SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

C542

C542
SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

2

3 OF 10

3 OF 10

PEG_CMP

T37

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11

LVDS

LVDS

PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5

TV VGA

TV VGA

PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

GTXN0
GTXN1
GTXN2
GTXN3
GTXN4
GTXN5
GTXN6
GTXN7
GTXN8
GTXN9
GTXN10
GTXN11
GTXN12
GTXN13
GTXN14
GTXN15

GTXP0
GTXP1
GTXP2
GTXP3
GTXP4
GTXP5
GTXP6
GTXP7
GTXP8
GTXP9
GTXP10
GTXP11
GTXP12
GTXP13
GTXP14
GTXP15

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

R225 49D9R2F-GPR225 49D9R2F-GP

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

1 2

VGA

VGA

UMA

UMA-VGA

UMA-VGA

GMCH_BLUE

1 2

150R2F-1-GP

150R2F-1-GP

R198

R198

UMA-VGA

UMA-VGA

GMCH_GREEN

1 2

150R2F-1-GP

150R2F-1-GP

R201

R201

UMA-VGA

UMA-VGA

GMCH_RED

1 2

150R2F-1-GP

150R2F-1-GP

R202

R202

FOR Discrete change R97,
R101& R104 to 0 ohm

R186

R186

TV_DACA

12

UMA_DIS

UMA_DIS

R187

R187

75R2J-1-GP

UMA_DIS

UMA_DIS

UMA_DIS

UMA_DIS

75R2J-1-GP

75R2J-1-GP

75R2J-1-GP

75R2J-1-GP

75R2J-1-GP

TV_DACB

12

R188

R188

TV_DACC

12

FOR Discrete change R113,

R115& R116 to 0 ohm

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1D05V_S0

12

PEG_RXN[15..0] 41

PEG_RXP[15..0] 41

C325 SCD1U10V2KX-5GP

C325 SCD1U10V2KX-5GP
C598 SCD1U10V2KX-5GP

C598 SCD1U10V2KX-5GP
C596 SCD1U10V2KX-5GP

C596 SCD1U10V2KX-5GP
C327 SCD1U10V2KX-5GP

C327 SCD1U10V2KX-5GP
C335 SCD1U10V2KX-5GP

C335 SCD1U10V2KX-5GP
C604 SCD1U10V2KX-5GP

C604 SCD1U10V2KX-5GP
C338 SCD1U10V2KX-5GP

C338 SCD1U10V2KX-5GP
C321 SCD1U10V2KX-5GP

C321 SCD1U10V2KX-5GP
C340 SCD1U10V2KX-5GP

C340 SCD1U10V2KX-5GP
C324 SCD1U10V2KX-5GP

C324 SCD1U10V2KX-5GP
C341 SCD1U10V2KX-5GP

C341 SCD1U10V2KX-5GP
C594 SCD1U10V2KX-5GP

C594 SCD1U10V2KX-5GP
C320 SCD1U10V2KX-5GP

C320 SCD1U10V2KX-5GP
C344 SCD1U10V2KX-5GP

C344 SCD1U10V2KX-5GP
C329 SCD1U10V2KX-5GP

C329 SCD1U10V2KX-5GP
C602 SCD1U10V2KX-5GP

C602 SCD1U10V2KX-5GP
C326 SCD1U10V2KX-5GP

C326 SCD1U10V2KX-5GP
C599 SCD1U10V2KX-5GP

C599 SCD1U10V2KX-5GP
C597 SCD1U10V2KX-5GP

C597 SCD1U10V2KX-5GP
C328 SCD1U10V2KX-5GP

C328 SCD1U10V2KX-5GP
C336 SCD1U10V2KX-5GP

C336 SCD1U10V2KX-5GP
C603 SCD1U10V2KX-5GP

C603 SCD1U10V2KX-5GP
C337 SCD1U10V2KX-5GP

C337 SCD1U10V2KX-5GP
C322 SCD1U10V2KX-5GP

C322 SCD1U10V2KX-5GP
C339 SCD1U10V2KX-5GP

C339 SCD1U10V2KX-5GP
C323 SCD1U10V2KX-5GP

C323 SCD1U10V2KX-5GP
C342 SCD1U10V2KX-5GP

C342 SCD1U10V2KX-5GP
C595 SCD1U10V2KX-5GP

C595 SCD1U10V2KX-5GP
C319 SCD1U10V2KX-5GP

C319 SCD1U10V2KX-5GP
C343 SCD1U10V2KX-5GP

C343 SCD1U10V2KX-5GP
C330 SCD1U10V2KX-5GP

C330 SCD1U10V2KX-5GP
C601 SCD1U10V2KX-5GP

C601 SCD1U10V2KX-5GP

GMCH_BL_ON
GMCH_LCDVDD_ON

LIBG

1

FOR Cantiga:49.9 ohm
Teenah: 24.9 ohm

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

UMA

UMA

UMA

1 2

R214 100KR2J-1-GP

R214 100KR2J-1-GP

1 2

UMA

UMA

R197 100KR2J-1-GP

R197 100KR2J-1-GP

UMA

UMA

1 2

R479 2K37R2F-GP

R479 2K37R2F-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (2 of 6)

Cantiga (2 of 6)

Cantiga (2 of 6)

D45/D46

D45/D46

D45/D46

1

747Tuesday, March 25, 2008

747Tuesday, March 25, 2008

747Tuesday, March 25, 2008

PEG_TXN[15..0] 41

PEG_TXP[15..0] 41

PD

PD

PD

5

U43D

M_A_DQ[63..0]12

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U43D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4 OF 10

4 OF 10

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

4

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6

M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8

M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_B_DQ[63..0]12
M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13

M_A_RAS# 12,13

M_A_CAS# 12,13

M_A_WE# 12,13

M_A_DM[7..0] 12

M_A_DQS[7..0] 12

M_A_DQS#[7..0] 12

M_A_A[14..0] 12,13

3

M_B_DQ[63..0]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

U43E

U43E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

2

5 OF 10

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8

M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DM0

AM47

M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13

M_B_RAS# 12,13
M_B_CAS# 12,13
M_B_WE# 12,13

M_B_DM[7..0] 12

M_B_DQS[7..0] 12

M_B_DQS#[7..0] 12

M_B_A[14..0] 12,13

1

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (3 of 6)

Cantiga (3 of 6)

Cantiga (3 of 6)

D45/D46

D45/D46

D45/D46

1

PD

PD

of

847Friday, March 14, 2008

of

847Friday, March 14, 2008

of

847Friday, March 14, 2008

PD

5

VCC_GFXCORE

7 OF 10

1D8V_S3

D D

VCC_GFXCORE

C C

B B

VCC_AXG_SENSE36
VSS_AXG_SENSE36

U43G

U43G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

VCC SMVCC GFX

VCC SMVCC GFX

U93 close to U3

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

POWER

POWER

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC SM LF

VCC SM LF

7 OF 10

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

SM_LF1_GMCH
SM_LF2_GMCH
SM_LF3_GMCH
SM_LF4_GMCH
SM_LF5_GMCH
SM_LF6_GMCH
SM_LF7_GMCH

R244

R244

1 2

0R3-0-U-GP

0R3-0-U-GP

VGA

VGA

VCC_GFXCORE

C246

C246

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

C178

C178

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4

C197

C197

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

VCC_GFXCORE

12

C170

C170

C191

C191

C204

C204

12

12

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

Place on the Edge

12

NEAR RN39

C350

C350

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Place CAP where
LVDS and DDR2 taps

12

12

C252

C252

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C312

C312

12

12

1

1

C147

C147

C216

C216

2

2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

C227

C227

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

C282

C282

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C207

C207

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

FOR VCC SM

12

C215

C215

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C303

C303

12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD47U16V2ZY-GP

SCD47U16V2ZY-GP

12

12

TC21

TC21

C313

C313

12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

1

1

C226

C226

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

2

2

Coupling CAP

12

C255

C255

C254

C254

ST330U6VDM-2-GP

ST330U6VDM-2-GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

Place on the Edge

3

1D05V_S0

C265

C265

12

C190

C190

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

12

12

C189

C189

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

C230

C230

C186

C222

C222

C186

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

FOR VCC CORE

C228

C228

C266

C266

12

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

Coupling CAP 370 mils from the Edge

12

C267

C267

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C261

C261

C273

C273

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

C253

C253

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Coupling CAP

1D8V_S3

12

12

12

C248

C248

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R220

R220

1 2

0R0402-PAD

0R0402-PAD

2

C281

C281

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_GMCH_35

U43F

U43F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

VCC CORE

VCC CORE

POWER

POWER

6 OF 10

6 OF 10

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VCC NCTF

VCC NCTF

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

1

1D05V_S0

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (4 of 6)

Cantiga (4 of 6)

Cantiga (4 of 6)

D45/D46

D45/D46

D45/D46

1

PD

PD

947Monday, March 24, 2008

947Monday, March 24, 2008

947Monday, March 24, 2008

PD

5

4

3

2

1

5V_S0

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

D D

1.25V_1.05V_CANTIGA

PD

C C

1.25V_1.05V_CANTIGA
12

R429

R429

0R0603-PAD

0R0603-PAD

1 2

1 2

120ohm 100MHz

B B

1.25V_1.05V_CANTIGA

1 2

BLM18BB221SN1D-GP

BLM18BB221SN1D-GP

1D5V_S0

A A

Imax = 300 mA

U39

U39

1

VIN

2

GND
EN/EN#3NC#4

RT9198-33PBR-GP

RT9198-33PBR-GP

BC1

BC1

74.09198.G7F

74.09198.G7F

UMA

UMA

1 2

UMA

UMA

UMA

UMA

R240

R240

12

0R3-0-U-GP

0R3-0-U-GP

UMA

UMA

R486

R486
0R3-0-U-GP

0R3-0-U-GP

12

C331

C331

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

C609

C609

UMA

UMA

1D05V_SUS_MCH_PLL2

120ohm 100MHz

L23

L23
FCM1608KF-1-GP

FCM1608KF-1-GP

L22

L22
FCM1608KF-1-GP

FCM1608KF-1-GP

220ohm 100MHz

L8

L8

R189

R189

12

0R0603-PAD

0R0603-PAD

12

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

L5

L5

UMA

UMA

1 2

HCB1608K-181T20GP

HCB1608K-181T20GP

180ohm 100MHz

VOUT

R126

R126
0R0603-PAD

0R0603-PAD

UMA

UMA

12

C316

C316

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

12

C610

C610

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

UMA

UMA

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

M_VCCA_HPLL

12

C515

C515

M_VCCA_MPLL

12

C513

C513
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_RUN_PEGPLL

12

C334

C334
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

58.7mA

1D5VRUN_TVDAC

C235

C235

12

C250

C250

UMA

UMA

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

5

3D3V_S0_DAC

5
4

SC1U16V3ZY-GP

SC1U16V3ZY-GP

1.25V_1.05V_CANTIGA1D05V_S0

65mA

UMA

UMA

M_VCCA_DPLLA

12

C317

C317

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_DPLLB

12

C600

C600

UMA

UMA

24mA

12

C517

C517
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C237

C237

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

12

C784

C784

BC2

BC2

3D3V_S0_DAC

65mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

139.2mA

C516

C516
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5VRUN_QDAC

12

C249

C249

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0_DAC

2.68mA

UMA

UMA

HCB1608K-181T20GP

HCB1608K-181T20GP

1D5V_S0

R236

R236
0R2J-2-GP

0R2J-2-GP

VGA

VGA

1 2

1.25V_1.05V_CANTIGA

R484

R484
0R2J-2-GP

0R2J-2-GP

480mA

VGA

VGA

1 2

1D5V_S0

1 2

0R2J-2-GP

0R2J-2-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

C785

C785

1 2

UMA

UMA

UMA

UMA

HCB1608K-181T20GP

HCB1608K-181T20GP

L27

L27

12

C546

C546

UMA

UMA

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

R488

R488

1 2

0R2J-2-GP

0R2J-2-GP

1 2

C133

C133

DY

DY

1.25V_1.05V_CANTIGA

1 2

24mA

HCB1608K-181T20GP

HCB1608K-181T20GP

180ohm 100MHz

R468

R468

UMA

UMA

C561

C561

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA

UMA

1D05V_SUS_MCH_PLL2

157.2mA

R195

R195
0R2J-2-GP

0R2J-2-GP

VGA

VGA

12

R128

R128
0R0603-PAD

0R0603-PAD

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

UMA

UMA

VCC_HDA

12

C145

C145

60.3mA

73mA

L28

L28

3D3V_CRTDAC_S0

12

C550

C550

12

UMA

UMA

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

M_VCCA_DAC_BG

C545

C545

12

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_TXLVDS_S3

C606

C606

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

C139

C139

12

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

R184

R184
0R0603-PAD

0R0603-PAD

12

C247

C247

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

3D3VTVDAC3D3V_S0_DAC

L26

L26

12

UMA

UMA

R467

R467
0R2J-2-GP

0R2J-2-GP

VGA

VGA

1 2

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_S3

0R2J-2-GP

0R2J-2-GP

1 2

VGA

VGA

4

C551

C551

12

UMA

UMA

12

R455

R455
0R2J-2-GP

0R2J-2-GP

VGA

VGA

12

UMA

UMA

VCCA_PEG_BG

12

C614

C614
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C194

C194

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

12

C238

C238

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C538

C538

12

1D5VRUN_TVDAC
1D5VRUN_QDAC

50mA

UMA

UMA

R231

R231

12

0R3-0-U-GP

0R3-0-U-GP

R224

R224

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_DAC_BG

R481

R481

0R2J-2-GP

0R2J-2-GP

1 2

UMA

UMA

1D05V_RUN_PEGPLL

1D05V_SM

12

C214

C214

SC1U10V3KX-3GP

SC1U10V3KX-3GP

1D05V_SM_CK

12

C251

C251

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R453

R453
0R2J-2-GP

0R2J-2-GP

VGA

VGA

1 2

50mA

1D05V_RUN_PEGPLL

12

C333

C333

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_SUS_DLVDS

12

C304

C304

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA

UMA

R459

R459
0R2J-2-GP

0R2J-2-GP

VGA

VGA

M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_HPLL
M_VCCA_MPLL

12

1D8V_TXLVDS

R638

R638

13.2mA

0R2J-2-GP

0R2J-2-GP

VGA

VGA

50mA

12

C199

C199

SC1U10V3KX-3GP

SC1U10V3KX-3GP

VCC_HDA

UMA

UMA

U43H

U43H

B27
A26

A25
B25

F47

L48
AD1
AE1

J48
J47

AD48

AA48

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25

AL25

AM24

AL24

AM23

AL23

B24

A24

A32

M25

L28

AF1

AA47

M38

L37

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

12

C301

C301
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VCCA_CRT_DAC
VCCA_CRT_DAC

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

VCCA_TV_DAC
VCCA_TV_DAC

VCC_HDA

VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

VCCD_LVDS
VCCD_LVDS

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

AXF

AXF

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

SM CK

SM CK

VCC_TX_LVDS

HV

HV

PEG

PEG

DMI

DMI

8 OF 10

8 OF 10

VTT

VTT

VCC_AXF
VCC_AXF
VCC_AXF

VCC_HV
VCC_HV
VCC_HV

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

VTTLF
VTTLF
VTTLF

VTTLF

VTTLF

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

106mA

VTTLF1
VTTLF2
VTTLF3

12

C149

C149

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

322mA

1D8V_TXLVDS_S3

3D3V_HV_S0

1

1

1

1

C141

C141

2

2

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

12

C514

C514

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

C532

C532

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

1782mA

12

456mA

C612

C612

1

1

C144

C144

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

2

12

C518

C518

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

1D05V_S0

12

C534

C534
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C531

C531

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C607

C607

C623

C623

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

C621

C621

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

C522

C522

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

C512

C512

1

2

2

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1

3

C163

C163

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

D21

D21

BAT54-7-F-GP

BAT54-7-F-GP

1.25V_1.05V_CANTIGA

R448

R448

12

0R0603-PAD

0R0603-PAD

TC17

TC17

ST220U6D3VDM-15GP

ST220U6D3VDM-15GP

1D05V_HV_S0

2

12

1

200mA

C528

C528

R449

R449

1 2

1R2F-GP

1R2F-GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

119mA

UMA

UMA

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C593

C593

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

1D05V_S0

12

C624

C624

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

C618

C618

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

ZZZZ

ZZZZ

ZZZZ

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

1D05V_S0

12

852mA

C175

C175

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

10R2J-2-GP

10R2J-2-GP

R471

R471

R451

R451
0R0603-PAD

0R0603-PAD

1 2

R480

R480
0R3-0-U-GP

0R3-0-U-GP

UMA

UMA

R482

R482
0R2J-2-GP

0R2J-2-GP

VGA

VGA

UMA

UMA

1 2

12

1D05V_S0

C615

C615

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Cantiga (5 of 6)

Cantiga (5 of 6)

Cantiga (5 of 6)

D45/D46

D45/D46

D45/D46

C628

C628

12

SC22U6D3V5MX-L2GP

SC22U6D3V5MX-L2GP

12

3D3V_S0 3D3V_HV_S0

R470

R470

12

1D8V_S31D8V_SUS_SM_CK

12

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

1D8V_S3

1

12

0R0402-PAD

0R0402-PAD

10 47Monday, March 17, 2008

10 47Monday, March 17, 2008

10 47Monday, March 17, 2008

12

C565

C565

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

of

of

of

PD

PD

PD

5

U43I

U43I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

D D

C C

B B

A A

5

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

VSS

VSS

4

9 OF 10

9 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

3

10 OF 10

U43J

U43J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17
M17
H17

C17
BA16
AU16

AN16

N16

K16

G16

E16
BG15
AC15

W15

A15
BG14
AA14

C14
BG13
BC13
BA13

AN13

AJ13

AE13

N13

L13

G13

E13
BF12
AV12
AT12

AM12

AA12

J12

A12
BD11
BB11
AY11
AN11
AH11

Y11

N11
G11

C11
BG10
AV10
AT10

AJ10
AE10
AA10

M10
BF9
BC9
AN9
AM9
AD9

G9

B9
BH8
BB8
AV8
AT8

3

VSS

VSS

VSS
VSS
VSS
VSS

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

VSS SCB

NCTF_VSS_SCB#BH48

10 OF 10

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS NCTF

VSS NCTF

VSS_NCTF
VSS_NCTF

NCTF_VSS_SCB#BH1

NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3

NC#C46

NC

NC

NC#D47

NC#C48

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5

NC#A6
NC#A43
NC#A44
NC#B45

NC#B47
NC#A46
NC#F48
NC#E48

NC#B48

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

2

TP99TP99
TP91TP91
TP98TP98
TP89TP89
TP90TP90

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Cantiga (6 of 6)

Cantiga (6 of 6)

Cantiga (6 of 6)

D45/D46

D45/D46

D45/D46

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

11 47Friday, March 14, 2008

of

11 47Friday, March 14, 2008

of

11 47Friday, March 14, 2008

1

PD

PD

PD

DCCBBAA

DDR_VREF_S3_TP

D

DDR_VREF_S3_TP

DDR_VREF_S3_1

SB

R245

R245
0R3-0-U-GP

0R3-0-U-GP

1 2

1 2

C355 SC2D2U6D3V3MX-1-GPC355 SC2D2U6D3V3MX-1-GP

1 2

C353 SCD1U16V2ZY-2GPC353 SCD1U16V2ZY-2GP

1D8V_S3

SB

R610

R610
0R2J-2-GP

0R2J-2-GP

DY

DY

1 2

DDR_VREF_S3_TP

R614

R614
0R2J-2-GP

0R2J-2-GP

DY

DY

1 2

TPAD79K1TPAD79
K1

1

SMBC_ICH

K2

SMBD_ICH

1

TPAD79K2TPAD79

DDR_VREF_S3_TP DDR_VREF_S3_TP

1 2

C356 SC2D2U6D3V3MX-1-GPC356 SC2D2U6D3V3MX-1-GP

1 2

C354 SCD1U16V2ZY-2GPC354 SCD1U16V2ZY-2GP

1

K3
TPAD79K3TPAD79

5

DDR2-200P-22-GP-U2

DDR2-200P-22-GP-U2

62.10017.A61

62.10017.A61

M_A_RAS#8,13
M_A_CAS#8,13

DM2

DM2

DDR2-200P-23-GP-U1

DDR2-200P-23-GP-U1

62.10017.A71

62.10017.A71

K4

1

TPAD79K4TPAD79

4

DDR SOCKET

M_ODT27,13
M_ODT37,13

M_B_DQS0

M_B_DQS7

M_B_DQS1

M_B_DQS5

M_B_DQS4

M_B_DQS2

M_B_DQS6

M_B_DQS3

M_B_DQS#4

M_B_DQS#2

M_B_DQS#7

M_B_DQS#3

M_B_DQS#6

M_B_DQS#0

M_B_DQS#5

M_B_DQS#1

M_B_DQ62

M_B_DQ60

M_B_DQ59

M_B_DQ55

M_B_DQ63

M_B_DQ57

M_B_DQ61

M_B_DQ56

M_B_DQ58

114

119

1

MH1

2

131

148

169

188

202

VSS

MH1

GND

OTD0

OTD1

VREF

DQS5

DQS6

DQS7

DM1

DM1

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

GND

MH2

201

MH2

M_CS0#7,13

M_CS1#7,13
M_CKE07,13
M_CKE17,13

M_A_WE#8,13

M_ODT07,13
M_ODT17,13

114

119

1

201

GND

ODT0

ODT1

VREF

VSS

VSS

VSS

VSS

GND

187

190

193

196

202

171

172

177

178

183

184

187

190

193

196

109

195

115

108

113

197

SCL

SDA

WE#

CKE079CKE180RAS#

CAS#

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

161

162

165

168

171

172

177

178

183

184

129

146

167

186

DQS013DQS131DQS251DQS370DQS4

VSS

VSS

VSS

VSS

VSS

161

162

165

168

120

110

163

CS0#

CS1#

NC#120

NC#163/TEST

VSS

VSS

VSS

VSS

VSS

149

150

155

156

DQS0#11DQS1#29DQS2#49DQS3#68DQS4#

DQS5#

DQS6#

DQS7#

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

132

133

138

139

144

145

149

150

155

156

M_A_DQ60

M_A_DQ63

M_A_DQ62

M_A_DQ61

M_A_DQ59

83

145

189

191

180

182

192

194

DQ59

DQ60

DQ61

DQ62

DQ63

NC#5050NC#6969NC#83

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

121

122

127

128

132

133

138

139

144

191

180

182

192

194

DQ59

DQ60

DQ61

DQ62

DQ63

VSS

VSS

VSS

VSS

121

122

127

128

Place near DM1

M_A_DQ58

M_A_DQ53

M_A_DQ54

M_A_DQ55

M_A_DQ57

M_A_DQ56

160

174

176

179

181

DQ53

DQ54

DQ55

DQ56

DQ57

DQ58

176

179

181

189

DQ56

DQ57

DQ58

M_CLK_DDR3

12

C138

C138
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

DY

M_CLK_DDR#3
M_CLK_DDR2

12

C351

C351
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

DY

M_CLK_DDR#2

M_A_DQ49

M_A_DQ51

M_A_DQ50

M_A_DQ52

159

173

175

158

DQ50

DQ51

DQ52

Place near DM2

12

12

M_B_DQ53

M_B_DQ52

M_B_DQ51

M_B_DQ54

M_B_DQ50

173

175

158

160

174

DQ50

DQ51

DQ52

DQ53

DQ54

DQ55

M_A_DQ44

M_A_DQ47

M_A_DQ46

M_A_DQ45

M_A_DQ48

140

142

152

154

157

DQ44

DQ45

DQ46

DQ47

DQ48

DQ49

M_CLK_DDR0

C349

C349
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

DY

M_CLK_DDR#0
M_CLK_DDR1

C137

C137
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

DY

M_CLK_DDR#1

M_B_DQ46

M_B_DQ44

M_B_DQ43

M_B_DQ39

M_B_DQ47

M_B_DQ45

M_B_DQ40

M_B_DQ48

M_B_DQ42

M_B_DQ49

M_B_DQ41

136

141

143

151

153

140

142

152

154

157

159

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

DQ48

DQ49

M_A_DQ33

M_A_DQ35

M_A_DQ34

M_A_DQ37

M_A_DQ38

M_A_DQ39

M_A_DQ36

M_A_DQ43

M_A_DQ41

M_A_DQ40

M_A_DQ42

125

135

137

124

126

134

136

141

143

151

153

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DQ40

DQ41

DQ42

DQ43

K5

TPAD79K5TPAD79

M_B_DQ35

M_B_DQ38

M_B_DQ32

M_B_DQ34

M_B_DQ33

M_B_DQ37

M_B_DQ36

123

125

135

137

124

126

134

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

VSS3VSS8VSS9VSS12VSS15VSS18VSS21VSS24VSS27VSS28VSS33VSS34VSS39VSS40VSS41VSS42VSS47VSS48VSS53VSS54VSS59VSS60VSS65VSS66VSS71VSS72VSS77VSS78VSS

1D8V_S3

3D3V_S0

3D3V_S0

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

M_A_DQ28

M_A_DQ31

M_A_DQ30

M_A_DQ27

M_A_DQ26

M_A_DQ29

M_A_DQ32

123

DQ33

VDD

VDD

VSS2VSS3VSS8VSS9VSS12VSS15VSS18VSS21VSS24VSS27VSS28VSS33VSS34VSS39VSS40VSS41VSS42VSS47VSS48VSS53VSS54VSS59VSS60VSS65VSS66VSS71VSS72VSS77VSS78VSS

117

118

1

1D8V_S3

M_B_DQ30

M_B_DQ28

M_B_DQ31

M_B_DQ29

VDD

VDD

112

117

118

C123

C123

M_A_DQ22

M_A_DQ23

M_A_DQ25

M_A_DQ24

VDD

VDD

VDD

103

104

111

112

3D3V_S0

M_B_DQ27

VDD

VDD

111

M_A_DQ21

M_B_DQ24

M_B_DQ26

M_B_DQ25

VDD

103

104

R116

R116

1 2

10KR2J-3-GP

10KR2J-3-GP

12

C124

C124

M_A_DQ19

M_A_DQ18

M_A_DQ20

12

C126

C126

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

M_B_DQ19

M_B_DQ22

M_B_DQ23

M_B_DQ21

M_B_DQ20

VDD81VDD82VDD87VDD88VDD95VDD96VDD

12

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SMBC_ICH3,19
SMBD_ICH3,19

M_A_DQ13

M_A_DQ14

M_A_DQ15

M_A_DQ16

M_A_DQ17

VDD_SPD

VDD81VDD82VDD87VDD88VDD95VDD96VDD

199

12

C128

C128

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_B_DQ18

M_A_DQ12

M_B_DQ16

M_B_DQ17

NC#163/TEST

163

DIM_SA1

M_A_DQ11

M_A_DQ10

DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32

SA0

SA1

198

200

3

M_B_BS#28,13
M_B_BS#08,13
M_B_BS#18,13

M_B_A10

M_B_A7

M_B_A1

M_B_A8

M_B_A5

A1190A1289A13

DQS5

M_B_A2

M_B_A6

M_B_A3

M_B_A9

105

A10/AP

M_A_A3

M_A_A4

131

M_A_DQS3

M_A_DQS4

M_B_A0

M_B_A4

102A1101A2100A399A498A597A694A792A893A991

A0

RAS#

WE#

CAS#

CS0#

CS1#

CKE079CKE180CK030CK0#32CK1

108

109

113

110

115

M_B_RAS# 8,13
M_B_WE# 8,13
M_B_CAS# 8,13
M_CS2# 7,13
M_CS3# 7,13
M_CKE2 7,13
M_CKE3 7,13

M_A_A0

M_A_A1

M_A_A2

MH1

102A1101A2100A399A498A597A694A792A893A991

A0

MH1

DQS013DQS131DQS251DQS370DQS4

MH2

MH2

M_A_DQS2

M_A_DQS1

M_A_DQS0

M_B_A11

M_B_A12

DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ9

DM5

DM6

147

M_B_DM5

84

A16_BA2

DQS7#

186

M_A_DQS#7

M_B_A13

M_B_A14

85

116

84

107

106

A1486A15

BA0

BA1

A16/BA2

CK1#

DM010DM126DM252DM367DM4

164

166

130

M_B_DM0

M_B_DM1

M_B_DM4

M_B_DM3

M_B_DM2

M_A_A5

M_A_A6

M_A_A7

M_A_A8

M_A_A9

M_A_A10

M_A_A11

M_A_A12

M_A_A13

M_A_A14

116

105

A1190A1289A13

A1486A15

A10/AP

DQS6

DQS7

DQS0#11DQS1#29DQS2#49DQS3#68DQS4#

DQS5#

DQS6#

148

169

188

129

146

167

M_A_DQS7

M_A_DQS5

M_A_DQS6

M_A_DQS#2

M_A_DQS#3

M_A_DQS#5

M_A_DQS#6

M_A_DQS#1

M_A_DQS#0

M_A_DQS#4

M_B_DQ0

M_B_DQ8

M_B_DQ3

M_B_DQ10

M_B_DQ7

M_B_DQ1

M_B_DQ9

M_B_DQ4

M_B_DQ6

25

DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32

SA0

SA1

198

200

M_A_DQ2

M_A_DQ3

M_A_DQ4

DM7

CK030CK0#32CK1

170

185

M_A_DM7

M_A_DM6

M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7

199

DM6

147

VDDSPD

M_A_DQ1

DM5

130

M_A_DM5

M_B_DQ2

M_B_DQ5

DM7

SDA

SCL

170

185

195

197

M_B_DM7

M_B_DM6

M_CLK_DDR#37

M_CLK_DDR37

M_CLK_DDR#27

M_CLK_DDR27

M_A_DQ0

107

106

85

BA0

BA1

DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ9

DM010DM126DM252DM367DM4

M_A_DM2

M_A_DM3

M_A_DM0

M_A_DM4

M_A_DM1

M_B_DQ11

M_B_DQ14

M_B_DQ15

M_B_DQ13

M_B_DQ12

NC#5050NC#6969NC#8383NC#120

120

M_A_BS#28,13
M_A_BS#08,13
M_A_BS#18,13

M_A_DQ5

M_A_DQ7

M_A_DQ6

M_A_DQ8

M_A_DQ9

25

CK1#

164

166

M_B_DQ[63..0] 8
M_B_A[14..0] 8,13
M_B_DM[7..0] 8
M_B_DQS#[7..0] 8
M_B_DQS[7..0] 8

M_A_DQ[63..0] 8
M_A_A[14..0] 8,13
M_A_DM[7..0] 8
M_A_DQS#[7..0] 8
M_A_DQS[7..0] 8

2

1

D45 46 use 62.10017.G31

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket

DDR2 Socket

DDR2 Socket

D45/D46

D45/D46

D45/D46

1

PD

PD

12 47Friday, March 14, 2008

12 47Friday, March 14, 2008

12 47Friday, March 14, 2008

PD

PARALLEL TERMINATION

Decoupling Capacitor

DDR_VREF_S3

Put decap near power(0.9V) and pull-up resistor

RN25

RN25

8
7
6

SRN56J-5-GP

SRN56J-5-GP

R172 56R2J-4-GPR172 56R2J-4-GP

1 2

R171 56R2J-4-GPR171 56R2J-4-GP

1 2

R209 56R2J-4-GPR209 56R2J-4-GP

1 2

R190 56R2J-4-GPR190 56R2J-4-GP

1 2

R208 56R2J-4-GPR208 56R2J-4-GP

1 2

R222 56R2J-4-GPR222 56R2J-4-GP

1 2

RN22

RN22

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN12

RN12

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN19

RN19

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN23

RN23

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN14

RN14

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN13

RN13

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN20

RN20

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN15

RN15

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN26

RN26

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN24

RN24

8
7
6

SRN56J-5-GP

SRN56J-5-GP

RN21

RN21

8
7
6

SRN56J-5-GP

SRN56J-5-GP

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

M_B_A12
M_B_A9

M_B_A8
M_B_A5
M_B_A1
M_B_A3

M_B_A13

M_B_A0
M_B_A2
M_B_A4

M_B_A6
M_B_A7
M_B_A11

M_A_A13

M_A_A0
M_A_A2
M_A_A4

M_A_A12
M_A_A9

M_A_A6
M_A_A7
M_A_A11

M_A_A5
M_A_A3
M_A_A1
M_A_A10

M_CKE2 7,12
M_B_BS#2 8,12

M_CS1# 7,12
M_ODT3 7,12

M_A_A8
M_B_A10
M_A_A14
M_B_A14

M_ODT2 7,12
M_CS2# 7,12

M_B_RAS# 8,12

M_B_BS#1 8,12

M_CKE3 7,12

M_B_BS#0 8,12

M_B_WE# 8,12

M_B_CAS# 8,12

M_CS3# 7,12

M_ODT0 7,12
M_CS0# 7,12

M_A_RAS# 8,12

M_A_BS#1 8,12

M_A_BS#0 8,12

M_A_WE# 8,12

M_A_CAS# 8,12

M_ODT1 7,12

M_CKE0 7,12
M_A_BS#2 8,12

M_CKE1 7,12

M_A_A[14..0] 8,12
M_B_A[14..0] 8,12

Put decap near power(0.9V) and pull-up resistor

1 2

C306 SCD1U16V2ZY-2GPC306 SCD1U16V2ZY-2GP

1 2

C196 SCD1U16V2ZY-2GPC196 SCD1U16V2ZY-2GP

1 2

C309 SCD1U16V2ZY-2GPC309 SCD1U16V2ZY-2GP

1 2

C257 SCD1U16V2ZY-2GPC257 SCD1U16V2ZY-2GP

1 2

C302 SCD1U16V2ZY-2GPC302 SCD1U16V2ZY-2GP

1 2

C201 SCD1U16V2ZY-2GPC201 SCD1U16V2ZY-2GP

1 2

C212 SCD1U16V2ZY-2GPC212 SCD1U16V2ZY-2GP

1 2

C289 SCD1U16V2ZY-2GPC289 SCD1U16V2ZY-2GP

DDR_VREF_S3

EC47

EC47

12

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Place these Caps near DM1

EC48

EC48

12

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D8V_S3

1 2

C260 SCD1U16V2ZY-2GPC260 SCD1U16V2ZY-2GP

1 2

C299 SCD1U16V2ZY-2GPC299 SCD1U16V2ZY-2GP

1 2

C548 SCD1U16V2ZY-2GPC548 SCD1U16V2ZY-2GP

1 2

C558 SCD1U16V2ZY-2GPC558 SCD1U16V2ZY-2GP

1 2

C535 SC2D2U6D3V3MX-1-GPC535 SC2D2U6D3V3MX-1-GP

1 2

C527 SC2D2U6D3V3MX-1-GPC527 SC2D2U6D3V3MX-1-GP

1 2

C567 SC2D2U6D3V3MX-1-GPC567 SC2D2U6D3V3MX-1-GP

1 2

C270 SC2D2U6D3V3MX-1-GPC270 SC2D2U6D3V3MX-1-GP

1 2

C554 SC2D2U6D3V3MX-1-GPC554 SC2D2U6D3V3MX-1-GP

12

EC130

EC130

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DDR_VREF_S3DDR_VREF_S3

1 2

C264 SCD1U16V2ZY-2GPC264 SCD1U16V2ZY-2GP

1 2

C233 SCD1U16V2ZY-2GPC233 SCD1U16V2ZY-2GP

1 2

C205 SCD1U16V2ZY-2GPC205 SCD1U16V2ZY-2GP

1 2

C305 SCD1U16V2ZY-2GPC305 SCD1U16V2ZY-2GP

1 2

C256 SCD1U16V2ZY-2GPC256 SCD1U16V2ZY-2GP

1 2

C202 SCD1U16V2ZY-2GPC202 SCD1U16V2ZY-2GP

1 2

C236 SCD1U16V2ZY-2GPC236 SCD1U16V2ZY-2GP

1 2

C259 SCD1U16V2ZY-2GPC259 SCD1U16V2ZY-2GP

1 2

C213 SCD1U16V2ZY-2GPC213 SCD1U16V2ZY-2GP

PD

DDR_VREF_S3

1 2

C232 SCD1U16V2ZY-2GPC232 SCD1U16V2ZY-2GP

1 2

C258 SCD1U16V2ZY-2GPC258 SCD1U16V2ZY-2GP

1 2

C231 SCD1U16V2ZY-2GPC231 SCD1U16V2ZY-2GP

1 2

C187 SCD1U16V2ZY-2GPC187 SCD1U16V2ZY-2GP

1 2

C229 SCD1U16V2ZY-2GPC229 SCD1U16V2ZY-2GP

1 2

C288 SCD1U16V2ZY-2GPC288 SCD1U16V2ZY-2GP

1 2

C272 SCD1U16V2ZY-2GPC272 SCD1U16V2ZY-2GP

1 2

C240 SCD1U16V2ZY-2GPC240 SCD1U16V2ZY-2GP

1 2

C192 SCD1U16V2ZY-2GPC192 SCD1U16V2ZY-2GP

Place these Caps near DM2

1D8V_S3

1 2

C239 SCD1U16V2ZY-2GPC239 SCD1U16V2ZY-2GP

1 2

C560 SCD1U16V2ZY-2GPC560 SCD1U16V2ZY-2GP

1 2

C544 SCD1U16V2ZY-2GPC544 SCD1U16V2ZY-2GP

1 2

C211 SCD1U16V2ZY-2GPC211 SCD1U16V2ZY-2GP

1 2

C555 SC2D2U6D3V3MX-1-GPC555 SC2D2U6D3V3MX-1-GP

1 2

C541 SC2D2U6D3V3MX-1-GPC541 SC2D2U6D3V3MX-1-GP

1 2

C562 SC2D2U6D3V3MX-1-GPC562 SC2D2U6D3V3MX-1-GP

1 2

C526 SC2D2U6D3V3MX-1-GPC526 SC2D2U6D3V3MX-1-GP

1 2

C536 SC2D2U6D3V3MX-1-GPC536 SC2D2U6D3V3MX-1-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

DDR2 Termination Resistor

DDR2 Termination Resistor

DDR2 Termination Resistor

Taipei Hsien 221, Taiwan, R.O.C.

D45/D46

D45/D46

D45/D46

of

13 47Wednesday, March 19, 2008

13 47Wednesday, March 19, 2008

13 47Wednesday, March 19, 2008

PD

PD

PD

5

4

3

2

1

DCBATOUT

D D

5V_CAM_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C C

B B

C103

C103

3D3V_S0

3D3V_S0

3D3V_S5

3D3V_S0

12

1 2

1KR2J-1-GP

1KR2J-1-GP

1 2

150R2J-L1-GP-U

150R2J-L1-GP-U

1 2

1KR2J-1-GP

1KR2J-1-GP

1 2

150R2J-L1-GP-U

150R2J-L1-GP-U

C87

C87

SC10U25V6KX-1GP

SC10U25V6KX-1GP

BLON_OUT28

R102

R102

10KR2F-2-GP

10KR2F-2-GP

3D3V_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

LCDVDD_S0

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

3D3V_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R343

R343

WLAN_LED#

R344

R344

PWR_LED#1

R345

R345

STBY_LED#1

R338

R338

HDD_LED#

12

12

C110

C110

SB

12

C90

C90
SCD1U25V3KX-GP

SCD1U25V3KX-GP

BRIGHTNESS28

USBPN617

USBPP617

12

EC24

EC24

12

12

WIRELED1

WIRELED1

A K

LED-O-16-GP

LED-O-16-GP
PWRLED1

PWRLED1

1 2

LED-G-62-GP

LED-G-62-GP
STBYLED1

STBYLED1

A K

LED-O-16-GP

LED-O-16-GP

HDDLED1

HDDLED1

1 2

LED-G-62-GP

LED-G-62-GP

C117

C117

ID_CLK
ID_DAT

12

C116

C116
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

U12

U12

5

IN#5

6

IN#6

7

IN#7
IN#88OUT

9

GND

G5281RC1U-GP

G5281RC1U-GP

74.05281.093

74.05281.093

ACES-CONN40C-1-GP-U2

ACES-CONN40C-1-GP-U2

20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2

1

LCDVDD_S0

4

GND

3

EN

2
1

IN#1

WLAN_TEST_LED# 28

PWR_LED# 28

STDBY_LED# 28

MEDIA_LED# 16

42
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39

40
41

LCD1

LCD1

12

C112

C112
SC1U10V2KX-1GP

SC1U10V2KX-1GP

LCDVDD_ON

12

R106

R106
100KR2J-1-GP

100KR2J-1-GP

TXACLK­TXACLK+

TXAOUT0­TXAOUT0+
TXAOUT1­TXAOUT1+
TXAOUT2­TXAOUT2+

TXBCLK­TXBCLK+

TXBOUT0­TXBOUT0+
TXBOUT1­TXBOUT1+
TXBOUT2­TXBOUT2+

DIS

DIS

1 2

R108

R108

UMA

UMA

1 2

R107

R107

0R2J-2-GP

0R2J-2-GP
0R2J-2-GP

0R2J-2-GP

TOP VIEW

20

1

ATI_LCDVDD_ON 42
GMCH_LCDVDD_ON 7

21

40

LCD CONNECTOR

ATI_TXAOUT0-42

ATI_TXAOUT0+42

ATI_TXAOUT1-42

ATI_TXAOUT1+42

ATI_TXAOUT2-42

ATI_TXAOUT2+42

ATI_TXACLK-42

ATI_TXACLK+42

ATI_TXBOUT0-42

ATI_TXBOUT0+42

ATI_TXBOUT1-42

ATI_TXBOUT1+42

ATI_TXBOUT2-42

ATI_TXBOUT2+42

ATI_TXBCLK-42

ATI_TXBCLK+42

ATI_EDID_CLK42
ATI_EDID_DATA42

5V_S0

C86

C86

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

RN9

RN9

1

SRN0J-6-GP

SRN0J-6-GP

2 3

VGA

VGA

RN51

RN51

1

SRN0J-6-GP

SRN0J-6-GP

2 3

VGA

VGA

RN53

RN53

1

SRN0J-6-GP

SRN0J-6-GP

2 3

VGA

VGA

RN48

RN48

2 3

SRN0J-6-GP

SRN0J-6-GP

1

VGA

VGA

RN57

RN57

2 3

SRN0J-6-GP

SRN0J-6-GP

1

VGA

VGA

RN29

RN29

2 3

SRN0J-6-GP

SRN0J-6-GP

1

VGA

VGA

RN27

RN27

1

SRN0J-6-GP

SRN0J-6-GP

2 3

VGA

VGA

RN55

RN55

2 3

SRN0J-6-GP

SRN0J-6-GP

1

VGA

VGA

RN17

RN17

1

SRN0J-6-GP

SRN0J-6-GP

2 3

VGA

VGA

WEBCAM POWER

U10

U10

5

IN#5

12

6

IN#6

7

IN#7
IN#88OUT

9

GND

G5281RC1U-GP

G5281RC1U-GP

74.05281.093

74.05281.093

TXAOUT0-

4

4

4

4

4

4

4

4

ID_CLK

4

ID_DAT

GND

EN

IN#1

TXAOUT0+

TXAOUT1­TXAOUT1+

TXAOUT2­TXAOUT2+

TXACLK­TXACLK+

TXBOUT0­TXBOUT0+

TXBOUT1­TXBOUT1+

TXBOUT2­TXBOUT2+

TXBCLK­TXBCLK+

4
3
2
1

1
2 3

1
2 3

1
2 3

2 3
1

2 3
1

2 3
1

1
2 3

2 3
1

12

RN6

RN6

2 3
1

SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

R91

R91
100KR2J-1-GP

100KR2J-1-GP

RN10

RN10

4

SRN0J-6-GP

SRN0J-6-GP

UMA

UMA

RN50

RN50

4

SRN0J-6-GP

SRN0J-6-GP

UMA

UMA

RN52

RN52

4

SRN0J-6-GP

SRN0J-6-GP

UMA

UMA

RN49

RN49

SRN0J-6-GP

SRN0J-6-GP

4

UMA

UMA

RN56

RN56

SRN0J-6-GP

SRN0J-6-GP

4

UMA

UMA

RN30

RN30

SRN0J-6-GP

SRN0J-6-GP

4

UMA

UMA

RN28

RN28

4

SRN0J-6-GP

SRN0J-6-GP

UMA

UMA

RN54

RN54

SRN0J-6-GP

SRN0J-6-GP

4

UMA

UMA

4

RN11

RN11

4

SRN0J-6-GP

SRN0J-6-GP

CAMERA_EN 28

3D3V_S0

UMA

UMA

12

C101

C101
SC1U10V2KX-1GP

SC1U10V2KX-1GP

GMCH_TXAOUT0- 7
GMCH_TXAOUT0+ 7

GMCH_TXAOUT1- 7
GMCH_TXAOUT1+ 7

GMCH_TXAOUT2- 7
GMCH_TXAOUT2+ 7

GMCH_TXACLK- 7
GMCH_TXACLK+ 7

GMCH_TXBOUT0- 7
GMCH_TXBOUT0+ 7

GMCH_TXBOUT1- 7
GMCH_TXBOUT1+ 7

GMCH_TXBOUT2- 7
GMCH_TXBOUT2+ 7

GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7

CLK_DDC_EDID 7
DAT_DDC_EDID 7

5V_CAM_S0

A A

3D3V_S5

3D3V_S0

3D3V_S0

PD

R341

R341

1 2

2K2R2J-2-GP

2K2R2J-2-GP

R339

R339

1 2

150R2J-L1-GP-U

150R2J-L1-GP-U

R340

R340

1 2

150R2J-L1-GP-U

150R2J-L1-GP-U

5

CHG_LED#1

CAPS_LED#1

NUM_LED#1

CHGLED1

CHGLED1

A K

LED-O-16-GP

LED-O-16-GP
CAPSLED1

CAPSLED1

1 2

LED-G-62-GP

LED-G-62-GP

NUMLED1

NUMLED1

1 2

LED-G-62-GP

LED-G-62-GP

CHARGE_LED# 28

CAP_LED# 28

NUM_LED# 28

4

LED Location and Sequence ( The edge of PCB,Top view )

Left side Right side

PWR ON

WLAN

STDBY

MEDIA

3

CHARGER

CAP.

NUM.

ZZZZ

ZZZZ

ZZZZ

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

LCD CONN / LED / WEBCAM

LCD CONN / LED / WEBCAM

LCD CONN / LED / WEBCAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

D45/D46

D45/D46

D45/D46

1

PD

PD

14 47Friday, March 14, 2008

14 47Friday, March 14, 2008

14 47Friday, March 14, 2008

PD

of

of

of

A

Layout Note:
Place these resistors close to the CRT-out connector

UMA

UMA

R357 0R2J-2-GP

R357 0R2J-2-GP

GMCH_RED7

ATI_CRT_RED42

4 4

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.

3 3

Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

2 2

GMCH_GREEN7

ATI_CRT_GREEN42

GMCH_BLUE7

ATI_CRT_BLUE42

1 2

VGA

VGA

R363 0R2J-2-GP

R363 0R2J-2-GP

1 2

UMA

UMA

R356 0R2J-2-GP

R356 0R2J-2-GP

1 2

VGA

VGA

R362 0R2J-2-GP

R362 0R2J-2-GP

1 2

UMA

UMA

R355 0R2J-2-GP

R355 0R2J-2-GP

1 2

VGA

VGA

R361 0R2J-2-GP

R361 0R2J-2-GP

1 2

GMCH_DDCDATA7

ATI_DDCDATA42

GMCH_DDCCLK7

ATI_DDCCLK42

5V_S0

1 2

FUSE-1D1A6V-4GP-U

FUSE-1D1A6V-4GP-U

12

12

R352

R352

150R2F-1-GP

150R2F-1-GP

UMA

UMA

R2 0R2J-2-GP

R2 0R2J-2-GP

1 2

R4 0R2J-2-GP

R4 0R2J-2-GP

1 2

VGA

VGA
UMA

UMA

R3 0R2J-2-GP

R3 0R2J-2-GP

1 2

R5 0R2J-2-GP

R5 0R2J-2-GP

1 2

VGA

VGA

D16

F1

F1

D16

RB751V-40-2-GP

RB751V-40-2-GP

B

Ferrite bead impedance: 10 ohm@100MHz

PD use 22 ohm 68.00215.211

CRT_R1 CRT_R

CRT_G1

CRT_B1 CRT_B

12

R350

R350

R351

R351

150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

12

EC65

EC65

SC1P50V2CN-1GP

SC1P50V2CN-1GP

10KR2F-2-GP

10KR2F-2-GP

12

EC64

EC64

SC1P50V2CN-1GP

SC1P50V2CN-1GP

3D3V_S0

R1

R1

12

EC63

EC63

SC1P50V2CN-1GP

SC1P50V2CN-1GP

12

L14

L14

1 2

FCM2012CF-220T05-GP

FCM2012CF-220T05-GP

L13

L13

1 2

FCM2012CF-220T05-GP

FCM2012CF-220T05-GP

L12

L12

1 2

FCM2012CF-220T05-GP

FCM2012CF-220T05-GP

5V @ ext. CRT side

G

CRT_DAT

CRT_CLK

KA

5V_CRT_S0

G

S D

RN1

RN1

2 3
1

2 3
1

RN2

RN2

S D

2N7002-11-GP

2N7002-11-GP

Q2

Q2
2N7002-11-GP

2N7002-11-GP

3D3V_S0

SRN10KJ-5-GP

SRN10KJ-5-GP

4

SRN10KJ-5-GP

SRN10KJ-5-GP

4

Q1

Q1

CLK_DDC1_5

12

DAT_DDC1_5

CRT_G

EC61

EC61

SC1P50V2CN-1GP

SC1P50V2CN-1GP

C

D

E

CRT I/F & CONNECTOR

CRT1

CRT1

17

11

PD

12

12

EC59

EC59

EC60

EC60

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

Hsync & Vsync level shift

UMA

UMA

R365 0R2J-2-GP

R365 0R2J-2-GP

GMCH_HSYNC7
ATI_HSYNC42

GMCH_VSYNC7

ATI_VSYNC42

1 2

R364 0R2J-2-GP

R364 0R2J-2-GP

1 2

VGA

VGA
UMA

UMA

R348 0R2J-2-GP

R348 0R2J-2-GP

1 2

R349 0R2J-2-GP

R349 0R2J-2-GP

1 2

VGA

VGA

EC66

EC66

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

DAT_DDC1_5

JVGA_VS
CLK_DDC1_5

12

EC1

EC1

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

14

1

2 3

U23A

U23A
TSAHCT125PW-GP

TSAHCT125PW-GP

7

12

EC3

EC3

SC100P50V2JN-3GP

SC100P50V2JN-3GP

12

C442

C442
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

EC4

EC4

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

5V_S0

HSYNC_4

14

4

VSYNC_4 VSYNC_5

12

5 6

7

12

EC67

EC67
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

U23B

U23B
TSAHCT125PW-GP

TSAHCT125PW-GP

DY

DY

HSYNC_5

12

EC2

EC2

SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY

DY

R360

R360

1 2

0R0402-PAD

0R0402-PAD

R346

R346

1 2

0R0402-PAD

0R0402-PAD

12
13
14
15
16

PD

VIDEO-15-42-GP-U

VIDEO-15-42-GP-U

20.20378.015

20.20378.015

JVGA_HS

JVGA_VS

6
1

7
2
8
3
9
4
10
5

CRT_R

CRT_G
CRT_BJVGA_HS

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

D15

D15

CRT_R

3

D14

D14

CRT_G

3

D13

D13

CRT_B

3

5V_CRT_S0

C1

C1

3D3V_S0

BAV99-5-GP

BAV99-5-GP

DY

DY

BAV99-5-GP

BAV99-5-GP

DY

DY

BAV99-5-GP

BAV99-5-GP

DY

DY

12

2

1

2

1

2

1

TV CONN

VGA

VGA

C438

C438

SC33P50V2JN-3GP

SC33P50V2JN-3GP

1 2

L16

L16

ATI_TV_LUMA42

R359

R359
75R2F-2-GP

75R2F-2-GP

VGA

PD

1 1

ATI_TV_CRMA42

A

VGA

1 2

R358

R358
75R2F-2-GP

75R2F-2-GP

VGA

VGA

1 2

1 2

IND-1D2UH-5-GP

IND-1D2UH-5-GP

12

VGA

VGA

C440

C440
SC150P50V2JN-3GP

SC150P50V2JN-3GP

VGA

VGA

C437

C437

1 2

VGA

VGA

L15

L15

1 2

IND-1D2UH-5-GP

IND-1D2UH-5-GP

12

VGA

VGA

C439

C439
SC150P50V2JN-3GP

SC150P50V2JN-3GP

VGA

VGA

SC33P50V2JN-3GP

SC33P50V2JN-3GP

LUMA_1

12

C434

C434
SC270P50V2KX-1GP

SC270P50V2KX-1GP

VGA

VGA

CRMA_1

12

C433

C433
SC270P50V2KX-1GP

SC270P50V2KX-1GP

VGA

VGA

B

TVOUT1

TVOUT1

5

GND

1

GND

3

LUMA

4

CRMA

2

GND

6

GND

MINDIN4-29-GP

MINDIN4-29-GP

22.10021.E91

22.10021.E91

VGA

VGA

LUMA_1

CRMA_1

C

3D3V_S0

D12

D12

BAV99-5-GP

BAV99-5-GP

2

3

DY

DY

1

D11

D11

BAV99-5-GP

BAV99-5-GP

2

3

DY

DY

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

D

Date: Sheet of

CRT/TV Connector

CRT/TV Connector

CRT/TV Connector

Taipei Hsien 221, Taiwan, R.O.C.

D45/D46

D45/D46

D45/D46

E

PD

PD

of

15 47Tuesday, March 18, 2008

15 47Tuesday, March 18, 2008

15 47Tuesday, March 18, 2008

PD