VB161AX (Ginger) Main Board 04
Index
System Block
PAGE CONTENTS
01
02
4 4
3 3
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
A
TOP PAGE
Block Diagram
R-C for EMI
PLL
CPU(Banias)
CPU(Banias)
CPU (Banias)
CPU (Pull-UP / MISC))
Temp sensor / Fan control
GMCH (Montara) HOST / HubLink
GMCH(Montara) DDR / Video
GMCH(Montara) Power / Misc
GMCH(Montara) Bypass CAP/Refrence
DDR Dumping-R
DDR SLOT-0
DDR SLOT-1
DDR Termination-R
ICH4 Hub-Link/CPU Misc/PCI//USB
ICH4 IDE/Power
ICH4 Bypass CAP
PAGE CONTENTS
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pullup for PCI / SMB Selector
FWH / DEBUG CN / PCI REQ Cut off sw
S-Video
IEEE1394
PCIC PCI-I/F
PCIC Card I/F
PC-Card VCC SW
CN PCMCIA
CODEC
SP-AMP
MIC AMP
Super-I/O
ANN
ANN Pull-up / MISC
BLANK
On Board LAN
On Board LAN Pulse-Transe
Reset IC / Emergency Temp shut down
CN KBC / CN LCD / CN Pointing
CN USB / CN IEEE1394
PAGE
41
42
43
44
45
46
47
48
49
50
51
52
CONTENTS
CN Mini-PCI
CN MDC
CN SD-SLOT
CN P-R
CN Audio
CN Dock
HDD Pull-up/HDD Termination/CN HDD
CN CN-Board
CN CFL-INV / CN ST-LCD
BLANK
CN S-OUT / Line-In
BLANK
Version History
Version Date
00
Jul-20-'02 Initial
Description
Nile
Power Block
PAGE CONTENTS
53
54
55
56
57
58
59
60
2 2
61
62
63
64
65
66
67
68
69
70
71 Power/PMU/Scont
72 Power/PMUEtc1
73 Power/PowerSequence
Design Rquirement documents
1 1
DWG#
A5CP149522-XX
A1CP134338-XX
Power/TopPage
Power /DDC/CPU Core
Power/DDC/CPU Core2
Power/DDC/VCCP
Power/DDC/1.25V SUS
Power/DDC/2.5V SUS/1.2V MAIN
Power/DDC /3.3V STD/5VSUS
Power/DDC/Charger
Power/LDO/System
Power/LDO/PMU
Power/Node/DCIn
Power/Node/Vattery
Power/Node/PWR_1
Power/Node/Switch
Power/PMU/LUNA1 (PMU)
Power/PMU/LUNA2 (EC)
Power/PMU/AmMeter
Power/PMU/VolMeter
Description
Ginger A/W requirement
Common H/W specification of mobile platform
USB CHANEL
PCIINT#
USB1
USB2
USB3
USB4
USB5
USB6
Device
System -1
P-R1
System-2
PR -2
Bluetooth
Bay
PCI REQ#/GNT#
REQ#/GNT# Device
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
REQ#5
PCMCIA
IEEE1394
Unused
On Board LAN
Mini PCI
Unused
PCI INTERRUPT
PCIINT#
INT#0
INT#1
INT#2
INT#3
INT#4
INT#5
INT#6
INT#7
Device
PCIC
PCIC
Mini-PCI
Mini-PCI
On Board LAN
IEEE1394
Unused
Unused
SMBus
0,0,1
0,1,0
0,1,1
DIMM SLOT-0/1 0,0,0
PMU
PLL
ADM1030
USB#1 / IDE
SMbus/AC-97
USB#3
USB#2
PCI BUS NUMBER = #0
IDSEL
AD16
AD17
AD18
00h
01h
02h
1Dh ICH4-M (USB2.0/USB1.1)
1Fh
Device Dev.ID
GMCH(HOST/DRAM BRIDGE)
GMCH(AGP BRIDGE)
Unused
ICH4-M(Hub I/F to PCI Bridge) 1Eh
ICH4-M(LPC,IDE,SMbus,AC-97)
PCI BUS NUMBER = #2
IDSEL Device
AD24
AD26 0Ah
AD28 0Ch
AD29 SMBCNT[2:0] Device
AD30 0Eh IEEE1394
AD31 0Fh Unused
Rev. Date Design Check Appr. Description
Dev.ID
08h Reserved for ICH4 (Internal LAN)
0Dh
Ohgomi
OnBoard LAN 09h AD25
PCIC
On Board LAN
MiniPCI
Fuchida Fukuyo 02/05/07
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
1 73 Konaka
A
Nile
system block diagram
Banias
4 4
Thermal
Sensor
RGB
LVDS
DVOB
DVOC
Sout1
CRT
LCD
TV 1
IDE0 ATA66/100
Micro-FCPGA
478pin
PSB 1.05V 400MHz
Montara-GM
FC-BGA
593pin
P14,15,16,17
Hublink 1.8V 266MHz
DDR 2.5V 200/266MHz
PCI 3.3V 33MHz
ICH4-M
3 3
HDD
492
MBGA
P22,23,24,25
PLL
SODIMM0
MDC MiniPCI
SODIMM1
On
Board LAN
TERM
PCMCIA
IDE1 ATA33/66/100
BAY1
AC97 modem
AC97 audio
Audio
CODEC
USB0
System-1
LPC 3.3V 33MHz
2 2
USB1
P-R -1
USB2
System-2
USB3
P-R -2
USB4
Bluetooth
1 1
USB5
Bay
ASIC FWH
PMU
ANN LUNA
Rev. Date Design Check Appr. Description
Block
Diagram
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
2 73
A
Nile
4 4
3 3
2 2
1 1
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
CAST
Sheet
3 73
Placecyrstalwithin500milsofClkTITAN
(byALMADOR-MCHIPSET/MOBILETUALATIN
PROCESSOR
CUSTMERREFERENCEBOARDSCHEMATICS
rev.0.80)
PWR_PLL_DVCC
2 1
None
4 4
PWR_3VSUS
3 3
R1
2 1
R2
GND1
FL1
2 1
LQM21DN1R0N00D
FL2
2 1
BLM21P300S
2 2
10 1/16W 1%
10 1/16W 1%
1 2
+
C13
10uF 6.3V (TA)
GND1
A
SMB_CLK_PLL 21
SMB_DATA_PLL 21
SUSB# 18,32,33,34,38,57,58,59,68,73
STP_CPU# 18,54
STP_PCI# 18
VTTPWRGD# 73
2 1
C14 0.1uF 16V 20%
GND1
2 1
C6 0.1uF 16V 20%
X1
14.31818MHz
C1
16pF 25V
2 1
None
2 1
1 2
C7 0.1uF 16V 20%
1 2
1 2
GND1
PWR_3VSUS
1 2
C8 0.1uF 16V 20%
C2
16pF 25V
None
R3
10k 1/16W 5%
2 1
C9 1uF 10V 20%
C10 0.1uF 16V 20%
WN0126
2 1
2 1
C11 0.1uF 16V 20%
WN0125
PWR_PLL_VCCA
PWR_PLL_DVCC
2 1
C12 0.1uF 16V 20%
GND1
M1
1
XTAL_IN
2
XTAL_OUT
46
S1
36
S2
GND1
26
SCLK
25
SDATA
20
66MHz_IN/3V66_5
21
PWR_DWN#
45
CPU_STOP#
30
PCI_STOP#
24
PWR_DG#
22
VDD_CORE
33
VDD48
48
VDD_REF
11
VDD_PCI
28
VDD_3V66_1
15
VDD_3V66_2
44
VDD_CPU1
40
VDD_CPU2
R18
2 1
37
WN0124
475 1/16W 1%
23
7
16
27
3
32
41
IREF
GND_CORE
GND_PCI
GND_3V66_1
GND_3V66_2
GND_REF
GND_48MHZ
GND_CPU
CY28339ZCT
Place these capacitors near PLL.
CPU1
CPU#1
CPU2
CPU#2
3V66_0
3V66_1/VCH
66BUFF0/3V66_2
66BUFF1/3V66_3
66BUFF2/3V66_4
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
PCI_F0
PCI_F1
PCI_F2
DOT
REF0
USB
NOTE:
Those resister units close the PLL.
(Not same as Alamador requirements!)
※
43
PLL_CPU1
PLL_CPU1#
※
42
PLL_CPU2
39
PLL_CPU2#
※
38
※
29
31
17
18
19
8
9
10
12
13
14
4
5
6
34
WN0116
35
WN0117
47
WN0115
R518 33 1/16W 1%
R519 33 1/16W 1%
R520 33 1/16W 1%
R521 33 1/16W 1%
R4 10 1/16W 1%
2 1
R6 22 1/16W 1%
2 1
R8 22 1/16W 1%
2 1
WN0127
PLL_PCI_F1
WN0123
WN0122
WN0121
WN0120 WN0109
WN0119
WN0118
RM5
4
3
2
1
10x4 1/16W 5%
1 2
1 2
1 2
1 2
WN0101
WN0102
WN0103
RM3
8
7
6
5
10x4 1/16W 5%
RM4
8
7
6
5
10x4 1/16W 5%
5
6
7
8
R522 49.9 1/16W 0.5%2 1R523 49.9 1/16W 0.5%2 1R524 49.9 1/16W 0.5%1 2R525 49.9 1/16W 0.5%
GND1
1
WN0104
2
WN0107
3
WN0105
4
WN0106
1
WN0108
2
3
WN0110
4
WN0111
R24 BLM15AG700
1 2
2 1
1 2
1 2
1 2
1 2
WN0112
WN0114
WN0113
2 1
R19 0 1/16W
R20 0 1/16W
R21 0 1/16W
R22 BLM15AG700
R23 BLM15AG700
R5 0 1/16W
1 2
R7 0 1/16W
2 1
R9 0 1/16W
2 1
R10 BLM15AG700
2 1
R11 BLM15AG700
2 1
R12 BLM15AG700
2 1
R13 BLM15AG700
2 1
R14 BLM15AG700
2 1
R15 BLM15AG700
2 1
R16 BLM15AG700
2 1
R17 BLM15AG700
2 1
CLK_100_CPU1 10
CLK_100_CPU1# 10
CLK_100_CPU2 5
CLK_100_CPU2# 5
DREFSSCLK 11
CLK_66_ICH 18
C3
C4
5pF 25V
C5
2 1
1 2
5pF 25V
5pF 25V
2 1
GND1
CLK_66_MCH 10
CLK_33_ICH 18
CLK_33_FWH 22,68
CLK_33_PCIC 25
CLK_33_ASIC 33
CLK_33_SIO 22,32,48
CLK_33_MINI 41
CLK_1394 24
CLK_LAN33 36
CLK_48_MCH 11
CLK_48_ASIC 33
CLK_48_ICH 18
CLK_14_ICH 18,29
CLK_SIO14 32
CLK_14_TVO 23
Nile
2 1
1 2
1 2
1 2
1 2
2 1
2 1
2 1
2 1
2 1
2 1
1 2
C1510pF 25V
C1610pF 25V
C1710pF 25V
C1810pF 25V
C1910pF 25V
C2010pF 25V None
C2110pF 25V None
Place each dumping resistor of clock line near PLL as
possible.(less than 10mm)
C2210pF 25V
2 1
C2310pF 25V
C2410pF 25V None
None
C2510pF 25V None
C2610pF 25V None
1 1
C2710pF 25V
C2810pF 25V None
GND1
2 1
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
PLL
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
4 73
A
Nile
M26
H24
G24
M23
N24
M25
H26
N25
AA24
U23
R24
R26
R23
AA23
U26
U25
AA26
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
M2A
A19
D#0
A25
D#1
A22
D#2
B21
D#3
A24
D#4
B26
D#5
A21
D#6
B20
D#7
C20
D#8
B24
D#9
D24
D#10
E24
D#11
C26
D#12
B23
D#13
E23
D#14
C25
D#15
H23
D#16
G25
D#17
L23
D#18
D#19
D#20
F25
D#21
D#22
J23
D#23
D#24
J25
D#25
L26
D#26
D#27
D#28
D#29
D#30
K25
D#31
Y26
D#32
D#33
T25
D#34
D#35
V23
D#36
D#37
D#38
D#39
D#40
D#41
V24
D#42
D#43
V26
D#44
Y23
D#45
D#46
Y25
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
Banias
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
ADSTB#0
ADSTB#1
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV#0
DINV#1
DINV#2
DINV#3
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
U3
AE5
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
CPU_A#3
CPU_A#4
CPU_A#5
CPU_A#6
CPU_A#7
CPU_A#8
CPU_A#9
CPU_A#10
CPU_A#11
CPU_A#12
CPU_A#13
CPU_A#14
CPU_A#15
CPU_A#16
CPU_A#17
CPU_A#18
CPU_A#19
CPU_A#20
CPU_A#21
CPU_A#22
CPU_A#23
CPU_A#24
CPU_A#25
CPU_A#26
CPU_A#27
CPU_A#28
CPU_A#29
CPU_A#30
CPU_A#31
CPU_ASTB#0 10
CPU_ASTB#1 10
CPU_DSTBN#0 10
CPU_DSTBP#0 10
CPU_DSTBN#1 10
CPU_DSTBP#1 10
CPU_DSTBN#2 10
CPU_DSTBP#2 10
CPU_DSTBN#3 10
CPU_DSTBP#3 10
CPU_DBI#0 10
CPU_DBI#1 10
CPU_DBI#2 10
CPU_DBI#3 10
A#3
A#4
A#5
A#6
A#7
A#8
A#9
CPU_A#[3:31] 10
TPVIA1
TPVIA3
TPVIA6
GND1
CLK_100_CPU2 4
CLK_100_CPU2# 4
CPU_RESET# 8,10
CPU_ADS# 10
CPU_BNR# 10
CPU_BPRI# 10
CPU_BR0# 10
CPU_DEFER# 10
CPU_HIT# 10
CPU_HITM# 10
CPU_RS#[0:2] 10
CPU_PWRGD 8,18
CPU_INIT# 8,18
CPU_SMI# 8,18
CPU_INTR 8,18
CPU_NMI 8,18
CPU_A20M# 8,18
CPU_IGNNE# 8,18
CPU_STPCLK# 8,18
CPU_SLP# 8,18
CPU_DPSLP# 8,10,18
CPU_THMDA 9
CPU_THMDC 9
ITP_TCK 8
ITP_TDI 8
ITP_TMS 8
ITP_TRST# 8
CPU_DPWR# 8,10
1 2
1 2
R25 1K 1/16W 5% None
R26 1K 1/16W 5% None
CPU_RS#0
CPU_RS#1
CPU_RS#2
☆
☆
CPU_TEST1
CPU_TEST2
CPU_D#[0:63] 10
4 4
3 3
CPU_D#0
CPU_D#1
CPU_D#2
CPU_D#3
CPU_D#4
CPU_D#5
CPU_D#6
CPU_D#7
CPU_D#8
CPU_D#9
CPU_D#10
CPU_D#11
CPU_D#12
CPU_D#13
CPU_D#14
CPU_D#15
CPU_D#16
CPU_D#17
CPU_D#18
CPU_D#19
CPU_D#20
CPU_D#21
CPU_D#22
CPU_D#23
CPU_D#24
CPU_D#25
CPU_D#26
CPU_D#27
CPU_D#28
CPU_D#29
CPU_D#30
CPU_D#31
CPU_D#32
CPU_D#33
CPU_D#34
CPU_D#35
CPU_D#36
CPU_D#37
CPU_D#38
CPU_D#39
CPU_D#40
CPU_D#41
CPU_D#42
CPU_D#43
CPU_D#44
CPU_D#45
CPU_D#46
CPU_D#47
CPU_D#48
CPU_D#49
CPU_D#50
CPU_D#51
CPU_D#52
CPU_D#53
CPU_D#54
CPU_D#55
CPU_D#56
CPU_D#57
CPU_D#58
CPU_D#59
CPU_D#60
CPU_D#61
CPU_D#62
CPU_D#63
2 2
B15
B14
B11
B18
A18
A16
A15
A13
C12
A12
C11
B13
C19
F23
N2
L1
J3
N4
L4
K3
K4
H1
K1
L2
E4
B5
B4
D1
D4
C2
A3
C6
A6
B7
C5
M2B
BCLK0
BCLK1
RESET#
ADS#
BNR#
BPRI#
BR0#
DEFER#
HIT#
HITM#
RS#0
RS#1
RS#2
PWRGOOD
INIT#
SMI#
LINT0
LINT1
A20M#
IGNNE#
STPCLK#
SLP#
DPSLP#
THERMDA
THERMDC
ITP_CLK0
ITP_CLK1
TCK
TDI
TDO
TMS
TRST#
DPWR#
TEST1
TEST2
Banias
TRDY#
LOCK#
DBSY#
DRDY#
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
FERR#
IERR#
PROCHOT#
THERMTRIP#
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
PRDY#
PREQ#
VID0
VID1
VID2
VID3
VID4
VID5
M3
J2
M2
H2
R2
CPU_REQ#0
P3
CPU_REQ#1
T2
CPU_REQ#2
P1
CPU_REQ#3
T1
CPU_REQ#4
D3
A4
B17
C17
A7
C8
ITP_BPM#0
B8
ITP_BPM#1
A9
ITP_BPM#2
C9
ITP_BPM#3
ITP_BPM#4
A10
ITP_BPM#5
B10
E2
F2
F3
G3
G4
H4
CPU_TRDY# 10
CPU_LOCK# 10
CPU_DBSY# 10
CPU_DRDY# 10
CPU_REQ#[0:4] 10
CPU_IERR# 8
CPU_PROCHOT# 8
CPU_THERMTRIP# 8,18
ITP_BPM#5 8
VID0 54
VID1 54
VID2 54
VID3 54
VID4 54
VID5 54
CPU_FERR# 8,18
TPVIA2
TPVIA4
TPVIA5
TPVIA7
TPVIA8
CPUASTB#0,CPUASTB#1はそれそれの両側をGND1にて囲うこと
GuardCPUASTB#0,CPUASTB#1withGND1respectively.
CPUDSTBx#[0:3]は各ペアごとに両側をGND1にて囲うこと
EachCPUDSTBx#[0:3]strobepearshouldbeguardedwithGND1respectively.
☆印の付いた信号線(CPUTHMDA,CPUTHMDC)は、
GND1で両側をガードすること
(12ページ参照)
CPUTHMDA, CPUTHMDC with
is guraded with GND1
☆
BANIAS_1
1 1
CPU 1 of 3
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
CAST
Sheet
5 73
PWR_1.5VMAINPWR_1.8VMAIN
2 1
1 2
R27
0 1/16W
None
4 4
1 2
C29
GND1
3 3
2 2
A
R28
0 1/16W
10uFと0.01uFをセットでそれぞれのVCCAピンに配置
2 1
C30
0.01uF 16V RK
10uF 6.3V 2012 RM
1 2
C31
2 1
C32
0.01uF 16V RK
10uF 6.3V 2012 RM
PWR_VCCP
1 2
R29
1K 1/16W 1%
1 2
R30 2K 1/16W 0.5%
GND1
2 1
GND1
2 1
1 2
C33
0.01uF 16V RK
R56,R60,TP102-104 place
within 0.5" of CPU
TPVIA9
2 1
R35 27.4 1/16W 1%
R36 54.9 1/16W 1%2 1R38 54.9 1/16W 1%
抵抗R64,R66はCPUから0.5inch以内に置き、
18mil幅で配線すること。
抵抗R65,R67はCPUから0.5inch以内に置き、
5mil幅で配線すること。
Place R64,R66 near CPU (within 0.5 inch).
And the width of these patterns are 18 mil.
Place R65,R67 near CPU (within 0.5 inch).
And the width of these patterns are 5 mil.
CPU_VCCA
1 2
C34
C35
0.01uF 16V RK
10uF 6.3V 2012 RM
TPVIA10
TPVIA11
CPU_COMP0
CPU_COMP1
CPU_COMP2
CPU_COMP3
1 2
R37 27.4 1/16W 1%
2 1
CPU_GTL_REF0
CPU_GTL_REF1
CPU_GTL_REF2
CPU_GTL_REF3
C36
10uF 6.3V 2012 RM
AC26
AD26
AC1
M2C
F26
VCCA0
B1
VCCA1
N1
VCCA2
VCCA3
GTLREF0
E26
GTLREF1
G1
GTLREF2
GTLREF3
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
Banias
VCCQ0
VCCQ1
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCSENSE
VSSSENSE
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
P23
W4
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
AE7
AF6
B2
C3
C14
C16
E1
AF7
PWR_VCCP
CPU_VCCSENSE
CPU_VSSSENSE
CPU_R_B2
CPU_R_C3
CPU_R_C14
CPU_R_C16
CPU_R_E1
CPU_R_AF7
R34
GND1
2002.05.15
Change Part R994, R995
56 -> 54.9 1%
2 1
None
1 2
None
TPVIA12
TPVIA13
TPVIA14
R33 0 1/16W
2 1
None
TPVIA15
2 1
None
PWR_VCCP
1K 1/16W 5%
R31
54.9 1/16W 1%
R32
54.9 1/16W 1%
GND1
R847
0 1/16W
2 1
PSI# 54
TP127,TP128はCPUから0.5inch以内に置く
Place TP127,TP128 near CPU (within 0.5 inch).
1 1
GND1 GND1
M21
M24
N22
N23
N26
M2E
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS
E25
VSS
F1
VSS
F4
VSS
F5
VSS
F7
VSS
F9
VSS
F11
VSS
F13
VSS
F15
VSS
F17
VSS
F19
VSS
F21
VSS
F24
VSS
G2
VSS
G6
VSS
G22
VSS
G23
VSS
G26
VSS
H3
VSS
H5
VSS
H21
VSS
H25
VSS
J1
VSS
J4
VSS
J6
VSS
J22
VSS
J24
VSS
K2
VSS
K5
VSS
K21
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L22
VSS
L25
VSS
M1
VSS
M4
VSS
M5
VSS
VSS
VSS
N3
VSS
N6
VSS
VSS
VSS
VSS
P2
VSS
P5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
W21
AA11
AA13
AA15
M2D
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
VCC
Y6
VCC
Y22
VCC
AA5
VCC
AA7
VCC
AA9
VCC
VCC
VCC
VCC
Banias
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
PWR_CPUCORE PWR_CPUCORE
BANIAS_2
Banias
TITLE
Nile
VB161AX MAIN
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
6 73
A
CPU Socket
Nile
Primary Side
4 4
PWR_CPUCORE
M3
BANIAS
C37 0.22uF 10V FZ1 2C38 0.22uF 10V FZ2 1C39 0.22uF 10V FZ1 2C40 0.22uF 10V FZ2 1C41 0.22uF 10V FZ1 2C42 0.22uF 10V FZ1 2C43 0.22uF 10V FZ2 1C44 0.22uF 10V FZ2 1C45 0.22uF 10V FZ2 1C46 0.22uF 10V FZ1 2C47 0.22uF 10V FZ1 2C48 0.22uF 10V FZ2 1C49 0.22uF 10V FZ1 2C50 0.22uF 10V FZ1 2C51 0.22uF 10V FZ1 2C52 0.22uF 10V FZ
2 1
1 2
1 2
2 1
1 2
1 2
1 2
2 1
1 2
C57
C58
C59
C60
C61
C62
C63
C64
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
C65
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
2 1
2 1
1 2
C67
C66
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
2 1
1 2
C68
C69
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
2 1
2 1
C70
C71
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
1 2
C72
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
GND1
12 x 150uF
CPU Socket
Secondary Side
3 3
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C846
C847
C848
C849
C850
C851
C855
10uF 6.3V 2012 RM
GND1
C845
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
C852
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
2 2
1 2
C853
C854
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
Sand pit ciucuit!
10uF 6.3V 2012 RM
2 1
2 1
1 2
2 1
C73
C74
C75
1 2
0.1uF 10V RK
R41
1 2
10 1/16W 5%
C76
0.1uF 10V RK
R42
10 1/16W 5%
0.1uF 10V RK
0.1uF 10V RK
R39
R40
1 2
2 1
10 1/16W 5%
10 1/16W 5%
本回路ブロックは、CPU周囲のPWRCPU内層ベタ
の4辺に均等に配置すること。
PWR_VCCP
GND1
4x 2.2uF
11x 2.2uF
GND1
図中のコンデンサはCPUVCC供給側に配置すること。
2 1
2 1
1 2
2 1
1 2
C79
0.1uF 10V RK
C80
0.1uF 10V RK
C81
0.1uF 10V RK
C82
0.1uF 10V RK
1 2
C83
0.1uF 10V RK
C84
0.1uF 10V RK
2 1
1 2
C85
0.1uF 10V RK
C86
1 2
0.1uF 10V RK
C87
C88
1 2
10uF 6.3V 2012 RM
10uF 6.3V 2012 RM
GND1
CPU
1 1
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
PassC
Appr. Check Design
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
CAST
Sheet
7 73
A
CPU_PWRGD 5,18
CPU_RESET# 5,10
CPU_FERR# 5,18
4 4
CPU_IERR# 5
CPU_THERMTRIP# 5,18
ITP_BPM#5 5
ITP_TDI 5
ITP_TMS 5
CPU_PROCHOT# 5
ITP_TRST# 5
ITP_TCK 5
3 3
CPU_INIT# 5,18
CPU_NMI 5,18
CPU_DPWR# 5,10
PREQ#
CPUコネクタの近くに置くこと
R43 330 1/16W 5%
R44 56 1/16W 5%
R45 56 1/16W 5%
1 2
R46 56 1/16W 5%
1 2
R49 56 1/16W 5%
2 1
R50 10 1/16W 5%
1 2
R51 10 1/16W 5%
1 2
R52 10 1/16W 5%
2 1
R53 56 1/16W 5%
2 1
R55 10 1/16W 5%
1 2
R56 10 1/16W 5%
1 2
PWR_VCCP
2 1
1 2
PWR_3VMAIN
1
2 3
2 1
2 3
Q65
DTC143TE
R47
2.2K 1/16W 5%
Q1
2SC4617
None
FWHINIT# 22
2 1
R48
None
1.5K 1/16W 5%
R54
CPU_INIT# 5,18
2 1
330 1/16W 5%
None
PWR_VCCP
Q2
1
2SC4617
None
2 3
GND1
1
Nile
F-PART1
CPU_FG1
2 1
1 2
C91 100pF 25V AJ
2 1
C98 100pF 25V AJ
None
C92 100pF 25V AJ
1 2
C99 100pF 25V AJ
None
2 1
1 2
None
None
C93 100pF 25V AJ
C100 100pF 25V AJ
GND1
F-PART2
F-PART3
F-PART1,2,3 is fixed screw hole for Heat spreader of the CPU
CPU_FG2
CPU_FG3
2 1
1 2
C90 100pF 25V AJ
C89 100pF 25V AJ
CPU_A20M# 5,18
CPU_IGNNE# 5,18
CPU_STPCLK# 5,18
2 2
CPU_SLP# 5,18
CPU_DPSLP# 5,10,18
CPU_SMI# 5,18
CPU_INTR 5,18
1 2
2 1
2 1
2 1
C94 100pF 25V AJ
None
None
C96 100pF 25V AJ
C95 100pF 25V AJ
None
C97 100pF 25V AJ
None
1 1
R854
2 1
0 1/16W 1608 None
R855
1 2
0 1/16W 1608
R856
2 1
0 1/16W 1608
R857
2 1
0 1/16W 1608
R858
1 2
0 1/16W 1608 None
R859
2 1
0 1/16W 1608
R860
2 1
0 1/16W 1608
R861
2 1
0 1/16W 1608
R862
2 1
0 1/16W 1608
GND1
GTL
PullUp
TITLE
VB161AX MAIN
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
8 73
A
Nile
4 4
4.7uF 10V 2012 FZ
GND1
TP1
TESTPAD
FAN_TACH
2 1
C101
TP2
TESTPAD
CN1
1
2
3
+
GND
TACH
FAN CN-3pin
PWR_5VMAIN PWR_5VMAIN
Q3
SI2305DS
PWR_3VMAIN
C102
M3
GND1
2
TACH
16
SMBCLK
SMBDATA15INT#
10
DX+
9
DX-
3
NC
4
NC0
11
NC1
12
NC2
13
ADD
ADM1030R4
PWM_OUT
THERM#
FANFAULT#
VCC
GND0
FAN_TACH
SMB_CLK_THRM 21
SMB_DATA_THRM 21
3 3
CPU_THMDA 5
CPU_THMDC 5
1 2
C103
1000pF 25V RK
None
O
O
1
14
7
8
6
5
ADM1030_PWMOUT
PWR_3VMAIN
2 1
C104
0.1uF 16V FZ
GND1
RM6
1
2
4
3
10Kx4 1/16W 5%
R57
1 2
0 1/16W
None
SMT8
8
7
5
6
FAN_FET_GATE
ATFINT# 68
THLTL# 18,67
R866
2 1
10K 1/16W %
THLTL#_GMCH 10
2 1
PWR_3VMAIN
3 2
1
4700pF 25V RK
これらの部品はCPUの近くに配置すること。
Place each component near CPU.
CPUTHMDA,CPUTHMDCのパターンが最短になるよう、
ADM1030(M5)は、CPUの近傍に配置すること。
2 2
Place ADM1030(M5) near CPU(M3) to control
CPU_THMDA,CPU_THMDC patterns as short
as possible.
CPUTHMDA,CPUTHMDC両端に入っているコンデンサ
C108(1000pF)は、ADM1030(M5)の直近に配置すること。
Place and C108(1000pF) nearest ADM1030(M5).
○印の付いた信号線(CPUTHMDA,CPUTHMDC)は、
GND1で両側をガードすること
(下図参照)
Guard these signals(CPU_THMDA,CPU_THMDC) that marked "O"
at the both sides by GND1 pattern.
(Look at follow figure.)
10mil
1 1
10mil
10mil
10mil
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
CAST
Sheet
9 73
PWR_1.25VSUS
R68
1 2
56 1/16W 5%
Nile
None
A
M4A
CPU_A#[3:31] 5
4 4
CPU_ASTB#0 5
CPU_ASTB#1 5
3 3
CPU_DSTBN#0 5
CPU_DSTBP#0 5
CPU_DSTBN#1 5
CPU_DSTBP#1 5
CPU_DSTBN#2 5
CPU_DSTBP#2 5
CPU_DSTBN#3 5
CPU_DSTBP#3 5
CPU_DBI#0 5
CPU_DBI#1 5
CPU_DBI#2 5
CPU_DBI#3 5
CPU_A#3
CPU_A#4
CPU_A#5
CPU_A#6
CPU_A#7
CPU_A#8
CPU_A#9
CPU_A#10
CPU_A#11
CPU_A#12
CPU_A#13
CPU_A#14
CPU_A#15
CPU_A#16
CPU_A#17
CPU_A#18
CPU_A#19
CPU_A#20
CPU_A#21
CPU_A#22
CPU_A#23
CPU_A#24
CPU_A#25
CPU_A#26
CPU_A#27
CPU_A#28
CPU_A#29
CPU_A#30
CPU_A#31
2 2
W25
AA27
W24
W23
W27
AA28
W28
AB27
AB28
AA26
P23
T25
T28
R27
U23
U24
R24
U28
V28
U27
T27
V27
U25
V26
Y24
V25
V23
Y25
Y27
Y26
T26
K27
C27
D26
E22
E21
D18
E18
E25
B25
G19
J28
J25
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HADSTB#0
HADSTB#1
HDSTBN#0
HDSTBP#0
HDSTBN#1
HDSTBP#1
HDSTBN#2
HDSTBP#2
HDSTBN#3
HDSTBP#3
DINV#0
DINV#1
DINV#2
DINV#3
Montara-GM
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18
CPU_D#0
CPU_D#1
CPU_D#2
CPU_D#3
CPU_D#4
CPU_D#5
CPU_D#6
CPU_D#7
CPU_D#8
CPU_D#9
CPU_D#10
CPU_D#11
CPU_D#12
CPU_D#13
CPU_D#14 CPU_RS#0
CPU_D#15
CPU_D#16
CPU_D#17
CPU_D#18
CPU_D#19
CPU_D#20
CPU_D#21
CPU_D#22
CPU_D#23
CPU_D#24
CPU_D#25
CPU_D#26
CPU_D#27
CPU_D#28
CPU_D#29
CPU_D#30
CPU_D#31
CPU_D#32
CPU_D#33
CPU_D#34
CPU_D#35
CPU_D#36
CPU_D#37
CPU_D#38
CPU_D#39
CPU_D#40
CPU_D#41
CPU_D#42
CPU_D#43
CPU_D#44
CPU_D#45
CPU_D#46
CPU_D#47
CPU_D#48
CPU_D#49
CPU_D#50
CPU_D#51
CPU_D#52
CPU_D#53
CPU_D#54
CPU_D#55
CPU_D#56
CPU_D#57
CPU_D#58
CPU_D#59
CPU_D#60
CPU_D#61
CPU_D#62
CPU_D#63
CPUADSTB#0,CPUADSTB#1はそれそれの両側をGND1にて囲うこと
Guard CPU_ADSTB#0, CPU_ADSTB#1 with GND1 respectively.
CPUDSTBx#[0:3]はそれぞれ各ペアごとに両側をGND1にて囲うこと
Each CPU_DSTBx#[0:3] pair should be guarded with GND1 respectively.
CPU_D#[0:63] 5
LCLKCTLB 11
DVODETECT 11
R60
R61
GMCH Strap configrations
2 1
None
R69
1K 1/16W 5%
GMCH_GST0
GMCH_GST1
GMCH_PSB105#
PWR_VCCP
1 2
51 1/16W 0.5%
1 2
1 2
100 1/16W 0.5%
GND1
2 1
None
R70
1K 1/16W 5%
PWR_VCCP
1 2
R58
51 1/16W 0.5%
2 1
R59
100 1/16W 0.5%
GND1
1 2
C107
1uF 10V 1608 FZ
HLVREF_MCH 13
PSWING_MCH 13
2 1
None
R71
1K 1/16W 5%
1 2
C108
PWR_1.5VMAIN PWR_3VMAIN
2 1
None
R72
C105
1uF 10V 1608 FZ
0.1uF 16V FZ
2 1
None
R73
1K 1/16W 5%
LCLKCTLB
DVODETECT
ADDID0
ADDID1
ADDID2
ADDID3
ADDID4
ADDID5
ADDID6
GST0
GST1
PSB105#
2 1
C106
0.1uF 16V FZ
1 2
C111
0.01uF 25V FZ
GND1 GND1
1K 1/16W 5%
None
Desc. Low High Signal Name
CPU
DVO I/F
00 : FSB=400MHz/Mem=133MHz/Gfx=200/DDR=1.2
01 : FSB=400MHz/Mem=100MHz/Gfx=200/DDR=1.2
PSB VCC
C827
100pF 25V AJ
None
GND1
PWR_VCCP
2 1
R63
51 1/16W 0.5%
2 1
2 1
R65
100 1/16W 0.5%
GND1
○
○
1 2
C112
0.01uF 25V FZ
1 2
GND1
Banias Pentium4-M
Exsist None
PSB=1.05V REserved
2 1
CLK_100_CPU1 4
CLK_100_CPU1# 4
PCI_RST# 18,21,22,23,24,30,32,33,34,48,68
CPU_LOCK# 5
CPU_DBSY# 5
CPU_DRDY# 5
CPU_REQ#[0:4] 5
GMCH_HDVREF
GMCH_HAVREF
GMCH_HCCVREF
2 1
C110
C109
1uF 10V 1608 FZ
C826
100pF 25V AJ
None
GND1
0.1uF 16V FZ
PWR_1.2VMAIN
3VMAINOK 18,20,22,30,33,34,38
TPVIA20
TPVIA23
CPU_REQ#0
CPU_REQ#1
CPU_REQ#2
CPU_REQ#3
CPU_REQ#4
R62 27.4 1/16W 1%
1 2
R64 27.4 1/16W 1%
2 1
HSWINGX 13
HSWINGY 13
CLK_66_MCH 4
HLSTRB 18
HLSTRB# 18
R66 27.4 1/16W 1%
2 1
THLTL#_GMCH 9
CPU_DPSLP# 5,8,18
GMCH_TP_NC1
GMCH_TP_NC2
AE29
AD29
AD28
AH29
AJ28
AJ29
M26
N24
R28
R23
R25
H28
AA9
AH1
P27
P25
T23
K21
Y22
Y28
B20
B18
K28
Y23
A28
A29
B29
AJ2
AJ4
J21
J17
W3
W1
J11
Y3
V2
U2
T2
D6
A2
B1
M4B
BCLK
BCLK#
RSTIN#
HLOCK#
DBSY#
DRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HDVREF0
HDVREF1
HDVREF2
HAVREF
HCCVREF
HXRCOMP
HYRCOMP
HXSWING
HYSWING
GCLKIN
HLSTB
HLSTB#
HLVREF
PSWING
HLRCOMP
PWROK
EXTTS_0
DPSLP#
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GST[0]
GST[1]
PSB_VOL
Montara-GM
CPURST#
ADS#
BNR#
BPRI#
BREQ#0
DEFER#
HIT#
HITM#
RS#0
RS#1
RS#2
HTRDY#
DPWR#
HL10
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
F15
L28
N25
P28
M23
M28
N27
N28
N23
P26
M27
M25
AA22
U7
U4
U3
V3
W2
W6
V6
W7
T3
V5
V4
F12
D12
B12
AA5
RSVD0
L4
C4
GMCH_GST0
F3
D3
C3
GMCH_GST1
B3
F2
D2
C2
GMCH_PSB105#
B2
D7
CPU_RESET# 5,8
CPU_ADS# 5
CPU_BNR# 5
CPU_BPRI# 5
CPU_BR0# 5
CPU_DEFER# 5
CPU_HIT# 5
CPU_HITM# 5
CPU_RS#1
CPU_RS#2
CPU_TRDY# 5
CPU_DPWR# 5,8
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
CPU_RS#[0:2] 5
HL[0:10] 18
抵抗R164,R165はGMCH(M78)から0.5inch以内に置き、
15mil幅以上で配線すること。
1 1
○のついた信号線は25mil以上の太さで配線し、
左右と下をベタのGND線で囲むこと。
The width of signals that are marked "O" must be
more than 25 mil and guard the both sides, the top and
the bottom of them by GND1 pattern.
Place R164,R165 near MCH(M6) (within 0.5 inch).
And the width of these patterns are more than 15
mil.
コンデンサC754はGMCH(M78)の近傍に配置すること。
Place C754 near GMCH(M78)
HLSTRB/HLSTRB#ペアは両側をGND1にて囲うこと
HLSTRB/HLSTRB# pear should be guarded with GND1.
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
10 73
A
CLK_48_MCH 4
DREFSSCLK 4
DPMS_CLK 18 AGP_BUSY# 18,21
TPVIA30 TPVIA31
GMCH_RCVENIN#
MEM_D_D[0:63]
4 4
3 3
2 2
MEM_D_D0
MEM_D_D1
MEM_D_D2
MEM_D_D3
MEM_D_D4
MEM_D_D5
MEM_D_D6
MEM_D_D7
MEM_D_D8
MEM_D_D9
MEM_D_D10
MEM_D_D11
MEM_D_D12
MEM_D_D13
MEM_D_D14
MEM_D_D15
MEM_D_D16
MEM_D_D17
MEM_D_D18
MEM_D_D19
MEM_D_D20
MEM_D_D21
MEM_D_D22
MEM_D_D23
MEM_D_D24
MEM_D_D25
MEM_D_D26
MEM_D_D27
MEM_D_D28
MEM_D_D29
MEM_D_D30
MEM_D_D31
MEM_D_D32
MEM_D_D33
MEM_D_D34
MEM_D_D35
MEM_D_D36
MEM_D_D37
MEM_D_D38
MEM_D_D39
MEM_D_D40
MEM_D_D41
MEM_D_D42
MEM_D_D43
MEM_D_D44
MEM_D_D45
MEM_D_D46
MEM_D_D47
MEM_D_D48
MEM_D_D49
MEM_D_D50
MEM_D_D51
MEM_D_D52
MEM_D_D53
MEM_D_D54
MEM_D_D55
MEM_D_D56
MEM_D_D57
MEM_D_D58
MEM_D_D59
MEM_D_D60
MEM_D_D61
MEM_D_D62
MEM_D_D63
SDQS[0:8]は両側をGND1にて囲うこと。
GuardSDQS[0:8]withGND1.
PWR_1.5VMAIN
RM7
8
PWR_3VMAIN
GND1
7
6
5
10Kx4 1/16W 5%
RM8
4
3
2
1
10Kx4 1/16W 5%
1 1
SMT8
SMT8
1
2
3
4
5
6
7
8
GMCH_MDDDAT_PU15
GMCH_MDDCLK_PU15
GMCH_MDVCLK_PU15
GMCH_MDVDAT_PU15
GMCH_DDCPCLK_PU33
GMCH_DDCPDAT_PU33
LCDEN
BLEN
AC16
AG4
AH3
AD6
AG5
AG7
AE8
AH4
AH6
AG8
AH9
AG10
AH7
AD9
AF10
AE11
AH10
AH11
AG13
AF14
AG11
AD12
AF13
AH13
AH16
AG17
AF19
AE20
AD18
AE18
AH18
AG19
AH20
AG20
AF22
AH22
AF20
AH19
AH21
AG22
AE23
AH23
AE24
AH25
AG23
AF23
AF25
AG25
AH26
AE26
AG28
AF28
AG26
AF26
AE27
AD27
AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17
AF2
AE3
AF4
AH2
AD3
AE2
AF5
AF7
AF8
M4C
RCVENIN#
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71
RCVENOUT#
SMVSWINGH
SMVSWINGL
Montara-GM
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCS#0
SCS#1
SCS#2
SCS#3
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8
SCKE0
SCKE1
SCKE2
SCKE3
SRAS#
SCAS#
SWE#
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SMAB1
SMAB2
SMAB4
SMAB5
SBA0
SBA1
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDM8
SMRCOMP
SMVREF_0
AC15
GMCH_RCVENOUT#
AB2
AA2
AC26
AB25
AC3
AD4
AC2
AD2
AB23
AB24
AA3
AB4
AD23
AD26
AC22
AC25
MEM_D_DQS0
AG2
AH5
MEM_D_DQS1
AH8
MEM_D_DQS2
AE12
MEM_D_DQS3
AH17
MEM_D_DQS4
AE21
MEM_D_DQS5
AH24
MEM_D_DQS6
AH27
MEM_D_DQS7
AD15
AC7
AB7
AC9
AC10
AC21
AC24
AD25
AC18
AD14
AD13
AD17
AD11
AC13
AD8
AD7
AC6
AC5
AC19
AD5
AB5
AD16
AC12
AF11
AD10
AD22
AD20
AE5
AE6
AE9
AH12
AD19
AD21
AD24
AH28
AH15
AB1
AJ24
AJ19
AJ22
GND1
MEM_CS#0
MEM_CS#1
MEM_CS#2
MEM_CS#3
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_BS0
MEM_BS1
MEM_D_DM0
MEM_D_DM1
MEM_D_DM2
MEM_D_DM3
MEM_D_DM4
MEM_D_DM5
MEM_D_DM6
MEM_D_DM7
2 1
C114
0.1uF 16V FZ
MEM_RAS# 14
MEM_CAS# 14
MEM_WE# 14
○
SMRCOMP 13
○
SMREF 12,15,16
○
SMVSWINGH 13
○
SMVSWINGL 13
MEM_CLK0 14
MEM_CLK#0 14
MEM_CLK1 14
MEM_CLK#1 14
MEM_CLK2 14
MEM_CLK#2 14
MEM_CLK3 14
MEM_CLK#3 14
MEM_CLK4 14
MEM_CLK#4 14
MEM_CLK5 14
MEM_CLK#5 14
MEM_CS#[0:3] 14
MEM_D_DQS[0:8] 15,16,17
MEM_CKE[0:3] 14
MEM_A[0:12] 14
MEM_AB1 14
MEM_AB2 14
MEM_AB4 14
MEM_AB5 14
MEM_BS[0:1] 14
MEM_D_DM[0:8] 15,16,17
GND1
2002.05.15
Change Part R1028
127 -> 137ohm
GND1
DVOB_PCLK 23
DVO_VREF 13,23
○のついた信号線は25mil以上の太さで配線し、
左右と下をベタのGND線で囲むこと。
The width of signals that are marked "O" must be
more than 25 mil and guard the both sides, the top and
the bottom of them by GND1 pattern.
C113
GND1
1 2
GND1
0.1uF 16V FZ
1 2
1.2K 1/16W 0.5%
CRT_DDC1_CLK 22
CRT_DDC1_DATA 22
137 1/16W 1%
MI2CCLK 23
MI2CDATA 23
PWR_1.5VMAIN
GND1
R79
2 1
40.2 1/16W 5%
GMCH_DDCPCLK_PU33
GMCH_DDCPDAT_PU33
R74
GMCH_LIBG
R77
1 2
GMCH_REFSET
GMCH_MDDCLK_PU15
GMCH_MDDDAT_PU15
GMCH_MDVCLK_PU15
GMCH_MDVDAT_PU15
GMCH_DVORCOMP
DVODETECT 10
ADDID7
R80
1K 1/16W 5%
2 1
GND1
Rev. Date Design Check Appr. Description
B7
B17
D5
B4
C5
A10
B6
G9
E8
P7
T7
N7
M6
K7
N6
G2
M3
M2
F1
D1
L7
E5
F5
E3
E2
G5
F4
G6
F6
H5
M4D
DREFCLK
DREFSSCLK
DPMS
DDCPCLK
DDCPDATA
LIBG
DDCACLK
DDCADATA
2002.05.15
Change Net
M78.A8, M78.D8,
M78.D9
REFSET
MDDCCLK
MDDCDATA
MDVICLK
MDVIDATA
MI2CCLK
MI2CDATA
DVOBCINTR#
DVOBCCLKINT
DVOBFLDSTL
GVREF
DVORCOMP
DVODETECT
ADDID0
ADDID1
ADDID2
ADDID3
ADDID4
ADDID5
ADDID6
ADDID7
DVOCFLDSTL
Montara-GM
Konaka Fuchida Fukuyo 02/05/07
LCLKCTLA
LCLKCTLB
AGPBUSY#
ICLKAP
ICLKAM
IYAP0
IYAM0
IYAP1
IYAM1
IYAP2
IYAM2
IYAP3
IYAM3
ICLKBP
ICLKBM
IYBP0
IYBM0
IYBP1
IYBM1
IYBP2
IYBM2
IYBP3
IYBM3
PENELVDDEN
PENELBKLTEN
PENELBKLTCTL
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
GREEN#
BLUE#
DVOBCLK
DVOBCLK#
DVOBD0
DVOBD1
DVOBD2
DVOBD3
DVOBD4
DVOBD5
DVOBD6
DVOBD7
DVOBD8
DVOBD9
DVOBD10
DVOBD11
DVOBHSYNC
DVOBVSYNC
DVOBBLANK#
DVOC_CLK
DVOC_CLK#
DVOCD0
DVOCD1
DVOCD2
DVOCD3
DVOCD4
DVOCD5
DVOCD6
DVOCD7
DVOCD8
DVOCD9
DVOCD10
DVOCD11
DVOCHSYNC
DVOCVSYNC
DVOCBLANK#
H9
LCKCTLA
C6
F7
E13
D14
F14
G14
E14
E15
C14
C15
B13
C13
F10
E10
G12
H12
E11
E12
C11
C12
G10
G11
A5
F8
G8
H10
J9
A7
C8
C9
A8
D8
D9
GND1
P3
P4
R3
R5
R6
R4
P6
P5
N5
P2
N2
N3
M1
M5
T6
T5
L2
J3
J2
K5
K1
K3
K2
J6
J5
H2
H1
H3
H4
H6
G3
K6
L5
L3
TPVIA29
LCLKCTLB 10
LVDS_LC+ 39
LVDS_LC- 39
LVDS_L0+ 39
LVDS_L0- 39
LVDS_L1+ 39
LVDS_L1- 39
LVDS_L2+ 39
LVDS_L2- 39
LVDS_L3+ 39
LVDS_L3- 39
**確認
LaurelのパネルはLowerCH側だけでいいよね!
LCDEN
BLEN
2 1
2 1
2 1
DVOB_CLKIN0
DVOB_CLKIN1
DVOB_DATA0
DVOB_DATA1
DVOB_DATA2
DVOB_DATA3
DVOB_DATA4
DVOB_DATA5
DVOB_DATA6
DVOB_DATA7
DVOB_DATA8
DVOB_DATA9
DVOB_DATA10
DVOB_DATA11
GMCH
MONTARA-GM_2
TITLE
DRAW. No.
Appr. Check Design
FUJITSU LTD.
GND1
DVOB_CLKIN[0:1] 23
DVOB_DATA[0:11] 23
DVOB_HSYNC 23
DVOB_VSYNC 23
VB161AX MAIN
C1CP152845-X4
Nile
LCDEN 33,66
BLEN 33
CRT_HSYNC 22
CRT_VSYNC 22
CRT_RED 44,48
CRT_GREEN 44,48
CRT_BLUE 44,48
R75 75 1/16W 1%
R76 75 1/16W 1%
R78 75 1/16W 1%
CAST
Sheet
11 73
A
PWR_2.5VSUS
1 2
1 2
SMREF_S
None
0.1uF 16V FZ
2 1
R81
10K 1/16W 0.5%
R82
10K 1/16W 0.5%
Konaka Fuchida Fukuyo 02/05/07
M4E
PWR_1.2VMAIN
4 4
PWR_3VMAIN
3 3
2 1
PWR_1.5VMAIN
0.1uF 16V FZ
C122
GND1
PWR_2.5VSUS
2 2
PWR_1.5VMAIN
2 1
L3
LQM21DN1R0N00D
1 2
+
C127
100uF 6.3V(6TPB100MA)
GND1
GMCH_VCCADAC
PWR_1.5VMAIN
2 1
0.1uF 16V FZ
C128
GND1
W21
AA15
AA17
AA19
H14
J15
N14
N16
P13
P15
P17
R14
R16
T13
T15
T17
U14
U16
U6
U8
V1
V7
V9
W5
W8
Y1
A3
A4
E1
E4
E6
H7
K9
L8
M4
M8
M9
N1
N8
P9
R8
B14
B15
G13
J13
A12
B10
D10
F9
A9
B9
B8
A11
B11
J1
J4
J8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
VCCGPIO
VCCGPIO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDVO
VCCDLVDS
VCCDLVDS
VCCDLVDS
VCCDLVDS
VCCTXLVDS
VCCTXLVDS
VCCTXLVDS
VCCTXLVDS
VCCADAC
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
Montara-GM
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
VTTHF
VTTHF
VTTHF
VTTHF
VTTHF
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCQSM
VCCQSM
VCCASM
VCCASM
VCCAHPLL
VCCAGPLL
VCCADPLLA
VCCADPLLB
A18
A20
A26
F29
G15
H16
H18
H20
H22
J19
K29
L21
M22
N21
P22
R21
T22
U21
V22
Y29
AB29
A22
A24
H29
M29
V29
PWR_2.5VSUS
Y4
Y7
Y9
AA6
AA8
AA11
AA13
AB3
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC1
AC29
AF3
AF6
AF9
AF12
AF15
AF18
AF21
AF24
AF27
AF29
AG1
AG29
AJ5
AJ9
AJ13
AJ17
AJ21
AJ25
AJ6
AJ8
AD1
AF1
D29
Y2
A6
B16
1 1
GMCHからC?,C?までは1.14mm以内に線幅5milにて配置すること。
また、周りの信号線と10mil以上の間隔を開けること。
Place C? and C? within 45mil from GMCH(M78) with trace width 5mils.
Trace spacing is 10mils.
1 2
C131
0.1uF 16V FZ
GND1 GND1
PWR_VCCP
GMCH_VCCQSM
1 2
C124
GMCH_VCCASM
2 1
GMCH_VCCADPLLA
GMCH_VCCADPLLB
1 2
1 2
+
C132
C129
100uF 6.3V(6TPB100MA)
2 1
1 2
0.1uF 16V FZ
C117
1 2
+
0.1uF 16V FZ
GND1
1 2
+
0.1uF 16V FZ
C125
GND1
PWR_1.2VMAIN
1 2
+
0.1uF 16V FZ
1 2
2 1
0.1uF 16V FZ
0.1uF 16V FZ
C118
C130
0.1uF 16V FZ
C119
C120
GND1
1 2
L1
LQM21DN1R0N00D
10uF 6.3V(TA) QM
C123
2 1
L2
LQM21DN1R0N00D
C126
2002.05.01
Change Part C766
100uF 6.3V(6TPB100MA)
to SANYO POSCAP
2 1
L4
LQM21DN1R0N00D
2 1
L5
LQM21DN1R0N00D
100uF 6.3V(6TPB100MA)
2 1
0.1uF 16V FZ
C121
PWR_2.5VSUS
PWR_1.2VMAIN
PWR_1.2VMAIN
Isolated
supply, not
connected to
the core
D28
G26
G29
H11
H13
H15
H17
H19
M21
M24
N13
N15
N17
N22
N26
N29
R13
R15
R17
R22
M4F
A13
VSS
A17
VSS
A19
VSS
A21
VSS
A23
VSS
A25
VSS
A27
VSS
B5
VSS
B24
VSS
C1
VSS
C7
VSS
C10
VSS
C22
VSS
C29
VSS
D4
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D25
VSS
VSS
E7
VSS
E9
VSS
E28
VSS
E29
VSS
F11
VSS
F13
VSS
F16
VSS
F18
VSS
F20
VSS
F22
VSS
F24
VSS
F27
VSS
G1
VSS
G4
VSS
G7
VSS
VSS
VSS
H8
VSS
VSS
VSS
VSS
VSS
VSS
H21
VSS
H24
VSS
J7
VSS
J10
VSS
J12
VSS
J14
VSS
J16
VSS
J18
VSS
J20
VSS
J22
VSS
J26
VSS
J29
VSS
K4
VSS
K8
VSS
K24
VSS
L1
VSS
L6
VSS
L9
VSS
L22
VSS
L26
VSS
L29
VSS
M7
VSS
VSS
VSS
N4
VSS
N9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P8
VSS
P14
VSS
P16
VSS
P21
VSS
P24
VSS
R2
VSS
R7
VSS
R9
VSS
VSS
VSS
VSS
VSS
Montara-GM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R26
T4
T8
T9
T14
T16
T21
T24
U1
U5
U9
U13
U15
U17
U22
U26
U29
V8
V21
V24
W4
W9
W22
W26
W29
Y5
Y6
Y8
Y21
AA1
AA4
AA7
AA10
AA12
AA14
AA16
AA18
AA20
AA21
AA23
AA24
AA25
AA29
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB26
AC4
AC8
AC11
AC14
AC17
AC20
AC23
AC27
AC28
AE1
AE4
AE7
AE10
AE13
AE16
AE19
AE22
AE25
AE28
AG3
AG6
AG9
AG12
AG15
AG18
AG21
AG24
AG27
AJ1
AJ3
AJ7
AJ10
AJ11
AJ12
AJ18
AJ20
AJ23
AJ26
AJ27
C116
GND1
GND1 GND1
Rev. Date Design Check Appr. Description
PWR_3VSUS
1 2
C115
0.1uF 16V FZ
GND1
7
7
1
1
6
6
5
5
R83
1 2
0 1/16W
None
M5A
2
2
3
3
BA10358FV
8
M5B
8
VCC
-
+
GND
4
BA10358FV
4
GND1
SMREF_FB2
-
+
GMCH
MONTARA-GM_3
Appr. Check Design
SMREF 11,15,16
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
Nile
CAST
Sheet
12 73
PWR_VCCP PWR_VCCP
A
Nile
1 2
C133
300 1/16W 1%
2 1
150 1/16W 1%
GND1
PWR_2.5VSUS
2 1
R90
60.4 1/16W 1%
R91
60.4 1/16W 1%
2 1
GND1
1 2
0.01uF 25V FZ
1 2
C163
0.1uF 16V FZ
HSWINGX 10
SMRCOMP 11
R84
4 4
R86
3 3
1 2
1 2
C134
R85
300 1/16W 1%
0.01uF 25V FZ
1 2
R87
150 1/16W 1%
GND1
PWR_1.2VMAIN PWR_1.5VMAIN
2 1
R88
243 1/16W 1%
1 2
R92
100 1/16W 1%
GND1
2 1
1 2
R93
100 1/16W 1%
HSWINGY 10
R89
49.9 1/16W 1%
PSWING_MCH 10
HLVREF_MCH 10
2 1
R514
1K 1/16W 1%
1 2
R515
1K 1/16W 1%
GND1
2 1
C135
4.7uF 6.3V 2012 RM
C
GND1
DVO_VREF 11,23
1 2
0.22uF 10V FZ
C136
2 1
0.22uF 10V FZ
C137
2 1
0.22uF 10V FZ
C138
K
2 1
0.22uF 10V FZ
C139
D
1 2
C164
GND1
2 1
1 2
0.1uF 10V RK
C140
C141
1 2
C165
M
4.7uF 6.3V 2012 RM
1 2
0.1uF 10V RK
C142
1 2
0.1uF 10V RK
C166
C143
1uF 10V 1608 FZ
1 2
C167
K
82pF 25V AJ
1uF 10V 1608 FZ
1 2
2 1
C154
GND1
2 1
1 2
0.1uF 10V RK
C144
2 1
0.1uF 10V RK
C155
2 1
0.1uF 10V RK
C168
2 1
C145
0.1uF 10V RK
2 1
0.1uF 10V RK
C156
1 2
0.1uF 10V RK
C169
2 1
0.1uF 10V RK
C146
1uF 10V 1608 FZ
2 1
0.1uF 10V RK
C157
82pF 25V AJ
2 1
0.1uF 10V RK
C171
C170
82pF 25V AJ
C147
2 1
0.1uF 10V RK
2 1
0.1uF 10V RK
C172
C148
2 1
C158
2 1
F E
1 2
2 1
0.1uF 10V RK
C149
2 1
82pF 25V AJ
0.1uF 10V RK
C159
2 1
0.1uF 10V RK
C174
C173
2 1
0.1uF 10V RK
0.1uF 10V RK
C150
C160
82pF 25V AJ
C151
2 1
L
PWR_VCCP
1 2
0.1uF 10V RK
C152
2 1
C161
0.1uF 10V RK
2 1
0.1uF 10V RK
C175
1 2
0.1uF 10V RK
C153
PWR_1.5VMAIN
C162
0.1uF 10V RK
PWR_1.2VMAIN
2 1
C177
0.1uF 10V RK
C176
2 1
0.1uF 10V RK
C A B B
2 1
1uF 10V 1608 FZ
G
2 1
1uF 10V 1608 FZ
C192
1 2
0.1uF 10V RK
1 2
0.1uF 10V RK
C216
PWR_VCCP
1 2
C193
PWR_2.5VSUS
1 2
C217
0.1uF 10V RK
C194
1000pF 25V RK
C195
1 2
0.1uF 16V FZ
PWR_2.5VSUS
1 2
R94
150 1/16W 1%
2 1
R96
604 1/16W 1%
C196
GND1 GND1
2 1
2 1
R95
1 2
R97
0.1uF 16V FZ
604 1/16W 1%
150 1/16W 1%
SMVSWINGH 11
SMVSWINGL 11
PWR_3VMAIN
1 2
None
C197
J J
1uF 10V 1608 FZ
GND1
1 2
C198
1uF 10V 1608 FZ
1 2
C200
4.7uF 6.3V 2012 RM
GND1
1 2
+
C199
150uF 4V(POS) DM
1 2
C178
GND1
1 2
0.1uF 10V RK
C201
+
2 1
1 2
C180
C179
4.7uF 6.3V 2012 RM
220uF 2.5V(POS) DM
2 1
1 2
1000pF 25V RK
1000pF 25V RK
C203
C202
2 1
0.22uF 10V FZ
C181
1 2
82pF 25V AJ
C204
1 2
0.22uF 10V FZ
C182
2 1
0.1uF 10V RK
C205
1 2
0.22uF 10V FZ
C183
1 2
1000pF 25V RK
C206
1 2
0.22uF 10V FZ
C184
1 2
1000pF 25V RK
C207
0.1uF 10V RK
C185
2 1
82pF 25V AJ
C208
2 1
2 1
2 1
C186
0.1uF 10V RK
1 2
0.1uF 10V RK
C209
2 1
0.1uF 10V RK
C187
1uF 10V 1608 FZ
1 2
0.1uF 10V RK
1000pF 25V RK
C210
C211
C188
1 2
0.1uF 10V RK
2 1
82pF 25V AJ
C212
2 1
C189
2 1
2 1
0.1uF 10V RK
C190
2 1
1000pF 25V RK
C213
0.1uF 10V RK
C191
0.1uF 10V RK
C214
1 2
0.1uF 10V RK
1 2
0.1uF 10V RK
C215
TITLE
2 2
1 1
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
1 2
0.1uF 10V RK
1 2
82pF 25V AJ
C218
CAST
Sheet
13 73
A
Nile
MEM_A[0:12] 11
MEM_A9
MEM_A8
4 4
MEM_AB5 11
MEM_BS1 11
MEM_BS0 11
MEM_WE# 11
MEM_AB1 11
MEM_AB4 11
MEM_AB2 11
MEM_A7
MEM_A6
MEM_A5
MEM_A2
MEM_A1
MEM_A0
MEM_A3
MEM_A4
3 3
MEM_RAS# 11
MEM_CAS# 11
MEM_CS#0 11
MEM_CS#1 11
MEM_CS#2 11
MEM_CS#3 11
MEM_CKE0 11
2 2
MEM_CKE1 11
MEM_CKE2 11
MEM_CKE3 11
RM9
4
3
2
1
10x4 1/16W 5% 1608
RM10
4
3
2
1
10x4 1/16W 5% 1608
RM11
4
3
2
1
10x4 1/16W 5% 1608
RM83
4
3
2
1
10x4 1/16W 5% 1608
RM84
4
3
2
1
10x4 1/16W 5% 1608
5
MEM_D1_A12 MEM_A12
6
MEM_D1_A11 MEM_A11
7
MEM_D1_A9
8
MEM_D1_A8
5
MEM_D1_A7
6
MEM_D1_A6
7
8
MEM_D1_A5
5
MEM_D1_A10 MEM_A10
6
7
8
5
6
MEM_D1_A2
7
MEM_D1_A1
8
MEM_D1_A0
5
6
MEM_D1_A3
7
8
MEM_D1_A4
このグループで自由にピンスワップ可能
R491 10 1/16W 5%
2 1
R492 10 1/16W 5%
2 1
R481 10 1/16W 5%
2 1
R482 10 1/16W 5%
2 1
R483 10 1/16W 5%
2 1
R484 10 1/16W 5%
2 1
R485 10 1/16W 5%
2 1
R486 10 1/16W 5%
1 2
R487 10 1/16W 5%
2 1
R488 10 1/16W 5%
2 1
このグループでモジュール化可能
MEM_D1_A[0:12] 15,16,17
MEM_D1_AB5 16,17
MEM_D1_BS1 15,16,17
MEM_D1_BS0 15,16,17
MEM_D1_WE# 15,16,17
MEM_D1_AB1 16,17
MEM_D1_AB4 16,17
MEM_D1_AB2 16,17
MEM_D1_RAS# 15,16,17
MEM_D1_CAS# 15,16,17
MEM_D1_CS#0 15,17
MEM_D1_CS#1 15,17
MEM_D1_CS#2 16,17
MEM_D1_CS#3 16,17
MEM_D1_CKE0 15,17
MEM_D1_CKE1 15,17
MEM_D1_CKE2 16,17
MEM_D1_CKE3 16,17
R501 10 1/16W 5%
MEM_CLK0 11
MEM_CLK#0 11
MEM_CLK1 11
MEM_CLK#1 11
MEM_CLK2 11
MEM_CLK#2 11
MEM_CLK3 11
MEM_CLK#3 11
MEM_CLK4 11
MEM_CLK#4 11
MEM_CLK5 11
MEM_CLK#5 11
1 2
R502 10 1/16W 5%
1 2
R503 10 1/16W 5%
2 1
R504 10 1/16W 5%
2 1
R505 10 1/16W 5%
1 2
R506 10 1/16W 5%
1 2
R507 10 1/16W 5%
1 2
R508 10 1/16W 5%
1 2
R509 10 1/16W 5%
1 2
R510 10 1/16W 5%
1 2
R511 10 1/16W 5%
1 2
R512 10 1/16W 5%
1 2
MEM_D_CLK0 15
MEM_D_CLK#0 15
MEM_D_CLK1 15
MEM_D_CLK#1 15
MEM_D_CLK2 15
MEM_D_CLK#2 15
MEM_D_CLK3 16
MEM_D_CLK#3 16
MEM_D_CLK4 16
MEM_D_CLK#4 16
MEM_D_CLK5 16
MEM_D_CLK#5 16
このグループでモジュール化可能
1 1
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
14 73
A
MEM_D_D[0:63] 11,16,17
MEM_D_DQS[0:8] 11,16,17
4 4
MEM_D_CLK0 14
MEM_D_CLK#0 14
3 3
MEM_D_CLK2 14
MEM_D_CLK#2 14
MEM_D1_CKE1 14,17
MEM_D1_A[0:12] 14,16,17
MEM_D1_A5 14,17
MEM_D1_A1 14,17
MEM_D1_A12
MEM_D1_A9
MEM_D1_A7
MEM_D1_A3
MEM_D1_A10
MEM_D1_BS0 14,16,17
MEM_D1_WE# 14,16,17
MEM_D1_CS#0 14,17
2 2
PWR_3VMAIN
1 1
SMREF 11,12,16
MEM_D_DQS0
MEM_D_DQS1
MEM_D_DQS2
MEM_D_DQS3
MEM_D_DQS4
MEM_D_DQS5
MEM_D_DQS6
MEM_D_DQS7
SMB_DATA_DIMM 16,21
SMB_CLK_DIMM 16,21
1 2
C220
C219
0.1uF 16V FZ
GND1 GND1
1 2
1uF 10V 1608 FZ
MEM_D_D0
MEM_D_D1
MEM_D_D2
MEM_D_D3
MEM_D_D8
MEM_D_D9
MEM_D_D10
MEM_D_D11
MEM_D_D16
MEM_D_D17
MEM_D_D18
MEM_D_D19
MEM_D_D24
MEM_D_D25
MEM_D_D26
MEM_D_D27
MEM_D_D32
MEM_D_D33
MEM_D_D34
MEM_D_D35
MEM_D_D40
MEM_D_D41
MEM_D_D42
MEM_D_D43
MEM_D_D48
MEM_D_D50
MEM_D_D51
MEM_D_D56
MEM_D_D57
MEM_D_D58
MEM_D_D59
PWR_2.5VSUS
SLOT0(FAN側)
DDR SO-DIMM(Normal)
GND1
CN5
1 2
3 4
5 6
7 8
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99 100
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
MEM_D_D4
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
201
202
MEM_D_D5
MEM_D_D6
MEM_D_D7
MEM_D_D12
MEM_D_D13
MEM_D_D14
MEM_D_D15
MEM_D_D20
MEM_D_D21
MEM_D_D22
MEM_D_D23
MEM_D_D28
MEM_D_D29
MEM_D_D30
MEM_D_D31
BS2 MA13
MEM_D_D36
MEM_D_D37
MEM_D_D38
MEM_D_D39
MEM_D_D44
MEM_D_D45
MEM_D_D46
MEM_D_D47
MEM_D_D52
MEM_D_D53 MEM_D_D49
MEM_D_D54
MEM_D_D55
MEM_D_D60
MEM_D_D61
MEM_D_D62
MEM_D_D63
SA0
SA1
SA2
GND1
MEM_D_D[0:63] 11,16,17
MEM_D_DM0
MEM_D_DM1
MEM_D_DM2
MEM_D_DM3
MEM_D_DM4
MEM_D_DM5
MEM_D_DM6
MEM_D_DM7
MEM_D_DM[0:8] 11,16,17
MEM_D1_A11
MEM_D1_A8
MEM_D1_A6
MEM_D1_A0
MEM_D1_BS1 14,16,17
MEM_D1_RAS# 14,16,17
MEM_D1_CAS# 14,16,17
MEM_D1_CS#1 14,17
MEM_D1_A4 14,17
MEM_D1_A2 14,17
MEM_D_CLK#1 14
MEM_D_CLK1 14
MEM_D1_CKE0 14,17
MEM_D1_A[0:12] 14,16,17
PWR_2.5VSUS
C221
2 1
C222
2 1
C223
2 1
C224
1 2
C225
0.1uF 16V FZ
0.1uF 16V FZ
GND1
PWR_2.5VSUS
C230
1 2
C229
2 1
GND1
Rev. Date Design Check Appr. Description
0.01uF 25V FZ
Konaka Fuchida Fukuyo 02/05/07
0.01uF 25V FZ
0.1uF 16V FZ
C231
2 1
0.01uF 25V FZ
2 1
0.1uF 16V FZ
C232
2 1
2 1
0.1uF 16V FZ
2 1
0.1uF 16V FZ
Appr. Check Design
C226
2 1
0.1uF 16V FZ
C233
0.1uF 16V FZ
C227
1 2
0.1uF 16V FZ
C234
0.1uF 16V FZ
TITLE
DRAW. No.
FUJITSU LTD.
C228
1 2
0.1uF 16V FZ
VB161AX MAIN
C1CP152845-X4
Nile
CAST
Sheet
15 73
MEM_D1_A12
MEM_D1_A9
MEM_D1_A7
MEM_D1_A3
MEM_D1_A10
SMREF 11,12,15
MEM_D_DQS0
MEM_D_DQS1
MEM_D_DQS2
MEM_D_DQS3
MEM_D_DQS4
MEM_D_DQS5
MEM_D_DQS6
MEM_D_DQS7
SMB_DATA_DIMM 15,21
SMB_CLK_DIMM 15,21
1 2
C244
C243
1 2
0.1uF 16V FZ
GND1 GND1
MEM_D_D0
MEM_D_D1
MEM_D_D2
MEM_D_D3
MEM_D_D8
MEM_D_D9 MEM_D_D13
MEM_D_D10
MEM_D_D11
MEM_D_D16
MEM_D_D17
MEM_D_D18
MEM_D_D19
MEM_D_D24
MEM_D_D25
MEM_D_D26
MEM_D_D27
MEM_D_D32
MEM_D_D33
MEM_D_D35
MEM_D_D40
MEM_D_D41
MEM_D_D42
MEM_D_D43
MEM_D_D48
MEM_D_D49
MEM_D_D50
MEM_D_D51
MEM_D_D56
MEM_D_D57
MEM_D_D59
SLOT1 BAY側
PWR_2.5VSUS
1uF 10V 1608 FZ
GND1
CN4
1 2
3 4
5 6
7 8
10
9
12
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
97
99 100
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
96
98
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
201
202
MA13 BS2
DDR SO-DIMM (Reverse)
GND1
MEM_D_D4
MEM_D_D5
MEM_D_D6
MEM_D_D7
MEM_D_D12
MEM_D_D14
MEM_D_D15
MEM_D_D20
MEM_D_D21
MEM_D_D22
MEM_D_D23
MEM_D_D28
MEM_D_D29
MEM_D_D30
MEM_D_D31
MEM_D_D36
MEM_D_D37
MEM_D_D38 MEM_D_D34
MEM_D_D39
MEM_D_D44
MEM_D_D45
MEM_D_D46
MEM_D_D47
MEM_D_D52
MEM_D_D53
MEM_D_D54
MEM_D_D55
MEM_D_D60
MEM_D_D61
MEM_D_D62 MEM_D_D58
MEM_D_D63
MEM_D_DM0
MEM_D_DM1
MEM_D_DM2
MEM_D_DM3
MEM_D_DM4
MEM_D_DM5
MEM_D_DM6
MEM_D_DM7
PWR_3VMAIN
MEM_D_D[0:63] 11,15,17
MEM_D_DM[0:8] 11,15,17
MEM_D1_A11
MEM_D1_A8
MEM_D1_A6
MEM_D1_A0
MEM_D1_BS1 14,15,17
MEM_D1_RAS# 14,15,17
MEM_D1_CAS# 14,15,17
MEM_D1_CS#3 14,17
MEM_D1_AB4 14,17 MEM_D1_AB5 14,17
MEM_D_CLK#4 14
MEM_D_CLK4 14
MEM_D1_CKE2 14,17
MEM_D1_A[0:12] 14,15,17
PWR_2.5VSUS
C245
2 1
C246
2 1
C247
1 2
C248
0.1uF 16V FZ
2 1
C254
0.01uF 25V FZ
1 2
0.1uF 16V FZ
C255
0.01uF 25V FZ
0.1uF 16V FZ
2 1
0.1uF 16V FZ
GND1
PWR_2.5VSUS
C253
1 2
2 1
0.01uF 25V FZ
GND1
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
1 2
C256
C249
1 2
0.1uF 16V FZ
2 1
0.1uF 16V FZ
Appr. Check Design
C250
1 2
0.1uF 16V FZ
C257
0.1uF 16V FZ
C251
2 1
0.1uF 16V FZ
2 1
C258
0.1uF 16V FZ
TITLE
DRAW. No.
FUJITSU LTD.
C252
0.1uF 16V FZ
VB161AX MAIN
C1CP152845-X4
A
MEM_D_D[0:63] 11,15,17
MEM_D_DQS[0:8] 11,15,17
4 4
MEM_D_CLK3 14
MEM_D_CLK#3 14
3 3
MEM_D_CLK5 14
MEM_D_CLK#5 14
MEM_D1_CKE3 14,17
MEM_D1_A[0:12] 14,15,17
MEM_D1_BS0 14,15,17
MEM_D1_WE# 14,15,17
MEM_D1_CS#2 14,17
MEM_D1_AB1 14,17 MEM_D1_AB2 14,17
2 2
1 1
PWR_3VMAIN
Nile
CAST
Sheet
16 73
A
2 1
C313 0.33uF 10V Reserve
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
2 1
C314 0.33uF 10V Reserve
PWR_1.25VSUS PWR_1.25VSUS
C268 0.1uF 16V FZ
C271 0.1uF 16V FZ
C274 0.1uF 16V FZ
C277 0.1uF 16V FZ
C280 0.1uF 16V FZ
C282 0.1uF 16V FZ
C284 0.1uF 16V FZ
C286 0.1uF 16V FZ
C288 0.1uF 16V FZ
C290 0.1uF 16V FZ
C293 0.1uF 16V FZ
C296 0.1uF 16V FZ
C298 0.1uF 16V FZ
C300 0.1uF 16V FZ
C302 0.1uF 16V FZ
C305 0.1uF 16V FZ
2 1
C315 0.33uF 10V Reserve
C316 0.33uF 10V Reserve
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2 1
2 1
C317 0.33uF 10V Reserve
2 1
C318 0.33uF 10V Reserve
2 1
C319 0.33uF 10V Reserve
2 1
C320 0.33uF 10V Reserve
2 1
C321 0.33uF 10V Reserve
2 1
C322 0.33uF 10V Reserve
GND1
C323 0.33uF 10V Reserve
MEM_D1_A[0:12] 14,15,16
MEM_D1_A7
MEM_D1_A6
MEM_D1_AB5 14,16
MEM_D1_AB4 14,16
MEM_D1_AB2 14,16
MEM_D1_RAS# 14,15,16
MEM_D1_CAS# 14,15,16
MEM_D1_WE# 14,15,16
MEM_D1_AB1 14,16
MEM_D1_BS0 14,15,16
MEM_D1_BS1 14,15,16
MEM_D1_CKE[0:3] 14,15,16
MEM_D1_CS#0 14,15
MEM_D1_CS#2 14,16
MEM_D1_CS#3 14,16
MEM_D1_CS#1 14,15
Rev. Date Design Check Appr. Description
MEM_D1_A5
MEM_D1_A3
MEM_D1_A4
MEM_D1_A12
MEM_D1_A11
MEM_D1_A9
MEM_D1_A8
MEM_D1_A2
MEM_D1_A1
MEM_D1_A0
MEM_D1_A10
MEM_D1_CKE2
MEM_D1_CKE0
MEM_D1_CKE1
MEM_D1_CKE3
Konaka Fuchida Fukuyo 02/05/07
RM14
4
3
2
1
56x4 1/16W 5%
RM33
4
3
2
1
56x4 1/16W 5%
RM20
4
3
2
1
56x4 1/16W 5%
R100 56 1/16W 5%
1 2
R101 56 1/16W 5%
1 2
R102 56 1/16W 5%
1 2
R103 56 1/16W 5%
1 2
RM25
4
3
2
1
56x4 1/16W 5%
R104 56 1/16W 5%
1 2
R105 56 1/16W 5%
1 2
RM32
4
3
2
1
56x4 1/16W 5%
RM17
4
3
2
1
56x4 1/16W 5%
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
Appr. Check Design
5
6
7
8
PWR_1.25VSUS
1 2
C269 0.1uF 16V FZ
1 2
C272 0.1uF 16V FZ
1 2
C275 0.1uF 16V FZ
1 2
C278 0.1uF 16V FZ
1 2
C291 0.1uF 16V FZ
1 2
C294 0.1uF 16V FZ
1 2
C304 0.1uF 16V FZ
1 2
C306 0.1uF 16V FZ
1 2
C307 0.1uF 16V FZ
1 2
C308 0.1uF 16V FZ
TITLE
DRAW. No.
FUJITSU LTD.
PWR_2.5VSUS
VB161AX MAIN
C1CP152845-X4
PWR_2.5VSUS PWR_2.5VSUS
MEM_D_D[0:63] 11,15,16
2 1
C310 0.33uF 10V Reserve
RM13
4
3
2
1
56x4 1/16W 5%
RM16
4
3
2
1
56x4 1/16W 5%
RM19
4
3
2
1
56x4 1/16W 5%
RM22
4
3
2
1
56x4 1/16W 5%
RM24
4
3
2
1
56x4 1/16W 5%
RM27
4
3
2
1
56x4 1/16W 5%
RM29
4
3
2
1
56x4 1/16W 5%
RM31
4
3
2
1
56x4 1/16W 5%
2 1
C311 0.33uF 10V Reserve
2 1
C312 0.33uF 10V Reserve
RM12
4
MEM_D_D0
3
MEM_D_D4
2
MEM_D_D1
1
4 4
3 3
MEM_D_DM[0:8] 11,15,16
2 2
MEM_D_DQS[0:8] 11,15,16
1 1
MEM_D_D5
MEM_D_D2
MEM_D_D6
MEM_D_D3
MEM_D_D7
MEM_D_D8
MEM_D_D12
MEM_D_D9
MEM_D_D13
MEM_D_D10
MEM_D_D14
MEM_D_D11
MEM_D_D15
MEM_D_D16
MEM_D_D20
MEM_D_D17
MEM_D_D21
MEM_D_D18
MEM_D_D22
MEM_D_D19
MEM_D_D23
MEM_D_D24
MEM_D_D28
MEM_D_D25
MEM_D_D29
MEM_D_D26
MEM_D_D30
MEM_D_D27
MEM_D_D31
MEM_D_DM0
MEM_D_DM1
MEM_D_DM2
MEM_D_DM3
MEM_D_DM4
MEM_D_DM5
MEM_D_DM6
MEM_D_DM7
MEM_D_DQS0
MEM_D_DQS1
MEM_D_DQS2
MEM_D_DQS3
MEM_D_DQS4
MEM_D_DQS5
MEM_D_DQS6
MEM_D_DQS7
56x4 1/16W 5%
RM15
4
3
2
1
56x4 1/16W 5%
RM18
4
3
2
1
56x4 1/16W 5%
RM21
4
3
2
1
56x4 1/16W 5%
RM23
4
3
2
1
56x4 1/16W 5%
RM26
4
3
2
1
56x4 1/16W 5%
RM28
4
3
2
1
56x4 1/16W 5%
RM30
4
3
2
1
56x4 1/16W 5%
R106 56 1/16W 5%
2 1
R107 56 1/16W 5%
1 2
R108 56 1/16W 5%
1 2
R109 56 1/16W 5%
1 2
R110 56 1/16W 5%
2 1
R111 56 1/16W 5%
1 2
R112 56 1/16W 5%
1 2
R113 56 1/16W 5%
1 2
R114 56 1/16W 5%
2 1
R115 56 1/16W 5%
2 1
R116 56 1/16W 5%
1 2
R117 56 1/16W 5%
2 1
R118 56 1/16W 5%
1 2
R119 56 1/16W 5%
2 1
R120 56 1/16W 5%
2 1
R121 56 1/16W 5%
2 1
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
1 2
C267 0.1uF 16V FZ
1 2
C270 0.1uF 16V FZ
1 2
C273 0.1uF 16V FZ
1 2
C276 0.1uF 16V FZ
1 2
C279 0.1uF 16V FZ
1 2
C281 0.1uF 16V FZ
1 2
C283 0.1uF 16V FZ
1 2
C285 0.1uF 16V FZ
1 2
C287 0.1uF 16V FZ
1 2
C289 0.1uF 16V FZ
1 2
C292 0.1uF 16V FZ
1 2
C295 0.1uF 16V FZ
1 2
C297 0.1uF 16V FZ
1 2
C299 0.1uF 16V FZ
1 2
C301 0.1uF 16V FZ
1 2
C303 0.1uF 16V FZ
MEM_D_D34
MEM_D_D38
MEM_D_D35
MEM_D_D39
MEM_D_D32
MEM_D_D36
MEM_D_D33
MEM_D_D37
MEM_D_D42
MEM_D_D46
MEM_D_D43
MEM_D_D47
MEM_D_D40
MEM_D_D44
MEM_D_D41
MEM_D_D45
MEM_D_D48
MEM_D_D52
MEM_D_D49
MEM_D_D53
MEM_D_D50
MEM_D_D54
MEM_D_D51
MEM_D_D55
MEM_D_D56
MEM_D_D60
MEM_D_D57
MEM_D_D61
MEM_D_D58
MEM_D_D63
MEM_D_D62
MEM_D_D59
GND1 GND1
PWR_1.25VSUS
2 1
2 1
C309 0.33uF 10V Reserve
Nile
GND1
CAST
Sheet
17 73
A
CLK_14_ICH 4,29
CLK_48_ICH 4
CLK_66_ICH 4
HUBVSWG_ICH 20
HL[0:10] 10
4 4
1 2
GND1
LPC_DRQ#0 32
PWR_3VSTD
3 3
CPU_THERMTRIP#
2 2
PWR_RTC
EXTSMI#
1 1
CPU_FERR# 5,8
TRIP_ICH#
LAN_ICH_RST#
MEM_ID0
EXT_SMI_ICH#
MEM_ID1
KBC_INIT#
KBC_A20G
SMLINK0_PU33
SMLINK1_PU33
R124
10K 1/16W 5%
2 1
BSRBTN# 33
THLTL# 9,67
AGP_BUSY# 11,21
RIOUT# 20,21,33
VGATE 20,38
3VMAINOK
RSMRST# 20,38
KBC_INIT# 20,68
KBC_A20G 68
KBC_SCI 68
EXTSCI# 33
BLUE_RI# 34,48
LCDCL# 33,34,48
R131
2 1
100K 1/16W 5%
C840
1 2
100pF 25V AJ
None
R123
56 1/16W 5%
R125
2 1
56 1/16W 5%
D3
1SS400
RM34
8
7
5
6
SMT8
10Kx4 1/16W 5%
RM35
8
7
5
6
SMT8
10Kx4 1/16W 5%
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
LAN_ICH_RST#
SYS_RESET#
TRIP_ICH#
PLLB#
R127
56 1/16W 5%
2 1
KBC_INIT#
KBC_A20G
PWR_VCCP
2 1
1
2
4
3
1
2
4
3
M6A
J23
CLK14
F19
CLK48
T21
CLK66
R22
HI_VSWING
L19
HI0
L20
HI1
M19
HI2
M21
HI3
P19
HI4
R19
HI5
T20
HI6
R20
HI7
P23
HI8
L22
HI9
N22
HI10
K21
HI11
C11
LAN_CLK
A10
LAN_RXD0
A9
LAN_RXD1
A11
LAN_RXD2
Y5
LAN_RST#
D11
EE_DIN
U3
LDRQ#0
U4
LDRQ#1
Y3
SYS_RESET#
AA1
PWRBTN#
V1
THRM#
W20
THRMTRIP#
R2
AGPBUSY#/GPIO6
Y1
RI#
AB2
BATLOW#/TP0
V19
VGATE/VRMPWRGD
AB6
PWROK
AA6
RSMRST#
AA21
FERR#
U22
RCIN#
Y22
A20GATE
B5
GPIO0/REQ#A
R3
GPIO7
V4
GPIO8
V5
GPIO12
W3
GPIO13
W6
INTRUDER#
ICH4-M
EXT_SMI_ICH#
PWR_3VMAIN
GND1
PWR_3VSTD
HI_STB/HI_STBS
HI_STB#/HI_STBF
2002.05.07
Chenge Net
M7.C11,A10,A9,A11,D11,
B11,B10,C10,A12,C12,D10
Add Parts
TP190-TP200
LAN_RSTSYNC
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_SHCLK
EE_DOUT
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LFRAME#/FWH4
SLP_S1#/GPIO19
SLP_S3#
SLP_S4#
SLP_S5#
SUS_STAT#/LPCPD#
C3_STAT#/GPIO21
STP_PCI#/GPIO18
STP_CPU#/GPIO20
DPRSLPVR
CPUPERF#/GPIO22
SSMUXSEL/GPIO23
CPUSLP#
STPCLK#
CPUPWRGD
SMLINK0
SMLINK1
1
PMU_PLLB 33,67
○のついた信号線は25mil以上の太さで配線し、
左右上下をベタのGND線で囲むこと
The width of signals that marked "O" must be
more than 25 mil and guard the both sides, the top and
the bottom of them by GND1 pattern.
P21
N20
R23
HICOMP
HIREF
EE_CS
A20M#
IGNNE#
INIT#
INTR
NMI
SMI#
DPSLP#
SUSCLK
PWR_3VSTD
1 2
R135
3 2
GND1
M23
B11
B10
C10
A12
C12
A8
D10
T2
R4
T4
U2
T5
W18
Y4
Y2
AA2
AB3
T3
Y21
W19
V20
Y20
J21
AB23
U21
W21
V22
AB22
V21
W23
V23
Y23
U23
AA4
AC3
AB1
100K 1/16W 5%
PLLB#
Q4
2SK3019
SMLINK0_PU33
SMLINK1_PU33
○
CLK_32K_STD
PWR_RTCBATT
PWR_PMU
PWR_RTC
2 1
R544 0 1/16W
R543 0 1/16W
C844
2 1
0.1uF 16V FZ
GND1
TP3
TESTPAD
1 2
C327
0.1uF 16V FZ
GND1
None
2 1
X2
4
VDD
1
VIO
2
GND
32.768KHz
HLSTRB 10
HLSTRB# 10
HUBREF_ICH 20
<<CL2の配置について>>
RTCRST#ではデータがクリアできないため、
RTCVCCをGNDに落とす仕様を継続して採用。
<<CL2 arrangement>>
RTCRST# does not clear data in RTC well.
Reset pin is connected to RTCVCC in this
3
case.
PWR_PMU
RTC_32K
PWR_RTCBATT
1K 1/16W 5%
R538
1 2
100K 1/16W 5%
None
LPC_AD0 22,32,33,48,68
LPC_AD1 22,32,33,48,68
LPC_AD2 22,32,33,48,68
LPC_AD3 22,32,33,48,68
LPC_FRAME# 22,32,33,34,48,68
SUSB# 4,32,33,34,38,57,58,59,68,73
SUSC# 57,58,59,66,68
SUSTAT# 32,48
STP_PCI# 4
STP_CPU# 4,54
DPRSLPVR 54
CPU_A20M# 5,8
CPU_SLP# 5,8
CPU_IGNNE# 5,8
CPU_INIT# 5,8
CPU_INTR 5,8
CPU_NMI 5,8
CPU_SMI# 5,8
CPU_STPCLK# 5,8
CPU_PWRGD 5,8
CPU_DPSLP# 5,8,10
CLK_32K_STD 27,33
CN2
RTC BAT CN
1
+
2
-
OUT
PWR_1.5VMAIN
R122
1 2
48.7 1/16W 1%
R513
1K 1/16W 5%
2 1
R128
2 1
2 1
CL1
TESTPAD
CL2
TESTPAD
PWR_RTC
D50
2 1
1SS400
None
R545 0 1/16W
1 2
PWR_PMU
1 2
D1 1SS400
D2 1SS400
2 1
R134
220K 1/16W 5%
Q5
2SK3019
1
None
GND1
PCI_AD[0:31] 24,25,36,41
PWR_3VMAIN
PWR_3VSTD
2 1
C324
GND1
3 2
CLK_32K_STD
PWR_RTC
RTC_32K
1 2
C842
6pF 25V AD
1 2
C843
5pF 25V AD
1uF 10V 1608 FZ
GND1
R133
2 1
1K 1/16W 5%
CLK_32K_PMU 67
PWR_1.5VMAIN
R136
2 1
1K 1/16W 5%
CLK_33_ICH 4
PCI_REQ#0 21,22
PCI_REQ#1 21,22
PCI_REQ#3 21,36
PCI_REQ#4 21,22
ICHGPIO1 19
R126
GND1
R129 470K 1/16W 5%
2 1
MC-206(32KHz)
X6
R542 0 1/16W
1 4
1 2
C325
0.047uF 10V RK
1 2
C856
1 2
0.1uF 16V FZ
3 2
1
GND1
HLSTRB/HLSTRB#ペアは両側をGND1にて囲うこと
HLSTRB/HLSTRB#pearshouldbeguardedwithGND1.
M6B
P5
PCICLK
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_SERR# 21,24,25,36,41
WAKEOUT# 33
USB_OC#0 40
USB_OC#1 44
USB_OC#2 40
USB_OC#3 44
2 1
22 1/16W 1%
2 1
10M 1/16W 5% 1608
2 1
C326
GND1
Q6
2SK3019
IRQ14 47
IRQ15 47
None
R132
1uF 10V 1608 FZ
DPMS_CLK 11
H5
AD0
J3
AD1
H3
AD2
K1
AD3
G5
AD4
J4
AD5
H4
AD6
J5
AD7
K2
AD8
G2
AD9
L1
AD10
G4
AD11
L2
AD12
H2
AD13
L3
AD14
F5
AD15
F4
AD16
N1
AD17
E5
AD18
N2
AD19
E3
AD20
N3
AD21
E4
AD22
M5
AD23
E2
AD24
P1
AD25
E1
AD26
P2
AD27
D3
AD28
R1
AD29
D2
AD30
P4
AD31
AC13
IRQ14
AA19
IRQ15
B1
REQ#0
A2
REQ#1
B3
REQ#2
C7
REQ#3
B6
REQ#4
A6
REQ#5/REQ#B/GPIO1
K5
SERR#
W2
PME#
B15
OC#0
C14
OC#1
A15
OC#2
B14
OC#3
A14
OC#4
D14
OC#5
A23
USBRBIAS
B23
USBRBIAS#
AB5
VCCRTC
AC7
RTCX1
10M 1/16W 5% 1608
R130
2 1
AC6
RTCX2
Y6
VBIAS
W7
RTCRST#
RTCRST#
ICH4-M
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
PCIRST#
C/BE#0
C/BE#1
C/BE#2
C/BE#3
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PLOCK#
PERR#
CLKRUN#/GPIO24
SERIRQ
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E/GPIO2
PIRQ#F/GPIO3
PIRQ#G/GPIO4
PIRQ#H/GPIO5
GNT#0
GNT#1
GNT#2
GNT#3
GNT#5/GNT#B/GPIO17
GNT#4
USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
PAR
U5
J2
K4
M4
N4
M3
F1
L5
F2
F3
G1
M2
L4
AC2
J22
D5
C2
B4
A3
C8
D7
C3
C4
C1
E6
A7
B7
D6
C5
C20
D20
A21
B21
C18
D18
A19
B19
C16
D16
A17
B17
J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
(PCMCIA)
(PCMCIA)
(MiniPCI-1)
(MiniPCI-2)
(LAN)
(IEEE1394)
(Unused)
(Roate#)
(PCMCIA)
(IEEE1394)
(LAN)
(MiniPCI)
ICH_GPIO17
MSLCT0
MSLCT1
FR_USBON
MEM_ID0
MEM_ID1
Appr. Check Design
PCI_RST# 10,21,22,23,24,30,32,33,34,48,68
PCI_C/BE#[0:3] 24,25,36,41
PCI_DEVSEL# 21,24,25,36,41
PCI_FRAME# 21,24,25,36,41
PCI_IRDY# 21,24,25,36,41
PCI_TRDY# 21,24,25,36,41
PCI_STOP# 21,24,25,36,41
PCI_PAR 24,25,36,41
PCI_LOCK# 21,25
PCI_PERR# 21,24,25,36,41
PCI_CLKRUN# 21,24,25,32,41,48,68
SERIRQ 21,25,32,48,68
PCI_INT#0 21,25
PCI_INT#1 21,25
PCI_INT#2 21,41
PCI_INT#3 21,41
PCI_INT#4 21,36
PCI_INT#5 21,24
PCI_INT#6 21
PCI_INT#7 21
PCI_GNT#0 25
PCI_GNT#1 24
PCI_GNT#3 36
PCI_GNT#4 41
USB_P0P 40
USB_P0N 40
USB_P1P 44
USB_P1N 44
USB_P2P 40
USB_P2N 40
USB_P3P 44
USB_P3N 44
USB_P4P 48
USB_P4N 48
USB_P5P 46
USB_P5N 46
SMB_CNT0 21
SMB_CNT1 21
SMB_CNT2 22
ANT_TYP 19,48
ANT_TYP2 19,48
TITLE
TPVIA40
TPVIA41
TPVIA42
TPVIA39
VB161AX MAIN
DRAW. No.
C1CP152845-X4
FUJITSU LTD.
Nile
CAST
Sheet
18 73
2 1
C329
1000pF 25V RK
0.1uF 16V FZ
GND1
PWR_5VMAIN
2 1
2 1
C331
1000pF 25V RK
GND1
PWR_5VSUS
2 1
Nile
C332
0.1uF 16V FZ
A
M6C
IDE_PDD[0:15] 47
4 4
IDE_PDDREQ 47
IDE_PDIORDY 47
IDE_SDD[0:15] 46,47
3 3
IDE_SDDREQ 46,47
IDE_SDIORDY 47
AC97_BITCLK 29,41,42
AC97_SDIN0 29
AC97_SDIN1 41,42
ICH_SMBALT# 67
TPVIA43
2 2
TPVIA44
ICHGPIO1 18
ANT_TYP 18,48
ANT_TYP2 18,48
1 1
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
GND1
ICH_SMBALT#
HOVER_LED
EXT_LED
APICD1_PD
APICD0_PD
SMB_DATA_ICH
SMB_CLK_ICH
ICH_SMBALT#
AB11
PDD0
AC11
PDD1
Y10
PDD2
AA10
PDD3
AA7
PDD4
AB8
PDD5
Y8
PDD6
AA8
PDD7
AB9
PDD8
Y9
PDD9
AC9
PDD10
W9
PDD11
AB10
PDD12
W10
PDD13
W11
PDD14
Y11
PDD15
AA11
PDDREQ
AB12
PIORDY
W17
SDD0
AB17
SDD1
W16
SDD2
AC16
SDD3
W15
SDD4
AB15
SDD5
W14
SDD6
AA14
SDD7
Y14
SDD8
AC15
SDD9
AA15
SDD10
Y15
SDD11
AB16
SDD12
Y16
SDD13
AA17
SDD14
Y17
SDD15
AB18
SDDREQ
AC19
SIORDY
AC_BIT_CLKB8AC_SYNC
D13
AC_SDIN0
A13
AC_SDIN1
B13
AC_SDIN2
J19
APICCLK
AA5
SMBALERT#/GPIO11
V2
GPIO25
W1
GPIO27
W4
GPIO28
ICH4-M
RM36
8
7
5
6
SMT8
10Kx4 1/16W 5%
RM37
1
2
4
3
SMT8
10Kx4 1/16W 5%
GPIO16/GNT#A
1
2
4
3
8
7
5
6
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
PDDACK#
PDIOR#
PDIOW#
SDCS#1
SDCS#3
SDA0
SDA1
SDA2
SDDACK#
SDIOR#
SDIOW#
SPKR
AC_SDOUT
AC_RST#
APICD0
APICD1
SMBCLK
SMBDATA
PWR_3VMAIN
GND1
PWR_3VSTD
Y13
AB14
AA13
AB13
W13
Y12
AC12
W12
AB21
AC22
AA20
AC20
AC21
AB19
Y18
AA18
H23
E8
C9
D9
C13
H19
K20
AC4
AB4
APICD0_PD
APICD1_PD
SMB_CLK_ICH
SMB_DATA_ICH
PWR_3VMAIN
IDE_PDCS#1 47
IDE_PDCS#3 47
IDE_PDA0 47
IDE_PDA1 47
IDE_PDA2 47
IDE_PDDACK# 47
IDE_PDIOR# 47
IDE_PDIOW# 47
IDE_SDCS#1 46
IDE_SDCS#3 46
IDE_SDA0 46
IDE_SDA1 46
IDE_SDA2 46
IDE_SDDACK# 46
IDE_SDIOR# 47
IDE_SDIOW# 47
SPKSYS 34
R138 33 1/16W 5%
R139 33 1/16W 5%
1 2
2 1
AC97_SYNC 29,41,42
AC97_SDOUT 29,41,42
AC_RST# 29,30,41,42
SMB_CLK_ICH 21
SMB_DATA_ICH 21
PWR_1.5VMAIN
PWR_1.5VMAIN
PWR_1.5VSTD
PWR_VCCP
GND1
AA23
M14
AA12
AA16
AA22
AB20
AC1
AC10
AC14
AC18
AC23
AC5
P14
U18
E12
E13
E20
F14
G18
R6
U6
K10
K12
K18
K22
P10
T18
U19
V14
C22
L23
P18
T22
A16
A18
A20
A22
AA3
AA9
AB7
B12
B16
B18
B20
B22
C15
C17
C19
C21
C23
C6
D1
D12
D15
D17
D19
D21
D23
D4
D8
D22
E10
E14
E16
E17
E18
E19
E21
E22
G19
T6
F6
F7
A1
A4
B9
F8
M6D
V_CPU_IO
V_CPU_IO
V_CPU_IO
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCCPLL
VCCLAN1_5
VCCLAN1_5
VCCHI
VCCHI
VCCHI
VCCHI
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ICH4-M
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCLAN3_3
VCCLAN3_3
V5REF
V5REF
V5REF_SUS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A5
AC17
AC8
B2
H18
H6
J1
J18
K6
M10
P12
P6
U1
V10
V16
V18
E11
F10
F15
F16
F17
F18
K14
V7
V8
V9
E9
F9
E7
V6
E15
G21
G3
G6
H1
J6
K11
K13
K19
K23
K3
L10
L11
L12
L13
L14
L21
M1
M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
N21
N23
N5
P11
P13
P20
P22
P3
R18
R21
R5
T1
T19
T23
U20
V15
V17
V3
W22
W5
W8
Y19
Y7
PWR_3VMAIN
PWR_3VSTD
GND1
PWR_5VREF_MAIN
PWR_3VMAIN
PWR_5VREF_STD
PWR_3VMAIN
C328
1 2
2 1
D4
RB521S-30
R137
1K 1/16W 5%
C330
2 1
1uF 10V 1608 FZ
GND1
PWR_3VSTD
1 2
2 1
D5
RB521S-30
C333
1uF 10V 1608 FZ
2 1
GND1
D6
RB521S-30
ICH4-M_2
TITLE
VB161AX MAIN
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
19 73
M7
ICH4-M
A
PWR_1.5VMAIN
Nile
PWR_3VMAIN
1 2
2 1
4 4
0.1uF 10V RK
C334
C335
1 2
1 2
0.1uF 10V RK
C350
C349
2 1
2 1
0.1uF 10V RK
C336
2 1
0.1uF 10V RK
C351
2 1
1 2
82pF 25V AJ
C337
1 2
0.1uF 10V RK
0.1uF 10V RK
C352
PWR_3VSTD PWR_1.5VSTD
0.1uF 10V RK
0.1uF 10V RK
C338
1 2
0.1uF 10V RK
C353
82pF 25V AJ
C339
2 1
82pF 25V AJ
C354
1 2
0.1uF 10V RK
C340
2 1
0.1uF 10V RK
C355
2 1
C341
1 2
82pF 25V AJ
PWR_1.5VMAIN
2 1
0.1uF 10V RK
C356
1 2
0.1uF 10V RK
C342
C343
2 1
C815
10uF 6.3V 2012 RM
GND1
82pF 25V AJ
2 1
0.1uF 10V RK
C344
1 2
0.1uF 10V RK
C345
GND1
2 1
C346
4.7uF 6.3V 2012 RM
HUBVSWG_ICH 18
HUBREF_ICH 18
2 1
R140
487 1/16W 1%
2 1
C347
R142
150 1/16W 1%1 2R143
0.1uF 16V FZ
GND1
2 1
R141
1 2
150 1/16W 1%
130 1/16W 1%
2 1
C348
0.1uF 16V FZ
GND1
3 3
1 2
1 2
1 2
0.1uF 10V RK
1uF 10V 1608 FZ
C357
C358
C359
2 2
PWR_VCCP
0.1uF 10V RK
1 2
C360
2 1
0.1uF 10V RK
C361
1 2
0.1uF 10V RK
C362
GND1
0.1uF 10V RK
C829
RIOUT# 18,21,33
VGATE 18,38
3VMAINOK 10,18,22,30,33,34,38
RSMRST# 18,38
KBC_INIT# 18,68
Those capacitors must close the M6 (GMCH)
1 2
100pF 25V AJ
None
C830
1 2
100pF 25V AJ
None
C831
1 2
100pF 25V AJ
None
C832
2 1
100pF 25V AJ
None
C833
2 1
100pF 25V AJ
None
GND1
1 2
1 2
2 1
0.1uF 10V RK
C363
C364
1uF 10V 1608 FZ
1 1
0.1uF 10V RK
C365
GND1
TITLE
CB161AX MAIN
DRAW. No.
C1CP152845-X4
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
20 73
A
PWR_3VMAIN
Nile
RM38
None
1 2
330pF 50V RK
8
7
6
5
8.2Kx4 1/16W 5%
RM39
5
6
7
8
8.2Kx4 1/16W 5%
RM40
1
2
3
4
8.2Kx4 1/16W 5%
RM41
1
2
3
4
8.2Kx4 1/16W 5%
RM42
8
7
6
5
8.2Kx4 1/16W 5%
RM43
8
6
7
5
8.2Kx4 1/16W 5%
C367
0.1uF 16V FZ
None
PCI_INT#1 18,25
PCI_INT#3 18,41
PCI_INT#2 18,41
PCI_INT#0 18,25
4 4
PCI_INT#4 18,36
PCI_INT#7 18
PCI_INT#5 18,24
PCI_INT#6 18
PWR_3VSTD
R145
RIOUT# 18,20,33
2 1
10K 1/16W 5%
None
3 3
配線幅0.1mmOK
PWR_3VSUS
PWR_PMU
PWR_3VMAIN
876
5
ARRAY
RM44
123
4
4.7Kx4 1/16W 5%
None
PWR_3VMAIN
PWR_3VSUS
PWR_PMU
123
ARRAY
876
4
RM45
4.7Kx4 1/16W 5%
5
PCI_PERR# 18,24,25,36,41
PCI_IRDY# 18,24,25,36,41
PCI_SERR# 18,24,25,36,41
PCI_TRDY# 18,24,25,36,41
PCI_LOCK# 18,25
PCI_FRAME# 18,24,25,36,41
PCI_STOP# 18,24,25,36,41
PCI_DEVSEL# 18,24,25,36,41
PCI_REQ#4 18,22
PCI_REQ#0 18,22
PCI_REQ#1 18,22
PCI_REQ#3 18,36
PCI_RST# 10,18,22,23,24,30,32,33,34,48,68
PCI_CLKRUN# 18,24,25,32,41,48,68
AGP_BUSY# 11,18
SERIRQ 18,25,32,48,68
1 2
C366
GND1
SMT8
SMT8
SMT8
SMT8
SMT8
SMT8
1
2
3
4
4
3
2
1
8
7
6
5
8
7
6
5
1
2
3
4
1
3
2
4
GND1
2 2
SMB_CLK_ICH 19
SMB_DATA_ICH 19
SMB_CNT0 18
SMB_CNT1 18
SMB_CNT2_Q 22
1 1
M7
SN74CBT3253
7
1A
9
2A
14
S0
2
S1
1
OE1#
15
OE2#
CBT3253PW,PI5C3253L
VCC
GND
6
1B1
5
1B2
4
1B3
3
1B4
10
2B1
11
2B2
12
2B3
13
2B4
PWR_5VSUS
配線幅0.2mmOK
16
C368
0.1uF 16V FZ
1 2
8
GND1
SMB_CLK_DIMM 15,16
SMB_CLK_PMU 67
SMB_CLK_PLL 4
SMB_CLK_THRM 9
SMB_DATA_DIMM 15,16
SMB_DATA_PMU 67
SMB_DATA_PLL 4
SMB_DATA_THRM 9
TITLE
VB161AX MAIN
DRAW. No.
C1CP152845-X4
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
21 73
A
M8
Nile
10K 1/16W 5%
R530
MAINOK_SUS#
9
20
19
37
12
18
17
16
15
7
2
1
3
4
5
6
8
13
14
SMB_CNT2 18
PCI_Q_REQ#0 25
PCI_Q_REQ#1 24
PCI_Q_REQ#4 41
PCI_RST_SUS
CRT_HSYNC 11
CRT_VSYNC 11
CRT_DDC1_CLK 11
CRT_DDC1_DATA 11
CLK
TBL#
WP#
INIT#
RST#
FGPI0
FGPI1
FGPI2
FGPI3
FGPI4
IC
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
FWH1
CLK_33_FWH 4,68
4 4
3 3
2 2
FWHTBL# 33
FWHWP# 33
FWHINIT# 8
PWR_3VMAIN
R872
2 1
PCI_RST# 10,18,21,23,24,30,32,33,34,48,68
2 1
10K 1/16W 5%
R873
10K 1/16W 5%
LCDID0 49
LCDID1 49
3VMAINOK 10,18,20,30,33,34,38
Q7
DTC144EE
1
PCI_RST# 10,18,21,23,24,30,32,33,34,48,68
LCDID0 49
LCDID1 49
1
Q66
DTC144EE
PWR_5VSUS
1 2
2 3
GND1
2 3
1 1
FWH0
FWH1
FWH2
FWH3
FWH4
RFU0
RFU1
RFU2
RFU3
RFU4
VCC0
VCC1
VCCA
GND0
GND1
GNDA
VPP
ID0
ID1
ID2
ID3
25
26
27
28
38
24
23
22
21
32
33
34
35
36
10
31
39
11
29
30
40
(PCMCIA)
(IEEE1394)
(MiniPCI)
LPC_AD0 18,32,33,48,68
LPC_AD1 18,32,33,48,68
LPC_AD2 18,32,33,48,68
LPC_AD3 18,32,33,48,68
LPC_FRAME# 18,32,33,34,48,68
PWR_3VMAIN
GND1 GND1
M9
1
1OE#
3
1A1
4
1A2
7
1A3
8
1A4
11
1A5
13
2OE#
14
2A1
17
2A2
18
2A3
21
2A4
22
2A5
GND1 GND1
1 2
C369
0.1uF 16V FZ
VCC
1B1
1B2
1B3
1B4
1B5
2B1
2B2
2B3
2B4
2B5
GND
SN74CBT3384APW
24
2
5
6
9
10
15
16
19
20
23
12
PWR_5VSUS
2 1
GND1
C370
0.1uF 16V FZ
876
123
PWR_5VMAIN
2 1
D7
1SS400
5
SMT8
RM46
4
2.2Kx4 1/16W 5%
SMB_CNT2_Q 21
PCI_REQ#0 18,21
PCI_REQ#1 18,21
PCI_REQ#4 18,21
CRT_Q_HSYNC 44,48
CRT_Q_VSYNC 44,48
CRT_Q_DDCCLK 44,48
CRT_Q_DDCDAT 44,48
PWR_3VMAIN
PWR_5VMAIN
CN3
1
2
LPC_AD0 18,32,33,48,68
LPC_AD1 18,32,33,48,68
LPC_AD2 18,32,33,48,68
LPC_AD3 18,32,33,48,68
LPC_FRAME# 18,32,33,34,48,68
CLK_33_SIO 4,32,48
PCI_RST# 10,18,21,23,24,30,32,33,34,48,68
GND1
3
4
5
6
7
8
9
10
11
12
FG1
FG2
DEBUG CN
None
TITLE
VB161AX MAIN
Rev. Date Design Check Appr. Description
Konaka Fuchida Fukuyo 02/05/07
DRAW. No.
C1CP152845-X4
Appr. Check Design
FUJITSU LTD.
CAST
Sheet
22 73