CLK GEN
ICS 9LPRS365
3
71.09502.00W
Mobile CPU
Merom 479
2G/2.33G
4, 5
G792
18
C45 Project code: 91.4U501.001
C46 Project code: 91.4V001.001
PCB Number : 06254
Revision : -1
SYSTEM DC/DC
TPS51120
INPUTS
DCBATOUT
OUTPUTS
5V_S5(6A)
3D3V_S5(7A)
SYSTEM DC/DC
SC411
INPUTS OUTPUTS
DCBATOUT
1D05V_S0(9.5A)
1D8V_S3(8.5A)
DDR2
533/667 MHz
DDR2
533/667 MHz
RJ11
LINE In
INT.SPKR
Headphone Out
New card
CD-ROM
HDD
11, 12
11, 12
MODEM
MDC Card
Codec
CX20549
OP AMP
G1432Q
OP AMP
G1410
PCI-E/USB 2.0
20
19
533/667MHz
533/667MHz
27
AZALIA
26
27
27
G577
SATA
PATA
X4 DMI
400MHz
22 22
HOST BUS
Crestline
AGTL+ CPU I/F
DDR Memory I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
71.CREST.00U
667/800MHz@1.05V
6,7,8,9,10
C-Link0
ICH8M
6 PCIe ports
PCI/PCI BRIDGE
ACPI 1.1
3 SATA
1 PATA 66/100
10 USB 2.0/1.1 ports
ETHERNET (10/100/1000MbE)
High Definition Audio
LPC I/F
Serial Peripheral I/F
Matrix Storage Technology(DO)
Active Managemnet Technology(DO)
71.0ICH8.A0U
15, 16, 17
USB 2.0
USB 2.0
USB 2.0
http://hobi-elektronika.net
PCI-EG
PCI-E
USB 2.0
PCI-E /USB 2.0
PCI-E /USB 2.0
LPC BUS
BlueTooth
USB x 4
Camera
21
21
19
ATI
M71/M72
VRAMx4
38, 39, 40, 41, 42, 43
LAN
10/100/G
RTL8111B
SIM Card
KBC
Winbond
WPC8763L
Touch
Pad
19
25
128MB
23
SPI I/F
LVDS
RGB CRT
S-Video
TXFM
23
USB Cardreader
RTS5158
Mini Card
802.11/a/b/g/n
Mini Card
3G card
BIOS
17
WXGA/SXGA+
15"LCD
CRT
S-Video
RJ45
22
22
LPC
DEBUG
CONN.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
23
24
26
14
13
13
SC411
DCBATOUT
APL5913
1D8V_S3 1D5V_S0
APL5915
3D3V_S0 2D5V_S0
APL5915
3D3V_S5 1D25V_S0
MAXIM CHARGER
MAX8725
DCBATOUT
CPU DC/DC
ISL6262
INPUTS
DCBATOUT
PCB STACKUP
Signal 1
L1:
L2:
POWER
L3:
Signal 2
Signal 3
L4:
GND
L5:
Signal 4
L6:
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
C45/C46
C45/C46
C45/C46
14 5 Tuesday, April 24, 2007
14 5 Tuesday, April 24, 2007
14 5 Tuesday, April 24, 2007
TPS5110
DDR_VREF_S0
(1.5A)
DDR_VREF_S3
(2A)
(300mA)
OUTPUTS INPUTS
CHG_PWR
18V 4.0A
UP+5V
5V 100mA
OUTPUTS
VCC_CORE_S0
0~1.3V
47A
of
-1
-1
-1
ICH8M Functional Strap Definitions
Signal
HDA_SDOUT
HDA_SYNC
GNT2#
GPIO20
GNT1#/
GPIO51
GNT3#
GNT0#/
SPI_CS1#
INTVRMEN
LAN100_SLP
SATALED#
SPKR
TP3
GPIO33/
HDA_DOCK
_EN#
Usage/When Sampled
XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK
PCIE config1 bit0,
Rising Edge of PWROK.
PCIE config2 bit0,
Rising Edge of PWROK.
Reserved
ESI Strap (Server Only)
Rising Edge of PWROK
Top-Block
Swap Override.
Rising Edge of PWROK.
Boot BIOS Destination
Selection.
Rising Edge of PWROK.
Integrated VccSus1_05,
VccSus1_5 and VccCL1_5
VRM Enable/Disable.
Always sampled.
Integrated VccLAN1_05
and VccCL1_05 VRM
Enable/Disable.
Always sampled.
PCI Express Lane
Reversal. Rising Edge
of PWROK.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
Flash Descriptor
Security Override Strap
Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Enables integrated VccSus1_05, VccSus1_5 and
VccCL1_5 VRM's when sampled high
Enables integrated VccLAN1_05 and VccCL1_05 VRM's
when sampled high
Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)
If sampled high, the system is strapped to the
"No Reboot" mode(ICH8 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
This signal should not be pull low unless using
XOR Chain testing.
This signal has a weak internal pull-up.
Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.
ICH8-M EDS 20271 1.5V1
Comment
ICH8M IDE Integrated Series
Termination Resistors
DD[15:0], DIOW#, DIOR#, DREQ,
DDACK#, IORDY, DA[2:0], DCS1#,
DCS3#, IDEIRQ
PCI Routing
INT REQ GNT IDSEL
PCIE Routing
LANE1
LANE2
LANE3
LAN
Express Card
MiniCard WLAN
USB Cardreader LANE4
page 17
approximately 33 ohm
USB Table
USB
Pair
Device
0
USB1(ON BOARD)
1
USB2(EXT. USB)
USB3(EXT. USB)
2
3
USB4(EXT. USB)
MINICARD
4
USB Cardreader
5
6
MINICARD
7
NEW CARD
BLUETOOTH
8
WEBCAM
9
page 16
ICH8M Integrated Pull-up
and Pull-down Resistors
SIGNAL Resistor Type/Value
HDA_BIT_CLK
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GNT[3:0]
GPIO[20]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#
SPI_CS1#
SPI_CLK
SPI_MOSI
SPI_MISO
TACH_[3:0]
SPKR
TP[3]
USB[9:0][P,N]
CL_RST#
http://hobi-elektronika.net
ICH8-M EDS 20271 1.5V1
PULL-DOWN 20K
NONE
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 10K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 15K
PULL-UP TBD
VCC_CORE_S0 5,30
1D05V_S0 4,5,6,7,9,10,15,17,25,32,37
1D5V_S0 5,10,15,16,17,22,33
3D3V_S0 3,4,7,10,11,13,14,15,16,17,18,19,20,21,22,23,25,26,27,28,30,31,34,37,39,40,41
1D05V_S0 4,5,6,7,9,10,15,17,25,32,37
1D25V_S0 7,10,17,33
1D8V_S3 7,9,10,11,12,28,32,33,34
1D05V_S0 4,5,6,7,9,10,15,17,25,32,37
1D5V_S0 5,10,15,16,17,22,33
1D25V_S0 7,10,17,33
3D3V_S0 3,4,7,10,11,13,14,15,16,17,18,19,20,21,22,23,25,26,27,28,30,31,34,37,39,40,41
3D3V_S5 15,16,17,20,22,23,26,28,31,32,34
2D5V_S0 34,37,39,40,41
1D2V_S0 34,39,41
1D8V_S0 28,37,39,40,41,42,43,44
VCCGFXCORE 34,38,39,41
3D3V_S0 3,4,7,10,11,13,14,15,16,17,18,19,20,21,22,23,25,26,27,28,30,31,34,37,39,40,41
Crestline Strapping Signals and
Configuration
Pin Name
CFG[2:0]
CFG[4:3]
CFG5
CFG8
CFG9
CFG[11:10] Reserved
CFG[13:12]
CFG[15:14]
CFG16
CFG[18:17]
CFG19
CFG20
SDVOCRTL
_DATA
All strap signals are sampled with respect to the leading
NOTE:
edge of the Calistoga GMCH PWORK in signal.
CPU
VCC_CORE_S0
1D05V_S0
1D5V_S0
CLK
3D3V_S0
NB
1D05V_S0
1D25V_S0
1D8V_S3
SB
1D05V_S0
1D5V_S0
1D25V_S0
3D3V_S0
3D3V_S5
VGA
2D5V_S0
1D2V_S0
1D8V_S0
VCCGFXCORE
3D3V_S0
Strap Description
FSB Frequency Select
Reserved
DMI x2 Select
Reserved CFG[7:6]
Low Power PCI Express
PCI Express Graphics
Lane Reversal
XOR/ALL Z test
straps
Reserved
FSB Dynamic ODT
Reserved
DMI Lane Reversal
SDVO/PCIE
Concurrent
SDVO Present
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
010 = FSB800
011 = FSB667
others = Reserved
0 = DMI x2
1 = DMI x4
0 = Normal mode
1 = Low Power mode
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = Normal operation (Default):lane
Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
0 = Only SDVO or PCIE x1 is
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present
1= SDVO Card present
Crestline EDS 19857 0.7a
Configuration
(Default)
Reserved
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reference
Reference
Reference
C45/C46
C45/C46
C45/C46
page 7
(Default)
(Default)
(Default)
(Default)
24 5 Wednesday, April 25, 2007
24 5 Wednesday, April 25, 2007
24 5 Wednesday, April 25, 2007
SA
SA
of
SA
3D3V_S0
R434
R434
3D3V_48MPWR_S0
1 2
4D99R3F-1-GP
4D99R3F-1-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C412
C412
3D3V_S0
1 2
1 2
C712
C712
S C1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C701
C701
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
3D3V_CLKPLL_S0
1 2
1 2
C698
C698
C699
C699
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C721
C721
C719
C719
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
G131 G131
1 2
1 2
C717
C717
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C720
C720
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_CLKGEN_S0
1 2
1 2
C730
C730
C700
C700
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C401
C401
C706
C706
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C718
C718
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
G132 G132
3D3V_S0
1 2
C732
C732
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R458
R458
10KR2J-3-GP
10KR2J-3-GP
PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5
1 2
R440
R440
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
C431 SC10P50V2JN-4GP
C431 SC10P50V2JN-4GP
1 2
C432 SC10P50V2JN-4GP
C432 SC10P50V2JN-4GP
1 2
C433 SC10P50V2JN-4GP
C433 SC10P50V2JN-4GP
1 2
C434 SC10P50V2JN-4GP
C434 SC10P50V2JN-4GP
1 2
C731 SC10P50V2JN-4GP
C731 SC10P50V2JN-4GP
1 2
C710 SC10P50V2JN-4GP
C710 SC10P50V2JN-4GP
SEL2
FSC
SEL1
FSB
1
0
0101
SEL0
FSA
01
01
0 1
CPU
100M
133M
166M
200M
PIN NAME DESCRIPTION
Byte 5, bit 7
0 = PCI0 enabled (default)
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3/RC-5_EN
PCI4/27M_SEL
PCI_F5/ITP_EN
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
0 = Pin37 as CPU_STOP# , pin 38 as PCI_STOP#.
1 = Pins37,38 as SRC-5 differential pair.
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
0 =SRC8/SRC8#
1 = ITP/ITP#
1 2
R459
R459
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
R441
R441
10KR2J-3-GP
10KR2J-3-GP
PCLK_CARD
DY
DY
PCLK_FWH
DY
DY
PCLK_KBC
DY
DY
PCLK_ICH
DY
DY
CLK48_ICH
DY
DY
CLK_ICH14
DY
DY
FSB
X
X
667M
800M
-1
1 2
R460
R460
10KR2J-3-GP
10KR2J-3-GP
VGA
VGA
1 2
R442
R442
10KR2J-3-GP
10KR2J-3-GP
UMA
UMA
3D3V_S0
PCLK_FWH 25
PCLK_KBC 19
CLK_PCI_ICH 16
CLK48_ICH 16
CLK_ICH14 16
CPU_SEL1 4,7
CPU_SEL2 4,7
CPU_SEL0 4,7
1 2
R461
R461
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
R443
R443
10KR2J-3-GP
10KR2J-3-GP
TP118 TP118
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
PCLK_CARD
1
PCLK_FWH
PCLK_ICH
CLK48_ICH
CPU_SEL1
CLK_ICH14
GEN_XTAL_OUT
C399
C399
4
4
R463 33R2J-2-GP R463 33R2J-2-GP
R433 33R2J-2-GP R433 33R2J-2-GP
R429 2K2R2J-2-GP R429 2K2R2J-2-GP
R462 2K2R2J-2-GP R462 2K2R2J-2-GP
1 2
1 2
1 2
1 2
SRN33J-5-GP-U
SRN33J-5-GP-U
RN41
RN41
2 3
1
SRN33J-5-GP-U
SRN33J-5-GP-U
RN40
RN40
2 3
1
CL=20pF±0.2pF
R181
R181
DY
DY
1 2
10MR2J-L-GP
10MR2J-L-GP
1 2
X4
X4
X-14D31818M-44GP
X-14D31818M-44GP
82.30005.951
82.30005.951
1 2
GEN_XTAL_IN
U26
3D3V_CLKGEN_S0
3D3V_48MPWR_S0
3D3V_CLKPLL_S0
PCLKCLK2
PCLKCLK3
PCLKCLK4 PCLK_KBC
PCLKCLK5
GEN_XTAL_IN
GEN_XTAL_OUT
CLK48
CLK14
1 2
C400
C400
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
U26
2
VDDPCI
9
VDD48
16
VDDPLL3
61
VDDREF
39
VDDSRC
55
VDDCPU
12
VDD96_IO
20
VDDPLL3_IO
26
VDDSRC_IO
36
VDDSRC_IO
45
VDDSRC_IO
49
VDDCPU_IO
1
PCI0/CR#_A
3
PCI1/CR#_B
4
PCI2/TME
5
PCI3
6
PCI4/27_SELECT
7
PCI_F5/ITP_EN
59
X2
60
X1
10
USB_48MHZ/FSLA
57
FSLB/TEST_MODE
62
REF0/FSLC/TEST_SEL
8
GNDPCI
11
GND48
15
GND
19
GND
23
GNDSRC
42
GNDSRC
52
GNDCPU
58
GNDREF
29
GNDSRC
ICS9LPRS365YGLFT-GP
ICS9LPRS365YGLFT-GP
71.09365.00W
71.09365.00W
Ext. VGA:71.09365.00W (64pin)
http://hobi-elektronika.net
SDATA
SCLK
SRCT0/DOTT_96
SRCC0/DOTC_96
27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
SRCT2/SATAT
SRCC2/SATAC
SRCT3/CR#_C
SRCC3/CR#_D
SRCT4
SRCC4
PCI_STOP#
CPU_STOP#
SRCT6
SRCC6
SRCT7/CR#_F
SRCC7/CR#_E
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
CPUT1_F
CPUC1_F
CPUT0
CPUC0
CK_PWRGD/PD#
NC#48
SRCT9
SRCC9
SRCC11/CR#_G
SRCT11/CR#_H
SRCT10
SRCC10
63
64
DREFCLK_1
13
DREFCLK#_1
14
DREFSSCLK_1
17
DREFSSCLK#_1
18
CLK_PCIE_SATA_1
21
CLK_PCIE_SATA_1#
22
CLK_MCH_3GPLL_1
24
CLK_MCH_3GPLL_1#
25
CLK_PCIE_MINI_11
27
CLK_PCIE_MINI_11#
28
38
37
CLK_PCIE_ICH_1
41
CLK_PCIE_ICH_1#
40
CLK_PCIE_NEW_R
44
CLK_PCIE_NEW#_R
43
CLK_PCIE_LAN_R
47
CLK_PCIE_LAN#_R
46
CLK_MCH_BCLK_1
51
CLK_MCH_BCLK_1#
50
CLK_CPU_BCLK_1
54
CLK_CPU_BCLK_1#
53
CLK_PWRGD
56
48
CLK_PCIE_NEW2_R
30
CLK_PCIE_NEW2#_R
31
32
33
CLK_PCIE_PEG_1
34
CLK_PCIE_PEG_1#
35
SMBDAT_ICH 11,15
SMBCLK_ICH 11,15
UMA
UMA
RN42
RN42
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN39
RN39
SRN0J-6-GP
SRN0J-6-GP
RN43
RN43
SRN0J-6-GP
SRN0J-6-GP
RN44
RN44
SRN0J-6-GP
SRN0J-6-GP
RN45
RN45
SRN0J-6-GP
SRN0J-6-GP
RN35
RN35
SRN0J-6-GP
SRN0J-6-GP
RN34
RN34
SRN0J-6-GP
SRN0J-6-GP
RN33
RN33
SRN0J-6-GP
SRN0J-6-GP
RN32
RN32
SRN0J-6-GP
SRN0J-6-GP
RN31
RN31
SRN0J-6-GP
SRN0J-6-GP
RN46
RN46
SRN0J-6-GP
SRN0J-6-GP
RN36
RN36
SRN0J-6-GP
SRN0J-6-GP
2 3
1
4
2 3
1
4
2 3
1
4
2 3
1
4
2 3
1
4
1
4
2 3
1
4
2 3
1
4
2 3
1
4
2 3
1
4
2 3
CLK_PWRGD 16
2 3
1
4
VGA
VGA
2 3
1
4
-1
DREFSSCLK_1 ATI_CLK27
DREFCLK_96M 7
DREFCLK_96M# 7
DREFSSCLK_100M 7
DREFSSCLK_100M# 7
CLK_PCIE_SATA 15
CLK_PCIE_SATA# 15
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_MINI 22
CLK_PCIE_MINI# 22
PM_STPPCI# 16
PM_STPCPU# 16
CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_PCIE_NEW 22
CLK_PCIE_NEW# 22
CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_PCIE_NEW2 22
CLK_PCIE_NEW2# 22
CLK_PCIE_PEG 38
CLK_PCIE_PEG# 38
CLK27
CLK27
R534
R534
1 2
0R2J-2-GP
0R2J-2-GP
SB(Reserve for 27MHz_SS fuction)
R439
DREFSSCLK#_1 OSC_SPREAD
R439
1 2
0R2J-2-GP
0R2J-2-GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
DY
DY
Clock Generator
Clock Generator
Clock Generator
ATI_CLK27 40
OSC_SPREAD 39
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
C45/C46
C45/C46
C45/C46
34 5 Monday, May 07, 2007
34 5 Monday, May 07, 2007
34 5 Monday, May 07, 2007
SA
SA
of
SA
H_RS#[0..2] 6
H_REQ#[0..4] 6
H_D#[0..63] 6
H_A#[3..35] 6
1 OF 4
1 OF 4
U38A
U38A
H_A#3
J4
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
RSVD_CPU_1
1
RSVD_CPU_2
1
RSVD_CPU_3
1
RSVD_CPU_4
1
RSVD_CPU_5
1
RSVD_CPU_6
1
RSVD_CPU_7
1
RSVD_CPU_8
1
RSVD_CPU_9
1
RSVD_CPU_10
1
RSVD_CPU_11
1
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#0 6
H_ADSTB#1 6
H_A20M# 15
H_FERR# 15
H_IGNNE# 15
H_STPCLK# 15
H_INTR 15
H_NMI 15
H_SMI# 15
TP20 TP20
TP18 TP18
TP16 TP16
TP13 TP13
TP34 TP34
TP28 TP28
TP27 TP27
TP25 TP25
TP24 TP24
TP23 TP23
TP33 TP33
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD#M4
N5
RSVD#N5
T2
RSVD#T2
V3
RSVD#V3
B2
RSVD#B2
C3
RSVD#C3
D2
RSVD#D2
D22
RSVD#D22
D3
RSVD#D3
F6
RSVD#F6
B1
KEY_NC
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
62.10079.001
62.10079.001
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
XDP/ITP SIGNALS CONTROL
XDP/ITP SIGNALS CONTROL
THERMAL
THERMAL
PROCHOT#
ICH
ICH
THERMTRIP#
HCLK
HCLK
RESERVED
RESERVED
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
THRMDA
THRMDC
BCLK0
BCLK1
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
D21
A24
B25
C7
A22
A21
1st source : 62.10053.401
2nd source : 62.10079.001
TP22 TP22
H_IERR#
H_RS#0
H_RS#1
H_RS#2
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
H_THERMDA
H_THERMDC
1
XDP_TMS
XDP_TDI
XDP_BPM#5
XDP_TDO
H_CPURST#
XDP_DBRESET#
XDP_TCK
XDP_TRST#
TP4TP4
1
TP5TP5
1
TP3TP3
1
TP8TP8
1
TP7TP7
1
TP6TP6
1
TP9TP9
1
TP12 TP12
1
TP10 TP10
1
TP2TP2
1
TP11 TP11
1
TP30 TP30
1
H_THERMTRIP# 7,15
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_INIT# 15,25
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
1D05V_S0
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1 2
R52
R52
1 2
R61
R61
1 2
R54
R54
1 2
R56
R56
1 2
R81
R81
1 2
R83
R83
1 2
R51
R51
1 2
R58
R58
All place within 2" to CPU
1D05V_S0
1 2
R77
R77
56R2J-4-GP
56R2J-4-GP
1 2
R78
R78
68R2-GP
68R2-GP
1KR2F-3-GP
1KR2F-3-GP
CPU_PROCHOT# 30
H_THERMDA 18
H_THERMDC 18
1 2
C122
C122
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
Place close to CPU socket
A-note2 : DY
1D05V_S0
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
DY
DY
54D9R2F-L1-GP
54D9R2F-L1-GP
DY
DY
150R2F-1-GP
150R2F-1-GP
DY
DY
54D9R2F-L1-GP
54D9R2F-L1-GP
649R2F-GP
649R2F-GP
3D3V_S0
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0
http://hobi-elektronika.net
R225
R225
R228
R228
2KR2F-3-GP
2KR2F-3-GP
TEST4
166
200
1D05V_S0
1 2
1 2
1 2
C482
C482
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2 OF 4
2 OF 4
U38B
U38B
H_D#0
E22
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
CPU_GTLREF0
TEST1
1
TEST2
1
1
TEST4
RSVD_CPU_13
1
RSVD_CPU_14
1
Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals
Layout Note:
"CPU_GTLREF0"
0.5" max length.
C485
C485
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
1 2
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
TP31 TP31
TP26 TP26
TP29 TP29
TP1TP1
TP32 TP32
CPU_SEL0 3,7
CPU_SEL1 3,7
CPU_SEL2 3,7
0
00
1
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
1 1
MISC
MISC
D32#
D33#
D34#
D35#
DATA GRP0 DATA GRP1
DATA GRP0 DATA GRP1
D36#
D37#
D38#
D39#
D40#
D41#
D42#
DATA GRP2 DATA GRP3
DATA GRP2 DATA GRP3
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
H_D#32
Y22
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
V23
H_D#37
T22
H_D#38
U25
H_D#39
U23
H_D#40
Y25
H_D#41
W22
H_D#42
Y23
H_D#43
W24
H_D#44
W25
H_D#45
AA23
H_D#46
AA24
H_D#47
AB25
Y26
AA26
U22
H_D#48
AE24
H_D#49
AD24
H_D#50
AA21
H_D#51
AB22
H_D#52
AB21
H_D#53
AC26
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AC25
H_D#58
AE21
H_D#59
AD21
H_D#60
AC22
H_D#61
AD23
H_D#62
AF22
H_D#63
AC23
AE25
AF24
AC20
COMP0
R26
COMP1
U26
COMP2
AA1
COMP3 RSVD_CPU_12
Y1
E5
B5
D24
D6
D7
AE6
PSI#
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
CPU (1 of 2) AGTL
CPU (1 of 2) AGTL
CPU (1 of 2) AGTL
C45/C46
C45/C46
C45/C46
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_DSTBN#3 6
H_DSTBP#3 6
R236 27D4R2F-L1-GP R236 27D4R2F-L1-GP
R234 54D9R2F-L1-GP R234 54D9R2F-L1-GP
R64 27D4R2F-L1-GP R64 27D4R2F-L1-GP
R66 54D9R2F-L1-GP R66 54D9R2F-L1-GP
H_DINV#3 6
1 2
1 2
1 2
1 2
H_DPRSTP# 7,15,30
H_DPSLP# 15
H_DPWR# 6
H_PWRGD 15
H_CPUSLP# 6
PSI# 30
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
44 5 Wednesday, April 25, 2007
44 5 Wednesday, April 25, 2007
44 5 Wednesday, April 25, 2007
SA
SA
SA
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCA
VCCA
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VCC_CORE_S0
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
1 2
C104
C104
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
Ivccp boot= 4.5A
Ivccp stable= 2.5A
1 2
C72
C72
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VCC_SENSE 30
VSS_SENSE 30
3 OF 4
VCC_CORE_S0
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
Layout Note:
VCCSENSE and VSSSENSE lines should be of equal length.
Layout Note:
Provide a test point (with no stub) to connect a differential probe
between VCCSENSE and VSSSENSE at the location where the
two 54.9ohm resistors terminate the 55 ohm transmission line.
U38C
U38C
A7
VCC
A9
VCC
A10
VCC
A12
VCC
A13
VCC
A15
VCC
A17
VCC
A18
VCC
A20
VCC
B7
VCC
B9
VCC
B10
VCC
B12
VCC
B14
VCC
B15
VCC
B17
VCC
B18
VCC
B20
VCC
C9
VCC
C10
VCC
C12
VCC
C13
VCC
C15
VCC
C17
VCC
C18
VCC
D9
VCC
D10
VCC
D12
VCC
D14
VCC
D15
VCC
D17
VCC
D18
VCC
E7
VCC
E9
VCC
E10
VCC
E12
VCC
E13
VCC
E15
VCC
E17
VCC
E18
VCC
E20
VCC
F7
VCC
F9
VCC
F10
VCC
F12
VCC
F14
VCC
F15
VCC
F17
VCC
F18
VCC
F20
VCC
AA7
VCC
AA9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
3 OF 4
VCCSENSE
VSSSENSE
1D05V_S0
1 2
TC9
TC9
SE330U2VDM-L-GP
SE330U2VDM-L-GP
Place close to CPU socket
A-note2
1D5V_VCCA_S0
1 2
C498
C498
L18
L18
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
1 2
68.00230.041
68.00230.041
C502
C502
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C93
C93
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C88
C88
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C94
C94
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C89
C89
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C84
C84
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C75
C75
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C85
C85
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C76
C76
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C487
C487
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C489
C489
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C492
C492
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C488
C488
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C490
C490
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C493
C493
1 2
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
1D5V_S0
layout note: "1D5V_VCCA_S0"
as short as possible
R46
VCC_SENSE
VSS_SENSE
R46
100R2F-L1-GP-U
100R2F-L1-GP-U
R50
R50
1 2
100R2F-L1-GP-U
100R2F-L1-GP-U
IVCCA = 130mA
H_VID[0..6] 30
VCC_CORE_S0
1 2
VCC_CORE_S0 VCC_CORE_S0
1D05V_S0
VCC_CORE_S0
1 2
C67 SCD1U10V2KX-5GP C67 SCD1U10V2KX-5GP
1 2
C68 SCD1U10V2KX-5GP C68 SCD1U10V2KX-5GP
1 2
C111 SCD1U10V2KX-5GP C111 SCD1U10V2KX-5GP
1 2
DY
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DY
DY
DY
DY
DY
C109
C109
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C101
C101
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C25
C25
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C17
C17
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
C112 SCD1U10V2KX-5GP
C112 SCD1U10V2KX-5GP
C87 SCD1U10V2KX-5GP C87 SCD1U10V2KX-5GP
C71 SCD1U10V2KX-5GP C71 SCD1U10V2KX-5GP
C95 SCD1U10V2KX-5GP C95 SCD1U10V2KX-5GP
C103 SCD1U10V2KX-5GP
C103 SCD1U10V2KX-5GP
C82 SCD1U10V2KX-5GP
C82 SCD1U10V2KX-5GP
C98 SCD1U10V2KX-5GP C98 SCD1U10V2KX-5GP
C92 SC4D7U6D3V3KX-GP C92 SC4D7U6D3V3KX-GP
C90 SC4D7U6D3V3KX-GP C90 SC4D7U6D3V3KX-GP
U38D
U38D
A4
VSS
A8
VSS
A11
VSS
A14
VSS
A16
VSS
A19
VSS
A23
VSS
AF2
VSS
B6
VSS
B8
VSS
B11
VSS
B13
VSS
B16
VSS
B19
VSS
B21
VSS
B24
VSS
C5
VSS
C8
VSS
C11
VSS
C14
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C25
VSS
D1
VSS
D4
VSS
D8
VSS
D11
VSS
D13
VSS
D16
VSS
D19
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E11
VSS
E14
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
F5
VSS
F8
VSS
F11
VSS
F13
VSS
F16
VSS
F19
VSS
F2
VSS
F22
VSS
F25
VSS
G4
VSS
G1
VSS
G23
VSS
G26
VSS
H3
VSS
H6
VSS
H21
VSS
H24
VSS
J2
VSS
J5
VSS
J22
VSS
J25
VSS
K1
VSS
K4
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L21
VSS
L24
VSS
M2
VSS
M5
VSS
M22
VSS
M25
VSS
N1
VSS
N4
VSS
N23
VSS
N26
VSS
P3
VSS
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
4 OF 4
4 OF 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
http://hobi-elektronika.net
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
CPU (2 of 2) POWER
CPU (2 of 2) POWER
CPU (2 of 2) POWER
C45/C46
C45/C46
C45/C46
54 5 Wednesday, April 25, 2007
54 5 Wednesday, April 25, 2007
54 5 Wednesday, April 25, 2007
of
SA
SA
SA
H_SWING routing Trace width and
Spacing use 10 / 20 mil
H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )
1D05V_S0
1 2
R292
R292
221R2F-2-GP
221R2F-2-GP
H_SWING H_SWING
1 2
R297
R297
100R2F-L1-GP-U
100R2F-L1-GP-U
H_SCOMP and H_SCOMP# Resistors and
Capacitors close MCH 500 mil ( MAX )
1D05V_S0
1 2
R280
R280
1 2
R281
R281
H_RCOMP routing Trace width and
Spacing use 10 / 20 mil
1 2
R279
R279
1 2
C158
C158
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
H_SCOMP
54D9R2F-L1-GP
54D9R2F-L1-GP
H_SCOMP#
54D9R2F-L1-GP
54D9R2F-L1-GP
H_RCOMP
24D9R2F-L-GP
24D9R2F-L-GP
Place them near to the chip ( < 0.5")
1KR2F-3-GP
1KR2F-3-GP
1D05V_S0
R308
R308
1 2
H_AVREF
1 2
R315
R315
2KR2F-3-GP
2KR2F-3-GP
H_CPURST# 4
H_CPUSLP# 4
1 2
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
C552
C552
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M10
N12
P13
W10
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
AC6
AE2
AC5
AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AE5
AH2
AH13
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
N9
H5
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
Y3
AJ9
AJ5
AJ6
AJ7
AJ2
AJ3
B3
C2
W1
W2
B6
E5
B9
A9
1 OF 10
1 OF 10
U46A
U46A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CRESTLINE-GP-U
CRESTLINE-GP-U
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
HOST
HOST
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_HIT#
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4
H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4
H_RS#[0..2] 4
H_REQ#[0..4] 4
H_D#[0..63] 4
H_A#[3..35] 4
H_REF Decoupling Crestline
close Crestline 100 mil
http://hobi-elektronika.net
965GM ( 71.GM965.00U )
965PM ( 71.PM965.00U )
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
GMCH (1 of 5) AGTL
GMCH (1 of 5) AGTL
GMCH (1 of 5) AGTL
C45/C46
C45/C46
C45/C46
64 5 Wednesday, April 25, 2007
64 5 Wednesday, April 25, 2007
64 5 Wednesday, April 25, 2007
of
SA
SA
SA
5
AR12
AR13
AM12
AN13
AR37
CPU_SEL0
CPU_SEL1
CPU_SEL2
CFG3
1
CFG4
1
CFG5
1
CFG6
1
CFG7
1
CFG8
1
CFG9
1
CFG10
1
CFG11
1
CFG12
1
CFG13
1
CFG14
1
CFG15
1
CFG16
1
CFG17
1
CFG18
1
CFG19
1
CFG20
1
3D3V_S0
5
4
3D3V_S0
AM36
AM37
BK22
BF19
BH20
BK18
BF23
BG23
BC23
BD24
BH39
AW20
BK20
AW49
AV20
BK51
BK50
D D
C C
CPU_SEL0 3,4
CPU_SEL1 3,4
CPU_SEL2 3,4
TP56 TP56
TP64 TP64
TP59 TP59
TP66 TP66
TP67 TP67
TP58 TP58
TP61 TP61
TP70 TP70
TP69 TP69
TP60 TP60
TP65 TP65
TP62 TP62
TP68 TP68
TP63 TP63
TP72 TP72
PM_BMBUSY# 16
H_DPRSTP# 4,15,30
-1
1
2
3
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
SB
R160
R160
1 2
10KR2J-3-GP
10KR2J-3-GP
U67
U67
B
A
GND
TP74 TP74
TP73 TP73
TP77 TP77
DY
DY
PM_BMBUSY#
PM_EXTTS#0
PM_EXTTS#1
VGATE_PWRGD
PLT_RST1#_NB
H_THERMTRIP#
PM_DPRSLPVR
VCC
Y
5
B B
VGATE_PWRGD 16,30
H_THERMTRIP# 4,15
PM_DPRSLPVR 16,30
1 2
R526
R526
0R0402-PAD
0R0402-PAD
A A
PLT_RST1# 16,20,22,23,25,38
CLK_3GPLLREQ#
U46B
U46B
P36
P37
R35
N35
J12
AL36
D20
H10
B51
BJ20
BJ18
B44
C44
A35
B37
B36
B34
C34
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
G41
L39
L36
J36
N20
G36
BJ51
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
CRESTLINE-GP-U
CRESTLINE-GP-U
2 OF 10
2 OF 10
RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20
RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24
RSVD#BH39
RSVD#AW20
RSVD#BK20
RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2
RSVD
RSVD
DDR MUXING
DDR MUXING
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF#AR49
SM_VREF#AW4
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
DMI
DMI
CFG PM NC
CFG PM NC
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MISC ME GRAPHICS VID
MISC ME GRAPHICS VID
SM_RCOMP
SM_RCOMP#
PEG_CLK#
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
GFX_VR_EN
CL_PWROK
ICH_SYNC#
SM_CK0
SM_CK1
SM_CK3
SM_CK4
SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4
SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
PEG_CLK
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
CL_CLK
CL_DATA
CL_RST#
CL_VREF
CLKREQ#
TEST1
TEST2
4
M_CLK_DDR0
AV29
M_CLK_DDR1
BB23
M_CLK_DDR2
BA25
M_CLK_DDR3
AV23
M_CLK_DDR#0
AW30
M_CLK_DDR#1
BA23
M_CLK_DDR#2
AW25
M_CLK_DDR#3
AW23
M_CKE0
BE29
M_CKE1
AY32
M_CKE2
BD39
M_CKE3
BG37
M_CS0#
BG20
M_CS1#
BK16
M_CS2#
BG16
M_CS3#
BE13
M_ODT0
BH18
M_ODT1
BJ15
M_ODT2
BJ14
M_ODT3
BE16
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
M_RCOMPP
BL15
M_RCOMPN
BK14
AR49
AW4
DREFCLK
B42
DREFCLK#
C42
DREFSSCLK
H48
DREFSSCLK#
H47
CLK_MCH_3GPLL
K44
CLK_MCH_3GPLL#
K45
DMI_TXN0
AN47
DMI_TXN1
AJ38
DMI_TXN2
AN42
DMI_TXN3
AN46
DMI_TXP0
AM47
DMI_TXP1
AJ39
DMI_TXP2
AN41
DMI_TXP3
AN45
DMI_RXN0
AJ46
DMI_RXN1
AJ41
DMI_RXN2
AM40
DMI_RXN3
AM44
DMI_RXP0
AJ47
DMI_RXP1
AJ42
DMI_RXP2
AM39
DMI_RXP3
AM43
GFX_VID0
E35
GFX_VID1
A39
GFX_VID2
C38
GFX_VID3 H_DPRSTP#
B39
GFX_VR_EN
E36
CL_CLK0
AM49
CL_DATA0
AK50
PWROK
AT43
CL_RST#
AN49
MCH_CLVREF
AM50
H35
SDVO_CRT_DATA
K36
CLK_3GPLLREQ#
G39
MCH_ICH_SYNC#
G40
TEST1_GMCH
A37
TEST2_GMCH
R32
20KR2J-L2-GP
20KR2J-L2-GP
4
R155
R155
M_CLK_DDR0 11
M_CLK_DDR1 11
M_CLK_DDR2 11
M_CLK_DDR3 11
M_CLK_DDR#0 11
M_CLK_DDR#1 11
M_CLK_DDR#2 11
M_CLK_DDR#3 11
M_CKE0 11,12
M_CKE1 11,12
M_CKE2 11,12
M_CKE3 11,12
M_CS0# 11,12
M_CS1# 11,12
M_CS2# 11,12
M_CS3# 11,12
M_ODT0 11,12
M_ODT1 11,12
M_ODT2 11,12
M_ODT3 11,12
DDR_VREF_S3
DREFCLK_96M 3
DREFCLK_96M# 3
DREFSSCLK_100M 3
DREFSSCLK_100M# 3
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
DMI_TXN0 16
DMI_TXN1 16
DMI_TXN2 16
DMI_TXN3 16
DMI_TXP0 16
DMI_TXP1 16
DMI_TXP2 16
DMI_TXP3 16
DMI_RXN0 16
DMI_RXN1 16
DMI_RXN2 16
DMI_RXN3 16
DMI_RXP0 16
DMI_RXP1 16
DMI_RXP2 16
DMI_RXP3 16
1
TP75 TP75
1
TP152 TP152
1
TP151 TP151
1
TP153 TP153
1
TP78 TP78
CL_CLK0 16
CL_DATA0 16
PWROK 16,18
CL_RST# 16
1
1 2
R362
R362
0R2J-2-GP
0R2J-2-GP
1 2
3
1D8V_S3
R321
M_RCOMPP
M_RCOMPN
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP76 TP76
MCH_ICH_SYNC# 16
R321
C646
C646
R317
R317
1 2
1 2
1 2
1D25V_S0
1 2
1 2
R390
R390
1KR2F-3-GP
1KR2F-3-GP
R391
R391
392R2F-GP
392R2F-GP
1D8V_S3
3
20R2F-GP
20R2F-GP
20R2F-GP
20R2F-GP
http://hobi-elektronika.net
GMCH_LCDVDD_ON 14
GMCH_TXACLK- 14
GMCH_TXACLK+ 14
GMCH_TXBCLK- 14
GMCH_TXBCLK+ 14
GMCH_TXAOUT0- 14
GMCH_TXAOUT1- 14
GMCH_TXAOUT2- 14
GMCH_TXAOUT0+ 14
GMCH_TXAOUT1+ 14
GMCH_TXAOUT2+ 14
GMCH_TXBOUT0- 14
GMCH_TXBOUT1- 14
GMCH_TXBOUT2- 14
GMCH_TXBOUT0+ 14
GMCH_TXBOUT1+ 14
GMCH_TXBOUT2+ 14
3D3V_S0
GMCH_DDCDATA 13
TP79 TP79
GMCH_BL_EN 19
LDDC_CLK 14
LDDC_DATA 14
TV_DACB 13
TV_DACC 13
RN20
RN20
2 3
1
SRN2K2J-1-GP
SRN2K2J-1-GP
UMA
UMA
GMCH_BLUE 13
GMCH_GREEN 13
GMCH_RED 13
GMCH_DDCCLK 13
GMCH_VSYNC 13
GMCH_HSYNC 13
R350
R350
1KR2F-3-GP
1KR2F-3-GP
LBKLT_CR
1
GMCH_BL_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_LCDVDD_ON
LIBG
L_LVBG
1
TP80 TP80
GMCH_TXAOUT0GMCH_TXAOUT1GMCH_TXAOUT2GMCH_TXAOUT3-
1
TP82 TP82
GMCH_TXAOUT0+
GMCH_TXAOUT1+
GMCH_TXAOUT2+
GMCH_TXAOUT3+
1
TP81 TP81
GMCH_TXBOUT0GMCH_TXBOUT1GMCH_TXBOUT2-
GMCH_TXBOUT0+
GMCH_TXBOUT1+
GMCH_TXBOUT2+
TV_DACA
TV_DACB
TV_DACC
TV_DCONSEL0
TV_DCONSEL1
4
GMCH_BLUE
GMCH_GREEN
GMCH_RED
GMCH_DDCCLK
GMCH_DDCDATA
R151
R151
1K3R2F-1-GP
1K3R2F-1-GP
1 2
FOR Calero: 255 ohm
Crestline: 1.3k ohm
CRT_IREF routing Trace
width use 20 mil
1 2
1 2
C583
C583
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CRT_IREF
1 2
C587
C587
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
U46C
U46C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#0
E51
LVDSA_DATA#1
F49
LVDSA_DATA#2
C48
LVDSA_DATA#3
G50
LVDSA_DATA0
E50
LVDSA_DATA1
F48
LVDSA_DATA2
D47
LVDSA_DATA3
G44
LVDSB_DATA#0
B47
LVDSB_DATA#1
B45
LVDSB_DATA#2
E44
LVDSB_DATA0
A47
LVDSB_DATA1
A45
LVDSB_DATA2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
E33
CRT_VSYNC
C32
CRT_TVO_IREF
F33
CRT_HSYNC
CRESTLINE-GP-U
CRESTLINE-GP-U
R341
R341
3K01R2F-3-GP
3K01R2F-3-GP
1KR2F-3-GP
1KR2F-3-GP
1 2
R338
R338
3 OF 10
3 OF 10
SM_RCOMP_VOL SM_RCOMP_VOH
1 2
2
PEG_COMPI
PEG_COMPO
LVDS
LVDS
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
TV VGA
TV VGA
PEG_TX#10
PCI_EXPRESS GRAPHICS
PCI_EXPRESS GRAPHICS
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
GMCH_BLUE
GMCH_GREEN
GMCH_RED
TV_DACA
TV_DACB
TV_DACC
150 ohm for UMA
0 ohm for VGA
1 2
1 2
C570
C570
C575
C575
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
N43
M43
J51
PEG_RX#0
L51
PEG_RX#1
N47
PEG_RX#2
T45
PEG_RX#3
T50
PEG_RX#4
U40
PEG_RX#5
Y44
PEG_RX#6
Y40
PEG_RX#7
AB51
PEG_RX#8
W49
PEG_RX#9
AD44
AD40
AG46
AH49
AG45
AG41
J50
PEG_RX0
L50
PEG_RX1
M47
PEG_RX2
U44
PEG_RX3
T49
PEG_RX4
T41
PEG_RX5
W45
PEG_RX6
W41
PEG_RX7
AB50
PEG_RX8
Y48
PEG_RX9
AC45
PEG_RX10
AC41
PEG_RX11
AH47
PEG_RX12
AG49
PEG_RX13
AH45
PEG_RX14
AG42
PEG_RX15
N45
PEG_TX#0
U39
PEG_TX#1
U47
PEG_TX#2
N51
PEG_TX#3
R50
PEG_TX#4
T42
PEG_TX#5
Y43
PEG_TX#6
W46
PEG_TX#7
W38
PEG_TX#8
AD39
PEG_TX#9
AC46
AC49
AC42
AH39
AE49
AH44
M45
PEG_TX0
T38
PEG_TX1
T46
PEG_TX2
N50
PEG_TX3
R51
PEG_TX4
U43
PEG_TX5
W42
PEG_TX6
Y47
PEG_TX7
Y39
PEG_TX8
AC38
PEG_TX9
AD47
PEG_TX10
AC50
PEG_TX11
AD43
PEG_TX12
AG39
PEG_TX13
AE50
PEG_TX14
AH43
PEG_TX15
1 2
R148 150R2F-1-GP R148 150R2F-1-GP
1 2
R140 150R2F-1-GP R140 150R2F-1-GP
1 2
R146 150R2F-1-GP R146 150R2F-1-GP
1 2
R137 150R2F-1-GP R137 150R2F-1-GP
1 2
R144 150R2F-1-GP R144 150R2F-1-GP
1 2
R145 150R2F-1-GP R145 150R2F-1-GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
1
R161
PEG_CMP
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
GTXN0
GTXN1
GTXN2
GTXN3
GTXN4
GTXN5
GTXN6
GTXN7
GTXN8
GTXN9
GTXN10
GTXN11
GTXN12
GTXN13
GTXN14
GTXN15
GTXP0
GTXP1
GTXP2
GTXP3
GTXP4
GTXP5
GTXP6
GTXP7
GTXP8
GTXP9
GTXP10
GTXP11
GTXP12
GTXP13
GTXP14
GTXP15
GMCH (2 of 5) DMI/LVDS/PEG
GMCH (2 of 5) DMI/LVDS/PEG
GMCH (2 of 5) DMI/LVDS/PEG
R161
1 2
24D9R2F-L-GP
24D9R2F-L-GP
C632 SCD1U10V2KX-5GP C632 SCD1U10V2KX-5GP
C346 SCD1U10V2KX-5GP C346 SCD1U10V2KX-5GP
C634 SCD1U10V2KX-5GP C634 SCD1U10V2KX-5GP
C636 SCD1U10V2KX-5GP C636 SCD1U10V2KX-5GP
C625 SCD1U10V2KX-5GP C625 SCD1U10V2KX-5GP
C347 SCD1U10V2KX-5GP C347 SCD1U10V2KX-5GP
C352 SCD1U10V2KX-5GP C352 SCD1U10V2KX-5GP
C637 SCD1U10V2KX-5GP C637 SCD1U10V2KX-5GP
C349 SCD1U10V2KX-5GP C349 SCD1U10V2KX-5GP
C358 SCD1U10V2KX-5GP C358 SCD1U10V2KX-5GP
C639 SCD1U10V2KX-5GP C639 SCD1U10V2KX-5GP
C628 SCD1U10V2KX-5GP C628 SCD1U10V2KX-5GP
C353 SCD1U10V2KX-5GP C353 SCD1U10V2KX-5GP
C360 SCD1U10V2KX-5GP C360 SCD1U10V2KX-5GP
C642 SCD1U10V2KX-5GP C642 SCD1U10V2KX-5GP
C355 SCD1U10V2KX-5GP C355 SCD1U10V2KX-5GP
C631 SCD1U10V2KX-5GP C631 SCD1U10V2KX-5GP
C345 SCD1U10V2KX-5GP C345 SCD1U10V2KX-5GP
C633 SCD1U10V2KX-5GP C633 SCD1U10V2KX-5GP
C635 SCD1U10V2KX-5GP C635 SCD1U10V2KX-5GP
C626 SCD1U10V2KX-5GP C626 SCD1U10V2KX-5GP
C348 SCD1U10V2KX-5GP C348 SCD1U10V2KX-5GP
C351 SCD1U10V2KX-5GP C351 SCD1U10V2KX-5GP
C638 SCD1U10V2KX-5GP C638 SCD1U10V2KX-5GP
C350 SCD1U10V2KX-5GP C350 SCD1U10V2KX-5GP
C357 SCD1U10V2KX-5GP C357 SCD1U10V2KX-5GP
C640 SCD1U10V2KX-5GP C640 SCD1U10V2KX-5GP
C627 SCD1U10V2KX-5GP C627 SCD1U10V2KX-5GP
C354 SCD1U10V2KX-5GP C354 SCD1U10V2KX-5GP
C359 SCD1U10V2KX-5GP C359 SCD1U10V2KX-5GP
C641 SCD1U10V2KX-5GP C641 SCD1U10V2KX-5GP
C356 SCD1U10V2KX-5GP C356 SCD1U10V2KX-5GP
1D05V_S0
LCTLA_CLK
LCTLB_DATA
PM_EXTTS#0
PM_EXTTS#1
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
LIBG
GMCH_VSYNC
GMCH_HSYNC
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
C45/C46
C45/C46
C45/C46
1
1
2
3
4 5
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
R164
R164
1 2
2K4R2F-GP
2K4R2F-GP
RN22
RN22
2 3
1
SRN2K2J-1-GP
SRN2K2J-1-GP
VGA
VGA
74 5 Thursday, April 26, 2007
74 5 Thursday, April 26, 2007
74 5 Thursday, April 26, 2007
PEG_RXN[0..15] 38
PEG_RXP[0..15] 38
PEG_TXN[0..15] 38
PEG_TXP[0..15] 38
RN26
RN26
of
3D3V_S0
8
7
6
4
SA
SA
SA
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
A13
A15
A17
A24
AL1
9 OF 10
9 OF 10
U46I
U46I
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CRESTLINE-GP-U
CRESTLINE-GP-U
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
M_A_DQ[63..0] 11
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ[63..0]
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
4 OF 10
4 OF 10
U46D
U46D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
CRESTLINE-GP-U
CRESTLINE-GP-U
M_A_DM[7..0]
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
SA_BS0
SA_BS1
SA_BS2
SA_CAS#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
DDR SYSTEM MEMORRY A
DDR SYSTEM MEMORRY A
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_RAS#
SA_RCVEN#
SA_WE#
M_A_DM[7..0] 11
M_A_DQS[7..0] 11
M_A_DQS#[7..0] 11
M_A_A[14..0] 11,12
M_A_BS#0
BB19
M_A_BS#1
BK19
M_A_BS#2
BF29
BL17
M_A_DM0
AT45
M_A_DM1
BD44
M_A_DM2
BD42
M_A_DM3
AW38
M_A_DM4
AW13
M_A_DM5
BG8
M_A_DM6
AY5
M_A_DM7
AN6
M_A_DQS0
AT46
M_A_DQS1
BE48
M_A_DQS2
BB43
M_A_DQS3
BC37
M_A_DQS4
BB16
M_A_DQS5
BH6
M_A_DQS6
BB2
M_A_DQS7
AP3
M_A_DQS#0
AT47
M_A_DQS#1
BD47
M_A_DQS#2
BC41
M_A_DQS#3
BA37
M_A_DQS#4
BA16
M_A_DQS#5
BH7
M_A_DQS#6
BC1
M_A_DQS#7
AP2
M_A_A0
BJ19
M_A_A1
BD20
M_A_A2
BK27
M_A_A3
BH28
M_A_A4
BL24
M_A_A5
BK28
M_A_A6
BJ27
M_A_A7
BJ25
M_A_A8
BL28
M_A_A9
BA28
M_A_A10
BC19
M_A_A11
BE28
M_A_A12
BG30
M_A_A13
BJ16
M_A_A14 M_B_A14
BJ29
M_A_RAS#
BE18
SA_RCVEN#
AY20
M_A_WE#
BA19
Place Test PAD Near to Chip
as could as possible
http://hobi-elektronika.net
M_B_DM[7..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQ[63..0]
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
5 OF 10
5 OF 10
U46E
U46E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
CRESTLINE-GP-U
CRESTLINE-GP-U
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_RCVEN#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
M_B_DQ[63..0] 11
M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_CAS# 11,12 M_B_CAS# 11,12
M_A_RAS# 11,12
1
TP71 TP71
M_A_WE# 11,12
SB_BS0
SB_BS1
SB_BS2
SB_CAS#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_RAS#
SB_WE#
M_B_DQS[7..0]
M_B_DQS#[7..0]
M_B_A[14..0]
AY17
BG18
BG36
BE17
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE24
AV16
AY18
BC17
Place Test PAD Near to Chip
ascould as possible
M_B_DM[7..0] 11
M_B_DQS[7..0] 11
M_B_DQS#[7..0] 11
M_B_A[14..0] 11,12
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CAS# M_A_CAS#
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_RAS#
SB_RCVEN#
M_B_WE#
GMCH (3 of 5) MEMORY
GMCH (3 of 5) MEMORY
GMCH (3 of 5) MEMORY
M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_RAS# 11,12
1
TP55 TP55
M_B_WE# 11,12
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
C45/C46
C45/C46
C45/C46
SA
SA
of
84 5 Wednesday, April 25, 2007
84 5 Wednesday, April 25, 2007
84 5 Wednesday, April 25, 2007
SA
VCC_NCTF + VCC=1573mA
U46F
1D05V_S0
1D05V_S0
1 2
1 2
C245
C245
C296
C296
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1573mA
3138mA
1D8V_S3
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
R30
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
R20
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
T14
U46F
CRESTLINE-GP-U
CRESTLINE-GP-U
6 OF 10
6 OF 10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC CORE
VCC CORE
VCC
POWER
POWER
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC SM
VCC SM
VCC GFX NCTF
VCC GFX NCTF
VCC GFX
VCC GFX
VCC SM LF
VCC SM LF
VCC_AXG_NCTF + VCC_AXG=7700mA
1D05V_S0
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
SM_LF1_GMCH
AW45
SM_LF2_GMCH
BC39
SM_LF3_GMCH
BE39
SM_LF4_GMCH
BD17
SM_LF5_GMCH
BD4
SM_LF6_GMCH
AW8
SM_LF7_GMCH
AT6
1 2
1 2
C180
C180
C155
C155
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C198
C198
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C164
C164
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C225
C225
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C534
C534
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_S0
1 2
C166
C166
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
FOR VCC CORE AND VCC NCTF
308 mils from the Edge
Coupling CAP
DUMMY = DY
DUMMY = DY
1D05V_S0
1D05V_S0
1 2
TC12 ST220U2VDM-5-GP
TC12 ST220U2VDM-5-GP
1 2
C272 SC10U6D3V5KX-1GP C272 SC10U6D3V5KX-1GP
1 2
C271 SC10U6D3V5KX-1GP C271 SC10U6D3V5KX-1GP
1 2
C197 SCD1U10V2KX-5GP C197 SCD1U10V2KX-5GP
1 2
C190 SCD1U10V2KX-5GP C190 SCD1U10V2KX-5GP
1 2
C201 SCD1U10V2KX-5GP C201 SCD1U10V2KX-5GP
1 2
C248 SCD1U10V2KX-5GP C248 SCD1U10V2KX-5GP
1 2
C219 SCD1U10V2KX-5GP C219 SCD1U10V2KX-5GP
1 2
C251 SCD1U10V2KX-5GP C251 SCD1U10V2KX-5GP
1 2
C213 SCD1U10V2KX-5GP C213 SCD1U10V2KX-5GP
1 2
C241 SCD1U10V2KX-5GP C241 SCD1U10V2KX-5GP
1 2
C275 SCD1U10V2KX-5GP C275 SCD1U10V2KX-5GP
1 2
C277 SCD1U10V2KX-5GP C277 SCD1U10V2KX-5GP
VCC_AXM_NCTF + VCC_AXM=540mA
1 2
1 2
1 2
C191
C191
C160
C160
SCD 22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD 22U10V2KX-1GP
SCD22U10V2KX-1GP
VCC_AXM_S3
G52G52
1 2
C300
C300
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
Place on the Edge
1 2
C257 SC10U6D3V5KX-1GP C257 SC10U6D3V5KX-1GP
1 2
C269 SCD1U10V2KX-5GP C269 SCD1U10V2KX-5GP
1 2
C266 SCD1U10V2KX-5GP C266 SCD1U10V2KX-5GP
1 2
C237 SCD1U10V2KX-5GP C237 SCD1U10V2KX-5GP
1 2
C246 SCD1U10V2KX-5GP C246 SCD1U10V2KX-5GP
1 2
C231 SCD1U10V2KX-5GP C231 SCD1U10V2KX-5GP
1 2
1 2
C299
C299
C649
C649
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
http://hobi-elektronika.net
1D05V_S0
7 OF 10
7 OF 10
U46G
U46G
AB33
VCC_NCTF
AB36
VCC_NCTF
AB37
VCC_NCTF
AC33
VCC_NCTF
AC35
VCC_NCTF
AC36
VCC_NCTF
AD35
VCC_NCTF
AD36
VCC_NCTF
AF33
VCC_NCTF
AF36
VCC_NCTF
AH33
VCC_NCTF
AH35
VCC_NCTF
AH36
VCC_NCTF
AH37
VCC_NCTF
AJ33
VCC_NCTF
AJ35
VCC_NCTF
AK33
VCC_NCTF
AK35
VCC_NCTF
AK36
VCC_NCTF
AK37
VCC_NCTF
AD33
VCC_NCTF
AJ36
VCC_NCTF
AM35
VCC_NCTF
AL33
VCC_NCTF
AL35
VCC_NCTF
AA33
VCC_NCTF
AA35
VCC_NCTF
AA36
VCC_NCTF
AP35
VCC_NCTF
AP36
VCC_NCTF
AR35
VCC_NCTF
AR36
VCC_NCTF
Y32
VCC_NCTF
Y33
VCC_NCTF
Y35
VCC_NCTF
Y36
VCC_NCTF
Y37
VCC_NCTF
T30
VCC_NCTF
T34
VCC_NCTF
T35
VCC_NCTF
U29
VCC_NCTF
U31
VCC_NCTF
U32
VCC_NCTF
U33
VCC_NCTF
U35
VCC_NCTF
U36
VCC_NCTF
V32
VCC_NCTF
V33
VCC_NCTF
V36
VCC_NCTF
V37
VCC_NCTF
AL24
VCC_AXM_NCTF
AL26
VCC_AXM_NCTF
AL28
VCC_AXM_NCTF
AM26
VCC_AXM_NCTF
AM28
VCC_AXM_NCTF
AM29
VCC_AXM_NCTF
AM31
VCC_AXM_NCTF
AM32
VCC_AXM_NCTF
AM33
VCC_AXM_NCTF
AP29
VCC_AXM_NCTF
AP31
VCC_AXM_NCTF
AP32
VCC_AXM_NCTF
AP33
VCC_AXM_NCTF
AL29
VCC_AXM_NCTF
AL31
VCC_AXM_NCTF
AL32
VCC_AXM_NCTF
AR31
VCC_AXM_NCTF
AR32
VCC_AXM_NCTF
AR33
VCC_AXM_NCTF
CRESTLINE-GP-U
CRESTLINE-GP-U
FOR VCC SM
Place CAP where LVDS and DDR2 taps
Place on the Edge
1D8V_S3
1 2
TC11 ST220U2VDM-5-GP
TC11 ST220U2VDM-5-GP
1 2
C258 SC10U6D3V5KX-1GP C258 SC10U6D3V5KX-1GP
1 2
C279 SC10U6D3V5KX-1GP C279 SC10U6D3V5KX-1GP
1 2
C268 SCD1U10V2KX-5GP C268 SCD1U10V2KX-5GP
1 2
C267 SCD1U10V2KX-5GP C267 SCD1U10V2KX-5GP
1 2
C284 SCD1U10V2KX-5GP C284 SCD1U10V2KX-5GP
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS NCTF
VSS NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VCC NCTF
VCC NCTF
POWER
POWER
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS SCB VSS AXM
VSS SCB VSS AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VSS AXM NCTF
VSS AXM NCTF
DUMMY = DY
DUMMY = DY
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
VCC_AXM_S3
10 OF 10
10 OF 10
U46J
U46J
C46
VSS
C50
VSS
C7
VSS
D13
VSS
D24
VSS
D3
VSS
D32
VSS
D39
VSS
D45
VSS
D49
VSS
E10
VSS
E16
VSS
E24
VSS
E28
VSS
E32
VSS
E47
VSS
F19
VSS
F36
VSS
F4
VSS
F40
VSS
F50
VSS
G1
VSS
G13
VSS
G16
VSS
G19
VSS
G24
VSS
G28
VSS
G29
VSS
G33
VSS
G42
VSS
G45
VSS
G48
VSS
G8
VSS
H24
VSS
H28
VSS
H4
VSS
H45
VSS
J11
VSS
VSS
VSS
J16
VSS
J2
VSS
J24
VSS
J28
VSS
J33
VSS
J35
VSS
J39
VSS
K12
VSS
K47
VSS
K8
VSS
L1
VSS
L17
VSS
L20
VSS
L24
VSS
L28
VSS
L3
VSS
L33
VSS
L49
VSS
M28
VSS
M42
VSS
M46
VSS
M49
VSS
M5
VSS
M50
VSS
M9
VSS
N11
VSS
N14
VSS
N17
VSS
N29
VSS
N32
VSS
N36
VSS
N39
VSS
N44
VSS
N49
VSS
N7
VSS
P19
VSS
P2
VSS
P23
VSS
P3
VSS
P50
VSS
R49
VSS
T39
VSS
T43
VSS
T47
VSS
U41
VSS
U45
VSS
U50
VSS
V2
VSS
V3
VSS
CRESTLINE-GP-U
CRESTLINE-GP-U
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
GMCH (4 of 5) POWER1
GMCH (4 of 5) POWER1
GMCH (4 of 5) POWER1
C45/C46
C45/C46
C45/C46
W11
VSS
W39
VSS
W43
VSS
W47
VSS
W5
VSS
W7
VSS
Y13
VSS
Y2
VSS
Y41
VSS
Y45
VSS
Y49
VSS
Y5
VSS
Y50
VSS
Y11
VSS
P29
VSS
T29
VSS
T31
VSS
T33
VSS
R28
VSS
AA32
VSS
AB32
VSS
AD32
VSS
AF28
VSS
AF29
VSS
AT27
VSS
AV25
VSS
H50
VSS
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
94 5 Monday, April 23, 2007
94 5 Monday, April 23, 2007
94 5 Monday, April 23, 2007
SA
SA
SA
1D25V_S0
1D25V_S0
1D25V_S0
120ohm 100MHz
1D25V_S0
120ohm 100MHz
1D25V_S0
220ohm 100MHz
1D25V_RUN_PEGPLL_R
G86G86
1 2
G87G87
1 2
L19
L19
1 2
BLM18AG121SN-1GP
BLM18AG121SN-1GP
L20
L20
1 2
BLM18AG121SN-1GP
BLM18AG121SN-1GP
D51R3F-2-GP
D51R3F-2-GP
M_VCCA_MPLL_R
L24
L24
1 2
BLM18BB221SN1D-GP
BLM18BB221SN1D-GP
R384
R384
1R3F-GP
1R3F-GP
M_VCCA_DPLLA
1 2
C617
C617
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_VCCA_DPLLB
1 2
C644
C644
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_VCCA_HPLL
1 2
C536
C536
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
150mA
M_VCCA_MPLL
1 2
R277
R277
1 2
C524
C524
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
100mA
1D25V_RUN_PEGPLL
1 2
1 2
1 2
C613
C613
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
80mA
80mA
50mA
C620
C620
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C614
C614
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C629
C629
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C542
C542
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C539
C539
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
L23
L23
1 2
BLM18PG181SN-3GP
BLM18PG181SN-3GP
180ohm 100MHz
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D5V_S0
1D5V_S0
180ohm 100MHz
1D25V_S0
1 2
3D3V_S0
0R0402-PAD
0R0402-PAD
1 2
3D3V_S0
0R0603-PAD
0R0603-PAD
1 2
3D3V_S0
0R0402-PAD
0R0402-PAD
1 2
1D8V_S3
0R0603-PAD
0R0603-PAD
1 2
3D3V_S0
0R0402-PAD
0R0402-PAD
1 2
C580
C580
G85G85
1 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
L22
L22
1 2
BLM18PG181SN-3GP
BLM18PG181SN-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
R153
R153
UMA
UMA
R354
R354
UMA
UMA
R349
R349
UMA
UMA
R166
R166
UMA
UMA
R389
R389
10mA
1 2
C273
C273
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
80mA
1 2
C595
C595
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5mA
1 2
C588
C588
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
110mA
1 2
C324
C324
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
400uA
1 2
C630
C630
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
120mA
C574
1 2
0R0603-PAD
0R0603-PAD
C586
C586
C574
R353
R353
1 2
1 2
250mA
1 2
C540
C540
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
C573
C573
G70G70
1 2
60mA
1 2
C256
C256
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
60mA
1 2
C590
C590
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5mA
1 2
C568
C568
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D25V_S0
ST100U4VBM-L-GP
ST100U4VBM-L-GP
1D25V_S0
C645
C645
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C523
C523
TC10
TC10
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C254
C254
3D3V_SYNC_S0
3D3V_CRTDAC_S0
M_VCCA_DAC_BG
M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_HPLL
M_VCCA_MPLL
1D8V_TXLVDS_S3
3D3V_RUN_PEG_BG
1D25V_RUN_PEGPLL
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C192
C192
C194
C194
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C253
C253
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3VTVDAC
VCCD_CRT
1D5VRUN_TVDAC
1D5VRUN_QDAC
1D25V_SUS_MCH_PLL2
1D25V_RUN_PEGPLL
1D8V_SUS_DLVDS 1D8V_SUS_DLVDS
H49
AL2
AM2
B41
K50
K49
U51
AW18
AV19
AU19
AU18
AU17
AT22
AT21
AT19
AT18
AT17
AR17
AR16
BC29
BB29
C25
B25
C27
B27
B28
A28
M32
N28
AN2
U48
H42
J32
A33
B33
A30
B32
B49
A41
L29
J41
8 OF 10
8 OF 10
U46H
U46H
VCC_SYNC
VCCA_CRT_DAC
VCCA_CRT_DAC
VCCA_DAC_BG
VSSA_DAC_BG
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_LVDS
VSSA_LVDS
VCCA_PEG_BG
VSSA_PEG_BG
VCCA_PEG_PLL
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_CK
VCCA_SM_CK
VCCA_TVA_DAC
VCCA_TVA_DAC
VCCA_TVB_DAC
VCCA_TVB_DAC
VCCA_TVC_DAC
VCCA_TVC_DAC
VCCD_CRT
VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL
VCCD_LVDS
VCCD_LVDS
CRESTLINE-GP-U
CRESTLINE-GP-U
POWER
POWER
A LVDS PLL CRT
A LVDS PLL CRT
AXD
AXD
VCC_AXD_NCTF
A PEG
A PEG
SM CK
SM CK
TV A CK A SM
TV A CK A SM
DMI
DMI
LVDS TV/CRT
LVDS TV/CRT
1D05V_S0
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXF
VCC_AXF
VCC_AXF
AXF
AXF
VCC_DMI
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_TX_LVDS
VCC_HV
HV
HV
VCC_HV
VCC_PEG
VCC_PEG
VCC_PEG
PEG
PEG
VCC_PEG
VCC_PEG
VCC_RXR_DMI
VCC_RXR_DMI
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
D24
D24
SS0530-GP
SS0530-GP
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
1D05V_HV_S0
K A
850mA
1 2
C181
C181
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D25V_SUS_AXD
1 2
C242
C242
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C569
C569
S C1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_SUS_SM_CK
1 2
C566
C566
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D8V_TXLVDS_S3
3D3V_HV_S0
1200mA
1 2
250mA
VTTLF1
VTTLF2
VTTLF3
1 2
C541
C541
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
Place on the edge
1 2
1 2
C553
C553
C538
C538
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
G48G48
1 2
1 2
C252
C252
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C655
C655
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
1 2
C543
C543
C550
C550
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
R395
R395
10R3J-3-GP
10R3J-3-GP
1 2
1 2
C537
C537
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1D25V_S0
1 2
C567
C567
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
1 2
0R0603-PAD
0R0603-PAD
C562
C562
R329
R329
1R3F-GP
1R3F-GP
1D8V_SUS_SM_CK1
1 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_S0
1 2
C671
C671
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_S0
1 2
C666
C666
C654
C654
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
G53G53
1 2
1 2
1 2
C163
C163
C548
C548
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D25V_S0
1 2
C563
C563
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R325
R325
C557
C557
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S3
100mA
3D3V_HV_S0
1 2
C298
C298
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_S0
C535
C535
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S3
R380
R380
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C609
C609
150mA
C611
C611
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
http://hobi-elektronika.net
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
GMCH (5 of 5) POWER2
GMCH (5 of 5) POWER2
GMCH (5 of 5) POWER2
C45/C46
C45/C46
C45/C46
10 45 Tuesday, April 24, 2007
10 45 Tuesday, April 24, 2007
10 45 Tuesday, April 24, 2007
of
of
of
SA
SA
SA
DDR_VREF_S3_TP
DDR_VREF_S3
R527
R527
0R3-0-U-GP
0R3-0-U-GP
1 2
1 2
C373 SC2D2U6D3V3MX-1-GP C373 SC2D2U6D3V3MX-1-GP
DDR_VREF_S3_TP
DDRVREF1 DDRVREF1
DDRVDD1 DDRVDD1
DDRGND1 DDRGND1
1 2
C375 SCD1U16V2ZY-2GP C375 SCD1U16V2ZY-2GP
DDR2-200P-22-GP-U2
DDR2-200P-22-GP-U2
1
DDR_VREF_S3
1
1D8V_S3
1
62.10017.A61
62.10017.A61
SB
ADD TEST PAD for Customer request
TPAD79K1TPAD79
K1
1
K2
TPAD79K2TPAD79
DDR_VREF_S3_TP DDR_VREF_S3_TP
SMBCLK_ICH
SMBDAT_ICH
1
1 2
C374 SC2D2U6D3V3MX-1-GP C374 SC2D2U6D3V3MX-1-GP
1 2
C376 SCD1U16V2ZY-2GP C376 SCD1U16V2ZY-2GP
1
K3
TPAD79K3TPAD79
DDR2-200P-23-GP-U1
DDR2-200P-23-GP-U1
62.10017.A71
62.10017.A71
K4
TPAD79K4TPAD79
1
M_A_RAS# 8,12
M_A_CAS# 8,12
DM1
DM1
M_B_BS#2 8,12
M_B_BS#0 8,12
M_B_DQ11
NC#5050NC#6969NC#83
200
M_A_BS#2 8,12
M_A_BS#0 8,12
M_A_BS#1 8,12
M_A_DQ6
M_B_DQ8
M_B_DQ10
M_B_DQ7
M_B_DQ9
25
DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32
VDDSPD
SA0
SA1
199
198
M_A_DQ2
M_A_DQ3
M_A_DQ5
M_A_DQ4
DM6
DM7
CK030CK0#32CK1
170
185
M_A_DM7
M_A_DM6
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
147
M_B_BS#1 8,12
M_B_DQ6
M_A_DQ1
DM5
M_A_DM5
197
130
M_B_DQ5
M_A_DQ0
M_A_DM4
M_B_A10
M_B_A7
M_B_A8
M_B_A11
M_B_A12
M_B_A9
M_B_DQ0
M_B_DQ3
M_B_DQ1
M_B_DQ4
M_B_DQ2
106
DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ9
DM5
DM6
DM7
SDA
SCL
130
147
170
185
195
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_CLK_DDR#3 7
M_CLK_DDR3 7
M_CLK_DDR#2 7
M_CLK_DDR2 7
M_A_A14
107
106
85
84
BA0
BA1
DQ05DQ17DQ217DQ319DQ44DQ56DQ614DQ716DQ823DQ9
A16_BA2
DQS7#
DM010DM126DM252DM367DM4
167
186
M_A_DM2
M_A_DM3
M_A_DM0
M_A_DM1
M_A_DQS#6
M_A_DQS#7
M_B_A13
M_B_A14
107
116
84
A1486A15
A16/BA2
CK1#
DM010DM126DM252DM367DM4
166
M_B_DM0
M_A_A9
M_A_A10
M_A_A11
105
A1190A1289A13
A10/AP
M_A_DQS#2
M_A_DQS#3
M_A_DQS#1
164
M_A_A7
M_A_A8
DQS7
DQS0#11DQS1#29DQS2#49DQS3#68DQS4#
169
188
M_A_DQS7
M_A_DQS#0
105
A1190A1289A13
A10/AP
M_A_A3
M_A_A4
M_A_A5
M_A_A6
DQS5
DQS6
131
148
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_A2
M_A_DQS2
85
BA0
BA1
M_B_DM1
M_B_DM2
M_A_A12
M_A_A13
116
A1486A15
DQS5#
DQS6#
129
146
M_A_DQS#5
M_A_DQS#4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
M_B_A1
M_B_A5
M_B_A2
M_B_A6
M_B_A3
M_B_A0
M_B_A4
102A1101A2100A399A498A597A694A792A893A991
A0
RAS#
WE#
CAS#
CS0#
CS1#
CKE079CKE180CK030CK0#32CK1
108
109
113
110
115
M_A_A0
M_A_A1
MH1
102A1101A2100A399A498A597A694A792A893A991
A0
MH1
DQS013DQS131DQS251DQS370DQS4
MH2
MH2
M_A_DQS1
M_A_DQS0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR2-SOCKET
DDR2-SOCKET
DDR2-SOCKET
C45/C46
C45/C46
C45/C46
M_B_DQ[63..0] 8
M_B_A[14..0] 8,12
M_B_DM[7..0] 8
M_B_DQS#[7..0] 8
M_B_DQS[7..0] 8
M_B_RAS# 8,12
M_B_WE# 8,12
M_B_CAS# 8,12
M_CS2# 7,12
M_CS3# 7,12
M_CKE2 7,12
M_CKE3 7,12
M_A_DQ[63..0] 8
M_A_A[14..0] 8,12
M_A_DM[7..0] 8
M_A_DQS#[7..0] 8
M_A_DQS[7..0] 8
of
11 45 Wednesday, April 25, 2007
11 45 Wednesday, April 25, 2007
11 45 Wednesday, April 25, 2007
SA
SA
SA
M_ODT2 7,12
M_ODT3 7,12
M_B_DQS5
M_B_DQS4
M_B_DQS6
M_B_DQS3
131
148
DQS5
DQS6
VSS
VSS
VSS
VSS
168
171
172
115
CS1#
CKE079CKE180RAS#
VSS
VSS
VSS
VSS
161
162
165
M_B_DQS0
M_B_DQS1
M_B_DQS2
DQS013DQS131DQS251DQS370DQS4
VSS
VSS
VSS
161
162
165
163
110
CS0#
NC#163/TEST
VSS
VSS
VSS
150
155
156
186
VSS
155
156
83
120
NC#120
VSS
145
149
M_B_DQS7
MH1
2
1
202
VSS
MH1
GND
DM2
DM2
VSS
GND
MH2
193
196
201
MH2
M_CS0# 7,12
M_CS1# 7,12
M_CKE0 7,12
M_CKE1 7,12
M_A_WE# 8,12
M_ODT0 7,12
M_ODT1 7,12
114
119
1
201
GND
VREF
ODT0
ODT1
VSS
VSS
VSS
VSS
GND
184
187
190
193
196
202
VREF
VSS
VSS
169
188
114
119
OTD0
OTD1
DQS7
VSS
VSS
VSS
VSS
VSS
177
178
183
184
187
190
195
197
108
113
109
SCL
SDA
WE#
CAS#
VSS
VSS
VSS
VSS
VSS
168
171
172
177
178
183
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
146
167
DQS5#
DQS6#
DQS7#
VSS
VSS
VSS
149
150
NC#5050NC#6969NC#83
VSS
VSS
VSS
139
144
M_B_DQS#4
M_B_DQS#2
M_B_DQS#3
129
VSS
VSS
139
144
145
M_A_DQ63
M_A_DQ62
192
194
DQ63
VSS
VSS
132
133
138
SB
M_B_DQS#1
VSS
VSS
138
M_A_DQ61
182
DQ61
DQ62
VSS
VSS
128
M_B_DQS#0
M_B_DQ63
194
DQS0#11DQS1#29DQS2#49DQS3#68DQS4#
VSS
VSS
128
132
133
M_A_DQ60
M_A_DQ58
M_A_DQ59
189
191
180
DQ59
DQ60
VSS
VSS
121
122
127
192
DQ63
VSS
127
181
DQ58
M_B_DQ62
DQ62
VSS
M_A_DQ57
DQ57
M_B_DQ61
182
DQ61
VSS
122
M_A_DQ56
179
DQ56
M_B_DQ60
180
121
M_A_DQ55
176
191
DQ60
174
DQ55
M_B_DQ59
DQ59
M_A_DQ54
DQ54
M_B_DQ58
189
DQ58
M_A_DQ53
160
DQ53
M_B_DQ57
181
M_A_DQ52
158
158
DQ53
M_B_DQ52
DQ52
M_B_DQ51
175
M_B_DQ50
173
DQ51
159
DQ50
M_B_DQ49
DQ49
M_B_DQ48
157
DQ48
M_B_DQ47
154
DQ47
179
DQ57
M_B_DQ56
DQ56
M_B_DQ55
176
M_B_DQ54
174
DQ55
M_B_DQ53
160
DQ54
Place near DM1
M_CLK_DDR3
1 2
C152
C152
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
M_CLK_DDR#3
M_CLK_DDR2
1 2
C369
C369
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
M_CLK_DDR#2
M_A_DQ49
M_A_DQ51
175
DQ52
M_A_DQ50
173
DQ51
159
DQ50
157
DQ49
M_A_DQ48
DQ48
M_A_DQ47
154
152
DQ47
M_A_DQ46
DQ46
M_A_DQ45
142
DQ45
M_A_DQ44
140
M_A_DQ43
153
DQ44
151
DQ43
M_A_DQ42
DQ42
Place near DM2
M_CLK_DDR0
1 2
C370
C370
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
M_CLK_DDR#0
M_CLK_DDR1
1 2
C153
C153
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
M_CLK_DDR#1
M_B_DQ46
152
DQ46
M_A_DQ41
143
DQ41
M_B_DQ45
142
DQ45
M_A_DQ40
141
DQ40
M_B_DQ44
140
DQ44
M_A_DQ39
136
DQ39
M_B_DQ43
153
M_A_DQ38
134
151
DQ43
126
DQ38
M_B_DQ42
143
DQ42
M_A_DQ37
124
DQ37
M_B_DQ41
DQ41
M_A_DQ36
DQ36
M_B_DQ40
141
DQ40
M_A_DQ35
137
DQ35
M_B_DQ35
M_B_DQ38
M_B_DQ32
M_B_DQ34
M_B_DQ39
136
M_A_DQ34
135
K5
TPAD79K5TPAD79
M_B_DQ33
M_B_DQ37
M_B_DQ36
123
125
135
137
124
126
134
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
VSS3VSS8VSS9VSS12VSS15VSS18VSS21VSS24VSS27VSS28VSS33VSS34VSS39VSS40VSS41VSS42VSS47VSS48VSS53VSS54VSS59VSS60VSS65VSS66VSS71VSS72VSS77VSS78VSS
1D8V_S3
3D3V_S0
3D3V_S0
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
M_A_DQ28
M_A_DQ31
M_A_DQ30
M_A_DQ27
M_A_DQ29
M_A_DQ32
M_A_DQ33
123
125
DQ33
DQ34
VDD
VSS2VSS3VSS8VSS9VSS12VSS15VSS18VSS21VSS24VSS27VSS28VSS33VSS34VSS39VSS40VSS41VSS42VSS47VSS48VSS53VSS54VSS59VSS60VSS65VSS66VSS71VSS72VSS77VSS78VSS
118
1
1D8V_S3
M_B_DQ19
VDD81VDD82VDD87VDD88VDD95VDD96VDD
M_A_DQ14
M_B_DQ18
M_A_DQ13
VDD_SPD
199
1 2
M_B_DQ16
M_B_DQ15
M_B_DQ17
NC#120
NC#163/TEST
120
163
DIM_SA1
M_A_DQ11
M_A_DQ10
M_A_DQ12
DQ1035DQ1137DQ1220DQ1322DQ1436DQ1538DQ1643DQ1745DQ1855DQ1957DQ2044DQ2146DQ2256DQ2358DQ2461DQ2563DQ2673DQ2775DQ2862DQ2964DQ3074DQ3176DQ32
SA0
SA1
198
200
83
25
M_B_DQ14
M_A_DQ9
166
M_B_DQ13
M_A_DQ8
CK1#
M_B_DQ12
M_A_DQ7
164
M_B_DQ30
M_B_DQ28
M_B_DQ31
M_B_DQ29
VDD
VDD
112
117
118
C131
C131
M_A_DQ23
M_A_DQ25
M_A_DQ24
M_A_DQ26
VDD
VDD
VDD
104
111
112
117
3D3V_S0
M_B_DQ27
M_B_DQ26
VDD
VDD
VDD
103
104
111
R97
R97
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
C519
C519
M_A_DQ21
M_A_DQ22
VDD
103
C130
C130
M_B_DQ24
M_B_DQ25
M_A_DQ19
M_A_DQ20
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
M_B_DQ23
1 2
SMBCLK_ICH 3,15
SMBDAT_ICH 3,15
M_A_DQ18
1 2
M_B_DQ22
M_B_DQ21
M_B_DQ20
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_A_DQ15
M_A_DQ16
M_A_DQ17
VDD81VDD82VDD87VDD88VDD95VDD96VDD
C128
C128
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
http://hobi-elektronika.net
PARALLEL TERMINATION
Decoupling Capacitor
DDR_VREF_S0
Put decap near power(0.9V) and pull-up resistor
RN25
RN25
8
7
6
SRN56J-5-GP
SRN56J-5-GP
R133 56R2J-4-GP R133 56R2J-4-GP
1 2
R132 56R2J-4-GP R132 56R2J-4-GP
1 2
R152 56R2J-4-GP R152 56R2J-4-GP
1 2
R143 56R2J-4-GP R143 56R2J-4-GP
1 2
R159 56R2J-4-GP R159 56R2J-4-GP
1 2
R162 56R2J-4-GP R162 56R2J-4-GP
1 2
RN19
RN19
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN10
RN10
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN17
RN17
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN23
RN23
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN12
RN12
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN11
RN11
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN16
RN16
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN13
RN13
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN24
RN24
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN21
RN21
8
7
6
SRN56J-5-GP
SRN56J-5-GP
RN18
RN18
8
7
6
SRN56J-5-GP
SRN56J-5-GP
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_B_A1
M_B_A3
M_B_A13
M_B_A0
M_B_A2
M_B_A4
M_B_A6
M_B_A7
M_B_A11
M_A_A13
M_A_A0
M_A_A2
M_A_A4
M_A_A12
M_A_A9
M_A_A6
M_A_A7
M_A_A11
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_CKE2 7,11
M_B_BS#2 8,11
M_CS1# 7,11
M_A_A8
M_B_A10
M_A_A14
M_B_A14
M_ODT3 7,11
M_ODT2 7,11
M_CS2# 7,11
M_B_RAS# 8,11
M_B_BS#1 8,11
M_CKE3 7,11
M_B_BS#0 8,11
M_B_WE# 8,11
M_B_CAS# 8,11
M_CS3# 7,11
M_ODT0 7,11
M_CS0# 7,11
M_A_RAS# 8,11
M_A_BS#1 8,11
M_A_BS#0 8,11
M_A_WE# 8,11
M_A_CAS# 8,11
M_ODT1 7,11
M_CKE0 7,11
M_A_BS#2 8,11
M_CKE1 7,11
M_A_A[14..0] 8,11
M_B_A[14..0] 8,11
Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0 DDR_VREF_S0
1 2
C207 SCD1U16V2ZY-2GP C207 SCD1U16V2ZY-2GP
1 2
C286 SCD1U16V2ZY-2GP C286 SCD1U16V2ZY-2GP
1 2
C270 SCD1U16V2ZY-2GP C270 SCD1U16V2ZY-2GP
1 2
C295 SCD1U16V2ZY-2GP C295 SCD1U16V2ZY-2GP
1 2
C205 SCD1U16V2ZY-2GP C205 SCD1U16V2ZY-2GP
1 2
C203 SCD1U16V2ZY-2GP C203 SCD1U16V2ZY-2GP
1 2
C265 SCD1U16V2ZY-2GP C265 SCD1U16V2ZY-2GP
1 2
C263 SCD1U16V2ZY-2GP C263 SCD1U16V2ZY-2GP
Place these Caps near DM1
1D8V_S3
1 2
C282 SCD1U16V2ZY-2GP C282 SCD1U16V2ZY-2GP
1 2
C262 SCD1U16V2ZY-2GP C262 SCD1U16V2ZY-2GP
1 2
C215 SCD1U16V2ZY-2GP C215 SCD1U16V2ZY-2GP
1 2
C247 SCD1U16V2ZY-2GP C247 SCD1U16V2ZY-2GP
1 2
C593 SC2D2U6D3V3MX-1-GP C593 SC2D2U6D3V3MX-1-GP
1 2
C249 SC2D2U6D3V3MX-1-GP C249 SC2D2U6D3V3MX-1-GP
1 2
C571 SC2D2U6D3V3MX-1-GP C571 SC2D2U6D3V3MX-1-GP
1 2
C581 SC2D2U6D3V3MX-1-GP C581 SC2D2U6D3V3MX-1-GP
1 2
C601 SC2D2U6D3V3MX-1-GP C601 SC2D2U6D3V3MX-1-GP
http://hobi-elektronika.net
1 2
C216 SCD1U16V2ZY-2GP C216 SCD1U16V2ZY-2GP
1 2
C244 SCD1U16V2ZY-2GP C244 SCD1U16V2ZY-2GP
1 2
C260 SCD1U16V2ZY-2GP C260 SCD1U16V2ZY-2GP
1 2
C204 SCD1U16V2ZY-2GP C204 SCD1U16V2ZY-2GP
1 2
C210 SCD1U16V2ZY-2GP C210 SCD1U16V2ZY-2GP
1 2
C293 SCD1U16V2ZY-2GP C293 SCD1U16V2ZY-2GP
1 2
C261 SCD1U16V2ZY-2GP C261 SCD1U16V2ZY-2GP
1 2
C259 SCD1U16V2ZY-2GP C259 SCD1U16V2ZY-2GP
1 2
C217 SCD1U16V2ZY-2GP C217 SCD1U16V2ZY-2GP
Place these Caps near DM2
1D8V_S3
C200 SCD1U16V2ZY-2GP C200 SCD1U16V2ZY-2GP
C294 SCD1U16V2ZY-2GP C294 SCD1U16V2ZY-2GP
C572 SCD1U16V2ZY-2GP C572 SCD1U16V2ZY-2GP
C599 SCD1U16V2ZY-2GP C599 SCD1U16V2ZY-2GP
C592 SC2D2U6D3V3MX-1-GP C592 SC2D2U6D3V3MX-1-GP
C591 SC2D2U6D3V3MX-1-GP C591 SC2D2U6D3V3MX-1-GP
C589 SC2D2U6D3V3MX-1-GP C589 SC2D2U6D3V3MX-1-GP
C584 SC2D2U6D3V3MX-1-GP C584 SC2D2U6D3V3MX-1-GP
C579 SC2D2U6D3V3MX-1-GP C579 SC2D2U6D3V3MX-1-GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DDR_VREF_S0
1 2
C227 SCD1U16V2ZY-2GP C227 SCD1U16V2ZY-2GP
1 2
C255 SCD1U16V2ZY-2GP C255 SCD1U16V2ZY-2GP
1 2
C283 SCD1U16V2ZY-2GP C283 SCD1U16V2ZY-2GP
1 2
C297 SCD1U16V2ZY-2GP C297 SCD1U16V2ZY-2GP
1 2
C292 SCD1U16V2ZY-2GP C292 SCD1U16V2ZY-2GP
1 2
C274 SCD1U16V2ZY-2GP C274 SCD1U16V2ZY-2GP
1 2
C285 SCD1U16V2ZY-2GP C285 SCD1U16V2ZY-2GP
1 2
C229 SCD1U16V2ZY-2GP C229 SCD1U16V2ZY-2GP
1 2
C214 SCD1U16V2ZY-2GP C214 SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR2-RESISTOR&CAPACITOR
DDR2-RESISTOR&CAPACITOR
DDR2-RESISTOR&CAPACITOR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
C45/C46
C45/C46
C45/C46
of
12 45 Wednesday, April 25, 2007
12 45 Wednesday, April 25, 2007
12 45 Wednesday, April 25, 2007
SA
SA
SA
Layout Note:
Place these resistors close to the CRT-out connector
UMA
UMA
R357 0R2J-2-GP
R357 0R2J-2-GP
GMCH_RED 7
ATI_CRT_RED 39
GMCH_GREEN 7
ATI_CRT_GREEN 39
GMCH_BLUE 7
ATI_CRT_BLUE 39
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
1 2
VGA
VGA
R360 0R2J-2-GP
R360 0R2J-2-GP
1 2
UMA
UMA
R348 0R2J-2-GP
R348 0R2J-2-GP
1 2
VGA
VGA
R347 0R2J-2-GP
R347 0R2J-2-GP
1 2
UMA
UMA
R345 0R2J-2-GP
R345 0R2J-2-GP
1 2
VGA
VGA
R344 0R2J-2-GP
R344 0R2J-2-GP
1 2
GMCH_DDCDATA 7
ATI_DDCDATA 39
GMCH_DDCCLK 7
CRT_G1
CRT_B1
1 2
R202
R202
150R2F-1-GP
150R2F-1-GP
ATI_DDCCLK 39
1 2
1 2
R201
R201
R200
R200
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
R287 0R2J-2-GP
R287 0R2J-2-GP
R286 0R2J-2-GP
R286 0R2J-2-GP
R284 0R2J-2-GP
R284 0R2J-2-GP
R283 0R2J-2-GP
R283 0R2J-2-GP
5V_S0
UMA
UMA
1 2
1 2
VGA
VGA
UMA
UMA
1 2
1 2
VGA
VGA
1 2
EC36
EC36
SC10P50V2JN-4GP
SC10P50V2JN-4GP
D16
D16
RB751V-40-2-GP
RB751V-40-2-GP
CRT CONNECTOR
SB
Change L10, L11, L12 the same as X40
L10
L10
1 2
MLB-201209-24-GP
MLB-201209-24-GP
L11
L11
1 2
MLB-201209-24-GP
MLB-201209-24-GP
L12
L12
1 2
MLB-201209-24-GP
MLB-201209-24-GP
1 2
1 2
EC34
EC34
EC35
EC35
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
3D3V_S0
R210
R210
10KR2F-2-GP
10KR2F-2-GP
CRT_DAT
CRT_CLK
K A
5V_CRT_S0
G
S D
RN47
RN47
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
S D
1 2
1 2
5V @ ext. CRT side
G
Q11
Q11
2N7002-11-GP
2N7002-11-GP
Q12
Q12
2N7002-11-GP
2N7002-11-GP
3D3V_S0
8
7
6
CRT_R CRT_R1
CRT_G
CRT_B
EC27
EC27
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
EC28
EC28
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DAT_DDC1_5
CLK_DDC1_5
1 2
EC29
EC29
SC10P50V2JN-4GP
SC10P50V2JN-4GP
CRT_R 37
CRT_G 37
CRT_B 37
CRT1
CRT1
17
11
DAT_DDC1_5
JVGA_HS 37
JVGA_VS 37
JVGA_HS
JVGA_VS
CLK_DDC1_5
1 2
EC31
EC31
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
1 2
1 2
EC30
EC30
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY
DY
EC32
EC32
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
1 2
EC33
EC33
5V_S0
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
12
13
14
15
16
Hsync & Vsync level shift
UMA
UMA
R209 33R2J-2-GP
R209 33R2J-2-GP
GMCH_HSYNC 7
ATI_HSYNC 39
GMCH_VSYNC 7
ATI_VSYNC 39
1 2
R208 33R2J-2-GP
R208 33R2J-2-GP
1 2
VGA
VGA
UMA
UMA
R206 33R2J-2-GP
R206 33R2J-2-GP
1 2
R207 33R2J-2-GP
R207 33R2J-2-GP
1 2
VGA
VGA
VSYNC_4
14
9 8
7
-1
1 2
EC37
EC37
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
1 2
EC38
EC38
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
5 6
10
U29C
U29C
TSAHCT125PW-GP
TSAHCT125PW-GP
VIDEO-15-42-GP-U
VIDEO-15-42-GP-U
20.20378.015
20.20378.015
1 2
14
4
U29B
U29B
TSAHCT125PW-GP
TSAHCT125PW-GP
7
6
CRT_R
1
7
CRT_G
2
8
CRT_B
3
9
4
10
5
SCD01U50V2ZY-1GP
SCD01U50V2ZY-1GP
C452
C452
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
HSYNC_5
VSYNC_5
R205
R205
1 2
33R2J-2-GP
33R2J-2-GP
R203
R203
1 2
33R2J-2-GP
33R2J-2-GP
5V_CRT_S0
C446
C446
JVGA_HS HSYNC_4
JVGA_VS
1 2
S-VIDEO CONNECTOR
5V_S0
D14
TVOUT1
TVOUT1
UMA
UMA
R302
R302
VGA
VGA
UMA
UMA
VGA
VGA
R301
R301
R316
R316
R320
R320
1 2
0R2J-2-GP
0R2J-2-GP
1 2
0R2J-2-GP
0R2J-2-GP
1 2
0R2J-2-GP
0R2J-2-GP
1 2
0R2J-2-GP
0R2J-2-GP
TV_DACB 7
ATI_TV_LUMA 39
TV_DACC 7
ATI_TV_CRMA 39
LUMA_R LUMA_1
1 2
R199
R199
150R2F-1-GP
150R2F-1-GP
1 2
R204
R204
150R2F-1-GP
150R2F-1-GP
1 2
BLM18BB470SN1-GP
BLM18BB470SN1-GP
1 2
C451
C451
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
BLM18BB470SN1-GP
BLM18BB470SN1-GP
1 2
C450
C450
SC10P50V2JN-4GP
SC10P50V2JN-4GP
L13
L13
1 2
C447
C447
SC10P50V2JN-4GP
SC10P50V2JN-4GP
L14
L14
CRMA_1 CUMA_R
1 2
C448
C448
SC10P50V2JN-4GP
SC10P50V2JN-4GP
5
GND
1
GND
3
LUMA
4
CRMA
2
GND
6
GND
MINDIN4-29-GP
MINDIN4-29-GP
22.10021.E91
22.10021.E91
LUMA_1
CRMA_1
D14
3
DY
DY
BAV99-5-GP
BAV99-5-GP
83.00099.T11
83.00099.T11
D15
D15
3
DY
DY
BAV99-5-GP
BAV99-5-GP
83.00099.T11
83.00099.T11
1
2
1
2
http://hobi-elektronika.net
-1
1 2
DY
DY
C449
C449
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
CRT/S-Video
CRT/S-Video
CRT/S-Video
C45/C46
C45/C46
C45/C46
of
of
of
13 45 Friday, April 27, 2007
13 45 Friday, April 27, 2007
13 45 Friday, April 27, 2007
-1
-1
-1
5
LCD CONNECTOR
4
3
2
1
RN9
RN9
ATI_TXAOUT0- 40
DCBATOUT
D D
5V_CAM_S0
C99
C99
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C C
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
EC_BLON 19
10KR2F-2-GP
10KR2F-2-GP
1 2
C91
C91
1 2
R80
R80
3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC24
EC24
BRIGHTNESS 19
1 2
C97
C97
SCD1U25V3KX-GP
SCD1U25V3KX-GP
USB_PN9 16
USB_PP9 16
1 2
ID_CLK
ID_DAT
LCD1
LCD1
42
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
ACES-CONN40C-GP-U
ACES-CONN40C-GP-U
20.F0813.040
20.F0813.040
TXACLKTXACLK+
TXAOUT0TXAOUT0+
TXAOUT1TXAOUT1+
TXAOUT2TXAOUT2+
TXBCLKTXBCLK+
TXBOUT0TXBOUT0+
TXBOUT1TXBOUT1+
TXBOUT2TXBOUT2+
ATI_TXAOUT0+ 40
ATI_TXAOUT1- 40
ATI_TXAOUT1+ 40
ATI_TXAOUT2- 40
ATI_TXAOUT2+ 40
ATI_TXACLK- 40
ATI_TXACLK+ 40
ATI_TXBOUT0- 40
ATI_TXBOUT0+ 40
ATI_TXBOUT1- 40
ATI_TXBOUT1+ 40
ATI_TXBOUT2- 40
ATI_TXBOUT2+ 40
ATI_TXBCLK- 40
ATI_TXBCLK+ 40
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN54
RN54
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN56
RN56
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN52
RN52
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN29
RN29
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN60
RN60
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN58
RN58
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
RN27
RN27
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
TXAOUT0-
4
TXAOUT0+
TXAOUT1-
4
TXAOUT1+
TXAOUT2-
4
TXAOUT2+
TXACLK-
4
TXACLK+
TXBOUT0-
4
TXBOUT0+
TXBOUT1-
4
TXBOUT1+
TXBOUT2-
4
TXBOUT2+
TXBCLK-
4
TXBCLK+
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
RN8
RN8
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN55
RN55
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN57
RN57
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN53
RN53
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN30
RN30
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN61
RN61
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN59
RN59
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
RN28
RN28
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
GMCH_TXAOUT0- 7
GMCH_TXAOUT0+ 7
GMCH_TXAOUT1- 7
GMCH_TXAOUT1+ 7
GMCH_TXAOUT2- 7
GMCH_TXAOUT2+ 7
GMCH_TXACLK- 7
GMCH_TXACLK+ 7
GMCH_TXBOUT0- 7
GMCH_TXBOUT0+ 7
GMCH_TXBOUT1- 7
GMCH_TXBOUT1+ 7
GMCH_TXBOUT2- 7
GMCH_TXBOUT2+ 7
GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7
TOP VIEW
RN6
RN6
LCDVDD_S0
C509
C509
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
1 2
C508
C508
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 3
20
21
-1
RN14
RN14
ATI_EDID_CLK 39
ATI_EDID_DATA 39
SRN0J-6-GP
SRN0J-6-GP
VGA
VGA
1
2 3
ID_CLK
4
ID_DAT
1
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
4
RN15
RN15
4
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
3D3V_S0
LDDC_CLK 7
LDDC_DATA 7
1
B B
40
CAMERA POWER
U13
LCDVDD_S0
1 2
C119
C119
SC1U10V2KX-1GP
U16
U16
3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A A
1 2
C118
C118
5
5
IN#5
6
IN#6
7
IN#7
IN#88OUT
9
GND
G5281RC1U-GP
G5281RC1U-GP
74.05281.093
74.05281.093
GND
IN#1
4
3
EN
2
1
SC1U10V2KX-1GP
LCDVDD_ON
1 2
R88
R88
100KR2J-1-GP
100KR2J-1-GP
4
VGA
VGA
1 2
R85 1KR2J-1-GP
R85 1KR2J-1-GP
1 2
R90 1KR2J-1-GP
R90 1KR2J-1-GP
UMA
UMA
ATI_LCDVDD_ON 40
GMCH_LCDVDD_ON 7
http://hobi-elektronika.net
3
5V_S0
C96
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C96
1 2
U13
5
IN#5
6
IN#6
7
IN#7
IN#88OUT
9
GND
G5281RC1U-GP
G5281RC1U-GP
74.05281.093
74.05281.093
GND
IN#1
4
3
EN
2
1
1 2
R71
R71
100KR2J-1-GP
100KR2J-1-GP
2
CAMERA_EN 19
1 2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
5V_CAM_S0
C100
C100
SC1U10V2KX-1GP
SC1U10V2KX-1GP
LCD/DVI CONN
LCD/DVI CONN
LCD/DVI CONN
C45/C46
C45/C46
C45/C46
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
14 45 Thursday, April 26, 2007
14 45 Thursday, April 26, 2007
14 45 Thursday, April 26, 2007
1
SA
SA
SA