5
4
3
2
1
Revision : 01255/259IAx Schematics :
CONTENTPAGE
D D
C C
B B
A A
1. Cover Page
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
System Block Diagram
CPU - 1
CPU - 2
855PM -1
855PM -2
855PM - 3
DDR - 1
DDR - 2
Clock Generator
ICH4-M
ICH4-M
ICH4-M
M11P - 1
M11P - 2
M11P - 3
M11P - 4
M11P - 5
M11P - 6
M11P - 7
LCD, INV Connector
IDE Interface
USB & MDC
Audio - 1
Audio - 2
IEEE 1394
PCMCIA - 1
PCMCIA - 2
LAN - 1
LAN - 2
31.
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
MINI PCI - 1
MINI PCI - 2
IT8510E - 1
IT8510E - 2
VCC_MOSFET
5V, 3.3V & 12V
VCORE
DDR & 1.8 Power
1.2V , V1.05
Input & Bridge Battery
M11 Power
Power Rail
+VDC
+VCC_CORE
+VCCP
+v1.2S_MCH
+V1.25
+V1.5S
+V1.5ALWAYS
+V1.5
+V1.8S
+V2.5
+V3.3ALWAYS
+V3.3
+V3.3S
+V5ALWAYS
+V5
+V5S
+V12S
ALWAYS+V
+V
+V S
Primary DC system power supply
Core voltage for Processor
1.05 rail for Processor I/O
1.2V for 855PM Core (off in S3-S5)
DDR Termination voltage (off in S4-S5)
1.5V switched power rail (off in S3-S5)
1.5V always on power rail
1.5V power rail (off in S4-S5)
1.8V switched power rail (off in S3-S5)
2.5V power rail for DDR
3.3V always on power rail
3.3V power rail (off in S4-S5)
3.3V switched power rail (off in S3-S5)
5V always on power rail
5V power rail (off in S4-S5)
5V switched power rail (off in S3-S5)
12V switched power rail (off in S3-S5)
Always on power rail
Switched power rail ( off in S4 - S5 )
Switched power rail ( off in S3 - S5 )
PCI Resure Allocation
Device IDSEL
IEEE 1394 AD25 1 1
LAN
PCMCIA
MINI PCI
MINI PCI-2
AD26
AD27
AD28
AD29 0 0 A
REQ/GNT#
2 2
3 3
4 4
INT
A
B
C
B
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
5
4
3
2
Date: Sheet
COVER
1
141Wednesday, January 05, 2005
01
of
5
4
3
2
1
Pentium M Processor
478 uFCPGA
Page 3 , 4
D D
PSB
Intel 855PM
1.5V AGP 66MHz
ATI M11P
Page 14
C C
Hub Interface 66MHz
MCH
593 uFCBGA
Page 5 , 6 , 7
DDR SO-DIMM
Page 8,9
RJ11 Con.
Amplifier Audio Codec
B B
MDC
VIA : VT1612A
HDD
CD-ROM
AC97
IDE
( Primary )
IDE
( Secondary )
ICH4M
Page 11,12,13
IEEE 1394
LAN
RTL8100CL
USB_Port
X 4
PCI 33 MHz
PCMCIA
OZ 711MC1TI:TSB43AB22
MINI PCI
MINI PCI
LPC I/F
A A
BIOS
PCB1
EC
ITE : IT8510E
5
4
Touch Pad
LED
3
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
BLOCK DIAGRAM 01
2779
2
Date: Sheet
241Wednesday, January 05, 2005
1
of
A
B
C
D
E
TDI pullup must be placed within 300ps of CPU TDI pin(within 2")
COMP0
COMP1
COMP2
COMP3
R435 27.4R/F
1 2
R434 54.9R/F
1 2
R9 27.4R/F
1 2
R8 54.9R/F
1 2
Layout note:
(1).COMP0 & COMP2 need to be
Zo=27.4ohm traces.Best estimate is
18mil wide trace for outer layers
and 14mil if no internal layer.
(2).See RDDP of Banias .traces
should be shorter than 0.5".Refer to
latest CS layout COMP1,COMP3 should
be routed as Zo=55ohm traces shorter
than 0.5"
Place testpoint on H_IERR# with a GND 0.1" away.
+VCCP
IERR#
H_PROCHOT_S#
H_PWRGD
H_TDI
H_TMS
H_TDO
H_CPURST#
H_DPSLP#
CLK_CPU_BCLK#
CLK_CPU_BCLK
R10 56R
R427 56R
R4 332R/F
R413 150R
R412 39.2R/F
R410 54.9R/F
R411 54.9R/F
R11 @150R
R416 @49.9R/F
R420 @49.9R/F
1 2
1 2
12
12
12
12
12
12
12
12
05/28
+V3.3
12
R428
SCLK
SDATA
THERM
@10K
C399
68P
2 1
SMB_CLK_BAT_A
SMB_DATA_BAT_A
PM_THRM#
THRM_ALERT#
C393
68P
2 1
SMB_CLK_BAT_A 33,40
SMB_DATA_BAT_A 33,40
PM_THRM# 12,31
8
7
4
U32
1
VDD
2
D+
3
D-
5 6
GND ALERT
ADM1032
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
Date: Sheet
CPU Pentium M
E
+VCCP
341Wednesday, January 05, 2005
01
of
12
1 2
12
R438
0R
D
+V3.3_AUX
12
+V3.3S+V3.3
12
2 1
Z0301
C405
0.1U
AA24
AA23
AA26
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
M26
H24
G24
M23
N24
M25
H26
N25
K25
Y26
T25
U23
V23
R24
R26
R23
U26
V24
U25
V26
Y23
Y25
U2A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
A14#
Y3
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
U3
ADSTB#0
ADSTB#1
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
L23
D18#
D19#
D20#
F25
D21#
D22#
J23
D23#
D24#
J25
D25#
L26
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
Centrino CPU
Pentium M 1/3
ADDR GROUP
DATA GROUP
B
Legacy
ITP
SIGNALS
THERMTRIP#
THERMH CLK
MISC CONTROL
MOLEX_500210-4782
Pentium-M
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM#0
BPM#1
BPM#2
BPM#3
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
ITP_CLK1
ITP_CLK0
BCLK1
BCLK0
COMP0
COMP1
COMP2
COMP3
DPSLP#
DPWR#
PWRGOOD
SLP#
TEST1
TEST2
GTLREF3
GTLREF2
GTLREF1
GTLREF0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
NC0
NC1
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
C2
D3
A3
C6
D1
D4
B4
N2
L1
J3
L4
H2
M2
N4
IERR#
A4
B5
J2
H_CPURST#
B11
H1
K1
L2
M3
K3
K4
H_BPM0_ITP#
C8
H_BPM1_ITP#
B8
H_BPM2_ITP#
A9
H_BPM3_ITP#
C9
H_BPM4_PRDY#
A10
H_BPM5_PREQ#
B10
H_TCK
A13
H_TDI
C12
TDI
A12
C11
B13
A7
B17
B18
A18
C17
A15
A16
B14
B15
P25
P26
AB2
AB1
B7
C19
E4
A6
C5
F23
AC1
G1
E26
AD26
C14
C3
AF7
C16
E1
A1
B2
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
H_TDO
H_TMS
H_TRST#
ITP_DBRESET#
H_PROCHOT_S#
H_THERMDA
H_THERMDC
PM_THRMTRIP#
CLK_ITP_CLK#
CLK_ITP_CLK
CLK_CPU_BCLK#
CLK_CPU_BCLK
COMP0
COMP1
COMP2
COMP3
H_DPSLP#
H_PWRGD
H_TEST1
H_TEST2
TP_GTLREF3
TP_GTLREF2
TP_GTLREF1
GTL_REF0
TP_NC_1
TP_NC_2
TP_NC_3
TP_NC_4
PSI#
TZ0301
H_A20M# 11
H_FERR# 11
H_IGNNE# 11
H_STPCLK# 11
H_INTR 11
H_NMI 11
H_SMI# 11
H_ADS# 5
H_BNR# 5
H_BPRI# 5
H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BR0# 5
H_INIT# 11
H_LOCK# 5
H_CPURST# 5
H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5
H_HIT# 5
H_HITM# 5
H_PROCHOT_S#
PM_THRMTRIP# 12
CLK_CPU_BCLK# 10
CLK_CPU_BCLK 10
H_DPSLP# 6,11
H_DPWR# 6
H_PWRGD 11
H_CPUSLP# 11
TP_NC_4
PSI# 37
H_DSTBN#0 5
H_DSTBP#0 5
H_DSTBN#1 5
H_DSTBP#1 5
H_DSTBN#2 5
H_DSTBP#2 5
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
C
ITP_DBRESET#
H_TCK
H_TRST#
CLK_ITP_CLK#
CLK_ITP_CLK
H_TEST1
H_TEST2
TP_NC_4
The R of H_TEST1 & H_TEST2 are
to be stuffed for A0 silicon and
no_stuffed for A1 and follow-on
silicon.
R400 150R
R418 27.4R/F
1 2
R414 680R
1 2
R421 49.9K/F
1 2
R423 49.9K/F
1 2
R5 @1K
1 2
R433 @1K
1 2
R425 @1K
1 2
(Layout) GTLREF : 0.5" max length
2004//06/02
C395
2 1
2200P
R437 1K/F
R436 2K/F
R439
@0R
GTL_REF0
H_THERMDA
H_THERMDC
Route H_THERMDA/C on sa me la ye r .
10 mil trace
10 mil spaceing
H_A#[3..31]5
4 4
H_ADSTB#05
H_ADSTB#15
H_REQ#[0..4]5
3 3
2 2
1 1
H_D#[0..63]5
A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
A
B
C
D
E
2 1
2779
C11
0.01U
2 1
C406
10U/10V
+VCC_CORE+VCC_CORE
+VCC_CORE
+VCCP
2 1
+VCC_CORE
C8
C401
10U/10V
0.01U
2 1
CPU Pentium M
0.1UC378
21
0.1UC353
21
0.1UC36
21
0.1UC16
21
0.1UC370
21
0.1UC13
21
0.1UC388
21
0.1UC362
21
0.1UC363
21
0.1UC48
21
0.1UC354
21
0.1UC20
21
0.1UC32
21
0.1UC29
21
0.1UC351
21
0.1UC19
21
0.1UC31
21
0.1UC21
21
C396
C400
10U/10V
0.01U
2 1
2 1
441Wednesday, January 05, 2005
E
01
of
+VCC_CORE +VCC_CORE +VCC_CORE
C381 10U/10V
21
C366 10U/10V
21
C389 10U/10V
21
C376 10U/10V
21
C35 10U/10V
21
C355 10U/10V
21
C369 10U/10V
21
C397 10U/10V
21
C374 10U/10V
21
0.1UC45
21
0.1UC25
21
0.1UC17
21
0.1UC44
21
0.1UC42
21
C
U2C
A2
VSS0
A5
A8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
C10
C13
C15
C18
C21
C24
D11
A11
A14
A17
A20
A23
A26
AA1
AA4
AA6
AA8
AB3
AB5
AB7
AB9
B12
B16
B19
B22
B25
B3
B6
B9
C1
C4
C7
D2
D5
D7
D9
4 4
3 3
2 2
1 1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
MOLEX_500210-4782
Pentium-M
Pentium M 3/3
VSS
A
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA11
AA13
AA15
AA17
AA19
AA21
AA5
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC9
AD10
AD12
AD14
AD16
AD18
AD8
AE11
AE13
AE15
AE17
AE19
AE9
AF10
AF12
AF14
AF16
AF18
AF8
D18
D20
D22
E17
E19
E21
F18
F20
F22
G21
D6
D8
E5
E7
E9
F6
F8
U2B
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
Pentium M 2/3
POWER
VCCSENSE
VSSSENSE
MOLEX_500210-4782
Pentium-M
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCCA0
VCCA1
VCCA2
VCCA3
VCCP0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCQ0
VCCQ1
VID0
VID1
VID2
VID3
VID4
VID5
+VCC_CORE+VCC_CORE
G5
H22
H6
J21
J5
K22
U5
V22
V6
W21
W5
Y22
Y6
F26
B1
N1
AC26
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L21
L5
M22
M6
N21
N5
P22
P6
R21
R5
T22
T6
U21
P23
W4
E2
F2
F3
G3
G4
H4
AE7
AF6
B
+V1.8S_PROC
+VCCP
H_VID0 23,34
H_VID1 23,34
H_VID2 23,34
H_VID3 23,34
H_VID4 23,34
H_VID5 23,34
VCCSENSE 37
VSSSENSE 37
+VCCP +VCCP +VCCP
C30 10U/10V
21
C373 10U/10V
21
C360 10U/10V
21
C384 10U/10V
21
C358 10U/10V
21
C382 10U/10V
21
C368 10U/10V
21
C383 10U/10V
21
0.1UC43
21
0.1UC22
21
0.1UC37
21
0.1UC15
21
0.1UC46
21
+V1.5S
+V1.8S
C26 10U/10V
21
C39 10U/10V
21
C385 10U/10V
21
C352 10U/10V
21
C50 10U/10V
21
C23 10U/10V
21
C364 10U/10V
21
C356 10U/10V
21
21
21
Intel Request
R442 0R/B
1 2
R441 @0R/B
1 2
0.1UC14
21
0.1UC348
21
0.1UC18
21
0.1UC392
21
0.1UC349
21
+VCC_CORE
0.1UC350
21
0.1UC380
21
0.1UC38
21
0.1UC24
21
0.1UC386
21
0.1UC47
21
0.1UC391
21
0.1UC371
21
0.1UC359
21
220U/2VC33
220U/2VC27
+V1.8S_PROC
One 0.01U & 10U cap for each VCCA pi n.
C9
C10
0.01U
10U/10V
2 1
2 1
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
D
Date: Sheet
5
4
3
2
1
GMCH Compensation & Reference Voltages
Layout Note:
Route HXSWING0 & HXSWING1 use 10 mil trace & 20
mil space(20/10/20)
HSWING1
HSWING0
LAYOUT: Max length of MCH_GTLREF is 0.5"
MCH_GTLREF
C432
C426
1U
220P
2 1
2 1
+V1.8S_MCH
C81
0.01U
+V1.8S_MCH
12
12
R39
@0R
R40
@0R
R36
1 2
0R
12
12
R42
150R/F
HUB_VREF_MHUB_VREF_MCH
R41
150R/F
C440 0.01U
R462 301R/F
R460 150R/F
C423 0.01U
R453 301R/F
R452 150R/F
C439
220P
2 1
C86
@470P
2 1
12
R44
@56.2R/F
12
R43
0R
C85
0.01U
2 1
21
12
12
21
12
12
R458 49.9R/F
R459
1 2
100R/F
HUB_VREF_U
HUB_VREF_L
+VCCP
12
+VCCP
AC13
AD13
AC2
AA7
AD4
AF6
AD11
AC15
AD3
AG6
AE11
AC16
AD5
AG5
AH9
AD15
AE17
AA9
AB12
AB16
N27
M26
M25
M27
N28
M24
N25
N24
P25
P24
P23
L28
L27
P27
P26
U3A
U6
HA#3
T5
HA#4
R2
HA#5
U3
Intel 855PM 1/3
HA#6
R3
HA#7
P7
HA#8
T3
HA#9
P4
HA#10
P3
HA#11
P5
HA#12
R6
HA#13
N2
HA#14
N5
HA#15
N3
HA#16
J3
HA#17
M3
HA#18
M4
HA#19
M5
HA#20
L5
HA#21
K3
HA#22
J2
HA#23
N6
HA#24
L6
HA#25
L2
HA#26
K5
HA#27
L3
HA#28
L7
HA#29
K4
HA#30
J5
HA#31
U2
HREQ#0
T7
HREQ#1
R7
HREQ#2
U5
HREQ#3
T4
HREQ#4
R5
HADSTB#0
N7
HADSTB#1
K8
BCLK#
J8
BCLK
HRCOMP1
HSWNG1
HRCOMP0
HSWNG0
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
DBI#0
DBI#1
DBI#2
DBI#3
CPURST#
M7
HVREF0
P8
HVREF1
HVREF2
HVREF3
HVREF4
HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9
HI_10
HI_STB
HUB I/F
HI_STB#
HLRCOMP
HI_REF
HOST
855PM SL752
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BR0#
BNR#
BPRI#
DBSY#
RS#0
RS#1
RS#2
AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AE5
AF3
AC6
AC3
AF4
AE2
AG4
AG2
AE7
AE8
AH2
AC7
AG3
AD7
AH7
AE6
AC8
AG8
AG7
AH3
AF8
AH5
AC11
AC12
AE9
AC10
AE10
AD9
AG9
AC9
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16
U7
V4
W2
Y4
Y3
Y5
W3
V7
V3
Y7
V5
W7
W5
W6
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_A#[3..31]3
D D
H_REQ#[0..4]3
C C
H_ADSTB#03
H_ADSTB#13
CLK_MCH_BCLK#10
CLK_MCH_BCLK10
H_DSTBN#03
H_DSTBN#13
H_DSTBN#23
H_DSTBN#33
H_DSTBP#03
H_DSTBP#13
H_DSTBP#23
H_DSTBP#33
H_DINV#03
H_DINV#13
H_DINV#23
H_DINV#33
B B
A A
H_CPURST#3
HUB_PD[0..10]11
HUB_PSTRB11
HUB_PSTRB#11
HUB_VREF_MCH
H_REQ#[0..4]
CLK_MCH_BCLK#
CLK_MCH_BCLK
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
HRCOMP1
HSWING1
HRCOMP0
HSWING0
MCH_GTLREF
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_RCOMP
H_D#[0..63]H_A#[3..31]
H_D#[0..63] 3
CLK_MCH_BCLK#
CLK_MCH_BCLK
HRCOMP1
HRCOMP0
HUB_RCOMP
H_ADS# 3
H_TRDY# 3
H_DRDY# 3
H_DEFER# 3
H_HITM# 3
H_HIT# 3
H_LOCK# 3
H_BR0# 3
H_BNR# 3
H_BPRI# 3
H_DBSY# 3
H_RS#0 3
H_RS#1 3
H_RS#2 3
05/28
R457 @49.9R/F
1 2
R456 @49.9R/F
1 2
R461 27.4R/F
1 2
R444 27.4R/F
1 2
R38 36.5R/F
12
+V1.8S_MCH
2 1
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
5
4
3
2
Date: Sheet
855PM
1
541Wednesday, January 05, 2005
01
of
5
M_A[0..12]8,9
D D
MCH_RSVD2
M_D[0..63]8
C C
B B
M_CB[0..7]8
M_DQS[0..8]8
A A
M_WE#8,9
M_CAS#8,9
M_RAS#8,9
PCI_RST#11,14,22,26,27,29,31,32,33
MCH_RSVD1
M_A[0..12]
M_D[0..63]
M_CB[0..7]
M_DQS[0..8]
M_A0
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_D0
M_D1
M_D2
M_D3
M_D4
M_D5
M_D6
M_D7
M_D8
M_D9
M_D10
M_D11
M_D12
M_D13
M_D14
M_D15
M_D16
M_D17
M_D18
M_D19
M_D20
M_D21
M_D22
M_D23
M_D24
M_D25
M_D26
M_D27
M_D28
M_D29
M_D30
M_D31
M_D32
M_D33
M_D34
M_D35
M_D36
M_D37
M_D38
M_D39
M_D40
M_D41
M_D42
M_D43
M_D44
M_D45
M_D46
M_D47
M_D48
M_D49
M_D50
M_D51
M_D52
M_D53
M_D54
M_D55
M_D56
M_D57
M_D58
M_D59
M_D60
M_D61
M_D62
M_D63
M_CB0
M_CB1
M_CB2
M_CB3
M_CB4
M_CB5
M_CB6
M_CB7
M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS6
M_DQS7
M_DQS8
MCH_TEST#
TP_M_NC_0
TP_M_NC_1
TEST PAD !!
5
G17
G18
G20
G19
G21
G22
G28
G27
G11
AD26
AD27
4
U3B
E12
SMA0
F17
SMA1
E16
SMA2
Intel 855PM 2/3
SMA3
SMA4
E18
SMA5
F19
SMA6
SMA7
SMA8
F21
SMA9
F13
SMA10
E20
SMA11
SMA12
RSVD2
SDQ0
F27
SDQ1
C28
SDQ2
E28
SDQ3
H25
SDQ4
SDQ5
F25
SDQ6
B28
SDQ7
E27
SDQ8
C27
SDQ9
B25
SDQ10
C25
SDQ11
B27
SDQ12
D27
SDQ13
D26
SDQ14
E25
SDQ15
D24
SDQ16
E23
SDQ17
C22
SDQ18
E21
SDQ19
C24
SDQ20
B23
SDQ21
D22
SDQ22
B21
SDQ23
C21
SDQ24
D20
SDQ25
C19
SDQ26
D18
SDQ27
C20
SDQ28
E19
SDQ29
C18
SDQ30
E17
SDQ31
E13
SDQ32
C12
SDQ33
B11
SDQ34
C10
SDQ35
B13
SDQ36
C13
SDQ37
C11
SDQ38
D10
SDQ39
E10
SDQ40
C9
SDQ41
D8
SDQ42
E8
SDQ43
E11
SDQ44
B9
SDQ45
B7
SDQ46
C7
SDQ47
C6
SDQ48
D6
SDQ49
D4
SDQ50
B3
SDQ51
E6
SDQ52
B5
SDQ53
C4
SDQ54
E4
SDQ55
C3
SDQ56
D3
SDQ57
F4
SDQ58
F3
SDQ59
B2
SDQ60
C2
SDQ61
E2
SDQ62
G4
SDQ63
C16
SDQ64
D16
SDQ65
B15
SDQ66
C14
SDQ67
B17
SDQ68
C17
SDQ69
C15
SDQ70
D14
SDQ71
F26
SDQS0
C26
SDQS1
C23
SDQS2
B19
SDQS3
D12
SDQS4
C8
SDQS5
C5
SDQS6
E3
SDQS7
E15
SDQS8
SWE#
G8
SCAS#
F11
SRAS#
J27
RSTIN#
H27
RSVD1
H26
TESTIN#
NC0
NC1
4
DDR
AGP
DDR
RCVENOUT#
855PM SL752
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GCBE#0
GCBE#1
GCBE#2
GCBE#3
GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
GRCOMP
AGPREF
66IN
AD_STB0
AD_STB#0
AD_STB1
AD_ATB#1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
RBF#
WBF#
PIPE#
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SMVREF1
SMVREF0
SCKE0
SCKE1
SCKE2
SCKE3
SBS0
SBS1
SCS#0
SCS#1
SCS#2
SCS#3
SMRCOMP
RCVENIN#
DPSLP#
DPWR#
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
AA28
AB25
AB27
AA27
AB26
Y23
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
V25
V23
Y25
AA23
Y24
W28
W27
W24
W23
W25
AG24
AH25
AD25
AA21
P22
R24
R23
AC27
AC28
AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
AF27
AF26
AE22
AE23
AF22
AG25
ST0
AF24
ST1
AG26
ST2
J25
K25
G5
F5
G24
E24
G25
J24
G6
G7
K23
J23
J21
J9
G23
E22
H23
F23
G12
G13
E9
F7
F9
E7
J28
G15
G14
V8
Y8
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
GRCOMP
SM_VREF_MCH
M_RCOMP
M_RCV#
3
3
AGP_AD[31..0]
AGP_C/BE0#
AGP_C/BE1#
AGP_C/BE2#
AGP_C/BE3#
AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
AGP_VREF_MCH
CLK_MCH66
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_SBSTB
AGP_SBSTB#
AGP_RBF#
AGP_WBF#
AGP_PIPE#
AGP_ST0
AGP_ST1
AGP_ST2
AGP_AD[31..0] 14
AGP_C/BE0# 14
AGP_C/BE1# 14
AGP_C/BE2# 14
AGP_C/BE3# 14
AGP_FRAME# 14
AGP_DEVSEL# 14
AGP_IRDY# 14
AGP_TRDY# 14
AGP_STOP# 14
AGP_PAR 14
AGP_REQ# 14
AGP_GNT# 14
AGP_VREF_MCH
CLK_MCH66 10
AGP_ADSTB0 14,17
AGP_ADSTB0# 14,17
AGP_ADSTB1 14,17
AGP_ADSTB1# 14,17
AGP_SBA0 14
AGP_SBA1 14
AGP_SBA2 14
AGP_SBA3 14
AGP_SBA4 14
AGP_SBA5 14
AGP_SBA6 14
AGP_SBA7 14
AGP_SBSTB 14,17
AGP_SBSTB# 14,17
AGP_RBF# 14
AGP_WBF# 14
AGP_PIPE#
AGP_ST0 14
AGP_ST1 14
AGP_ST2 14
M_CLK_DDR0 9
M_CLK_DDR0# 9
M_CLK_DDR1 9
M_CLK_DDR1# 9
M_CLK_DDR2 9
M_CLK_DDR2# 9
M_CLK_DDR3 9
M_CLK_DDR3# 9
M_CLK_DDR4 9
M_CLK_DDR4# 9
M_CLK_DDR5 9
M_CLK_DDR5# 9
SM_VREF_MCH
M_CKE0_R 8,9
M_CKE1_R 8,9
M_CKE2_R 8,9
M_CKE3_R 8,9
M_BS0# 8,9
M_BS1# 8,9
M_CS0_R# 8,9
M_CS1_R# 8,9
M_CS2_R# 8,9
M_CS3_R# 8,9
Layout:Provide Via on M_RCV# for
H_DPSLP# 3,11
H_DPWR# 3
measurement
2
Check "AGP_ST"
AGP_ST0
AGP_ST1
AGP_ST2
AGP_ST2
R466
1 2
40.2R/F
(1).Layout:GRCOMP should be 10 mils wide
and less than 0.5" from 855PM.
(2).Layout:R? use 36 Ohm for 55 Ohm board
impedance AGP routing.
Check "AGP_PIPE#"
SEE 25261401.PDF (P.294)
SEE 25261401.PDF (P.294)
2
1
R29 1K
R28 @1K
R26 1K
R27 @1K
R30 1K
R32 @1K
AGP_ST1
X
0 Test Mode
1
1 2
1 2
1 2
AGP_ST0
1
X
X
MCH_TEST#
M_RCOMP
12
12
12
MCH STRAP
DDR
400 MHz BPSB
AGP_VREF_MCH
SM_VREF_MCH
R46 @4.7K
R45 30.1R/F
C87 0.1U
12
12
2 1
+V1.5S
2 1
C461
0.1U
+V1.5S
2 1
12
12
C422
0.1U
+V1.5S
R465
1K/F
R463
1K/F
+V1.25
+V2.5
12
R454
75R/F
12
C465
R455
0.1U
2 1
75R/F
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
SiS962_POWE R
1
641Wednesday, January 05, 2005
of
01
5
4
3
2
1
+V1.5S
U3C
A11
GND
AA1
AA29
AA4
AA8
AB11
AB13
AB15
AB17
AB19
AB22
AB6
AB9
AC1
AC18
AC20
AC21
AC23
AC26
AC4
AD10
AD12
AD14
AD16
AD19
AD22
AD6
AD8
AE1
AE18
AE20
AE29
AE4
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ11
AJ13
AJ15
AJ17
AJ27
G26
A15
GND
A19
GND
A23
GND
A27
GND
A3
GND
A7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AF5
GND
AF7
GND
AF9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AJ3
GND
AJ5
GND
AJ7
GND
AJ9
GND
D13
GND
D17
GND
D21
GND
D5
GND
D9
GND
E1
GND
E14
GND
E26
GND
E29
GND
F12
GND
F15
GND
F20
GND
F24
GND
F6
GND
F8
GND
GND
H11
GND
H13
GND
H15
GND
H17
GND
H19
GND
H21
GND
H6
GND
H9
GND
J1
GND
J22
GND
J26
GND
J29
GND
J4
GND
J7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
K27K6L1
L22
L24
L26L4L8
M23M6N1
5
D D
C C
B B
A A
R22
R29
AA22
AA26
U22
U26
W22
W29
AB21
AC29
AD21
AD23
AE26
AF23
AG29
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
AGP I/O (1.5V)
Intel 855PM 3/3
Ground Power
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
N13
N15
N17
N22
N29N4N8
P14
P16P6R1
R13
R15
R17
R26R4R8
AJ25
VCCAGP
VCCAGP
1.2V
1.8V
PLL power(1.8V)
The AGTL bus termination
voltage(1.05V)
DDR (2.5V)
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V22V6W1
GND
W26W4W8
GND
T14
T16
T22T6U1
U13
U15
U29U4U8
U17
4
GND
GND
Y22
Y6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCHL
VCCHL
VCCHL
VCCHL
VCCHL
RSVD3
RSVD4
RSVD5
RSVD6
ETS#
RSVD7
RSVD8
RSVD9
VCCGA
VCCHA
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
GND
855PM SL752
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
L25
L29
M22
N23
N26
G16
G10
G9
H7
H4
H3
G3
G2
T17
T13
AB10
AB14
AB18
AB20
AB8
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
M8
T8
A13
A17
A21
A25
A5
A9
C1
C29
D11
D15
D19
D23
D25
D7
E5
F10
F14
F16
F18
F22
G1
G29
H10
H12
H14
H16
H18
H20
H22
H24
H5
H8
J6
K22
K24
K26
K7
L23
+V1.2S_MCH
+V1.8S_MCH +V1.8S+V1.8S_MCH
MCH_RSVD3
MCH_RSVD4
MCH_RSVD5
MCH_ETS#
MCH_RSVD6
MCH_ETS# 33
MCH_RSVD7
MCH_RSVD8
MCH_RSVD9
+V1.8S_MCH
+VCCP
+V2.5
3
+V1.2S_MCH
2 1
C427
2.2U
C450
C434
2 1
0.047U
C437
0.022U/16V
2 1
2 1
0.22U
2 1
C443
0.01U
2 1
2 1
C411
0.1U
C452
0.1U
2 1
2 1
C445
0.015U
C408
0.1U
2 1
C457
0.1U
2 1
C470
0.1U
C459
C479
0.1U
2 1
C484
0.1U
0.1U
2 1
2 1
C476
0.1U
2 1
MCH_ETS#
NEW ADD!!
REF. DEMO SCH.
C453
C441
0.1U
2 1
C464
0.1U
2 1
2
C404
0.1U
0.1U
2 1
C447
0.1U
2 1
2 1
2 1
C460
0.1U
2 1
2 1
C485
C482
C480
0.1U
0.1U
2 1
2 1
C463
0.1U
2 1
2 1
R445 @10K
R447 @10K
R446 @10K
C481
0.1U
2 1
2 1
2 1
C475
0.1U
1 2
C451
10U/10V
10U/10V
C428
10U/10V
2 1
C462
10U/10V
2 1
12
12
+V1.8S_MCH
2 1
R464
0R
+V2.5
+V3.3
NEAR NB PIN
T17 & T13
+V2.5
C433
C454
C455
C456
0.1U
C448
0.1U
C413
0.1U
0.1U
2 1
2 1
+V2.5
C498
C474
@150U/6.3V
0.1U
2 1
C446
0.1U
2 1
2 1
2 1
+VCCP
C468
0.1U
2 1
2 1
C442
220U/4V
0.1U
0.1U
2 1
09/30
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
855PM
C69
@150U/6.3V
12
1
+V1.5S
2004//06/02
741Wednesday, January 05, 2005
01
of
5
4
3
2
1
M_D_R_[0..63]M_D[0..63]
M_A_FR_[0..12]
M_CB_R[0..7]M_CB[0..7]
C421
0.1U
2 1
C375
0.1U
2 1
C49
0.1U
2 1
C68
+
@330U/3V
M_CAS_FR#
M_WE_FR#
M_RAS_FR#
M_BS0_FR#M_BS0#
C469
0.1U
2 1
C483
0.1U
2 1
C40
0.1U
2 1
2 1
DDR
C429
0.1U
2 1
C419
0.1U
2 1
C65
0.1U
2 1
C67
4.7U/10V
1
+V1.25
C70
4.7U/10V
2 1
M_CAS_FR# 9
M_WE_FR# 9
M_RAS_FR# 9M_RAS#6,9
M_DQS_R[0..8] 9M_DQS[0..8]6
M_D_R_[0..63] 9
M_A_FR_[0..12] 9
M_BS0_FR# 9
M_BS1_FR# 9
841Wednesday, January 05, 2005
of
01
RN70 10R-8P4R
M_D8
8
M_D7
7 2
M_D3
6
M_D2
D D
C C
B B
A A
5
RN69 10R-8P4R
M_D13
5
M_D12
6
M_DQS1
7 2
M_D9
8
RN67 10R-8P4R
M_D10
8
M_D11
7 2
M_D14
6
M_D15
5
RN66 10R-8P4R
TZ0801 TZ0803
5
M_D16
6
M_D20
7 2
M_D17
8
RN63 10R-8P4R
M_D28
8
7 2
M_D19
6
5
RN65 10R-8P4R
M_D21
5
M_DQS2
6
M_D18
7 2
M_D22
8
RN62 10R-8P4R
8
M_D29
7 2
M_DQS3
6
M_D25
5
RN60 10R-8P4R
M_D27
5
M_D30
6
M_D31
7 2
M_CB4
8
RN49 10R-8P4R
M_D33
8
M_D32
7 2
M_D37
6
M_D36
5
RN47 10R-8P4R
M_DQS4
5
6
M_D38
7 2
M_D39
8
RN46 10R-8P4R
M_D40
8
M_D45
7 2
M_D44
6
M_D35
5
RN45 10R-8P4R
M_D41
5
M_DQS5
6
M_D42
7 2
M_D43
8
RN39 10R-8P4R
M_D56
8
M_D51
7 2
M_D55
6
M_D54
5
RN42 10R-8P4R
M_D52
5
M_D53
6
M_D50
7 2
M_DQS6
8
RN37 10R-8P4R
M_D63
8
M_D62
7 2
M_D59
6
M_D58
5
RN40 10R-8P4R
M_D60
5
M_D61
6
M_DQS7
7 2
M_D57
8
M_D_R_8
1
M_D_R_7
M_D_R_3
3
M_D_R_2
4
M_D_R_13
4
M_D_R_12
3
M_DQS_R1
M_D_R_9
1
M_D_R_10
1
M_D_R_11
M_D_R_14
3
M_D_R_15
4
4
M_D_R_16
3
M_D_R_20
M_D_R_17
1
M_D_R_28
1
M_D_R_24M_D24
M_D_R_19
3
M_D_R_23M_D23
4
M_D_R_21
4
M_DQS_R2
3
M_D_R_18
M_D_R_22
1
M_D_R_26M_D26
1
M_D_R_29
M_DQS_R3
3
M_D_R_25
4
M_D_R_27
4
M_D_R_30
3
M_D_R_31
M_CB_R4
1
M_D_R_33
1
M_D_R_32
M_D_R_37
3
M_D_R_36
4
M_DQS_R4
4
M_D_R_34M_D34
3
M_D_R_38
M_D_R_39
1
M_D_R_40
1
M_D_R_45
M_D_R_44
3
M_D_R_35
4
M_D_R_41
4
M_DQS_R5
3
M_D_R_42
M_D_R_43
1
M_D_R_56
1
M_D_R_51
M_D_R_55
3
M_D_R_54
4
M_D_R_52
4
M_D_R_53
3
M_D_R_50
M_DQS_R6
1
M_D_R_63
1
M_D_R_62
M_D_R_59
3
M_D_R_58
4
M_D_R_60
4
M_D_R_61
3
M_DQS_R7
M_D_R_57
1
5
M_D5
R468 10R
M_D4 M_D_R_4
M_A12
1 2
R469 10R
1 2
RN44 10R-8P4R
M_D49
8
M_D48
7 2
M_D47
6
M_D46
5
RN55 10R-8P4R
M_A7
8
M_A5 M_A_FR_5
7 2
M_A8 M_A_FR_8
6
5
RN53 10R-8P4R
M_A1
8
M_A3
7 2
M_A6
6
5
RN50 10R-8P4R
M_CAS#
8
7 2
M_BS1#
6
M_WE#
5
RN72 10R-8P4R
M_D6 M_D_R_6
8
M_DQS0
7 2
M_D1
6
5
RN51 10R-8P4R
M_BS0#
8
M_A10
7 2
M_A2
6
M_A0
5
RN58 10R-8P4R
M_CB5
5
M_CB0
6
M_CB1
7 2
M_CB2
8
RN57 10R-8P4R
M_DQS8
5
M_CB6
6
M_CB7
7 2
M_CB3
8
R450 10R
1 2
R451 10R
1 2
M_D_R_5
M_D_R_49
1
M_D_R_48
M_D_R_47
3
M_D_R_46
4
M_A_FR_7
1
3
M_A_FR_11M_A11
4
M_A_FR_1
1
M_A_FR_3
M_A_FR_6
3
M_A_FR_4M_A4
4
M_CAS_FR#
1
M_RAS_FR#M_RAS#
M_BS1_FR#
3
M_WE_FR#
4
1
M_DQS_R0
M_D_R_1
3
M_D_R_0M_D0
4
M_BS0_FR#
1
M_A_FR_10
M_A_FR_2
3
M_A_FR_0
4
M_CB_R5
4
M_CB_R0
3
M_CB_R1
M_CB_R2
1
M_DQS_R8
4
M_CB_R6
3
M_CB_R7
M_CB_R3
1
M_A_FR_12
M_A_FR_9M_A9
+V1.25
CHECK PH VALUE CHECK PH VALUE
RN14 56R-8P4R
4
3
1
RN71 56R-8P4R
1
3
4
RN13 56R-8P4R
4
3
1
RN68 56R-8P4R
1
3
4
RN10 56R-8P4R
4
3
1
RN64 56R-8P4R
1
3
4
RN11 56R-8P4R
4
3
1
RN61 56R-8P4R
1
3
4
RN4 56R-8P4R
4
3
1
RN48 56R-8P4R
1
3
4
RN3 56R-8P4R
4
3
1
RN43 56R-8P4R
1
3
4
RN59 56R-8P4R
1
3
4
RN5 56R-8P4R
1
3
4
RN1 56R-8P4R
1
3
4
RN38 56R-8P4R
1
3
4
4
M_D_R_8
5
M_D_R_3
6
M_D_R_2
72
M_DQS_R0
8
M_D_R_7
8
M_D_R_6
72
M_D_R_4
6
M_D_R_5
5
M_D_R_11
5
M_D_R_10
6
M_DQS_R1
72
M_D_R_9
8
M_D_R_14
8
M_D_R_15
72
M_D_R_12
6
M_D_R_13
5
TZ0802
5
M_CB_R0
6
M_D_R_27
72
M_D_R_26
8
M_D_R_23
8
M_D_R_22
72
M_D_R_21
6
M_D_R_20
5
M_DQS_R3
5
M_D_R_25
6
M_D_R_24
72
M_D_R_19
8
M_D_R_31
8
M_D_R_30
72
M_D_R_28
6
M_D_R_29
5
M_DQS_R5
5
M_D_R_41
6
M_D_R_40
72
M_D_R_35
8
M_D_R_39
8
M_D_R_38
72
M_D_R_36
6
M_D_R_37
5
M_D_R_49
5
M_D_R_48
6
M_D_R_43
72
M_D_R_42
8
M_D_R_46
8
M_D_R_47
72
M_D_R_45
6
M_D_R_44
5
M_CB_R7
8
M_CB_R6
72
M_CB_R5
6
M_CB_R4
5
M_D_R_32
8
M_D_R_33
72
M_DQS_R4
6
M_D_R_34
5
M_D_R_57
8
M_DQS_R7
72
M_D_R_58
6
M_D_R_59
5
M_D_R_62
8
M_D_R_63
72
M_D_R_61
6
M_D_R_60
5
+V1.25
3
RN8 56R-8P4R
1
8
72
3
6
5
4
RN54 56R-8P4R
1
8
72
3
6
5
4
RN7 56R-8P4R
1
8
72
3
6
5
4
RN9 56R-8P4R
5
4
3
6
72
1
8
RN12 56R-8P4R
5
4
3
6
72
1
8
RN41 56R-8P4R
1
8
72
3
6
5
4
RN2 56R-8P4R
5
4
3
6
72
1
8
RN52 56R-8P4R
1
8
72
3
6
5
4
RN6 56R-8P4R
5
4
3
6
72
1
8
RN56 56R-8P4R
1
8
72
3
6
5
4
R33 56R
1 2
R31 56R
1 2
R25 10R
1 2
R449 10R
1 2
M_A_FR_9
M_A_FR_7
M_A_FR_5
M_A_FR_3
M_A_FR_2
M_A_FR_6
M_A_FR_11
M_A_FR_4
M_A_FR_1
M_A_FR_10
M_BS0_FR#
M_WE_FR#
M_CB_R3
M_CB_R2
M_DQS_R8
M_CB_R1
M_D_R_18
M_DQS_R2
M_D_R_17
M_D_R_16
M_D_R_55
M_D_R_54
M_D_R_53
M_D_R_52
M_D_R_56
M_D_R_51
M_D_R_50
M_DQS_R6
M_CAS_FR#
M_RAS_FR#
M_BS1_FR#
M_A_FR_0
M_CS3_R#
M_CS1_R#
M_CS2_R#
M_CS0_R#
M_CKE1_R
M_CKE0_R
M_CKE3_R
M_CKE2_R
M_D_R_0
M_D_R_1
M_A_FR_12
M_A_FR_8
+V1.25
C414
0.1U
2 1
2 1
C403
0.1U
2 1
2 1
C59
0.1U
2 1
2 1
2
M_CAS#6,9
M_WE#6,9
M_D[0..63]6
M_A[0..12]6,9
M_CB[0..7]6 M_CB_R[0..7] 9
M_BS0#6,9
M_BS1#6,9
M_CS0_R#6,9
M_CS1_R#6,9
M_CS2_R#6,9
M_CS3_R#6,9
M_CKE0_R6,9
M_CKE1_R6,9
M_CKE2_R6,9
M_CKE3_R6,9
C56
C62
0.1U
0.1U
2 1
2 1
C61
C467
0.1U
0.1U
2 1
2 1
C51
C64
0.1U
0.1U
2 1
2 1
C73
0.1U
2 1
05/29 Modify
M_CAS#
M_WE#
M_RAS#
M_DQS[0..8] M_DQS_R[0..8]
M_A[0..12]
M_BS1# M_BS1_FR#
M_CS0_R#
M_CS1_R#
M_CS2_R#
M_CS3_R#
M_CKE0_R
M_CKE1_R
M_CKE2_R
M_CKE3_R
C436
C416
C60
0.1U
C379
0.1U
C372
0.1U
0.1U
2 1
C394
0.1U
2 1
C410
0.1U
2 1
C71
0.1U
2 1
C424
0.1U
0.1U
2 1
2 1
C55
C52
0.1U
0.1U
2 1
2 1
C415
C58
0.1U
0.1U
2 1
2 1
2004//06/25
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
5
+V2.5
91021223334364546575869708182929394113
CN12
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VDD
VSS
VSS
VSS
C418
0.1U
2 1
SM_VREF_DIMM
+V3.3S
D D
M_BS0_FR#8
M_BS1_FR#8
C C
M_RAS_FR#8
M_CAS_FR#8
M_WE_FR#8
M_CS0_R#6,8
M_CS1_R#6,8
M_CKE0_R6,8
M_CKE1_R6,8
B B
M_CLK_DDR06
M_CLK_DDR0#6
M_CLK_DDR16
M_CLK_DDR1#6
M_CLK_DDR26
M_CLK_DDR2#6
DDR_RSVD3
CHECK???
+V2.5
12
R467
75R/F
A A
12
R470
75R/F
SM_VREF_DIMM
C487
0.1U
2 1
TZ0901
M_A_FR_0
M_A_FR_1
M_A_FR_2
M_A_FR_3
M_A_FR_4
M_A_FR_5
M_A_FR_6
M_A_FR_7
M_A_FR_8
M_A_FR_9
M_A_FR_10
M_A_FR_11
M_A_FR_12
M_BS0_FR#
M_BS1_FR#
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
M_CB_R0
M_CB_R1
M_CB_R2
M_CB_R3
M_CB_R4
M_CB_R5
M_CB_R6
M_CB_R7
M_RAS_FR#
M_CAS_FR#
M_WE_FR#
M_CS0_R#
M_CS1_R#
M_CKE0_R
M_CKE1_R
TZ0902
TZ0903
TZ0904
TZ0905
TZ0906
TZ0907
C486
0.1U
2 1
5
1
VREF
2
VREF
197
VddSPD
199
VddID
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
12
DM0
26
DM1
48
DM2
62
DM3
134
DM4
148
DM5
170
DM6
184
DM7
78
DM8
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
118
RAS#
120
CAS#
119
WE#
121
CS0#
122
CS1#
96
CKE0
95
CKE1
35
CK0
37
CK0#
160
CK1
158
CK1#
89
CK2
91
CK2#
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3415162728383940515263647576878890103
C425
C430
10U/10V
10U/10V
2 1
2 1
VDD
VSS
VDD
VSS
4
114
131
132
143
144
155
156
157
167
168
179
180
191
192
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
M_D_R_0
5
VSS
VSS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
SCL
SDA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
104
125
126
137
138
149
150
159
161
162
173
174
185
M_D_R_1
7
M_D_R_2
13
M_D_R_3
17
M_D_R_4
6
M_D_R_5
8
M_D_R_6
14
M_D_R_7
18
M_D_R_8
19
M_D_R_9
23
M_D_R_10
29
M_D_R_11
31
M_D_R_12
20
M_D_R_13
24
M_D_R_14
30
M_D_R_15
32
M_D_R_16
41
M_D_R_17
43
M_D_R_18
49
M_D_R_19
53
M_D_R_20
42
M_D_R_21
44
M_D_R_22
50
M_D_R_23
54
M_D_R_24
55
M_D_R_25
59
M_D_R_26
65
M_D_R_27
67
M_D_R_28
56
M_D_R_29
60
M_D_R_30
66
M_D_R_31
68
M_D_R_32
127
M_D_R_33
129
M_D_R_34
135
M_D_R_35
139
M_D_R_36
128
M_D_R_37
130
M_D_R_38
136
M_D_R_39
140
M_D_R_40
141
M_D_R_41
145
M_D_R_42
151
M_D_R_43
153
M_D_R_44
142
M_D_R_45
146
M_D_R_46
152
M_D_R_47
154
M_D_R_48
163
M_D_R_49
165
M_D_R_50
171
M_D_R_51
175
M_D_R_52
164
M_D_R_53
166
M_D_R_54
172
M_D_R_55
176
M_D_R_56
177
M_D_R_57
181
M_D_R_58
187
M_D_R_59
189
M_D_R_60
178
M_D_R_61
182
M_D_R_62
188
M_D_R_63
190
SMB_CLK
195
SMB_DATA
193
194
SA0
196
SA1
198
SA2
VSS
AMP=DDR_1376409-1(RVS)
186
DDR_REV
SMB_CLK 10,11
SMB_DATA 10,11
Address : 0000H
C390
C477
C458
0.1U
0.1U
2 1
2 1
4
C409
0.1U
0.1U
2 1
2 1
C431
C420
0.1U
2 1
C473
0.1U
0.1U
2 1
2 1
3
+V3.3S
C466
0.1U
+V2.5
SM_VREF_DIMM
TZ0908
M_A0M_CAS#
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_BS0#
M_BS1#
M_DQS_R0
M_DQS_R1
M_DQS_R2
M_DQS_R3
M_DQS_R4
M_DQS_R5
M_DQS_R6
M_DQS_R7
M_DQS_R8
M_CB_R0
M_CB_R1
M_CB_R2
M_CB_R3
M_CB_R4
M_CB_R5
M_CB_R6
M_CB_R7
M_RAS#
M_CAS#
M_WE#
M_CS2_R#
M_CS3_R#
M_CKE2_R
M_CKE3_R
TZ0909
TZ0910
TZ0911
TZ0912
TZ0913
TZ0914
C435
0.1U
2 1
M_A[0..12]6,8
M_D_R_[0..63]8
M_A_FR_[0..12]8
M_DQS_R[0..8]8
M_CB_R[0..7]8
M_CAS#6,8
M_WE#6,8
M_RAS#6,8
M_A[0..12]
M_D_R_[0..63]
M_A_FR_[0..12]
M_DQS_R[0..8]
M_CB_R[0..7]
M_WE#
M_RAS#
M_CLK_DDR36
M_CLK_DDR3#6
M_CLK_DDR46
M_CLK_DDR4#6
M_CLK_DDR56
M_CLK_DDR5#6
DDR_RSVD2
M_BS0#6,8
M_BS1#6,8
M_CS2_R#6,8
M_CS3_R#6,8
M_CKE2_R6,8
M_CKE3_R6,8
CHECK???
+V2.5
C357
@220U/4V
2004//06/02
C471
0.1U
2 1
C488
+
@220U/4V
2 1
+
+V2.5+V2.5
C367
2 1
C438
10U/10V
2 1
3
10U/10V
C377
0.1U
2 1
2
91021223334364546575869708182929394113
CN11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VSS
1
VREF
2
VREF
197
VddSPD
199
VddID
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10 / AP
100
A11
99
A12
117
BA0
116
BA1
12
DM0
26
DM1
48
DM2
62
DM3
134
DM4
148
DM5
170
DM6
184
DM7
78
DM8
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
118
RAS#
120
CAS#
119
WE#
121
CS0#
122
CS1#
96
CKE0
95
CKE1
35
CK0
37
CK0#
160
CK1
158
CK1#
89
CK2
91
CK2#
85
NC
86
NC/(RESET#)
97
NC/A13
98
NC/BA2
123
NC
124
NC
200
NC
VSS
VSS
VSS
3415162728383940515263647576878890103
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
114
131
132
143
144
155
156
157
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
104
125
126
137
138
149
150
159
167
168
179
180
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
161
162
173
174
1
191
192
VDD
VDD
M_D_R_0
5
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
185
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
SCL
SDA
M_D_R_1
7
M_D_R_2
13
M_D_R_3
17
M_D_R_4
6
M_D_R_5
8
M_D_R_6
14
M_D_R_7
18
M_D_R_8
19
M_D_R_9
23
M_D_R_10
29
M_D_R_11
31
M_D_R_12
20
M_D_R_13
24
M_D_R_14
30
M_D_R_15
32
M_D_R_16
41
M_D_R_17
43
M_D_R_18
49
M_D_R_19
53
M_D_R_20
42
M_D_R_21
44
M_D_R_22
50
M_D_R_23
54
M_D_R_24
55
M_D_R_25
59
M_D_R_26
65
M_D_R_27
67
M_D_R_28
56
M_D_R_29
60
M_D_R_30
66
M_D_R_31
68
M_D_R_32
127
M_D_R_33
129
M_D_R_34
135
M_D_R_35
139
M_D_R_36
128
M_D_R_37
130
M_D_R_38
136
M_D_R_39
140
M_D_R_40
141
M_D_R_41
145
M_D_R_42
151
M_D_R_43
153
M_D_R_44
142
M_D_R_45
146
M_D_R_46
152
M_D_R_47
154
M_D_R_48
163
M_D_R_49
165
M_D_R_50
171
M_D_R_51
175
M_D_R_52
164
M_D_R_53
166
M_D_R_54
172
M_D_R_55
176
M_D_R_56
177
M_D_R_57
181
M_D_R_58
187
M_D_R_59
189
M_D_R_60
178
M_D_R_61
182
M_D_R_62
188
M_D_R_63
190
SMB_CLK
195
SMB_DATA
193
194
SA0
196
SA1
198
SA2
VSS
AMP=DDR_1376408-1(STD)
186
DDR_STD
+V3.3S
Address : 0001H
C444
0.1U
0.1U
2 1
2 1
2
C449
0.1U
0.1U
2 1
2 1
C417
C478
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
DDR
941Wednesday, January 05, 2005
1
of
01
+V12S
R140
1 2
D D
1 2
CK408_DATA_D
1K
R121
CK408_CLK_D SMB_CK408_CLK
1K
5
SMB_DATA_SP
D
Q7
2N7002
G
G
S
D
Q6
2N7002
S
SMB_CK408_DATA
SMB_CLK_SP
SMB_CK408_CLK
4
+V3.3S
R139 10K
1 2
R138 10K
1 2
SMB_CK408_DATA
3
2
1
L34
QT2012RL030HC-3A
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_AGP_SLOT
CLK_MCH66
CLK_ICH66
CLK_ICHPCI
CLKPCI_CB
CLKPCI_MPCI2
CLKPCI_EC
CLKPCI_MPCI
CLKPCI_LAN
CLKPCI_1394
CLK_ICH48USB
CLK_ICH14
CLK14_AUD CLK14_AUD
SMB_CLK_BAT_B
SMB_DATA_BAT_B
Q12
2N7002
+V3.3S
+V3.3S
C C
B B
R574 10K
R571 @330R
R573 @330R
R120 @330R
R118 @330R
R119 @330R
R576 10K
R570 1K
R572 1K
R136 1K
R130 1K
R131 1K
PM_SLP_S1#12
PM_SLP_S3#12,17,22,24,29,33,35
L30
QT2012RL030HC-3A
21
21
L33
QT2012RL030HC-3A
12
12
12
12
12
12
12
12
12
12
12
12
PM_SLP_S1#
PM_SLP_S3#
2 1
PWRSAVE#
CK408_SEL4
CK408_SEL3
CK408_SEL2
CK408_SEL1
CK408_SEL0
MULT0
CK408_SEL4
CK408_SEL3
CK408_SEL2
CK408_SEL1
CK408_SEL0
C129
0.1U
C642
C611
10U/10V
10U/10V
2 1
2 1
Place crystal within
500 mils of clock
gen.
+V3.3S
53
U39
1
2
R604 0R
@SN74AHC1G08
1 2
4
C608
1U
2 1
2 1
CLK_PWRDWN#
PM_STPCPU#12,37
C159
0.1U
PM_STPPCI#12
+VDD3S_CLK
C161
C130
0.1U
0.1U
2 1
2 1
CLK_EN#37
14.318MHz_SMD
C155
12P
2 1
2 1
XTAL_IN
Y2
C160
0.1U
C150
C131
0.1U
2 1
C156
12P
2 1
C157
0.1U
0.1U
2 1
2 1
PWRSAVE#
CK408_SEL1
CK408_SEL0
CLK_PWRDWN#
MULT0
CK408_SEL4
CK408_SEL3
SMB_CK408_DATA
SMB_CK408_CLK
XTAL_OUT
R575
1 2
475R/F
MULT0 = 0 -> Ioh = 20mA/1.0V [IREF(5.0mA / 221R) X 4)]
= 1 -> Ioh = 14mA/0.7V [IREF(2.32mA / 475R) X 6]
U12
1
VDDREF
8
VDDPCI
14
VDDPCI
19
VDD3V66
32
VDD3V66
37
VDD48
46
VDDCPU
50
VDDCPU
40
PWRSAVE#*
55
FS1
54
FS0
25
*PD#
34
PCI_STOP#
53
CPU_STOP#
28
Vtt_PWRGD#
43
MULTSEL*
33
3V66_0/FS4**
35
3V66_1/VCH-CLK/FS3**
29
SDATA
30
SCLK
2
X1
3
X2
Z1001
42
IREF
41
GND
4
GND
9
GND
15
GND
20 31
GND GND
*ASEL/PCICLK_F2
**E_PCICLK3/PCICLK3
**E_PCICLK1/PCICLK1
48Mhz_USB/FS2**
* : 120K PU.
** : PD.
VDDA
GND
CPUCLKT2
CPUCLK2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5
3V66_4
3V66_3
3V66_2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK2
PCICLK0
48MhZ_DOT
REF
GND
GND
ICS950813BG
26
27
45
44
49
48
52
51
24
23
22
21
7
6
5
18
17
16
13
12
11
10
39
38
56
47
36
CPU2
CPU2#
CPU1
CPU1#
CPU0
CPU0#
TZ1001
66BUF2
66BUF1
66BUF0
PCIF2
TZ1002
TZ1003
TZ1004
CLK_REF0
C163
0.1U
2 1
R134 33R
R135 33R
R132 33R
R133 33R
R608 0R
R609 22R
R619 22R
R592 33R
PCI5
R599 33R
PCI4
R600 33R
PCI3
R161 33R
PCI2
R601 22R
R590 33R
PCI0
R591 33R
CK408_SEL2
R137 33R
R577 33R
R555 @33R
SMB_DATA_BAT_B14,33,34
+V3SA_CLK
C651
10U/10V
2 1
1 2
1 2
1 2
1 2
05/28
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
05/28
1 2
1 2
SMB_CLK_BAT_B14,33,34
SMB_DATA9,11
EC_SMB_EN#12
C162
0.1U
2 1
SMB_CLK9,11
+V3.3S
21
05/28
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_AGP_SLOT 14
CLK_MCH66 6
CLK_ICH66 11
CLK_ICHPCI 11
CLKPCI_CB 27
CLKPCI_MPCI2 32
CLKPCI_EC 33
CLKPCI_MPCI 31
CLKPCI_LAN 29
CLKPCI_1394 26
CLK_ICH48 12
CLK_ICH14 12
CLK14_AUD 24
+V3.3S
12
R336
10K
U29
1
1Y
13
1E
4
Z1002
D
G
S
2Y
5
2E
8
3Y
6
3E
11 10
4Y 4Z
12
4E
@SN74HC4066PWR
2
1Z
3
2Z
9
3Z
147
VCCGND
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_AGP_SLOT
CLK_MCH66
CLK_ICH66
CLK_ICHPCI
CLKPCI_CB
CLKPCI_MPCI2
CLKPCI_EC
CLKPCI_MPCI
CLKPCI_LANPCI1
CLKPCI_1394
CLK_ICH48
CLK_ICH14
SMB_CLK_SP
SMB_DATA_SP
+V3.3S
C324
0.1U
2 1
C123 49.9R/F
C124 49.9R/F
C121 49.9R/F
C122 49.9R/F
C671 @10P
C672 @10P
C673 @10P
C654 @10P
C668 @10P
C669 @10P
C158 @10P
C652 @10P
C644 @10P
C653 @10P
C125 @10P
C619 @10P
C610 @10P
SMB_CLK_SP
SMB_DATA_SP
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
H : On / L : Off
SMB_CLK
R349 0R
A A
FUNCTIONALITY FOR ICS 950813
S3
S2
S4
0
0
0
0
0 48M
0
0
0
0
0
0
0
CPUS0
S1
100M
00
1 133M
1
200M 66M
0 66M
1 66M 48M
166M
1
5
66M
66M
66BUFF
66M
66M
66M
66IN3V66
66M
66M
66M
66M
PCI_F
33M
33M0
33M
33M
REF
14.318M
14.318M
14.318M
14.318M
4
USB
48M
48M
3
SMB_DATA
2
1 2
R348 0R
1 2
SMB_CLK_SP
SMB_DATA_SP
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
CLK Generator
1
10 41Wednesday, January 05, 2005
of
01
5
PCI_AD[31..0]26,27,29,31,32
D D
C C
B B
A A
PCI_CBE#[3..0]26,27,29,31,32
PCI_REQ0#31,32
PCI_REQ1#26,31
PCI_REQ2#29,31
PCI_REQ3#27,31
PCI_REQ4#31
CLK_ICHPCI10
PCI_DEVSEL#26,27,29,31,32
PCI_FRAME#26,27,29,31,32
PCI_REQA#31
PCI_REQB#31
PCI_GNTA#12
PCI_GNTB#
PCI_PERR#26,27,29,31,32
PCI_LOCK#31
PCI_SERR#26,27,29,31,32
PCI_STOP#26,27,29,31,32
PCI_TRDY#26,27,29,31,32
5
PCI_GNT0#32
PCI_GNT1#26
PCI_GNT2#29
PCI_GNT3#27
PCI_GNT4#31
PCI_IRDY#26,27,29,31,32
PCI_PAR26,27,29,31,32
PCI_PME#26,27,29,31,32
PCI_AD[31..0]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#
PCI_GNT4#
PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_REQ4#
12
PCI_AD30
PCI_AD31
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
ICH_PME#
PPCIRST#
1
2
+V3.3
PCI_CBE#[3..0]
PCI_DEVSEL#
PCI_FRAME#
PCI_REQA#
PCI_REQB#
PCI_GNTA#
PCI_GNTB#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_LOCK#
R279 0R
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PM_PWROK12,24,31,33
PM_PWROK
U16A
H5
PCI_AD0
J3
PCI_AD1
H3
PCI_AD2
K1
PCI_AD3
G5
PCI_AD4
J4
PCI_AD5
H4
PCI_AD6
J5
PCI_AD7
K2
PCI_AD8
G2
PCI_AD9
L1
PCI_AD10
G4
PCI_AD11
L2
PCI_AD12
H2
PCI_AD13
L3
PCI_AD14
F5
PCI_AD15
F4
PCI_AD16
N1
PCI_AD17
E5
PCI_AD18
N2
PCI_AD19
E3
PCI_AD20
N3
PCI_AD21
E4
PCI_AD22
M5
PCI_AD23
E2
PCI_AD24
P1
PCI_AD25
E1
PCI_AD26
P2
PCI_AD27
D3
PCI_AD28
R1
PCI_AD29
D2
PCI_AD30
P4
PCI_AD31
J2
PCI_CBE0#
K4
PCI_CBE1#
M4
PCI_CBE2#
N4
PCI_CBE3#
C1
PCI_GNT0#
E6
PCI_GNT1#
A7
PCI_GNT2#
B7
PCI_GNT3#
D6
PCI_GNT4#
B1
PCI_REQ0#
A2
PCI_REQ1#
B3
PCI_REQ2#
C7
PCI_REQ3#
B6
PCI_REQ4#
P5
PCI_CLK
M3
PCI_DEVSEL#
F1
PCI_FRAME#
B5
PCI_REQA#/GPIO0
A6
PCI_REQB#/REQ5#/GPIO1
E8
PCI_GNTA#/GPIO16
C5
PCI_GNTB#/GNT5#/GPIO17
L5
PCI_IRDY#
G1
PCI_PAR
L4
PCI_PERR#
M2
PCI_LOCK#
W2
PCI_PME#
U5
PCI_RST#
K5
PCI_SERR#
F3
PCI_STOP#
F2
PCI_TRDY#
ICH4-M
53
4
U21
SN74AHC1G08
4
PCI_RST#
SMB_ALERT#/GPIO11
System
Management
I/F
CPU I/F
PCI
I/F
Hub I/F
ICH4-M 1/3
HUB_STB#/HUB_STBF
HUB_STB/HUB_STBS
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
Interrupt I/FLAN I/F
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
EEPROM
I/F
PCI_RST# 6,14,22,26,27,29,31,32,33
SM_INTRUDER#
SM_LINK0
SM_LINK1
SMB_CLK
SMB_DATA
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT#
CPU_INTR
CPU_NMI
CPU_PWRGD
CPU_RCIN#
CPU_SLP#
CPU_SMI#
CPU_STPCLK#
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PD11
HUB_CLK
HUB_COMP
HUB_VREF
HUB_VSWING
INT_APICCLK
INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_IRQ14
INT_IRQ15
INT_SERIRQ
EEP_CS
EEP_DIN
EEP_DOUT
EEP_SHCLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_CLK
LAN_RSTSYNC
LAN_RST#
W6
AC3
AB1
AC4
AB4
AA5
Y22
AB23
U23
AA21
W21
V22
AB22
V21
Y23
U22
U21
W23
V23
HUB_PD0
L19
HUB_PD1
L20
HUB_PD2
M19
HUB_PD3
M21
HUB_PD4
P19
HUB_PD5
R19
HUB_PD6
T20
HUB_PD7
R20
HUB_PD8
P23
HUB_PD9
L22
HUB_PD10
N22
TP_HUB_PD11
K21
CLK_ICH66
T21
HUB_PSTRB#
N20
HUB_PSTRB
P21
HUB_RCOMP_ICH
R23
HUB_VREF_ICH
M23
HUB_VSWING_ICH
R22
INT_APICCLK
J19
INT_APICD0
H19
INT_APICD1
K20
D5
C2
B4
A3
C8
D7
C3
C4
AC13
AA19
J22
TZ1101
D10
TZ1102
D11
A8
TZ1103
C12
TZ1104
A10
TZ1105
A9
TZ1106
A11
TZ1107
B10
TZ1108
C10
TZ1109
A12
TZ1110
C11
TZ1111
B11
PM_LANPWROK
Y5
3
SM_INTRUDER#
SMLINK0
SMLINK1
SMB_CLK
SMB_DATA
SMB_ALERT#
H_A20GATE
H_A20M#
CPU_DPSLP#
CPU_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
H_PWRGD
KB_RST#
H_CPUSLP#
H_SMI#
H_STPCLK#
05/28 05/28
+V3.3_AUX
12
12
R123
R99
10K
4.7K
D
Q4
R122
1 2
+V12S +V12S
4
0R
2N7002
Z1101 Z1102
G
S
SMLINK0
SMB_CLK 9,10
3
R173 0R
1 2
R174 56R
1 2
HUB_PD[10..0]
8/4/8 +-100MIL
R621 @56R
1 2
R172 36.5R/F
1 2
R236 10K
1 2
R124
1 2
0R
+VCCP
12
R175
56R
SM_INTRUDER# 31
SMLINK0
SMLINK1
SMB_CLK 9,10
SMB_DATA 9,10
SMB_ALERT# 31
H_A20GATE 31,33
H_A20M# 3
H_DPSLP# 3,6
H_FERR# 3
H_IGNNE# 3
H_INIT# 3
H_INTR 3
H_NMI 3
H_PWRGD 3
KB_RST# 31,33
H_CPUSLP# 3
H_SMI# 3
H_STPCLK# 3
HUB_PD[10..0] 5
CLK_ICH66 10
HUB_PSTRB# 5
HUB_PSTRB 5
INT_PIRQA# 14,26,27,31,32
INT_PIRQB# 29,31,32
INT_PIRQC# 27,31
INT_PIRQD# 31
INT_PIRQE# 31
INT_PIRQF# 31
INT_PIRQG# 31
INT_PIRQH# 31
INT_IRQ14 22,31
INT_IRQ15 22,31
INT_SERIRQ 27,31,33
LAN_EEP_DOUT 12
INT_APICCLK
INT_APICD0
INT_APICD1
+V3.3_AUX
12
12
R125
R100
10K
4.7K
D
Q5
2N7002
G
S
2
PLACE RCOMP resistor
within 0.5" of ICH pad using
a thick trace
RCOMP R should be 2/3
board impedance
2004/04/14 :
Del R401,R415,R422,R424.
R622 0R
1 2
R623 10K
1 2
R620 10K
1 2
SMLINK1
SMB_DATA 9,10
2
1
2004/04/14 :
Del
R485,R466,R459.R487,R455,R444,R465,R458.
+V1.8S_ICHHUB
12
R616
C678
0.01U
2 1
+V1.8S_ICHHUB
C680
@0.1U
2 1
12
12
12
150R/F
R618
150R/F
R615
150R/F
R617
150R/F
HUB_VREF_ICH
C679
0.01U
2 1
HUB_VREF and HUB_VSWING
circuits for internal
testing need 10 mil traces
w/ 20 mil spacing
HUB_VSWING_ICH
C677
0.01U
2 1
HUB INTERFACE VSWING VOLTAGE
HUB INTERFACE LAYOUT:
Route signals with 4/8 trace/space routing. Signals
must match +/- 0.1" of HUB_STB/STB# signals
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
Date: Sheet
ICH4-M
1
11 41Wednesday, January 05, 2005
of
01
5
2004/04/24 :
Del R208,R482,R481,R460.
AGP_BUSY#14,17,41
PM_SYSRST#
PM_BATLOW#31
PM_C3_STAT#14,17
PM_CLKRUN#26,27,29,31,32
5
PM_DPRSLPVR37
PM_PWRBTN#33
PM_PWROK11,24,31,33
PM_RI#27,31
PM_RSMRST#31,33
PM_SLP_S1#10
PM_SLP_S3#10,17,22,24,29,33,35
PM_SLP_S4#
PM_SLP_S5#33
PM_STPCPU#10,37
PM_STPPCI#10
PM_SUS_CLK28
PM_SUS_STAT#14,17
+VCCP
PM_GMUXSEL
PM_CPUPERF#
IMVP4_PG37
AC_BITCLK23,24
AC_RST#23,24
AC_SDATAIN024
AC_SDATAIN123
AC_SDATAIN2
AC_SDATAOUT23,24
AC_SYNC23,24
LPC_AD[0..3]33
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#33
USB_PP023
USB_PP123
USB_PP2
USB_PP323
USB_PP423
USB_PP517
USB_PN023
USB_PN123
USB_PN2
USB_PN323
USB_PN423
USB_PN517
USB_OC0#23
USB_OC1#23
USB_OC2#23
USB_OC3#23
USB_OC4#23
USB_OC5#23
PNLID021
PNLID121
PNLID221
HDD_PRST#22
CD_PRST#22
C218
15P
2 1
D D
05/29 Modify
C C
Layout:Rout USB_RBIAS / USB_RBIAS#
Diferentially
B B
2004/04/24 :
Change GPIO's Pin Define.
AGP_SUSPEND#
KSC_VPPEN#
RTC_VBIAS
RTC_X1
RTC_X2
A A
The Two CAP.s
Value depends on
X'tal
AGP_BUSY#
PM_SYSRST#
PM_SLP_S1#
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
R186 8.2K
1 2
AC_BITCLK
AC_RST#
AC_SDATAOUT
R642 33R
AC_SYNC ACSYNC_D
LPC_AD[0..3]
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN0
USB_PN1
USB_PN2
USB_PN3
USB_PN4
USB_PN5
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
R183 22.6R/F
PNLID0
PNLID1
PNLID2
ICH4_GPIO42
ICH4_GPIO43
2004/04/14 :
Del R154,R145.
R225
1 2
10M
Y3
32.768KHz
1 2
12
34
C216
15P
2 1
12
12
R219
10M
PM_THRM#_ICH
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
USB_RBIAS
TZ1201
TZ1202
TZ1203
TZ1204
TZ1205
C210
0.047U
Z1201
2 1
12
R208
1K
Z1202
1 2
4
U16B
R2
PM_AGPBUSY#
Y3
PM_SYS_RST#
AB2
PM_BATLOW#
T3
PM_C3_STAT#
AC2
PCI_CLKRUN#
V20
PM_DPRSLPVR
AA1
PM_PWRBTN#
AB6
PM_PWROK
Y1
PM_RI#
AA6
PM_RSMRST#
W18
PM_SLP_S1#
Y4
PM_SLP_S3#
Y2
PM_SLP_S4#
AA2
PM_SLP_S5#
W19
PM_STP_CPU#
Y21
PM_STP_PCI#
AA4
PM_SUS_CLK
AB3
PM_SUS_STAT#/LPCPD#
V1
PM_THRM#
J21
PM_SSMUXSEL
Y20
PM_CPUPERF#
V19
PM_VGATE/VRMPWRGD
B8
AC_BITCLK
C13
AC_RST#
D13
AC_SDATAIN0
A13
AC_SDATAIN1
B13
AC_SDATAIN2
D9
AC_SDATAOUT
C9
AC_SYNC
T2
LPC_AD0/FWH0
R4
LPC_AD1/FWH1
T4
LPC_AD2/FWH2
U2
LPC_AD3/FWH3
U3
LPC_DRQ0#
U4
LPC_DRQ1#
T5
LPC_FRAME#/FWH4
C20
USB_PP0
A21
USB_PP1
C18
USB_PP2
A19
USB_PP3
C16
USB_PP4
A17
USB_PP5
D20
USB_PN0#
B21
USB_PN1#
D18
USB_PN2#
B19
USB_PN3#
D16
USB_PN4#
B17
USB_PN5#
B15
USB_OC0#
C14
USB_OC1#
A15
USB_OC2#
B14
USB_OC3#
A14
USB_OC4#
D14
USB_OC5#
A23
USB_RBIAS
B23
USB_RBIAS#
J20
GPIO32
G22
GPIO33
F20
GPIO34
G20
GPIO35
F21
GPIO36
H20
GPIO37
F23
GPIO38
H22
GPIO39
G23
GPIO40
H21
GPIO41
F22
GPIO42
E23
GPIO43
ICH4-M
+V3.3ALWAYS
NC
TZ1206
3
A C
D9
BAS16
BT1
BHB7410AP2P_KTS
+-
4
D8
AC
BAS16
TZ1207
3
1 2
BT1
BBBCR2032B_KTS
USB I/F
NC
Power Management
IST
AC ' 97
I/F
IDE I/F
LPC
I/F
ICH4-M 2/3
C204
1U
21
21
Clock
C259
0.1U
GPIO
+V_RTC
R299
180K
Unmuxed
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
ICH4_CLK_14M
USB_CLK_48M
RTC_RST#
RTC_VBIAS
PM_THRMTRIP#
MISC
RTC_RST#
12
JP1
OPEN_S_2
CMOS Settings :
Clear CMOS SHORT
Keep CMOS OPEN
3
R3
GPIO7
V4
GPIO8
V5
GPIO12
W3
GPIO13
V2
GPIO25
W1
GPIO27
W4
GPIO28
Y13
AB14
AB21
AC22
AA13
IDE_PDA0
AB13
IDE_PDA1
W13
IDE_PDA2
AA20
IDE_SDA0
AC20
IDE_SDA1
AC21
IDE_SDA2
AB11
IDE_PDD0
AC11
IDE_PDD1
Y10
IDE_PDD2
AA10
IDE_PDD3
AA7
IDE_PDD4
AB8
IDE_PDD5
Y8
IDE_PDD6
AA8
IDE_PDD7
AB9
IDE_PDD8
Y9
IDE_PDD9
AC9
W9
AB10
W10
W11
Y11
W17
IDE_SDD0
AB17
IDE_SDD1
W16
IDE_SDD2
AC16
IDE_SDD3
W15
IDE_SDD4
AB15
IDE_SDD5
W14
IDE_SDD6
AA14
IDE_SDD7
Y14
IDE_SDD8
AC15
IDE_SDD9
AA15
Y15
AB16
Y16
AA17
Y17
Y12
AB19
AA11
AB18
AC12
Y18
W12
AA18
AB12
AC19
J23
F19
W7
AC7
RTC_X1
AC6
RTC_X2
Y6
H23
SPKR
W20
RTC_RST# delay 18-25ms
3
ICH_GPIO7
EXTSMI#
RUNTIME_SCI#
EC_WAKE_SCI#
FLASHEN#
BKL_SB
EC_SMB_EN#
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
CLK_ICH48
RTC_RST#
RTC_X1
RTC_X2
RTC_VBIAS
AC_SPKR
PM_THRMTRIP#_D
2004/04/24 :
Change GPIO's Pin Define.
IDE_PDD[15..0]
IDE_SDD[15..0]
1 2
R184 56R
R185 56R
2
2004/04/24 :
Del :R475, R461
ICH_GPIO7
EXTSMI# 31,33
RUNTIME_SCI# 31,33
EC_WAKE_SCI# 31
FLASHEN# 33
BKL_SB 21
EC_SMB_EN# 10
IDE_PDCS1# 22
IDE_PDCS3# 22
IDE_SDCS1# 22
IDE_SDCS3# 22
IDE_PDA0 22
IDE_PDA1 22
IDE_PDA2 22
IDE_SDA0 22
IDE_SDA1 22
IDE_SDA2 22
IDE_PDD[0..15] 22
IDE_SDD[0..15] 22
IDE_PDDACK# 22
IDE_SDDACK# 22
IDE_PDDREQ 22
IDE_SDDREQ 22
IDE_PDIOR# 22
IDE_SDIOR# 22
IDE_PDIOW# 22
IDE_SDIOW# 22
IDE_PIORDY 22
IDE_SIORDY 22
CLK_ICH14 10
CLK_ICH48 10
AC_SPKR 24
PM_THRMTRIP# 3
12
+VCCP
2
05/29 Add
PM_RSMRST#31,33
PM_THRM#3,31
THROTTLING#33
BKL_SB
ICH_GPIO7
ICH4_GPIO42
ICH4_GPIO43
AGP_BUSY#
PM_SYSRST#
PM_RSMRST#
SPKR
AC_SDOUT
GNTA#
EE_DOUT
+V3.3S_ICH
R624 @1K
1 2
R641 @10K
1 2
R650 @1K
R212 @1K
Size Document Number Rev
Date: Sheet
1
R681 0R
1 2
+V3.3S
06/30
53
PM_THRM#
THROTTLING#
R280 4.7K
R278 10K
R625 10K
R626 10K
R277 8.2K
Function
No Reboot
Safe Mode Boot
A16 swap override
Reserved
12
12
1
2
12
12
12
12
12
+V3.3
12
R305
10K
C270
@0.1U
2 1
+V3.3_AUX +V3.3
12
R255
@4.7K
C221
1U
2 1
Board Default
No Stuff
No Stuff
No Stuff
AC_SPKR
AC_SDATAOUT
PCI_GNTA#
LAN_EEP_DOUT
4
U44
@SN74AHC1G08
+V3.3_AUX_ICH
+V3.3S_ICH
+V3.3S
12
R306
@10K
12
R261
@4.7K
Optional Override
Stuff for No Reboot
Stuff for safe modeNo Stuff
Stuff for A16 swap override
Stuff
PCI_GNTA# 11
LAN_EEP_DOUT 11
UNIWILL COMPUTER CORP.
Project : 255/259IAx
2779
ICH4-M
1
PM_THRM#_ICH
12 41Wednesday, January 05, 2005
of
01
5
U16C
A1
VSS
A4
VSS
D D
C C
B B
A A
A16
A18
A20
A22
B12
B16
B18
B20
B22
C15
C17
C19
C21
C23
D12
D15
D17
D19
D21
D22
D23
E10
E14
E16
E17
E18
E19
E21
E22
G19
G21
K11
K13
K19
K23
M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
N21
N23
P11
P13
P20
P22
R18
R21
U20
V15
V17
ICH4-M 3/3
VSS
VSS
VSS
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
C6
VSS
VSS
VSS
VSS
VSS
VSS
D1
VSS
D4
VSS
D8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F8
VSS
G3
VSS
G6
VSS
VSS
VSS
H1
VSS
J6
VSS
K3
VSS
VSS
VSS
VSS
VSS
L10
VSS
L11
VSS
L12
VSS
L13
VSS
L14
VSS
L21
VSS
M1
VSS
VSS
VSS
VSS
VSS
VSS
N5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P3
VSS
VSS
VSS
VSS
VSS
R5
VSS
VSS
VSS
T1
VSS
T19
VSS
T23
VSS
VSS
V3
VSS
VSS
VSS
W5
VSS
W8
VSS
POWER &
VSS
V_CPU_IO
V_CPU_IO
V_CPU_IO
V5REF
V5REF
V5REF_SUS
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC_HUB
VCC_HUB
VCC_HUB
VCC_HUB
VCC_PLL
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCSUS1_5
VCCLAN1_5
VCCLAN1_5
VCCLAN3_3
VCCLAN3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
RTC_VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ICH4-M
P14
U18
AA23
E7
V6
E15
K10
K12
K18
K22
P10
T18
U19
V14
A5
B2
H6
H18
J1
J18
K6
M10
P6
P12
U1
V10
V16
V18
AC8
AC17
L23
M14
P18
T22
C22
E12
E13
E20
F14
G18
R6
T6
U6
F6
F7
F9
E9
E11
F10
F15
F16
F17
F18
K14
V7
V8
V9
AB5
W22
Y7
Y19
AA3
AA9
AA12
AA16
AA22
AB7
AB20
AC1
AC5
AC10
AC14
AC18
AC23
4
Z1301
VCC5REF
+V5A_ICH
+V1.5S_ICH
+V3.3S_ICH
+V1.8S_ICHHUB
VCCPLL
+V1.5A_ICH
+V1.5_ICHLAN
+V3.3_ICHLAN
+V3.3_AUX_ICH
2 1
C202
0.1U
+V_RTC
3
+VCCP
L36
QT2012RL030HC-3A
2 1
C195
C196
C697
0.1U
2 1
2 1
0.1U
1U
2 1
chane from 22U/10V
chane from 22U/10V
chane from 22U/10V
chane from 22U/10V
chane from 22U/10V
+V1.5S_ICH
C686
10U/10V
2 1
+V3.3S_ICH
C712
10U/10V
2 1
+V1.8S_ICHHUB
C687
10U/10V
2 1
+V1.5A_ICH
C702
10U/10V
2 1
+V1.5_ICHLAN
C708
10U/10V
2 1
+V3.3_ICHLAN
C693
10U/10V
2 1
+V3.3_AUX_ICH
C681
10U/10V
2 1
R633
0R/B
12
C721
0.1U
2 1
C695
0.1U
2 1
C698
4.7U/16V
2 1
2 1
C689
0.1U
12
R211
0R/B
2 1
R634
0R/B
R629
0R/C
C688
0.1U
+V1.5S
12
+V1.5
R192
0R
C710
0.1U
2 1
12
12
12
C704
C705
0.1U
0.1U
2 1
2 1
C713
C706
0.1U
0.1U
2 1
2 1
C692
C682
0.1U
0.1U
2 1
2 1
C696
C683
0.1U
0.1U
2 1
2 1
R223
0R/B
C711
C707
0.1U
0.1U
2 1
2 1
C703
C701
0.1U
0.1U
2 1
2 1
C690
C699
0.1U
0.1U
2 1
2 1
2
L38
QT2012RL030HC-3A
2 1
C715
0.1U
2 1
+V1.8S
+V1.5_AUX
+V3.3
+V3.3_AUX
+V3.3S
VCCPLL
VCC5REF
+V5A_ICH
+V5S
12
2 1
+V5_AUX
12
2 1
2 1
R643
1K
C714
1U
R640
1K
C208
1U
C675
0.1U
+V1.5S
1 2
2 1
+V3.3S_ICH
AC
C709
0.1U
2 1
+V3.3_AUX
AC
C691
0.1U
2 1
1
R612
0R
C674
0.01U
3
D14
BAT54
3
D10
BAT54
TZ1301
NC
TZ1302
NC
UNIWILL COMPUTER CORP.
Project : 255/259IAx
Size Document Number Rev
2779
5
4
3
2
Date: Sheet
ICH4-M
1
13 41Wednesday, January 05, 2005
01
of
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