FUJITSU MB89490 DATA SHEET
查询MB89490_03供应商
FUJITSU SEMICONDUCTOR
DATA SHEET
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89490 Series
MB89498/F499/PV490
DESCRIPTION
■
The MB89490 series has been developed as a general-purpose version of the F2MC*-8L family consisting of
proprietary 8-bit single-chip microcontrollers.
DS07-12560-1E
In addition to a compact instruction set, the general-purpose, single-chip microcontroller contains a variety of
peripheral functions such as 21-bit timebase timer, watch prescaler, PWM timer, 8/16-bit timer/counter, remote
receiver circuit, LCD controller/driver, e xternal interrupt 0 (edge) , external interrupt 1 (level) , 10-bit A/D converter,
UART/SIO, SIO, I
The MB89490 series is designed suitable for compact disc/radio receiver controller as well as in a wide range of
applications for consumer product.
2
* : “F
MC”, an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd.
FEATURES
■
• Package
QFP, LQFP package for MB89F499, MB89498
MQFP package for MB89PV490
PACKAGES
■
100-pin Plastic QFP 100-pin Plastic LQFP 100-pin Ceramic MQFP
2
C and watchdog timer reset.
(Continued)
(FTP-100P-M06) (FTP-100P-M05) (MQP-100C-P01)
MB89490 Series
(Continued)
• High speed operating capability at low voltage
• Minimum execution time : 0.32 µs/12.5 MHz
2
•F
MC-8L family CPU core
Multiplication and division instructions
Instruction set optimized for controllers
• PLL circuit for sub-clock
• Embedded for PLL clock multiplication circuit for sub-clock
• Operating clock (PLL for sub-clock) can be selected from no multiplication or 4 times of the sub-clock
oscillation frequency.
•6 timers
PWM timer × 2
8/16-bit timer/counter × 2
21-bit timebase timer
Watch prescaler
• External interrupt
Edge detection (selectable edge) : 8 channels
Low level interrupt (wake-up function) : 8 channels
• 10-bit A/D converter (8 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capability
•SIO
Switching of synchronous data transfer capability
• LCD controller/driver
Max 32 segments output × 4 commons
2
•I
C interface circuit
• Remote receiver circuit
• Low-power consumption mode
Stop mode (oscillation stops so as to minimize the current consumption.)
Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)
Watch mode (operation except the watch prescaler stops so as to reduce the power comsumption to an
extremely low level.)
Sub-clock mode
• Watchdog timer reset
• I/O ports : Max 66 channels
16-bit arithmetic operations
Branch instructions by test bit
Bit manipulation instructions, etc.
2
PRODUCT LINEUP
■
MB89490 Series
Part number
Parameter
Classification
ROM size
RAM size 2 K × 8-bit 2 K × 8-bit 2 K × 8-bit
CPU functions
Ports
21-bit timebase
timer
Watchdog timer Reset generation cycle (167.8 ms to 335.5 ms) at 12.5 MHz
Mass production products
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Minimum interrupt processing time
General-purpose I/O ports (CMOS)
Input ports (CMOS)
N-channel open drain I/O ports
Total
Interrupt generation cycle (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz
MB89498 MB89F499 MB89PV490
(mask ROM product)
48 K × 8-bit
(internal ROM)
FLASH
60 K × 8-bit
(internal FLASH)
: 136
: 8-bit
: 1 to 3 bytes
: 1-bit, 8-bit, 16-bit
: 0.32 µs/12.5 MHz
: 2.88 µs/12.5 MHz
: 56 pins
: 2 pins
: 8 pins
: 66 pins
(For evaluation or
(external ROM) *
Piggy-back
development)
60 K × 8-bit
1
PWM timer 0, 1
8/16-bit timer/counter
00, 01
8/16-bit timer/counter
10, 11
External interrupt 0
(edge)
External interrupt 1
(level)
A/D converter
LCD controller/driver
8-bit reload timer operation (supports square wave output and operating clock period :
1 t
inst, 8 tinst, 16 tinst, 64 tinst )
8-bit accuracy PWM operation
Can be operated either as a 2-channel 8-bit timer/counter (timer 00 and timer 01, each
with its own independent operating clock) , or as one 16-bit timer/counter.
In timer 00 or 16-bit timer/counter operation, event counter operation by external clock
input and square wave output capability
Can be operated either as a 2-channel 8-bit timer/counter (timer 10 and timer 11, each
with its own independent operating clock) , or as one 16-bit timer/counter.
In timer 10-bit or 16-bit timer/counter operation, event counter operation by external clock
input and square wave output capability
8 independent channels (selectable edge, interrupt vector, request flag)
8 channels (low level interrupt)
10-bit accuracy × 8 channels
A/D conversion function (conversion time : 30 t
Supports repeated activation by internal clock
Common output
Segment output
LCD driving power (bias) pins
LCD display RAM size
: 4 (Max)
: 32 (Max)
: 3
: 32 × 4 bits
inst )
(Continued)
3
MB89490 Series
(Continued)
Parameter
UART/SIO
SIO
2C*2
I
Part number
Synchronous/asynchronous data transfer capability
(Max baud rate : 97.656 Kbps at 12.5 MHz)
(7-bit and 8-bit with parity bit; 8-bit and 9-bit without parity bit)
8-bit serial I/O with LSB first/MSB first selectability
1 clock selectable from 4 operation clock (1 external shift clock and 3 internal shift clock :
0.64 µs, 2.56 µs, 10.24 µs at 12.5 MHz)
1 channel
(Use a 2-wire protocol to communicate with other device)
MB89498 MB89F499 MB89PV490
Remote receiver
circuit
Standby mode Sleep mode, stop mode, watch mode and sub-clock mode
Process CMOS
Operating voltage 2.2 V to 3.6 V 2.7 V to 3.6 V 2.7 V to 3.6 V
*1 : Use MBM27C512 as the external ROM.
2
*2 : I
C is complied to Philips I2C specification.
Selectable maximum noise width removal
Reversible input polarity
4
PACKAGE AND CORRESPONDING PRODUCTS
■
MB89490 Series
Part number
Parameter
FPT-100P-M06 O O ×
FPT-100P-M05 O O ×
MQP-100C-P01 ××O
O : Availabe
× : Not available
DIFFERENCES AMONG PRODUCTS
■
MB89498 MB89F499 MB89PV490
1. Memory Size
Before e v aluating using the pigg y-back product, v erify its diff erences from the product that will be actually used.
Take particular care on the following point : The stack area is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV490, add the current consumed by the EPROM mounted in the piggy-back socket.
• When operating at low speed, the current consumed by the FLASH product is greater than that for the mask
ROM product. However, the current consumption is roughly the same in sleep and stop mode.
• For more information, see “■ ELECTRICAL CHARACTERISTICS.”
3. Oscillation Stabilization Wait Time after Power-on Reset
• For MB89PV490 and MB89F499, the pow er-on stabilization wait time cannot be selected after power-on reset.
• For MB89498, the power-on stabilization wait time can be selected after power-on reset.
• For more information, please refer to “■ MASK OPTIONS”.
5
MB89490 Series
PIN ASSIGNMENTS
■
VCC
P23
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
*P00
*P01
*P02
*P03
*P04
*P05
*P06
*P07
P10/INT00
P11/INT01
P12/INT02
P13/INT03
P14/INT04
P15/INT05
P16/INT06
P17/INT07
P20/TO0
P21/RMC
P22EC0
P24/TO1
P25/EC1
P26/PWM0
P27/PWM1
P50/SI0
P51/SO0
P52/SCK0
AVR
AV
(TOP VIEW)
VSSX0X1
MOD0
RST
P84
P83
P82/SCK1
P81/SO1
P80/SI1
P77/SEG31
P76/SEG30
P75/SEG29
P74/SEG28
P73/SEG27
P72/SEG26
P71/SEG25
P70/SEG24
P67/SEG23
99989796959493929190898887868584838281
100
31323334353637383940414243444546474849
P66/SEG22
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
P65/SEG21
P64/SEG20
P63/SEG19
P62/SEG18
P61/SEG17
P60/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
P54/COM3
P53/COM2
COM1
COM0
V1
V2
V3
V
CC
* : High current pins
6
AVSS
P30/AN0/INT10
P31/AN1/INT11
P32/AN2/INT12
P33/AN3/INT13
P34/AN4/INT14
(FPT-100P-M06)
*P40
*P41
*P42
*P43
P35/AN5/INT15
P36/AN6/INT16
P37/AN7/INT17
*P44
*P45
X1A
X0A
*P46/SCL
*P47/SDA
SS
V
(Continued)
*P01
*P00
VCC
VSSX0X1
(TOP VIEW)
MOD0
RST
P84
P83
P82/SCK1
P81/SO1
P80/SI1
P77/SEG31
P76/SEG30
P75/SEG29
P74/SEG28
P73/SEG27
P72/SEG26
P71/SEG25
P70/SEG24
MB89490 Series
P67/SEG23
P66/SEG22
P65/SEG21
P64/SEG20
*P02
*P03
*P04
*P05
*P06
*P07
P10/INT00
P11/INT01
P12/INT02
P13/INT03
P14/INT04
P15/INT05
P16/INT06
P17/INT07
P20/TO0
P21/RMC
P22/EC0
P23
P24/TO1
P25/EC1
P26/PWM0
P27/PWM1
P50/SI0
P51/SO0
P52/SCK0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
9998979695949392919089888786858483828180797877
100
26272829303132333435363738394041424344454647484950
X1A
AVR
AVSS
AVCC
*P40
*P41
*P42
*P43
*P44
*P45
X0A
*P46/SCL
*P47/SDA
SS
V
VCC
V3
76
V2
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P63/SEG19
P62/SEG18
P61/SEG17
P60/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
P54/COM3
P53/COM2
COM1
COM0
V1
* : High current pins
P30/AN0/INT10
P31/AN1/INT11
P32/AN2/INT12
P33/AN3/INT13
P34/AN4/INT14
P35/AN5/INT15
P36/AN6/INT16
(FPT-100P-M05)
P37/AN7/INT17
(Continued)
7
MB89490 Series
(Continued)
VCC
P23
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
*P00
*P01
*P02
*P03
*P04
*P05
*P06
*P07
P10/INT00
P11/INT01
P12/INT02
P13/INT03
P14/INT04
P15/INT05
P16/INT06
P17/INT07
P20/TO0
P21/RMC
P22EC0
P24/TO1
P25/EC1
P26/PWM0
P27/PWM1
P50/SI0
P51/SO0
P52/SCK0
AVR
AV
(TOP VIEW)
VSSX0X1
MOD0
RST
P84
P83
P82/SCK1
P81/SO1
P80/SI1
P77/SEG31
P76/SEG30
P75/SEG29
P74/SEG28
P73/SEG27
P72/SEG26
P71/SEG25
P70/SEG24
P67/SEG23
99989796959493929190898887868584838281
100
120
119
118
117
116
115
114
121
122
123
124
125
126
127
128
129
130
131
31323334353637383940414243444546474849
132
101
102
113
112
111
110
109
108
107
106
105
103
104
P66/SEG22
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
P65/SEG21
P64/SEG20
P63/SEG19
P62/SEG18
P61/SEG17
P60/SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
P54/COM3
P53/COM2
COM1
COM0
V1
V2
V3
V
CC
SS
V
X1A
X0A
*P46/SCL
*P47/SDA
* : High current pins
AVSS
P30/AN0/INT10
P31/AN1/INT11
P32/AN2/INT12
P33/AN3/INT13
P34/AN4/INT14
(MQP-100C-P01)
*P40
*P41
*P42
P35/AN5/INT15
P36/AN6/INT16
P37/AN7/INT17
*P43
*P44
*P45
Pin assignment on package top (MB89PV490 only)
Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name
101 N.C. 108 A3 115 O3 122 O8 129 A8
102 A15 109 A2 116 V
SS 123 CE 130 A13
103 A12 110 A1 117 N.C. 124 A10 131 A14
104 A7 111 A0 118 O4 125 OE
132 VCC
105 A6 112 N.C. 119 O5 126 N.C.
106 A5 113 O1 120 O6 127 A11
107 A4 114 O2 121 O7 128 A9
N.C. : As connected internally, do not use.
8
PIN DESCRIPTION
■
MB89490 Series
Pin number
MQFP*
QFP*
1
/
2
LQFP*
3
Pin name
99 96 X0
98 95 X1
49 46 X0A
48 45 X1A
97 94 MOD0 B
I/O circuit
type
A
A
Function
Connection pins for a crystal or other oscillator circuit.
An external clock can be connected to X0. In this case, leave
X1 open.
Connection pins for a crystal or other oscillator circuit.
An external clock can be connected to X0A. In this case, leave
X1A open.
Input pin for setting the memory access mode.
Connect directly to V
SS.
95, 94 92, 91 P84, P83 J General-purpose CMOS input port.
Reset I/O pin. The pin is an N-ch open-drain type with pull-up
96 93 RST
C
resistor and hysteresis input. The pin outputs an “L” level when
an internal reset request is present. Inputting an “L” level initializes internal circuits.
2 to 9 99 to 6 P00 to P07 D General-purpose CMOS I/O port.
P10/INT00
10 to 17 7 to 14
to
P17/INT07
18 15 P20/TO0 F
E
General-purpose CMOS I/O port.
The pin is shared with external interrupt 0 input.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 00 and 01 output.
19 16 P21/RMC E
20 17 P22/EC0 E
General-purpose CMOS I/O port.
The pin is shared with remote receiver input.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 00 and 01 input.
21 18 P23 F General-purpose CMOS I/O port.
22 19 P24/TO1 F
23 20 P25/EC1 E
24 21 P26/PWM0 F
25 22 P27/PWM1 F
P30/AN0/INT10
32 to 39 29 to 36
to
P37/AN7/INT17
G
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 10 and 11 output.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 10 and 11 input.
General-purpose CMOS I/O port.
The pin is shared with PWM0 output.
General-purpose CMOS I/O port.
The pin is shared with PWM1 output.
General-purpose CMOS I/O port.
The pin is shared with external interrupt 1 input and A/D
converter input.
40 to 45 37 to 42 P40 to P45 H General-purpose N-ch open-drain I/O port.
46 43 P46/SCL H
General-purpose N-ch open-drain I/O port.
The pin is shared with I
2
C clock I/O.
(Continued)
9
MB89490 Series
(Continued)
Pin number
1
2
/
LQFP*
MQFP*
QFP*
47 44 P47/SDA H
Pin name
3
I/O circuit
type
Function
General-purpose N-ch open-drain I/O port.
The pin is shared with I
2
C data I/O.
26 23 P50/SI0 E
27 24 P51/SO0 F
28 25 P52/SCK0 E
57 54 P53/COM2 F/I
58 55 P54/COM3 F/I
P60/SEG16
75 to 82 72 to 79
to
P67/SEG23
P70/SEG24
83 to 90 80 to 87
to
P77/SEG31
91 88 P80/SI1 E
92 89 P81/SO1 F
93 90 P82/SCK1 E
F/I
F/I
General-purpose CMOS I/O port.
The pin is shared with SIO data input.
General-purpose CMOS I/O port.
The pin is shared with SIO data output.
General-purpose CMOS I/O port.
The pin is shared with SIO clock I/O.
General-purpose CMOS I/O port.
The pin is shared with the LCD common output.
General-purpose CMOS I/O port.
The pin is shared with the LCD common output.
General-purpose CMOS I/O port.
The pin is shared with LCD segment output.
General-purpose CMOS I/O port.
The pin is shared with LCD segment output.
General-purpose CMOS I/O port.
The pin is shared with UART/SIO data input.
General-purpose CMOS I/O port.
The pin is shared with UART/SIO data output.
General-purpose CMOS I/O port.
The pin is shared with UART/SIO clock I/O.
59 to 74 56 to 71
55, 56 52, 53
54, 53, 5251, 50,
49
1, 51 98, 48 V
50, 100 47, 97 V
30 27 AV
29 26 AVR A/D converter reference voltage input pin.
31 28 AV
*1 : MQP-100C-P01
*2 : FPT-100P-M06
*3 : FPT-100P-M05
10
SEG0 to
SEG15
COM0,
COM1
I LCD segment output-only pin.
I LCD common output-only pin.
V1 to V3 LCD driving power supply pin.
CC Power supply pin.
SS Power supply pin (GND) .
CC A/D converter power supply pin.
SS
A/D converter power supply pin.
Use at the same voltage level as VSS.
MB89490 Series
•
External EPROM Socket (MB89PV490 only)
Pin number
MQFP*
102
131
130
103
127
124
128
129
104
105
106
107
108
109
110
111
122
121
120
119
118
115
114
113
101
112
117
126
Pin name I/O Function
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
O8
O7
O6
O5
O4
O3
O2
O1
N.C. Internally connected pins. Always leave open.
O Address output pins.
I Data input pins.
116 V
123 CE
125 OE O Output enable pin for the EPROM. Always outputs “L”.
132 V
* : MQP-100C-P01
SS O Power supply pin (GND) .
O Chip enable pin for the EPROM. Outputs “H” in standby mode.
CC O Power supply pin for the EPROM.
11
MB89490 Series
I/O CIRCUIT TYPE
■
Type Circuit Remarks
X1 (X1A)
N-ch
P-ch
X0 (X0A)
P-ch
A
N-ch
Stop mode control signal
B
R
R
P-ch
N-ch
• Main/Sub-clock circuit
• Hysteresis input
(CMOS input in MB89F499)
• The pull-down resistor
(not available in MB89F499)
Approx. 50 kΩ
• The pull-up resistor (P-channel)
Approx. 50 kΩ
• Hysteresis input
C
N-ch
R
P-ch
P-ch
pull-up
resistor register
D
N-ch
port
• CMOS output
•I
OH = − 4 mA, IOL = 12 mA
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
• CMOS output
R
P-ch
pull-up
resistor register
P-ch
•I
OH = − 2 mA, IOL = 4 mA
• CMOS port input
• Hysteresis resource input
• Selectable pull-up resistor
E
N-ch
Approx. 50 kΩ
12
port
resource
(Continued)
MB89490 Series
(Continued)
Type Circuit Remarks
• CMOS output
pull-up
resistor register
P-ch
R
P-ch
F
N-ch
port
•I
OH = − 2 mA, IOL = 4 mA
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
• CMOS output
P-ch
R
P-ch
pull-up
resistor register
OH = − 2 mA, IOL = 4 mA
•I
• CMOS port input
•V
IH = 0.85 VCC, VIL = 0.5 VCC resource input
• Analog input
G
N-ch
• Selectable pull-up resistor
Approx. 50 kΩ
port
resource
analog
• N-ch open-drain output
•I
OL = 15 mA
H
N-ch
port/resource
• CMOS port input
• CMOS resource input
•5 V tolerance
• LCD segment output
P-ch
N-ch
I
P-ch
N-ch
• CMOS input
J
13
MB89490 Series
HANDLING DEVICES
■
1. Preventing Latch-up
Latch-up may occur on CMOS IC if voltage higher than VCC or lo wer than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in “■ ELECTRICAL CHARACTERISTICS” is applied between V
When latch-up occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the maximum ratings.
Also, take care to prevent the analog power supply (AV
power supply (V
CC) when the analog system power supply is turned on and off.
CC and AVR) and analog input from exceeding the digital
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. The y should be connected to a pull-up or pull-do wn
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D
Connect to be AVCC = VCC and AVSS = AVR = VSS even if the A/D is not in use.
CC and VSS.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Stabilization
Although VCC power supply voltage is assured to oper ate within the rated range, a rapid fluctuation of the v oltage
could cause malfunctions, even if it occurs within the r ated range. As stabilization guidelines, it is recommended
to control voltage fluctuation so that V
value at the commercial frequency (50 Hz to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms
at the time of a momentary fluctuation such as when power is switched.
CC ripple fluctuations (P-P value) will be less than 10% of the standard VCC
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset and wake-up
from stop mode.
7. Treatment of Unused dedicated LCD pins
When dedicated LCD pins are not in use, keep them open.
14
MB89490 Series
PROGRAMMING AND ERASING FLASH MEMORY ON THE MB89F499
■
1. Flash Memory
The flash memory is located between 1000H and FFFFH in the CPU memor y map and incorporates a flash
memory interface circuit that allows read access and program access from the CPU to be perf ormed in the same
way as mask ROM. Programming and erasing flash memory is also performed via the flash memory interface
circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the
control of the internal CPU, providing an efficient method of updating program and data.
2. Flash Memory Features
• 60K bytes × 8-bit configuration (16 K + 8 K + 8 K + 28 K sectors)
• Automatic algorithm (Embedded algorithm* : Equivalent to MBM29LV200)
• Includes an erase pause and erase restart function
• Data polling and toggle bit for detection of program/erase completion
• Detection of program/erase completion via CPU interrupt
• Compatible with JEDEC-standard commands
• Sector Protection (sectors can be combined in any combination)
• No. of program/erase cycles : 10,000 (Min)
* : Embedded Algorithm is a trademark of Advanced Micro Devices.
3. Procedure for Programming and Erasing Flash Memory
Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or
erase data to the flash memory, the program must first be copied from flash memory to RAM so that programming
can be performed without program access from flash memory.
4. Flash Memory Register
• Flash memory control status register (FMCS)
Address
007A
H
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTE RDYINT WE RDY Reserved Reserved
R/W R/W R/W R R/W R/W R/W
Reserved
Initial value
000X00-0
B
15
MB89490 Series
5. Sector Configuration
The table below shows the sector configuration of flash memory and lists the addresses of each sector during
CPU access and a flash memory programming.
• Sector configuration of flash memory
Flash Memory CPU Address Programmer Address*
16 K bytes FFFF
8 K bytes BFFFH to A000H 1BFFFH to 1A000H
8 K bytes 9FFFH to 8000H 19FFFH to 18000H
28 K bytes 7FFFH to 1000H 17FFFH to 11000H
* : The programmer address is the address to be used instead of the CPU address when programming data from
a parallel flash memory programmer. Use the prog rammer address on programming or erasing using a gener alpurpose programmer.
H to C000H 1FFFFH to 1C000H
6. ROM Programmer Adaptor and Recommended ROM Programmers
Package
FPT-100P-M06 FLASH-100QF-32DP-8LF2
FPT-100P-M05 FLASH-100SQF-32DP-8LF
* : For the programmer and the version of the programmer,contact the Flash Support Group, Inc.
Inquirues : Sunhayato Corp. : TEL : 81-(3)-3984-7791
Flash Support Group, Inc. : FAX : 81-(53)-428-8377
Applicable adapter model Recommended writer
Sunhayato Corp. Ando Electric Co. Ltd.
AF9708 (ver 1.60 or later) *
AF9709 (ver 1.60 or later) *
FAX : 81-(3)-3971-0535
E-mail : adapter@sunhayato.co.jp
E-mail : support@j-fsg.co.jp
16
MB89490 Series
PROGRAMMING TO THE EPROM WITH PIGGY-BACK/EVALUATION DEVICE
■
1. EPROM for Use
MBM27C512-20TV
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer : Sunhayato
Corp.) .
Package Adapter socket part number
LCC-32 (Rectangle) ROM-32LC-28DP-YG
Inquiry : Sunhayato Corp. : TEL : 81-3-3984-7791
FAX : 81-3-3971-0535
E-mail : adapter@sunhayato.co.jp
3. Memory Space
Memory space corresponding to EPROM writer is shown in the diagram below.
Address Corresponding addresses
0000H
0080H
0880H
1000H 1000H
FFFFH FFFFH
Normal operating mode
I/O
RAM
Not available
PROM
60 KB
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C512.
(2) Load program data into the EPROM programmer at 1000
(3) Program to 1000
H to FFFFH with the EPROM programmer.
on the EPROM programmer
EPROM
60 KB
H to FFFFH.
ICE PROBE POD ADAPTOR OF PIGGY-BACK/EVA CHIP
■
The following conversion adapter is required to achieve the same pin layout as the FPT-100P-M05.
Adaptor part number: 100QF-100SQF-8L
Inquiry : Sunhayato Corp. : TEL : 81-3-3984-7791
FAX : 81-3-3971-0535
E-mail : adapter@sunhayato.co.jp
17
MB89490 Series
BLOCK DIAGRAM
■
X0A
X1A
RST
P23
P26/PWM0
P27/PWM1
P21/RMC
P22/EC0
P20/TO0
P25/EC1
P24/TO1
P17/INT07 to
P10/INT00
P07 to P00
ROM 48 K bytes/FLASH 60 K bytes
X0 Main clock
X1
8
8
Port0*
RAM (2 K bytes)
oscillator circuit
Clock controller
Sub-clock
oscillator circuit
Reset circuit
(Watchdog timer)
Watch prescaler
CMOS I/O port
8-bit PWM timer 0
8-bit PWM timer 1
Port2
Remote receiver circuit
timer/counter 00, 01
timer/counter 10, 11
8
External interrupt 0
CMOS I/O port
Port1
CMOS I/O port
2
F
MC-8L
CPU
8/16-bit
8/16-bit
(edge)
21-bit timebase
timer
10-bit
A/D converter
CMOS I/O port
External interrupt 1
(level)
I
N-ch open-drain I/O port
CMOS I/O port
Internal data bus
UART/SIO
SIO
CMOS I/O port
LCD controller/driver
32 × 4-bit display
RAM (16 bytes)
CC
AV
AVSS
AVR
8
P37/AN7/INT17
8
to
P30/AN0/INT10
Port3
8
Port4*
6
Port8
Port5
2
16
2
3
8
8
Port6, 7
P47/SDA
P46/SCL
P45 to P40
P84
P83
P82/SCK1
P81/SO1
P80/SI1
P52/SCK0
P51/SO0
P50/SI0
P54/COM3,
P53/COM2
SEG0
to SEG15
COM0,
COM1
V1 to V3
P67/SEG23
to P60/SEG16
P77/SEG31
to P70/SEG24
2
C
2
16
* : High current I/O port.
18
Other pins
V
CC × 2, VSS × 2, MOD0
CMOS I/O port
Loading...