The MB89490 series has been developed as a general-purpose version of the F2MC*-8L family consisting of
proprietary 8-bit single-chip microcontrollers.
DS07-12560-1E
In addition to a compact instruction set, the general-purpose, single-chip microcontroller contains a variety of
peripheral functions such as 21-bit timebase timer, watch prescaler, PWM timer, 8/16-bit timer/counter, remote
receiver circuit, LCD controller/driver, e xternal interrupt 0 (edge) , external interrupt 1 (level) , 10-bit A/D converter,
UART/SIO, SIO, I
The MB89490 series is designed suitable for compact disc/radio receiver controller as well as in a wide range of
applications for consumer product.
2
* : “F
MC”, an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd.
FEATURES
■
• Package
QFP, LQFP package for MB89F499, MB89498
MQFP package for MB89PV490
• 10-bit A/D converter (8 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capability
•SIO
Switching of synchronous data transfer capability
• LCD controller/driver
Max 32 segments output × 4 commons
2
•I
C interface circuit
• Remote receiver circuit
• Low-power consumption mode
Stop mode (oscillation stops so as to minimize the current consumption.)
Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)
Watch mode (operation except the watch prescaler stops so as to reduce the power comsumption to an
extremely low level.)
Sub-clock mode
• Watchdog timer reset
• I/O ports : Max 66 channels
16-bit arithmetic operations
Branch instructions by test bit
Bit manipulation instructions, etc.
2
PRODUCT LINEUP
■
MB89490 Series
Part number
Parameter
Classification
ROM size
RAM size2 K × 8-bit2 K × 8-bit2 K × 8-bit
CPU functions
Ports
21-bit timebase
timer
Watchdog timerReset generation cycle (167.8 ms to 335.5 ms) at 12.5 MHz
Mass production products
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Minimum interrupt processing time
General-purpose I/O ports (CMOS)
Input ports (CMOS)
N-channel open drain I/O ports
Total
8-bit reload timer operation (supports square wave output and operating clock period :
1 t
inst, 8 tinst, 16 tinst, 64 tinst )
8-bit accuracy PWM operation
Can be operated either as a 2-channel 8-bit timer/counter (timer 00 and timer 01, each
with its own independent operating clock) , or as one 16-bit timer/counter.
In timer 00 or 16-bit timer/counter operation, event counter operation by external clock
input and square wave output capability
Can be operated either as a 2-channel 8-bit timer/counter (timer 10 and timer 11, each
with its own independent operating clock) , or as one 16-bit timer/counter.
In timer 10-bit or 16-bit timer/counter operation, event counter operation by external clock
input and square wave output capability
A/D conversion function (conversion time : 30 t
Supports repeated activation by internal clock
Common output
Segment output
LCD driving power (bias) pins
LCD display RAM size
: 4 (Max)
: 32 (Max)
: 3
: 32 × 4 bits
inst )
(Continued)
3
MB89490 Series
(Continued)
Parameter
UART/SIO
SIO
2C*2
I
Part number
Synchronous/asynchronous data transfer capability
(Max baud rate : 97.656 Kbps at 12.5 MHz)
(7-bit and 8-bit with parity bit; 8-bit and 9-bit without parity bit)
8-bit serial I/O with LSB first/MSB first selectability
1 clock selectable from 4 operation clock (1 external shift clock and 3 internal shift clock :
0.64 µs, 2.56 µs, 10.24 µs at 12.5 MHz)
1 channel
(Use a 2-wire protocol to communicate with other device)
MB89498MB89F499MB89PV490
Remote receiver
circuit
Standby modeSleep mode, stop mode, watch mode and sub-clock mode
ProcessCMOS
Operating voltage2.2 V to 3.6 V2.7 V to 3.6 V2.7 V to 3.6 V
*1 : Use MBM27C512 as the external ROM.
2
*2 : I
C is complied to Philips I2C specification.
Selectable maximum noise width removal
Reversible input polarity
4
PACKAGE AND CORRESPONDING PRODUCTS
■
MB89490 Series
Part number
Parameter
FPT-100P-M06OO×
FPT-100P-M05OO×
MQP-100C-P01××O
O : Availabe
× : Not available
DIFFERENCES AMONG PRODUCTS
■
MB89498MB89F499MB89PV490
1.Memory Size
Before e v aluating using the pigg y-back product, v erify its diff erences from the product that will be actually used.
Take particular care on the following point : The stack area is set at the upper limit of the RAM.
2.Current Consumption
• For the MB89PV490, add the current consumed by the EPROM mounted in the piggy-back socket.
• When operating at low speed, the current consumed by the FLASH product is greater than that for the mask
ROM product. However, the current consumption is roughly the same in sleep and stop mode.
• For more information, see “■ ELECTRICAL CHARACTERISTICS.”
3.Oscillation Stabilization Wait Time after Power-on Reset
• For MB89PV490 and MB89F499, the pow er-on stabilization wait time cannot be selected after power-on reset.
• For MB89498, the power-on stabilization wait time can be selected after power-on reset.
• For more information, please refer to “■ MASK OPTIONS”.
Reset I/O pin. The pin is an N-ch open-drain type with pull-up
9693RST
C
resistor and hysteresis input. The pin outputs an “L” level when
an internal reset request is present. Inputting an “L” level initializes internal circuits.
2 to 999 to 6P00 to P07DGeneral-purpose CMOS I/O port.
P10/INT00
10 to 17 7 to 14
to
P17/INT07
1815P20/TO0F
E
General-purpose CMOS I/O port.
The pin is shared with external interrupt 0 input.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 00 and 01 output.
1916P21/RMCE
2017P22/EC0E
General-purpose CMOS I/O port.
The pin is shared with remote receiver input.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer/counter 00 and 01 input.
116V
123CE
125OEOOutput enable pin for the EPROM. Always outputs “L”.
132V
* : MQP-100C-P01
SSOPower supply pin (GND) .
OChip enable pin for the EPROM. Outputs “H” in standby mode.
CCOPower supply pin for the EPROM.
11
MB89490 Series
I/O CIRCUIT TYPE
■
TypeCircuitRemarks
X1 (X1A)
N-ch
P-ch
X0 (X0A)
P-ch
A
N-ch
Stop mode control signal
B
R
R
P-ch
N-ch
• Main/Sub-clock circuit
• Hysteresis input
(CMOS input in MB89F499)
• The pull-down resistor
(not available in MB89F499)
Approx. 50 kΩ
• The pull-up resistor (P-channel)
Approx. 50 kΩ
• Hysteresis input
C
N-ch
R
P-ch
P-ch
pull-up
resistor register
D
N-ch
port
• CMOS output
•I
OH=− 4 mA, IOL= 12 mA
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
• CMOS output
R
P-ch
pull-up
resistor register
P-ch
•I
OH=− 2 mA, IOL= 4 mA
• CMOS port input
• Hysteresis resource input
• Selectable pull-up resistor
E
N-ch
Approx. 50 kΩ
12
port
resource
(Continued)
MB89490 Series
(Continued)
TypeCircuitRemarks
• CMOS output
pull-up
resistor register
P-ch
R
P-ch
F
N-ch
port
•I
OH=− 2 mA, IOL= 4 mA
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
• CMOS output
P-ch
R
P-ch
pull-up
resistor register
OH=− 2 mA, IOL= 4 mA
•I
• CMOS port input
•V
IH= 0.85 VCC, VIL= 0.5 VCC resource input
• Analog input
G
N-ch
• Selectable pull-up resistor
Approx. 50 kΩ
port
resource
analog
• N-ch open-drain output
•I
OL= 15 mA
H
N-ch
port/resource
• CMOS port input
• CMOS resource input
•5 V tolerance
• LCD segment output
P-ch
N-ch
I
P-ch
N-ch
• CMOS input
J
13
MB89490 Series
HANDLING DEVICES
■
1.Preventing Latch-up
Latch-up may occur on CMOS IC if voltage higher than VCC or lo wer than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in “■ ELECTRICAL CHARACTERISTICS” is applied between V
When latch-up occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the maximum ratings.
Also, take care to prevent the analog power supply (AV
power supply (V
CC) when the analog system power supply is turned on and off.
CC andAVR) and analog input from exceeding the digital
2.Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. The y should be connected to a pull-up or pull-do wn
resistor.
3.Treatment of Power Supply Pins on Microcontrollers with A/D
Connect to be AVCC= VCC and AVSS= AVR = VSS even if the A/D is not in use.
CC and VSS.
4.Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5.Power Supply Voltage Stabilization
Although VCC power supply voltage is assured to oper ate within the rated range, a rapid fluctuation of the v oltage
could cause malfunctions, even if it occurs within the r ated range. As stabilization guidelines, it is recommended
to control voltage fluctuation so that V
value at the commercial frequency (50 Hz to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms
at the time of a momentary fluctuation such as when power is switched.
CC ripple fluctuations (P-P value) will be less than 10% of the standard VCC
6.Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset and wake-up
from stop mode.
7.Treatment of Unused dedicated LCD pins
When dedicated LCD pins are not in use, keep them open.
14
MB89490 Series
PROGRAMMING AND ERASING FLASH MEMORY ON THE MB89F499
■
1.Flash Memory
The flash memory is located between 1000H and FFFFH in the CPU memor y map and incorporates a flash
memory interface circuit that allows read access and program access from the CPU to be perf ormed in the same
way as mask ROM. Programming and erasing flash memory is also performed via the flash memory interface
circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the
control of the internal CPU, providing an efficient method of updating program and data.
2.Flash Memory Features
• 60K bytes × 8-bit configuration (16 K + 8 K + 8 K + 28 K sectors)
• Automatic algorithm (Embedded algorithm* : Equivalent to MBM29LV200)
• Includes an erase pause and erase restart function
• Data polling and toggle bit for detection of program/erase completion
• Detection of program/erase completion via CPU interrupt
• Compatible with JEDEC-standard commands
• Sector Protection (sectors can be combined in any combination)
• No. of program/erase cycles : 10,000 (Min)
* : Embedded Algorithm is a trademark of Advanced Micro Devices.
3.Procedure for Programming and Erasing Flash Memory
Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or
erase data to the flash memory, the program must first be copied from flash memory to RAM so that programming
can be performed without program access from flash memory.
4.Flash Memory Register
• Flash memory control status register (FMCS)
Address
007A
H
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
INTERDYINTWERDYReserved Reserved
R/WR/WR/WRR/WR/WR/W
Reserved
Initial value
000X00-0
B
15
MB89490 Series
5.Sector Configuration
The table below shows the sector configuration of flash memory and lists the addresses of each sector during
CPU access and a flash memory programming.
• Sector configuration of flash memory
Flash MemoryCPU AddressProgrammer Address*
16 K bytesFFFF
8 K bytesBFFFH to A000H1BFFFH to 1A000H
8 K bytes9FFFH to 8000H19FFFH to 18000H
28 K bytes7FFFH to 1000H17FFFH to 11000H
* : The programmer address is the address to be used instead of the CPU address when programming data from
a parallel flash memory programmer. Use the prog rammer address on programming or erasing using a gener alpurpose programmer.
H to C000H1FFFFH to 1C000H
6.ROM Programmer Adaptor and Recommended ROM Programmers
The microcontrollers of the MB89490 series offer a memory space of 64K bytes for storing all of I/O, data, and
program areas. The I/O area is located the lowest address. The data area is provided immediately above the
I/O area. The data area can be divided into register, stack, and direct areas according to the application. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt/reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89490 series is structured as illustrated below.
The F2MC-8L family has 2 types of registers; dedicated registers in the CPU and general-purpose registers in
the memory. The following registers are provided :
Program counter (PC) : A 16-bit register for indicating instruction storage positions.
Accumulator (A) : A 16-bit temporary register for storing arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register for performing arithmetic operations with the accumulator.
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Index register (IX) : A 16-bit register for index modification.
Extra pointer (EP) : A 16-bit pointer for indicating a memory address.
Stack pointer (SP) : A 16-bit register for indicating a stack area.
Program status (PS) : A 16-bit register for storing a register pointer and condition code.
16-bit
PC
A
T
IX
EP
SP
PS
: Program counter
: Accumulator
: Temporary accumulator
: Index register
: Extra pointer
: Stack pointer
: Program status
Initial value
FFFD
H
Undefined
Undefined
Undefined
Undefined
Undefined
I-flag = 0, IL1, 0 = 11
Other bits are undefined.
The PS can further be divided into higher 8-bit for use as a register bank pointer (RP) and the lower 8-bit for
use as a condition code register (CCR) . (See the diagram below.)
Structure of the Program Status Register
10987632101514131211
Va-
Va-
RPPS
Va-
cancy
cancy
HIIL1, 0NZVC
cancy
54
20
RPCCR
MB89490 Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Conversion rule for Actual Addresses of the General-purpose Register Area
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for controlling the CPU operations at the time of an interrupt.
H-flag : Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Clear
to “0” otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is allowed when this flag is set to “1”. Interrupt is prohibited when the flag is set to “0”. Clear to
“0” at reset.
IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request is higher
N-flag : Set to “1” if the MSB is set to “1” as the result of an arithmetic operation. Clear to “0” otherwise.
Z-flag : Set to “1” when an arithmetic operation results in “0”. Clear to “0” otherwise.
V-flag : Set to “1” if the complement on 2 overflows as a result of an arithmetic operation. Clear to “0” if the
overflow does not occur.
C-flag : Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Clear to “0”
otherwise. Set to the shift-out value in the case of a shift instruction.
Low
21
MB89490 Series
The following general-purpose registers are provided :
General-purpose registers : An 8-bit register for storing data
The general-purpose registers are 8-bit and located in the register banks of the memory.
1 bank contains 8 registers. Up to a total of 32 banks can be used on the MB89490 series. The bank currently
in use is indicated by the register bank pointer (RP) .
Register Bank Configuration
This address = 0100H+ 8 × (RP)
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
32 banks
Memory area
22
MB89490 Series
I/O MAP
■
AddressRegister nameRegister descriptionRead/WriteInitial value
00
HPDR0Port 0 data registerR/WXXXXXXXXB
01HDDR0Port 0 direction registerW*00000000B
02HPDR1Port 1 data registerR/WXXXXXXXXB
03HDDR1Port 1 direction registerW*00000000B
04HPDR2Port 2 data registerR/W00000000B
05H (Reserved)
06
HDDR2Port 2 direction registerR/W00000000B
07HSYCCSystem clock control registerR/WX-1MM100B
08HSTBCStandby control registerR/W00010XXXB
09HWDTCWatchdog timer control registerW*0---XXXXB
0AHTBTCTimebase timer control registerR/W00---000B
0BHWPCRWatch prescaler control registerR/W00--0000B
0CHPDR3Port 3 data registerR/WXXXXXXXXB
0DHDDR3Port 3 direction registerR/W11111111B
0EHRSFRReset flag registerRXXXX----B
0FHPDR4Port 4 data registerR/W11111111B
10HPDR5Port 5 data registerR/W---XXXXXB
11HDDR5Port 5 direction registerR/W---00000B
12HPDR6Port 6 data registerR/WXXXXXXXXB
13HDDR6Port 6 direction registerR/W00000000B
14HPDR7Port 7 data registerR/WXXXXXXXXB
15HDDR7Port 7 direction registerR/W00000000B
16HPDR8Port 8 data registerR/W---XXXXXB
17HDDR8Port 8 direction registerR/W---00000B
18HEIC0External interrupt 0 control register 0R/W00000000B
19HEIC1External interrupt 0 control register 1R/W00000000B
1AHEIC2External interrupt 0 control register 2R/W00000000B
1BHEIC3External interrupt 0 control register 3R/W00000000B
1CHEIE1External interrupt 1 enable registerR/W00000000B
1DHEIF1External interrupt 1 flag registerR/W-------0B
1EHSMRSerial mode registerR/W00000000B
1FHSDRSerial data registerR/WXXXXXXXXB
20HT01CRTimer 01 control registerR/W000000X0B
21HT00CRTimer 00 control registerR/W000000X0B
22HT01DRTimer 01 data registerR/WXXXXXXXXB
(Continued)
23
MB89490 Series
AddressRegister nameRegister descriptionRead/WriteInitial value
23
HT00DRTimer 00 data registerR/WXXXXXXXXB
24HT11CRTimer 11 control registerR/W000000X0B
25HT10CRTimer 10 control registerR/W000000X0B
26HT11DRTimer 11 data registerR/WXXXXXXXXB
27HT10DRTimer 10 data registerR/WXXXXXXXXB
28HADERA/D input enable registerR/W11111111B
29HADC0A/D control register 0R/W-00000X0B
2AHADC1A/D control register 1R/W-0000001B
2BHADDHA/D data register (Upper byte) R------XXB
2CHADDLA/D data register (Lower byte) RXXXXXXXXB
2DHCNTR0PWM 0 timer control registerR/W0-000000B
2EHCOMR0PWM 0 timer compare registerW*XXXXXXXXB
2FHSMC0UART/SIO serial mode control registerR/W00000000B
30HSMC1UART/SIO serial mode control registerR/W00000000B
31HSSDUART/SIO serial status/data registerR/W00001---B
32HSIDR/SODRUART/SIO serial data registerR/WXXXXXXXXB
33HSRCUART/SIO serial rate control registerR/WXXXXXXXXB
34HCNTR1PWM 1 timer control registerR/W0-000000B
35HCOMR1PWM 1 timer compare registerW*XXXXXXXXB
36HIBSRI2C bus status registerR00000000B
37HIBCRI2C bus control registerR/W00000000B
38HICCRI2C clock control registerR/W000XXXXXB
39HIADRI2C address registerR/W-XXXXXXXB
3AHIDARI2C data registerR/WXXXXXXXXB
3BHPLLCRSub PLL control registerR/W----0000B
3CH to 3FH (Reserved)
40HRMNRemote control counter registerRXXXXXXXXB
41HRMCRemote control control registerR/W00000000B
42HRMSRemote control status registerR/W0X000001B
43HRMDRemote control FIFO data registerRX----XXXB
44HRMCD0Remote control compare register 0R/W11111111B
45HRMCD1Remote control compare register 1R/W11111111B
24
46HRMCD2Remote control compare register 2R/W11111111B
47HRMCD3Remote control compare register 3R/W11111111B
48HRMCD4Remote control compare register 4R/W11111111B
(Continued)
MB89490 Series
(Continued)
AddressRegister nameRegister descriptionRead/WriteInitial value
49
HRMCD5Remote control compare register 5R/W11111111B
4AHRMCIRemote interrupt registerR/W0000-000B
4BH to 5DH (Reserved)
5E
HLOCRLCD controller output control registerR/W-0000000B
5FHLCRLCD controller control registerR/W00010000B
60H to 6FHVRAMLCD data RAMR/WXXXXXXXXB
70HPUCR0Port 0 pull up resistor control registerR/W11111111B
71HPUCR1Port 1 pull up resistor control registerR/W11111111B
72HPUCR2Port 2 pull up resistor control registerR/W11111111B
73HPUCR3Port 3 pull up resistor control registerR/W11111111B
74HPUCR5Port 5 pull up resistor control registerR/W---11111B
75HPUCR6Port 6 pull up resistor control registerR/W11111111B
76HPUCR7Port 7 pull up resistor control registerR/W11111111B
77HPUCR8Port 8 pull up resistor control registerR/W-----111B
78H to 79H (Reserved)
7A
HFMCSFlash memory control status registger R/W000X00-0B
R/W : Readable and writable
R : Read-only
W : Write-only
•
Initial value symbols
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is undefined.
- : Unused bit.
M : The initial value of this bit is determined by mask option.
25
MB89490 Series
ELECTRICAL CHARACTERISTICS
■
1.Absolute Maximum Ratings
Parameter
Symbol
Rating
UnitRemarks
MinMax
Power supply voltage*
VCC
1
AVCC
VSS− 0.3VSS+ 4.0VAVCC must be equal to VCC
AVRVSS− 0.3VSS+ 4.0V
LCD power supply voltage V1 to V3V
SS− 0.3VCCV
VSS− 0.3VCC+ 0.3VExcept P40 to P47
Input voltage *
Output voltage*
Maximum clamp currentI
1
1
VI
VOVSS− 0.3VCC+ 0.3V
CLAMP− 2.0+ 2.0mA*2
Total maximum clamp currentΣ|I
CLAMP|20mA*2
V
SS− 0.3VSS+ 6.0V
V
SS− 0.3VSS+ 5.5VP40 to P47 in MB89F499
“L” level maximum output current IOL15mA
“L” level average output current I
“L” level total maximum output
current
“L” level total average output
current
OLAV4mA
ΣI
OL100mA
ΣI
OLAV40mA
“H” level maximum output current IOH− 15mA
P40 to P47 in MB89PV490 and
MB89498
Average value (operating current ×
operating rate)
Average value (operating current ×
operating rate)
“H” level average output currentI
“H” level total maximum output
current
“H” level total average output
current
Power consumption P
Operating temperature T
OHAV− 4mA
ΣI
OH− 50mA
ΣIOHAV− 20mA
D300mW
A− 40+ 85 °C
Average value (operating current ×
operating rate)
Average value (operating current ×
operating rate)
Storage temperatureTstg− 55+ 150°C
*1 : The parameter is based on AVSS= VSS= 0.0 V.
*2 : • Applicable to pins : P00 to P07, P10 to P17, P20 to P27, P30 to P37, P50 to P52, P80 to P82
• Use within recommended operating conditions.
• Use at DC voltage (current) .
• The +B signal should always be applied with a limiting resistance placed between the +B signal and the
microcontroller.
• The value of the limiting resistance should be set so that when the +B signal is applied the input current to
the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.
(Continued)
26
MB89490 Series
(Continued)
• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input
potential may pass through the protective diode and increase the potential at the V
other devices.
• Note that if a +B signal is input when the microcontroller current is off (not fixed at 0 V) , the power supply is
provided from the pins, so that incomplete operation may result.
• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the
resulting supply voltage may not be sufficient to operate the power-on result.
• Care must be taken not to leave the +B input pin open.
• Note that analog system input/output pins other than the A/D input pins (LCD drive pins, comparator input pins, etc.) cannot accept +B signal input.
• Sample recommended circuits :
• Input/Output Equivalent circuits
Protective diode
CC pin, and this may affect
Limiting
resistance
VCC
P-ch
+B input (0 V to 16 V)
N-ch
R
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
27
MB89490 Series
2.Recommended Operating Conditions
(AVSS= VSS= 0.0 V)
Parameter
Symbol
UnitRemarks
MinMax
Value
Power supply voltage
V
CC
AVCC
2.7*3.6V
2.2*3.6V
Normal operation
assurance range
Normal operation
assurance range
MB89PV490 and
MB89F499
MB89498
1.53.6VRetains the RAM state in stop mode
AVR2.73.6V
LCD power supply voltageV1 to V3VssVccV
Operating temperature T
A−40+85 °C
* : These values depend on the operating conditions and the analog assurance range. See Figure 1, 2 and
“5. A/D Converter Electrical Characteristics.”
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
28
Operating
voltage (V)
3.6
3.0
2.7
2.2
2.0
2.0 1.331.00.80.66 0.57 0.500.33 0.32
Note : The shaded area is not assured for MB89F499
Figure1 Operating Voltage vs. Main Clock Operating Frequency (MB89F499/498)
Figure2 Operating Voltage vs. Main Clock Operating Frequency (MB89PV490)
Figure 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/F
CH.
Since the operating voltage range is dependent on the instruction cycle, see figure 1 and 2 if the operating speed
is switched using a gear.
29
MB89490 Series
3.DC Characteristics
(AVCC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
Parameter SymbolPinCondition
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
“H” level
input voltage
P50 to P54,
V
IH
P60 to P67,
P70 to P77,
P80 to P84,
SCL, SDA,
P40 to P47
RST, MOD0, EC0,
V
IHS
EC1, SCK0, SI0,
SCK1, SI1, RMC,
INT00 to INT07
0.7 V
0.7 V
0.7 V
0.8 V
Value
UnitRemarks
MinTypMax
CCVCC + 0.3V
CCVSS + 6.0VMB89498
CCVSS + 5.5VMB89F499
CCVCC + 0.3V
“L” level
input voltage
Open-drain
output pin
application
voltage
V
IHAINT10 to INT170.85 VCCVCC+ 0.3V
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
V
IL
P40 to P47,
P50 to P54,
V
SS− 0.3 0.3 VCCV
P60 to P67,
P70 to P77,
P80 to P84,
SCL, SDA,
RST, MOD0, EC0,
V
ILS
EC1, SCK0, SI0,
SCK1, SI1, RMC,
V
SS− 0.3 0.2 VCCV
INT00 to INT07
V
ILAINT10 to INT17VSS− 0.3 0.5 VCCV
SS− 0.3 VSS + 6.0VMB89498
SS− 0.3 VSS + 5.5VMB89F499
V
DP40 to P47
V
V
(Continued)
30
MB89490 Series
CC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
(AV
ParameterSymbolPinCondition
P10 to P17,
P20 to P27,
P30 to P37,
“H” level
output voltage
OH
P60 to P67,
V
P50 to P54,
I
OH=−2.0 mA2.2V
P70 to P77,
P80 to P82
P00 to P07I
OH=−4.0 mA2.2V
P10 to P17,
P20 to P27,
P30 to P37,
“L” level
output voltage
P50 to P54,
V
OL
P60 to P67,
P70 to P77,
IOL= 4.0 mA0.4V
P80 to P82, RST
P00 to P07I
P40 to P47I
OL= 12.0 mA0.4V
OL= 15.0 mA0.4V
P00 to P07,
P10 to P17,
P20 to P27,
Input leakage
current
I
LI
P30 to P37,
P40 to P47,
P50 to P54,
0.45 V < V
P60 to P67,
P70 to P77,
P80 to P84
Open-drain
output leakage
I
LODP40 to P470.0 V < VI < VCC−5+5µA
current
Value
UnitRemarks
MinTypMax
I< VCC−5+5µA
Without
pull-up
resistor
Pull-down
resistance
Pull-up
resistance
Common
output
impedance
R
DOWNMOD0VI= VCC2550100kΩ
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
R
PULL
P50 to P54,
VI= 0.0 V2550100kΩ
P60 to P67,
P70 to P77,
P80 to P82,
RST
R
VCOMCOM0 to COM3V1 to V3 = +3.0 V2.5kΩ
Except
MB89F499
When pull-up
resistor is
selected
(except RST
(Continued)
)
31
MB89490 Series
(AV
ParameterSymbolPinCondition
Segment
output
impedance
R
VSEGSEG0 to SEG31 V1 to V3 = +3.0 V15kΩ
CC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
Value
UnitRemarks
MinTypMax
LCD divided
resistance
LCD
controller/
driver
leakage
current
Power supply
current
R
LCD
V1 to V3,
I
LCDL
COM0 to COM3,
SEG0 to SEG31
ICC1
CC2
I
I
CCS1
I
CCS2
VCC
I
CCL
Between VCC and
V
SS
−1+1µA
FCH= 12.5 MHz
t
inst= 0.33 µs
Main clock run mode
FCH= 12.5 MHz
t
inst= 5.33 µs
Main clock run mode
FCH= 12.5 MHz
t
inst= 0.33 µs
Main clock sleep
mode
FCH= 12.5 MHz
t
inst= 5.33 µs
Main clock sleep
mode
FCL= 32.768 kHz
Sub-clock mode
T
A=+25 °C
300500750kΩ
8.012mA MB89F499
7.012.0mA MB89498
1.03.0mA
3.05.0mA
0.62.0mA
40.060.0µA
MB89F499
MB89498
MB89F499
MB89498
MB89F499
MB89498
MB89F499
MB89498
32
I
CCLPLL
I
CCLS
I
CCT
FCL= 32.768 kHz
Sub-clock mode
T
A=+25 °C
sub PLL × 4
FCL= 32.768 kHz
Sub-clock sleep
mode
T
A=+25 °C
FCL= 32.768 kHz
Watch mode
Main clock stop
mode
T
A=+25 °C
180.0250.0µA
14.030.0µA
1.513.0µA
MB89F499
MB89498
MB89F499
MB89498
MB89F499
MB89498
(Continued)
(Continued)
(AVCC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
ParameterSymbolPinCondition
MB89490 Series
Value
UnitRemarks
MinTypMax
Power supply
current
Input
capacitance
CCHVCC
I
I
A
AVCC
TA=+25 °C
Sub-clock stop mode
AVCC= 3.0 V,
T
A=+25 °C
0.84.0µA
1.24.4mA
MB89F499
MB89498
A/D
converting
IAHTA=+25 °C0.84.0µAA/D stop
Except
C
IN
V
CC, VSS, AVCC,
AV
SS, AVR
f = 1 MHz10.0pF
33
MB89490 Series
4.AC Characteristics
(1) Reset Timing
(AV
CC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
Parameter
RST
“L” pulse widthtZLZH48 tHCYLns
SymbolCondition
Value
MinMax
UnitRemarks
Note : t
HCYL is the oscillation cycle (1/FCH) to input to the X0 pin.
The MCU operation is not guaranteed when the “L” pulse width is shorter than t
tZLZH
RST
0.2VCC0.2VCC
ZLZH.
(2) Power-on Reset
(AV
SS= VSS= 0.0 V, TA=−40 °C to +85 °C)
Value
Parameter
SymbolCondition
UnitRemarks
MinMax
Power supply rising timet
R
50ms
Power supply cut-off timet
OFF1msDue to repeated operations
Note : Make sure that power supply rises within the selected oscillation stabilization time.
Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be
varied in the course of operation, a smooth voltage rise is recommended.
34
VCC
R
t
1.5 V
0.2 V0.2 V
tOFF
0.2 V
(3) Clock Timing
Parameter
Clock frequency
Clock cycle time
Input clock pulse width
Input clock rising/falling time
MB89490 Series
(AV
SS= VSS= 0.0 V, TA=−40 °C to +85 °C)
SymbolPin
MinTypMax
F
CHX0, X1112.5MHz
F
CLX0A, X1A32.76875kHz
tHCYLX0, X1801000ns
t
LCYLX0A, X1A13.330.5µs
P
WH
PWL
PWHL
PWLL
t
CR
tCF
X020ns
X0A15.2µs
X0, X0A10ns
Value
UnitRemarks
External clock
X0 and X1 Timing and Conditions
X0
0.2 VCC
Main Clock Conditions
When a crystal
ceramic resonator is usedWhen an external clock is used
X0
C
tHCYL
PWH
tCR
0.8 VCC0.8 VCC
0.2 VCC
or
X1
FCH
1
C2
PWL
tCF
0.2 VCC
X0X1
FCH
open
35
MB89490 Series
Sub-clock Timing and Conditions
tLCYL
X0A
Sub-clock Conditions
When a crystal
ceramic resonator is usedWhen an external clock is usedWhen an subclock is not used
X0AX1A
C
(4) Instruction Cycle
Parameter
Instruction cycle
(minimum execution time)
0.8 VCC
0.2 VCC
PWHLPWLL
or
X0A
FCL
0
Rd
C1
FCL
tCF
X1A
Open
tCR
X0A
SymbolValue (typical) UnitRemarks
4/FCH, 8/FCH, 16/FCH, 64/FCHµs
t
inst
2/F
CL, 1/2FCLµs
(4/FCH) tinst= 0.32 µs when operating
at F
CH= 12.5 MHz
(2/FCL) tinst= 61.036 µs when
operating at F
X1A
Open
CL= 32.768 kHz
36
• PLL operation guarantee range (sub PLL × 4)
Relationship between internal operating clock frequency and power supply voltage
Operating
voltage (V)
subPLL operating guarantee range
3.6
3.0
2.7
2.5
2.0
MB89490 Series
Internal operating clock freq. (kHz)
131.072
15.625
Not assured for MB89F499 and MB89PV490.
300
6.67
Relationship between sub-clock oscillating frequency and instruction cycle when
sub PLL is enabled
15.625
Multiplied
by 4
(µs)
6.67
Instruction cycle, tinst (min. exec. time)
7532.768
Oscillation clock F
CL (kHz)
Min execution
time (inst. cycle) (µs)
37
MB89490 Series
(5) Serial I/O Timing
Parameter
SymbolPinCondition
(AV
CC= VCC= 3.0 V, AVSS= VSS= 0.0 V, TA=−40 °C to +85 °C)
Value
MinMax
Unit
Serial clock cycle timet
SCK ↓ → SO timet
SCYCSCK0, SCK1
SLOVSCK0, SCK1, SO0, SO1−200200ns
Internal
2 tinst*µs
shift clock
Valid SI → SCK ↑tIVSHSI0, SI1, SCK0, SCK11/2 tinst*µs
SCK ↑ → valid SI hold time t
Serial clock “H” pulse widtht
SHIXSCK0, SCK1, SI0, SI11/2 tinst*µs
SHSL
mode
inst*µs
1 t
SCK0, SCK1
Serial clock “L” pulse widthtSLSH1 tinst*µs
SCK ↓ → SO timet
Valid SI → SCK ↑t
A/D mode conversion time30 t
Analog port input currentI
Analog input voltageV
AIN
AN0 to
AN7
AINAVSSAVRV
Reference voltage
I
R95.0170.0µA
Reference voltage supply
AVR
AVSS−
1.5 LSB
AVCC−
3.5 LSB
inst*µs
AVSS+
0.5 LSB
AVCC−
1.5 LSB
AVSS+
2.5 LSB
AVCC−
0.5 LSB
10µA
AV
SS+ 2.7 AVCCV
mV
mV
current
I
RH4.0µA
* : For information on t
inst, see “ (4) Instruction Cycle” in “4. AC Characteristics”.
A/D is
activated
A/D is
stopped
42
MB89490 Series
(2) A/D Converter Glossary
• Resolution
Analog changes that are identifiable with the A/D converter.
When the number of bits is 10, analog voltage can be divided into 2
• Linearity error (unit : LSB)
The deviation of the straight line connecting the ze ro transition point (“00 0000 0000” ↔ “00 0000 0001”) with
the full-scale transition point (“11 1111 1111” ↔ “11 1111 1110”) from actual conversion characteristics.
• Differential linearity error (unit : LSB)
The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value.
• Total error (unit : LSB)
The difference between theoretical and actual conversion values.
10
= 1024.
3FF
H
3FE
H
3FD
H
004
H
Digital output
003
H
002
H
001
H
AV
004
H
003
H
Theoretical I/O characteristics
V
OT
1 LSB
0.5 LSB
SS
Analog input
FST
− V
OT
1 LSB =
V
1022
Zero transition error
Actual conversion
characteristics
Total error
V
FST
1.5 LSB
AV
CC
3FF
H
3FE
H
3FD
H
004
H
Digital output
003
H
002
H
001
H
AV
Actual conversion
characteristics
{1 LSB × N + VOT}
SS
Actual conversion
characteristics
Ideal characteristics
V
NT
AV
CC
Analog input
(V)
Total error =
VNT − {1 LSB × N + 0.5 LSB}
1 LSB
Full-scale transition error
Theoretical characteristics
3FF
H
Actual conversion
characteristics
002
H
Digital output
001
H
AV
3FE
H
FST
V
(Actual
measurement
value)
Actual conversion
characteristics
Digital output
3FD
H
Actual conversion
characteristics
3FC
V
OT
(Actual measurement
H
value)
AV
SS
Analog input
Analog input
CC
(Continued)
43
MB89490 Series
(Continued)
3FF
H
3FE
H
3FD
H
004
H
003
H
Digital output
002
H
001
H
AV
Actual conversion
characteristics
{1 LSB × N + VOT}
VOT (Actual measurement value)
SS
Linearity error =
Linearity error
Actual conversion
characteristics
Ideal value
Analog input
NT
− {1 LSB × N + VOT}
V
1 LSB
VNT
V
FST
(Actual
measurement
value)
AV
CC
N + 1
N
Digital output
N – 1
N – 2
AV
Differential linearity error
Actual conversion
characteristics
Actual conversion
characteristics
SS
Analog input
Differential linearity error =
Ideal value
V
NT
(N + 1)T
V
1 LSB
− V
V
(N + 1)T
NT
AV
− 1
CC
44
MB89490 Series
(3) Notes on Using A/D Converter
••••
About the external impedance of the analog input and its sampling time
• A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling
time, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting
A/D conversion precision.
• To satisfy the A/D conversion precision standard, consider the relationship between the external impedance
and minimum sampling time and either adjust the resistor value and operating frequency or decrease the
external impedance so that the sampling time is longer than the minimum value.
The relationship between external impedance and minimum sampling time
••••
(External impedance = 0 kΩ to 100 kΩ)
100
90
80
70
60
50
40
30
20
External impedance [kΩ]
10
0
05101520253035
MB89F499MB89498
Minimum sampling time [µs]
External impedance [kΩ]
(External impedance = 0 kΩ to 20 kΩ)
20
18
16
14
12
10
8
6
4
2
0
01234578
MB89F499MB89498
6
Minimum sampling time [µs]
• If the sampling time cannot be sufficient, connect a capacitor of about 0.1 µF to the analog input pin.
• About errors
As |AVRH − AV
SS| becomes smaller, values of relative errors grow larger.
45
MB89490 Series
EXAMPLE CHARACTERISTICS
■
(1) “L” level output voltage
0.25
TA = + 25˚C
0.20
0.15
VOL [V]
0.10
0.05
0.00
0102486
VOL vs IOL (MB89498)
IOL [mA]
VCC = 2.0 V
VCC = 2.5 V
V
CC = 2.7 V
CC = 3.0 V
V
V
CC = 3.3 V
V
CC = 3.5 V
CC = 4.0 V
V
Port 0
VOL vs IOL (MB89F499)
0.30
TA = + 25˚C
0.25
0.20
0.15
VOL [V]
0.10
0.05
0.00
0102486
IOL [mA]
VCC = 2.0 V
CC = 2.5 V
V
V
CC = 2.7 V
VCC = 3.0 V
VCC = 3.3 V
VCC = 3.5 V
V
CC = 4.0 V
Port 0
0.20
TA = + 25˚C
0.16
0.12
VOL [V]
0.08
0.02
0.00
0102486
VOL vs IOL (MB89498)
IOL [mA]
VCC = 2.0 V
VCC = 2.5 V
VCC = 2.7 V
VCC = 3.0 V
V
CC = 3.3 V
V
CC = 3.5 V
CC = 4.0 V
V
Port 4
0.20
TA = + 25˚C
0.16
0.12
VOL [V]
0.08
0.04
0.00
0102486
VOL vs IOL (MB89F499)
IOL [mA]
VCC = 2.0 V
VCC = 2.5 V
VCC = 2.7 V
V
CC = 3.0 V
VCC = 3.3 V
V
CC = 3.5 V
V
CC = 4.0 V
Port 4
(Continued)
46
(Continued)
MB89490 Series
VOL vs IOL (MB89498)
0.8
TA = + 25˚C
0.6
0.4
VOL [V]
0.2
0.0
0102486
IOL[mA]
(2) “H” level output voltage
VCC = 2.0 V
VCC = 2.5 V
V
CC = 2.7 V
V
CC = 3.0 V
V
CC = 3.3 V
VCC = 3.5 V
V
CC = 4.0 V
Other than port 0, port 4
VOL vs IOL (MB89F499)
0.8
TA = + 25˚C
0.6
0.4
VOL [V]
0.2
0.0
0102486
IOL[mA]
VCC = 2.0 V
VCC = 2.5 V
V
CC = 2.7 V
VCC = 3.0 V
VCC = 3.3 V
V
CC = 3.5 V
VCC = 4.0 V
Other than port 0, port 4
VCC - VOH vs IOH (MB89498)
0.7
TA = + 25˚C
0.6
0.5
0.4
0.3
VCC - VOH [V]
0.2
0.1
0.0
0−10−2−4−8−6
IOH [mA]
VCC = 2.0 V
VCC = 2.5 V
V
CC = 2.7 V
CC = 3.0 V
V
CC = 3.3 V
V
V
CC = 3.5 V
CC = 4.0 V
V
Port 0
VCC− VOH vs IOH (MB89F499)
1.0
TA = + 25˚C
0.8
0.6
VCC - VOH [V]
0.4
0.2
0.0
0−10−2−4−8−6
IOH [mA]
VCC = 2.0 V
VCC = 2.5 V
V
VCC = 3.0 V
V
V
VCC = 4.0 V
Port 0
CC = 2.7 V
CC = 3.3 V
CC = 3.5 V
(Continued)
47
MB89490 Series
(Continued)
VCC - VOH vs IOH (MB89498)
1.4
TA = + 25˚C
1.2
1.0
0.8
0.6
VCC = 2.0 V
VCC - VOH [V]
0.4
0.2
0.0
0−10−2−4−8−6
IOH [mA]
Other than port 0
(3) Power supply current (External clock)
VCC = 2.5 V
V
CC = 2.7 V
V
CC = 3.0 V
V
CC = 3.3 V
V
CC = 3.5 V
CC = 4.0 V
V
VCC - VOH vs IOH (MB89F499)
1.4
TA = + 25˚C
1.2
1.0
0.8
0.6
VCC - VOH [V]
0.4
0.2
0.0
0−10−2−4−8−6
VCC = 2.0 V VCC = 2.5 V VCC = 2.7 V
V
CC = 3.0 V
V
CC = 3.3 V
CC = 3.5 V
V
V
CC = 4.0 V
IOH [mA]
Other than port 0
48
ICC1 vs VCC (MB89498)
10.0
TA = + 25˚C
8.0
6.0
4.0
ICC1 [mA]
2.0
0.0
15234
VCC [V]
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
ICC1 vs VCC (MB89F499)
12.0
TA = + 25˚C
10.0
8.0
6.0
ICC1 [mA]
4.0
2.0
0.0
15234
VCC [V]
FCH = 12.5 MHz
FCH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
(Continued)
MB89490 Series
ICCS1 vs VCC (MB89498)
4.5
TA = + 25˚C
4.0
3.5
3.0
2.5
2.0
ICCS1 [mA]
1.5
1.0
0.5
0.0
15234
VCC [V]
ICC2 vs VCC (MB89498)
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
ICCS1 vs VCC (MB89F499)
4.0
TA = + 25˚C
3.5
3.0
2.5
2.0
ICCS1 [mA]
1.5
1.0
0.5
0.0
15234
VCC [V]
ICC2 vs VCC (MB89F499)
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
1.4
TA = + 25˚C
1.2
1.0
0.8
0.6
ICC2 [mA]
0.4
0.2
0.0
15234
VCC [V]
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
1.4
TA = + 25˚C
1.2
1.0
0.8
0.6
ICC2 [mA]
0.4
0.2
0.0
15234
VCC [V]
FCH = 12.5 MHz
FCH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
(Continued)
49
MB89490 Series
ICCS2 vs VCC (MB89498)
1.0
TA = + 25˚C
0.8
0.6
0.4
ICCS2 [mA]
0.2
0.0
15234
VCC [V]
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
CH = 1.0 MHz
F
ICCS2 vs VCC (MB89F499)
1.0
TA = + 25˚C
0.8
0.6
0.4
ICCS2 [mA]
0.2
0.0
15234
VCC [V]
FCH = 12.5 MHz
FCH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
F
CH = 1.0 MHz
ICCLPLL vs VCC (MB89498)
0.30
TA = + 25˚C
0.25
0.20
0.15
ICCLPLL [mA]
0.10
0.05
0.00
15234
VCC [V]
FCH = 12.5 MHz
F
CH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
FCH = 2.0 MHz
F
CH = 1.0 MHz
ICCLPLL vs VCC (MB89F499)
0.30
TA = + 25˚C
0.25
0.20
0.15
ICCLPLL [mA]
0.10
0.05
0.00
15234
VCC [V]
FCH = 12.5 MHz
FCH = 10.0 MHz
F
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 2.0 MHz
FCH = 1.0 MHz
(Continued)
50
MB89490 Series
ICCL vs VCC (MB89498)
60.0
TA = + 25˚C
50.0
FCL = 32.768 kHz
40.0
30.0
ICCL [µA]
20.0
10.0
0.0
15234
VCC [V]
ICCL vs VCC (MB89F499)
60.0
TA = + 25˚C
50.0
FCL = 32.768 kHz
40.0
30.0
ICCL [µA]
20.0
10.0
0.0
15234
VCC [V]
ICCLS vs VCC (MB89498)
20.0
TA = + 25˚C
16.0
FCL = 32.768 kHz
12.0
ICCLS [µA]
8.0
4.0
0.0
15234
VCC [V]
ICCLS vs VCC (MB89F499)
20.0
TA = + 25˚C
16.0
FCL = 32.768 kHz
12.0
ICCLS [µA]
8.0
4.0
0.0
15234
VCC [V]
(Continued)
51
MB89490 Series
(Continued)
ICCT vs VCC (MB89498)
2.0
TA = + 25˚C
1.6
FCL = 32.768 kHz
1.2
ICCT [µA]
0.8
0.4
0.0
15234
(4) Pull-up resistance
VCC [V]
ICCT vs VCC (MB89F499)
2.0
TA = + 25˚C
1.6
FCL = 32.768 kHz
1.2
ICCT [µA]
0.8
0.4
0.0
15234
VCC [V]
200
TA = + 25˚C
160
120
RPULL [kΩ]
80
45
0
1.53.52.02.53.0
RPULL vs VCC (MB89498)
VCC [V]
TA = + 110 ˚C
A = + 25 ˚C
T
T
A = - 40 ˚C
4.54.0
RPULL vs VCC (MB89F499)
120
TA = + 25˚C
100
80
60
RPULL [kΩ]
40
20
0
2.04.52.53.04.0
VCC [V]
3.5
TA = + 110 ˚C
T
A = + 25 ˚C
T
A = - 40 ˚C
52
MASK OPTIONS
■
Specifying procedure
MB89490 Series
Part numberMB89498MB89F499MB89PV490
Specify when
ordering mask
Setting not possible
Main clock oscillation stabilizationtime selection
ORDERING INFORMATION
■
Part numberPackageRemarks
MB89498PF
MB89F499PF
MB89498PFV
MB89F499PFV
MB89PV490CF
10
2
/FCH
214/FCH
218/FCH
100-pin Plastic LQFP
100-pin Ceramic MQFP
Selectable
100-pin Plastic QFP
(FPT-100P-M06)
(FPT-100P-M05)
(MQP-100C-P01)
Fixed to oscillation stabilization wait
time of 2
18
/FCH
53
MB89490 Series
PACKAGE DIMENSIONS
■
100-pin Ceramic MQFP
(MQP-100C-P01)
18.70(.736)TYP
16.30±0.33
(.642±.013)
15.58±0.20
(.613±.008)
24.70(.972)
TYP
INDEX AREA
1.27±0.13
(.050±.005)
22.30±0.33
(.878±.013)
0.30(.012)
TYP
12.02(.473)
10.16(.400)
TYP
TYP
14.22(.560)
18.12±0.20
(.713±.008)
TYP
+0.40
–0.20
1.20
+.016
.047 –.008
12.35(.486)TYP
0.65±0.15
(.0256±.0060)
0.65±0.15
(.0256±.0060)
18.85(.742)
TYP
1.27±0.13
(.050±.005)
C
1994 FUJITSU LIMITED M100001SC-1-2
0.30(.012)TYP
7.62(.300)TYP
9.48(.373)TYP
11.68(.460)TYP
10.82(.426)
0.15±0.05
(.006±.002)
MAX
0.30±0.08
(.012±.003)
0.30±0.08
(.012±.003)
+0.40
–0.20
1.20
+.016
.047 –.008
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
(Continued)
54
MB89490 Series
100-pin Plastic QFP
(FPT-100P-M06)
*
81
INDEX
100
130
0.65(.026)
"A"
23.90±0.40(.941±.016)
20.00±0.20(.787±.008)
0.32±0.05
(.013±.002)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
5180
50
0.10(.004)
17.90±0.40
(.705±.016)
*
14.00±0.20
(.551±.008)
Details of "A" part
0.13(.005)
31
M
0.17±0.06
(.007±.002)
3.00
.118
(Mounting height)
(.031±.008)
(.035±.006)
+0.35
–0.20
+.014
–.008
0~8
0.80±0.20
0.88±0.15
0.25(.010)
˚
0.25±0.20
(.010±.008)
(Stand off)
C
2002 FUJITSU LIMITED F100008S-c-5-5
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
(Continued)
55
MB89490 Series
(Continued)
100-pin Plastic LQFP
(FPT-100P-M05)
16.00±0.20(.630±.008)SQ
*
14.00±0.10(.551±.004)SQ
75
7650
INDEX
100
125
0.50(.020)
0.20±0.05
(.008±.002)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
51
0.08(.003)
Details of "A" part
+.008
+0.20
.059
–.004
–0.10
1.50
0.08(.003)
(Mounting height)
26
"A"
M
0.145±0.055
(.0057±.0022)
0˚~8˚
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
(Stand off)
0.25(.010)
C
2003 FUJITSU LIMITED F100007S-c-4-6
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
56
MB89490 Series
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
of the use or exercise of any intellectual property right, such as
patent right or copyright, or any other right of Fujitsu or any third
party or does Fujitsu warrant non-infringement of any third-party’s
intellectual property right or other right by using such information.
Fujitsu assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result
from the use of information contained herein.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0410
2004 FUJITSU LIMITED Printed in Japan
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