R e v i s e d R e c o r d s
Date
Feb.-09 -’05 K. Yamada
Classi-
fication
Enactment
Ind. Content
Applied
date
Issued
date
Drawn Checked Checked Approved
T.Miyasaka
Y.Seki
MS5F6034
2
13
H04-004-06b
1. Outline Drawing ( Unit : mm )
2MBI300U4D-120
2. Equivalent circuit
MS5F6034
3
13
H04-004-03a
4. Electrical characteristics ( at Tj= 25
C un less otherwi se specifi ed )
3. Absolute Maximu m Ratings ( at Tc= 25
C un less otherwi se specifi ed )
Items
Collector-Emitter voltage
Gate-Emitter voltage
Collector current
Symbol s Conditi ons
VCES
VGES
Ic
Icp
Continuous
1ms
-Ic
-Ic pulse
Collector Power Dissipation 1 device
Junction temperature
Pc
Tj
1ms
Tstg
voltage
Torque
between terminal and copper base (*1)
Mounting (*2)
Terminals (*3)
Viso AC : 1min. 2500 VAC
-
(*1) All terminals should be connected together when isolation test will be done.
(*2) Recommendable Value : Mounting 2.5 to 3.5 Nm (M5 or M6)
(*3) Recommendable Value : Terminals 3.5 to 4.5 Nm (M6)
Ratings
1200
±20
400
300
800
600
300
600
1470
+150
-40 to +125
3.5
4.5
Units
V
V
A
W
o
C
N m
Items
collector current
leakage current
threshold voltage
Symbols
ICES - - 2.0
IGES
VGE(th)
VCE=1200V
VGE=0V
VCE=0V
VGE=±20V
VCE=20V
Ic=300mA
Ic=300A
Collector-Emitter
(terminal)
VGE=15V
saturation voltage
(chip)
Input capacitance
Cies
VCE=10V,VGE=0V,f=1MHz -
ton Vcc=600V - 0.32 1.20
Turn-on time
tr Ic=300A - 0.10
tr(i) VGE=±15V - 0.03 -
Turn-off time
toff RG=1.1Ω tf - 0.07 0.30
IF=300A
Forward on voltage
(terminal)
VGE=0V
(chip)
Reverse recovery time
terminal-chip (*4)
trr
R lead
IF=300A -
(*4) Biggest internal terminal resistance among arm.
Condit ions
Characteri st ics
min.
-
4.5
typ. max.
- 400
6.5 8.5
- 2.10
-
-
-
2.30
1.90 2.05
2.10 34 - nF
0.41
-
1.85 2.00
- 1.95 -
- 1.65 1.80
-
1.75
- 0.35
-
0.52 -
2.25
-
0.60
1.00
-
Units
mA
nA
V
V
us
V
us
mΩ
MS5F6034
4
13
H04-004-03a