INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4014B
MSI
8-bit static shift register
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors Product specification
8-bit static shift register
DESCRIPTION
The HEF4014B is a fully synchronous edge-triggered 8-bit
static shift register with eight synchronous parallel inputs
(P0 to P7), a synchronous serial data input (DS), a
synchronous parallel enable input (PE), a LOW to HIGH
edge-triggered clock input (CP) and buffered parallel
outputs from the last three stages (O5 to O7).
HEF4014B
MSI
Operation is synchronous and the device is edge-triggered
on the LOW to HIGH transition of CP. Each register stage
is of a D-type master-slave flip-flop. When PE is HIGH,
data is loaded into the register from P
to HIGH transition of CP. When PE is LOW, data is shifted
to the first position from DS, and all the data in the register
is shifted one position to the right on the LOW to HIGH
transition of CP. Schmitt-trigger action in the clock input
makes the circuit highly tolerant to slower clock rise and
fall times
to P7 on the LOW
0
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
January 1995 2
HEF4014BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4014BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4014BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
FAMILY DATA, IDDLIMITS category MSI
See Family Specifications
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
January 1995 3
Fig.3 Logic diagram.
Philips Semiconductors Product specification
8-bit static shift register
PINNING
PE parallel enable input
to P7parallel data inputs
P
0
D
S
CP clock input (LOW to HIGH edge-triggered)
O
to O7buffered parallel outputs from the last three
5
FUNCTION TABLES
Serial operation
n
1D
2D
serial data input
stages
INPUTS OUTPUTS
CP D
PE O
S
1
2
LXXX
LXXX
O
5
6
HEF4014B
MSI
Parallel operation
INPUTS OUTPUTS
O
7
n
CP D
1XHP
X X no change
S
PE O
O
5
5
6
P
6
O
7
P
7
3D
3
6XLD
7XLD
8XLD
LXXX
XX
1
D
2
D
3
X X no change
AC CHARACTERISTICS
V
= 0 V; T
SS
= 25 °C; CL = 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 900 f
dissipation per 10 4 300 f
package (P) 15 12 000 f
X
1
D
2
i
i
i
1
+∑ (foCL) × V
+∑ (foCL) × V
+∑ (foCL) × V
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
D
= either HIGH or LOW
n
n = number of clock pulse transitions
DD
DD
DD
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
C
= load cap. (pF)
L
) = sum of outputs
∑ (f
oCL
V
= supply voltage (V)
DD
January 1995 4
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
AC CHARACTERISTICS
V
= 0 V; T
SS
Propagation delays
CP→ O
HIGH to LOW 10 t
LOW to HIGH 10 t
Output transition times 5 60 120 ns 10 ns + (1,0 ns/pF) C
HIGH to LOW 10 t
LOW to HIGH 10 t
Set-up times 5 40 10 ns
PE → CP 10 t
D
S
P
n
Hold times 5 25 −5ns
PE → CP 10 t
D
S
P
n
Minimum clock 5 70 35 ns
pulse width; LOW 10 t
= 25 °C; CL = 50 pF; input transition times ≤ 20 ns
amb
V
DD
SYMBOL MIN. TYP. MAX.
V
n
5 130 260 ns 103 ns + (0,55 ns/pF) C
PHL
15 40 80 ns 32 ns + (0,16 ns/pF) C
5 115 230 ns 88 ns + (0,55 ns/pF) C
PLH
15 40 80 ns 32 ns + (0,16 ns/pF) C
THL
15 20 40 ns 6 ns + (0,28 ns/pF) C
5 60 120 ns 10 ns + (1,0 ns/pF) C
TLH
15 20 40 ns 6 ns + (0,28 ns/pF) C
su
25 5 ns
15 15 0 ns
535−5ns
→CP 10 t
su
25 −5ns
15 25 0 ns
535−5ns
→CP 10 t
su
25 −5ns
15 25 0 ns
hold
20 0 ns
15 15 0 ns
53015ns
→CP 10 t
hold
20 10 ns
15 15 7 ns
53015ns
→CP 10 t
hold
20 10 ns
15 15 7 ns
WCPL
30 15 ns
15 24 12 ns
TYPICAL EXTRAPOLATION
FORMULA
55 110 ns 44 ns + (0,23 ns/pF) C
50 100 ns 39 ns + (0,23 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
see also waveforms Fig.4
L
L
L
L
L
L
L
L
L
L
L
L
Maximum clock 5 6 13 MHz
pulse frequency 10 f
max
15 30 MHz
15 20 40 MHz
January 1995 5
January 1995 6
Philips Semiconductors Product specification
8-bit static shift register
Fig.4 Waveforms showing minimum clock pulse width, and set-up and hold times for PE to CP, DS to CP, and P to CP. Set-up and hold times
are shown as positive values but may be specified as negative values.
APPLICATION INFORMATION
Some examples of applications for the HEF4014B are:
• Parallel-to-serial converter
• Serial data queueing
• General purpose register
HEF4014B
MSI
Loading...