MC13853 LNA
Evaluation Board User’s Guide
Document Number: MC13853EVBUG
Rev. 1.3
10/2007
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Contents
About This Book
Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
Chapter 1
Initial Instructions
1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.2 Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.3 Assembly Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.4 Operation Under SPI Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.5 Graphical User Interface (GUI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
Chapter 2
Evaluation Board Layout and Schematic
Chapter 3
Basic Test Equipment Setup
3.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2 List of Test Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Appendix A
DC and Control Wiring Harness
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor iii
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
iv Freescale Semiconductor
About This Book
This user’s guide provides a detailed description of the hardware of the MC13853 evaluation board demo
kit. It documents the RF, DC, and control requirements for proper operation in three bands (GSM850,
PCS1900, and WCDMA 2100).
The objective of this manual is to establish guidelines to facilitate the use of this LNA on a PCB evaluation
board, namely:
• The RF interface, input and output.
• The DC supplies and logic control inputs.
• The serial peripheral interface (SPI).
Audience
This manual is intended for the end-user of the MC13853 evaluation board.
Organization
This document is organized into three chapters and one appendix:
Chapter 1: Initial Instructions
Chapter 2: Evaluation Board
Chapter 3: Test Equipment Bench Line-up
Appendix: DC and Control Wiring Harness
Revision History
The following table summarizes revisions to this document since the previous release (Rev. 1.2).
Revision History
Location Revision
Chapter 1 Replaced Figure 1-3. Inserted a new Step 7 on page 6. Replaced
images in Figure 1-4.
Chapter 2 Replaced Figure 2-1.
Conventions
Please note the following:
• All RF interconnections are to be with low loss coaxial cabling using clean SMA type RF
connectors, including using the correct manufacturer’s torque at the connecting point.
• All DC supply lines must be able to safely carry peak currents in excess of 2 A under minimum
voltage drop.
• All control lines (SPI lines and parallel cable) must be kept away from strong RF fields.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor v
• ESD protection procedures must be followed. As a minimum, test equipment should be grounded,
a grounded hand strap must be used, and the lab bench fitted with a conductive mat (not exceeding
1 MΩ to ground).
Definitions, Acronyms, and Abbreviations
The following list defines the acronyms and abbreviations used in this document.
DCS1800 1800 MHz cellular band, MS transmit 1710 to 1785 MHz
EDGE Enhanced Data Rates for GSM Evolution, uses 3pi/8 PSK modulation
EGSM900 900 MHz cellular band, MS transmit 880 to 915 MHz
EGPRS Enhanced General Packet Radio Service
ESD Electrostatic Discharge
EVB Evaluation Board, usually a multilayer printed circuit
GPIB General Purpose Instrumentation Bus, uses IEEE488.2 standard
GSM Global System Mobile, uses GMSK modulation
GSM850 850 MHz cellular band, MS transmit 824.0 to 849.0 MHz
PCS1900 1900 MHz cellular band, MS transmit 1850 to 1910 MHz
SPI Serial Peripheral Interface
VSWR Voltage Standing Wave Ratio
References
1. MC13853 Data Sheet, Rev. 1.6, 08/2007 Freescale Semiconductor, Tempe AZ.
2. Digital Cellular Telecommunications System - Radio Transmission And Reception- 3GPP TS
05.05; TS 100 910. European Telecommunications Standard Institute (ETSI Sophia Antipolis
France, www.etsi.org).
3. Digital Cellular Telecommunications System - Mobile Station Conformance Specification - GSM
11.10 European Telecommunications Standard Institute (ETSI Sophia Antipolis France,
www.etsi.org).
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
vi Freescale Semiconductor
Chapter 1 Initial Instructions
1.1 Overview
This chapter describes the RF and control basic requirements of the MC13853 LNA evaluation board (Iota
VI).
The following items are supplied with the Freescale MC13853 Demo Kit:
1. MC13853 LNA evaluation board (Iota)
2. Serial peripheral interface (SPI) board (MMM6038SPI)
3. Control software CD-ROM
4. DC and control cable harness
The evaluation board interconnects with the MMM6038SPI via a eight wire cable. The MMM6038SPI
connects via a parallel port cable to the PC computer.
On the evaluation board, all the coaxial RF connectors are of the SMA type. In order to minimize damage
to these, connections are to be made using low loss flexible coaxial cables with male SMA connectors
mating towards the evaluation board. The mating surfaces must be clean (tissue paper and standard grade
isopropyl alcohol can be used); if not, the amplifier performance can be affected. The applied torque via a
5/16” wrench at the connecting point must not exceed the manufacturers specification. There are a total of
6 SMA female connectors attached to the evaluation board. The DC and control connector is of a 8-pin,
right-angle header type. The Appendix A, “DC and Control Wiring Harness” provides the details and cable
harness wiring.
Before any RF or DC cabling is attached, caution must be used that the board is grounded first. This
prevents ESD when attaching the remaining cables.
NOTE
Do not exceed the maximum ratings as given in the MC13853 Data Sheet,
in particular the maximum applied DC voltage and RF input level. Operate
in a safe ESD environment on the test bench.
Refer to Figure 1-1. Attach the DC and control cable harness (detailed in Appendix A, “DC and Control
Wiring Harness”) to the evaluation board:
Attach the cable harness end labeled SPI into the interface board as shown in Figure 1-1.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor 1-1
Initial Instructions
1.2 Serial Peripheral Interface
Control of the basic functions of the MC13853 can be accomplished via a SPI three-wire (data, clock, and
frm) connection to the evaluation board. In order to control the LNA the following is required:
• PC computer laptop:
— Parallel port
— Microsoft® Windows® NT or better (such as Windows 2000 or Windows XP) operating system
installed
— CD-ROM drive at least 40 MB of free hard drive space
— 256 MB of RAM
• SPI control software installed on the PC
• Freescale MMM6038SPI
• Small power supply to deliver +5 VDC at approximately 5 mA to the MMM6038SPI
• Parallel cable with DB25 connectors (PC to SPI)
• Short length of wire ribbon between the SPI board and the evaluation board. Set the length to
accommodate movement of the evaluation board on the test bench.
The control software resides in the PC computer running Microsoft Windows operating system. A parallel
interface is used between the PC and the MMM6038SPI.
Keep all control wiring away from the strong RF fields created by the power amplifier, particularly around
the module and antenna connection. ESD precautions should be taken in the set-up and as a minimum all
equipment, SPI and EVB components should be grounded. Figure 1-1 shows the SPI to EVB
interconnecting details. Figure 1-2 illustrates the actual top view of the MMM6038SPI.
Details of the GUI and controlled parameters are shown in Figure 1-4.
NOTE
The MMM6038SPI contains a FPGA (Lattice Semiconductor) with the
code written into a flash memory (ST Microelectronics). Aside from
interconnections, no user intervention is required. The board is powered by
+5 VDC connected to the red jack and the black jack is ground. Once the
supply is applied, a green LED will turn on indicating the presence of power.
Various LDO internal regulators provide the necessary operating voltages.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
1-2 Freescale Semiconductor
Freescale Semiconductor 1-3
Notes:
1) ESD precautions must be taken when interconnecting cables and boards. Ensure that all test
equipment, PC computer, interface and evaluation boards have a common ground.
2) SPI control code executable file resides in PC computer running Windows Op System.
3) Communication PC to SPI interface board is via parallel port with parallel cable.
4) Communication SPI interface board to the LNA EVB is via 8 wire interface (SPI_Data,
SPI_Clock & SPI_Frm).
5) Ground all DC Power Supplies and PC computer.
SPI Interface Board
Parallel Port Cable 25 pin
Monitor
PC Computer
Windows OpSys
Keyboard
SPI interface DC Power
Supply
+5 VDC
MC13853
Evaluation Board
SPI 3 wire
interface
HB1_out
RF Input HB1
RF Output HB1HB1_In
Gnd
Gnd
HB2_In
SPI_Frm
SPI_Clk
SPI_Data
Vcc
VDDAuxSPI
HB2_out RF Input HB2
LB_In
LB_Out
RF Output HB2
RF Output LB
RF Input LB
Gnd
GPO1
GPO2
J11J10
SPI_Clk
SPI_Frm
SPI_Data
TP3
TP2
TP5
Gain Enable
MC13851
External LNA
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Initial Instructions
Figure 1-1. SPI to EVB Interconnecting Diagram
Initial Instructions
Parallel Port
Interface
+5 VDC
(Red)
Vo l t a g e
Regulators
FPGA
3-Wire SPI
to LNA
Ground
Gnd
(Black)
Figure 1-2. Serial Peripheral Interface Board (Top View)
1.3 Assembly Instructions
1. Interconnect the evaluation board, MMM6038SPI, PC computer, power supplies as shown in
Figure 1-1.
2. Confirm on the MC13853 evaluation board that all DC voltages are present at the correct level
indicated in the MC13853 Data Sheet.
3. Verify on the MMM6038SPI at the red terminal that the voltage is +5 VDC.
4. An active green LED indicates DC “On” and an active green LED indicates that the FPGA has been
loaded successfully with the code from the flash memory.
5. The test equipment requirements and line-up are given in Chapter 3, “Basic Test Equipment
Setup”, Figure 3-1.
6. Install the supplied software from the CD-ROM in the chosen computer operating under Windows
NT or better (such as Windows 2000 or Windows XP). Minimum requirements for the PC
computer are: 40 MB of free hard drive space, 256 MB of RAM, CD-ROM drive, and a parallel
port I/O.
7. Connect the wire ribbon between the 8 pin header of the MC13853 evaluation board and the
MMM6038SPI board. On the MMM6038SPI board, the 8 pin connector goes on J9, the
VDDAuxSPI lead goes on TP2, the VCC lead goes on TP3 and ground (Gnd) goes on TP5.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
1-4 Freescale Semiconductor
Initial Instructions
2
Address structure Data Structure
Bit # 2928272625242322212019181716151413121110 9 8 7 6 5 4 3 2 1 0
Not Variable 1010000100
Variable
Write Read Bit
Device Type is LNA
Device Type is LNA
Device Type is LNA
Device is Iota
Device is Iota
Device is Iota
Device is Iota
Device is Iota
LNA Selector PA4
LNA Selector PA3
LNA Selector PA2
LNA Selector PA1
LNA Selector PA0
Enable
Gain
a
Write
0
Read
LNA Selector
LNA1 (HB2 Band I)
000
LNA2 (HB1 Band II)
LNA3 (LB Band V)
GPO (Ex t LNA )
100
on
00
Disable
Not Used
GPO2
GPO1
Active
y
Disable
00
Disable
Read Mode
Bit # 2928272625242322212019181716 151413121110 9 8 7 6 5 4 3 2 1 0
e
Variable
0
a
LNA Selector
For Hardware Read
d
1.4 Operation Under SPI Control
SPI control of the MC13853 uses the SPI bit word structure shown in Figure 1-3. Any communication over
the SPI that is not 30 bits in length or data without the correct address will be ignored.
SPI Dat
Mode Selector
P1.0 parts
Mode Selector
for GPO
(External LNA)
Not Variabl
Clock
Active
Bypass
B
12345678910111
1
pass
Address structure Data Structure
1010000100
13 14 15 16 17 18 19 20 21 2223 24 25 26 27 28 29 30
001
010
one extra clock cycle in read mo
11
01
10
11
10
01
SPI Dat
Read
1
Figure 1-3. MC13853 SPI Bit Word Structure
1.5 Graphical User Interface (GUI)
Once the control software on the CD-ROM (LabView executable file) is loaded onto the PC computer and
running, the GUI screen appears on the monitor.
As illustrated in Figure 1-4:
Freescale Semiconductor 1-5
1. Load the program “AuxSpiControl.vi”.
2. Click the arrow to run.
3. Select “MC13853 Dual + Tri” in the Setting Selector window.
4. To select the LNA, select “LNA Selector” in the SPI Var List window. Select the “LNA” in the
middle window.
5. To select the mode, select “enable” on the SPI Var List window and “1” or “0” in the middle
window. Select the same for the gain.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
011
HID 8HID 7HID 6HID 5HID 4HID 3HID 2HID 1HID
Initial Instructions
6. The truth table is:
a) Active mode: enable 1, gain 1.
b) Bypass mode: enable 0, gain 0.
c) Disable mode: enable 0, gain 1.
7. To select the current setting, select “current =” on the SPI Var list window and one of the eight
current settings in the middle window.
8. To control the external LNA MC13851, select “LNA Selector” in the SPI Var List window and
“GPO” in the middle window. Set the enable and gain.
9. Auto Send SPI:
a) If “On”, SPI command sent whenever a SPI value changes.
b) If “Off”, use “Send SPI” (F1) to send.
10. Send SPI (F1): Command is sent whenever pressed.
11. Write to DUT button:
a) Activates either condition.
b) Data can be sent to (write) or read from the device.
c) If write is shown, the SPI is writing.
12. View Waveform:
a) Activates view of data sent in waveform format.
13. Command History:
a) Displays the data sent (written) or received (read) from the device.
b) Choice of hex or binary format.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
1-6 Freescale Semiconductor
Initial Instructions
Command History Data Sent/Received
SPI Variable List
LNA Mode Selector
Setting Selector
Auto Send SPI
SPI Variable Names
Send SPI Button
Freescale Semiconductor 1-7
Figure 1-4. Graphical User Interface Screen
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Initial Instructions
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
1-8 Freescale Semiconductor
Chapter 2 Evaluation Board Layout and Schematic
The MC13853 LNA is mounted in a multi-layer evaluation board. The top view is shown in Figure 2-1 and
the schematic is located in the MC13853 Data Sheet (document number: MC13853/D).
NOTE
Refer to the location of RF coaxial connectors, DC and control connecting
points via headers and the grounding banana jacks. The amplifier and
supporting circuits on the evaluation board are not shielded. Keep all cabling
away from the evaluation board, in particular the antenna SMA connector
J23.
Figure 2-1. MC13853 Evaluation Board - Assembly (Top View)
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor 2-1
Evaluation Board Layout and Schematic
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
2-2 Freescale Semiconductor
Chapter 3 Basic Test Equipment Setup
3.1 Overview
To test and evaluate the performance of the MC13853 LNA on its EVB environment, a test plan and a test
equipment bench set-up in the lab is necessary. A basic test plan can be made by following the MC13853
data sheet and obtaining the same measured parameters. However, the results are dependent on the test
equipment configuration. In order to establish a basic test set-up, the details and equipment
interconnections are given in Figure 3-1.
All test equipment used must be calibrated with a valid calibration due date. Also, it is important to perform
an internal instrument calibration of the main items, such as the RF digital signal generator, the spectrum
analyzer and function generator. Since the RF power and its sensors require a separate calibration
procedure, it is very important that this is done before valid data is taken.
Once the test equipment is configured and connected, a bench calibration must be conducted at the
frequencies of interest in order to determine the offset values for the RF power meter and spectrum
analyzer.
The DC and control interconnecting cable harness is detailed in the Appendix A, “DC and Control Wiring
Harness”. This should be available before the test and evaluation of the MC13853.
There are three test equipment setups required to make all of the measurements. The following steps are
recommended:
1. From the list of test equipment given in Section 3.2, “List of Test Equipment”, on page 3-3,
assemble the line-up as given in Figure 3-1, Figure 3-2, and Figure 3-3.
2. Calibrate each individual instrument first following the manufacturer’s procedure.
3. Calibrate the RF power meter and its sensors at the desired band and frequencies.
4. Conduct a bench calibration at each required frequency. Record all results and enter these as offsets
into the RF power meter and spectrum analyzer.
5. Test the set-up without the evaluation board and verify that the bench calibration is correct by
setting the RF digital signal generator level to 0 dBm at the desired band and frequency.
6. If (5) fails, repeat steps (1) through (4) until measurements are correct.
7. If (5) passes, connect the MC13853 into the circuit.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor 3-1
Basic Test Equipment Setup
MC13853 LNA
Under Test
Supply to
Serial
Interface
Board
HP 6626A Power Supply
HP8648C Signal Generator
Notes:
1) RF Cabling is 50 ohm low los s.
2) RF Connectors are SMA.
3) Zero and Calibrate all RF power sensors before measurement.
4) SPI interface details are not shown
5) Internally calibrate test equipment before using
HP8562E Spectrum
Analyzer
Combiner
HB1 In
LB In
LB Out
HB1 Out
HB2 In HB2 Out
HP8648C Signal Generator
Harris Ferrite
Isolators
MC13853 LNA
Under Test
Supply to
Serial
Interface
Board
HP 6626A Power Supply
Notes:
1) RF Cabling is 50 ohm low loss.
2) RF Connectors are SMA.
3) Zero and Calibrate all RF power sensors before measurement.
4) SPI interface det ails are not shown
5) Internally calibrate test equipment before using
HB1 In
LB In
LB Out
HB1 Out
HB2 In HB2 Out
HP8753E Network Analyzer
Figure 3-1. MC13853 Power Management Test Equipment Block Diagram
3-2 Freescale Semiconductor
Figure 3-2. MC13853 S Parameter Test Equipment Block Diagram
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Basic Test Equipment Setup
MC13853 LNA
Under Test
Supply to
Serial
Interface
Board
HP 6626A Power Supply
Notes:
1) RF Cabling is 50 ohm low loss.
2) RF Connectors are SMA.
3) Zero and Calibrate all RF power sensors before measurement .
4) SPI interface details are not shown
5) Internally calibrate test equipment before using
HB1 In
LB In
LB Out
HB1 Out
HB2 In HB2 Out
Agilent N8973A Noise
Figure Meter
HP346A Noise Source
Figure 3-3. MC13853 Noise Figure Test Equipment Block Diagram
3.2 List of Test Equipment
The following test equipment is required:
• Agilent 8753E network analyzer or equivalent.
• HP 8562E spectrum analyzer or equivalent.
• RF power meter, Gigatronics 8542C with sensors or equivalent.
• Two signal generators, HP 8648C or equivalent.
• Agilent N8973A noise figure meter or equivalent with HP 346A noise source.
• DC system power supplies, HP 6632A or equivalent.
• Input isolators.
• Control computer, PC with accessories, Microsoft Windows NT or XP operating system.
• Interconnecting RF coaxial cables, DC and control lines.
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
Freescale Semiconductor 3-3
Basic Test Equipment Setup
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
3-4 Freescale Semiconductor
Appendix A
Gnd
VDDAuxSPI TP2 on
Serial Interface Board
Serial Interface Board Connector
*
Evaluation Board Connector
VDDAuxSPI
Vcc
SPI_Frm
SPI_Clk
SPI_Data
GPO2
GPO1
Gnd
*
External LNA Board Connector
Enable
Gain
SPI_Clk
SPI_Data
SPI_Frm
Vcc TP3 on Serial
Interface Board
Vcc
Gnd
DC and Control Wiring Harness
The DC and control cable harness is described in Figure A-1.
Freescale Semiconductor A-1
Figure A-1. MC13853 DC and Control Cable Harness
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
DC and Control Wiring Harness
MC13853 LNA Evaluation Board User’s Guide, Rev. 1.3
A-2 Freescale Semiconductor
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