This manual explains how to connect and operate the M9328MX21ADS i.MX21 Application
Development System.
Audience
The audience for this manual is handheld communication device designers. It is assumed that users are
engineers or technicians with experience using development systems.
Organization
The manual consists of three chapters.
•Chapter 1 General Information introduces the user to the features and capabilities of the ADS.
•Chapter 2 Configuration and Operation contains configuration information, connection
descriptions, and other operational information that may be useful during the development process.
•Chapter 3 Support Information contains connector pin assignments, connector signal descriptions,
and other useful information about the ADS.
Revision History
The following table summarizes changes to this document since the previous release (Rev. A).
Revision History
LocationRevision
Conventions
Units and measures in this manual conform to the International System of Units (SI) as defined by
National Institute of Standards and Technology Special Publication 811.
M9328MX21ADSE User’s Manual, Rev. A
Freescale SemiconductorP-1
Definitions, Acronyms, and Abbreviations
The following acronyms and abbreviations are used in this manual. This list does not include signal,
register, and software mnemonics.
PCMCIAPersonal Computer Memory Card International Association
SDSanDisk (Smart Media)
SDRAMSynchronous Dynamic Random Access Memory
SISystem International (international system of units and measures)
SSISynchronous Serial Interface
TFTThin Film Transistor
UARTUniversal Asynchronous Receiver/Transmitter
USBUniversal Serial Bus
VDCVolts Direct Current
M9328MX21ADSE User’s Manual, Rev. A
P-2Freescale Semiconductor
Chapter 1 General Information
1.1Description
The M9328MX21ADSE helps you develop applications for the i.MX21 MCU.
The ADS has 19 connectors and sockets that support application software, target board debugging, and
optional circuit cards. A separate LCD display panel and a separate keypad are supplied with the ADS.
When you connect the LCD panel and keypad to the ADS Base board, they align with each other.
1.2M9328MX21ADSE Features
ADS features include:
•i.MX21 Multimedia Application Processor
•Two clock-source crystals, 32.768 KHz and 26 MHz
•Power connector for +5.0-volts in from an external regulated power supply, an in-line fuse, and a
power on/off switch.
•Voltage regulators that step down the 5.0 VDC input to Vcc (3.0 VDC), 2.5 VDC, 1.8 VDC and
1.5 VDC
•Multi-ICE debug support
•Two 8 MB × 16-bit Burst Flash memory devices configured as one 32 MB, 32-bit device
•Two 16 MB × 16-bit SDRAM devices configured as one 64 MB, 32-bit device
•High speed expansion connectors for adding optional cards.
•Two-board system: modular CPU board plugs into Base board; Base board has connections for
LCD display panel and keypad
•Memory mapped expansion I/O
•Software readable board revisions
•Configuration and user definable DIP switches
•SD/MMC memory card connector
•Two RS-232 transceivers and DB9 connectors (one configured for DCE and one for DTE
operation) supporting on-chip UART ports
•External UART with RS-232 transceiver and DB9 connector
•IrDA transceiver that conforms to Specification 1.4 of the Infrared Data Association
•USB OTG (On The Go) interface transceiver and USB mini AB connector
•Separate LCD panel assembly that connects to the Base board and interfaces directly with the ADS
•Touch panel controller for use with the LCD
•Separate keypad unit with 36 push button keys
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor1-1
General Information
•Separate CMOS Image Sensor Card
•Audio CODEC includes an 11.28 MHz crystal oscillator, a 3.5 mm audio input jack, a 3.5 mm
microphone jack, and a 3.5 mm headphone jack
•Cirrus Logic CS8900A-CQ3Z Ethernet controller, with RJ-45 connector for connecting to a system
hub
•Two 32 × 3-pin DIN expansion connectors with most i.MX21 I/O signals
•Variable resistor for emulation of a battery voltage level
•NAND Flash card (Plugs into CPU Board)
•LED indicators for power, external bus activity, Ethernet activity, and two LEDs for user defined
status indiction
•Universal power supply with 5.0-volt output @ 2.4 Amperes
•USB cable
•RS-232 serial cable
•Two RJ-45 Ethernet cables, network, and crossover
1.3System and User Requirements
To use the ADS, you need:
•An IBM PC or compatible computer that has:
— A Windows® 98, Windows ME™, Windows XP™, Windows 2000, or Windows NT® (version
4.0) operating system
— A parallel port and a Multi-ICE device (not included)
•A + 5 VDC power supply @ 2.4 A, with a 2 mm female (inside positive) power connector
(included)
CAUTION
Never supply more than +5.5-volts power to your M9328MX21ADSE.
Doing so can damage board components.
1.4M9328MX21ADSE Diagram
Figure 1-1 shows the connectors and other major parts of the ADS Base board and CPU board.
•J3, J4, J5 and J6 — Modem control enable jumpers for RS-232 DTE interface on P2
•J7 — One wire interface
1.5ADS Specifications
Table 1-1 shows M9328MX21ADSE specifications.
Table 1-1. Specifications
CharacteristicSpecifications
Clock speed (SDRAM/FLASH)CPU 266MHz, System 133MHz
Ports10Base-T (RJ-45), RS-232 serial, USB OTG
Temperature:
operating
storage
Relative humidity0 to 90% (noncondensing)
Power requirements4.5V
0° to +50° C
-40° to +85° C
— 5.5 VDC @ 2.4 A
Dimensions7.15 x 9.45 in (18.2 x 24.1 cm)
M9328MX21ADSE User’s Manual, Rev. A
1-4Freescale Semiconductor
Configuration and Operation
Chapter 2 Configuration and Operation
2.1Introduction
This section contains configuration information, connection descriptions, and other operational
information that may be useful during the development process.
2.2Configuring Board Components
Table 2-1 is a summary of configuration settings. The following paragraphs provide additional information
about configuring and using the ADS.
Table 2-1. Component Configuration Settings
ComponentPositionEffect
System Power Switch, SW1Move this switch to the ON position to enable the power source
BOARD
EDGE
SW1
OFF
connected to P8 to power the system.
Factory setting is OFF.
ON
System Reset Switch, SW2Push to reset the M9328MX21ADSE.
SW2
Peripheral Selection Switch,
S1
Mode Switch, S2
Power Headers
(on CPU card)
J1, VCC (3.0 V)
S1
1
ON
2
3
4
5
6
7
8
S1
S2
1
ON
2
3
4
5
6
7
8
S2
12
The UART1 and UART4 transceivers are forced enabled, the IrDA
module is enabled by software, Nexus is disabled, ARM mode JTAG
is selected, and the buzzer is connected to PWMO. The LCD touch
panel signals are connected.
Factory setting is shown.
Subsection 2.2.1 explains other settings for this switch.
Configures 32-bit Burst Flash as the boot device and the Default
clock bypass mode is selected.
Factory setting is shown
Subsection 2.2.2 explains other settings for this switch.
Connects specified power signal.
Factory Setting
(Leave jumper installed during normal use.)
J2, 1.8 V
J3, 1.5 V
12
Connect ammeter across pins to measure processor current
Modem Control Enable
Jumpers
(on Base board)
J3, DTR
J4, DSR
J5, CD
J6, RI
123
123
The specified RS-232 control signal of P2 connects to the specified
I/O signal.
J3 - DTR (pin 4) is controlled by SD2_D0 (output)
J4 - DSR (pin 6) can be read on SD2_D1 (input)
J5 - CD (pin 1) can be read on SD2-D2 (input)
J6 - RI (pin 9) can be read on SD2-D3 (input)
The specified RS-232 control signal of P2 is not connected to any I/O
signal and cannot be controlled or read.
J3 - DTR is forced active (positive), SD2_D0 is unused
J4 - DSR cannot be read, SD2_D1 is unused
J5 - CD cannot be read, SD2_D2 is unused
J6 - RI cannot be read, SD2_D3 is unused
2.2.1Peripheral Selection Switch (S1)
S1 is a DIP switch that consists of eight slide switches. Seven of the switches enable and disable software
control of the UART transceivers, the IrDA buffers, the Nexus buffer, the touch panel controls, and the
buzzer. One switch selects JTAG operation mode.
Table 2-2 shows S1 functionality.
Table 2-2. S1 Switch Settings
Switch NameSettingEffect
S1-1, UART1_ON
S1-2, UART4_ON
S1-3, IrDA_ON
S1-4, NEXUS_EN
S1-5, JTAG _CTRL
S1-6, TONE_OUT
S1-7, PEN_CS_B
S1-8, PEN_IRQ_B
*PENIRQ_B is not connected to anything.
ONForces the UART1 transceiver to be enabled.
OFFUART1_EN_B bit controls the UART1 transceiver
ONForces the UART4 transceiver to be enabled.
OFFUART4_EN_B bit controls the UART4 transceiver
ONForces the IrDA module buffers to be enabled.
OFFIrDA_EN bit controls the IrDA buffers
ONInternal test only.
OFFSet to OFF for debugging purposes.
ONInternal test only.
OFFARM Multi-ICE mode selected after TRST.
ONThe buzzer is controlled by the PWMO output.
OFFPWMO is disconnected from the buzzer circuit.
ONCSPI_SS0 controls the chip enable of the Touch controller.
OFFDisables CSPI_SS0 control of the Touch controller chip enable.
ONUART3_CTS is connected to PENIRQ_B out of the Touch controller.
OFFUART3_CTS is not connected to PENIRQ_B out of the Touch controller.*
Figure 2-1 shows an example configuration. The switches are set so that the UART1 transceiver and the
IrDA module are forced enabled; the UART4 transceiver can be enabled by software; and the NEXUS
buffer and buzzer are disabled. In addition, ARM mode JTAG is selected and the LCD touch control
signals are enabled.
M9328MX21ADSE User’s Manual, Rev. A
2-2Freescale Semiconductor
Configuration and Operation
1
ON
2
36
4
5
7
8
UART1_ON
UART4_ON
IrDA_ON
NEXUS_ON, (Set to OFF)
JTAG_CTRL, (Set to OFF)
TONE_OUT
PEN_CS_B
PEN_IRQ_B
S1
Figure 2-1. Switch S1
2.2.2Mode/User Switch (S2)
S2 is a DIP switch that consists of eight slide switches. S2-1 to S2-4 configure boot mode and S2-5 and
S2-6 control the clock bypass modes. These switch settings take effect only on power up or after a reset.
S2 also provides two user definable switches (S2-7 and S2-8). S2-7 can be used to cause an interrupt when
switched (SW1_IRQ through signal UART3_CTS).
Table 2-3 lists the settings for the boot-mode subswitches, S2-1 through S2-4.
.
Table 2-3. Boot Mode Switch Settings
Boot Mode, Device
Internal bootstrap ROM (USB/UART)ONONONON/OFF
NAND, 8-bit, 2KB per pageONONOFFON
NAND, 16-bit, 2KB per pageONONOFFOFF
NAND, 16-bit, 512bytes per pageONOFFONON
CS0, 16-bit, D[15:0] ONOFFONOFF
CS0, 32-bit ONOFFOFFON
NAND 8-bit, 512bytes per pageONOFFOFFOFF
BOOT3
S2-4
BOOT2
S2-3
BOOT1
S2-2
BOOT0
S2-1
Figure 2-2 shows an example configuration. S2-1 through S2-4 configure the system to boot from the 8-bit
NAND Flash. S2-5 and S2-6 are always set to OFF. S2-7 and S2-8 are set for user-defined functions.
1
ON
2
36
4
5
7
8
S2
BOOT0
BOOT1
BOOT2
BOOT3
CLKMODE0, (Set to OFF)
CLKMODE1, (Set to OFF)
SW1 IRQ
SW2 READ
Figure 2-2. Switch S2
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor2-3
Configuration and Operation
2.3Operation
This section describes how the system functions and how to use the boards.
2.3.1Functional Block Diagram
Figure 2-3 shows the functional interconnections of the ADS in a block diagram format.
Base Board
Power Connector,
Power Switch & fuse
3V regulator, CPU
Rese t signal
LEDs & Buzzer
Boot mode,
UARTs, IrDA
selectio n
1-wire Interface
Silicon & Boar d
revision register
S/W readable
DIP sw itches
Line In
Mic In
Speaker
Out
Audio
CODEC
IO pins , PWM
OWIRE
se lect logi c
Decoder & Chip
UART1,
UART2 &
IrDA
UART signals
Addr /Data Bu s
SSI
NAND Flash
Peri pheral s ignals
Expansion
Connector 2
Ext.
UART
UART
contr oller
Ethernet
port
Ethernet
contr oller
USBOTG s ignalsAddr /Data BusAddr /Data Bus
CPU Board
Connector
NF C signal s
SDRAM
Burst F lash
Addr /Data bus
Hi gh Speed
Connector s
2.5V , 1.8V and
1.5V regulator s
Peri pheral s ignalsCSI si gnalsMM C/SD si gnals
Expansion
Connector 1
Multi-ICE
connector
i.MX21
Addr /Data bus
IO pins
Transceiver
Base board c onnectors
Image sensor
conne ctor
USB series
mini-AB
conne ctor
USB OTG
Transceiver
MMC/SD
connector
LCDC
Tou ch scree n
contr oller
Batter y Level
Measurement
Emulation
I2C
KPP
LCD
TV
Encoder
Keypad
Connector
LCD Board
White
LED
connector
conne ctor
driver
(240x320 pixels) & Touch
TFT LCD DCDC converter
LCD panel
scree n
Keypad Board
Figure 2-3. Functional Block Diagram of M9328MX21ADSE
2.3.2On-Board Memory
Figure 2-4 and Figure 2-5 show the on-board memory interface. The M9328MX21ADSE is equipped with
8M x 32-bit Burst Flash and 16M x 32-bit SDRAM. The chip selects CS0
Burst Flash and SDRAM chip selects, respectively.
M9328MX21ADSE User’s Manual, Rev. A
2-4Freescale Semiconductor
and CS2 (CSD0) are used for
V
CC
CS0
A2...A24
BCLK
OE
LBA
DQM3_EB3
FLASH_RSTRESET
D0.15
CC
CC
CS
WP
ACC
RDYECB
A0...A22
CLK
OE
AVD
WE
D0..15
V
V
Configuration and Operation
8MX16-Bit Burst Flash
8MX16-Bit Burst Flash
WEDQM1_EB1
D0.15D16..31
CS2
SDCKE0
SDCLK
RAS
CAS
WE
A2..A18
BA0
A19
A20
DQM1_EB1
DQM0_EB0
D0..15
DQM2_EB2
Figure 2-4. Burst Flash Interface
V
CC
CS
CKE
CLK
RAS
CAS
WE
A0..10
A11
BA0
BA1
LDQM
UDQM
D0..15
LDQMDQM3_EB3
UDQM
D0..15D16..31
Figure 2-5. SDRAM Interface
16MX16-Bit SDRAM
16MX16-Bit SDRAM
2.3.3Memory Map
Table 2-4 shows the memory map for external peripherals on the ADS board. Because the Burst Flash and
the Ethernet Controller do not take up the entire address space of the associated chip selects, software can
access the same physical memory location at more than one range of addresses. For instance, SDRAM uses
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor2-5
Configuration and Operation
the entire 64 MB address space allowed for CSD0, but the Burst Flash occupies only 32 MB of the 64 MB
space available to CS0, so it appears in two different ranges of addresses. CS1 covers 16 MB allowing
many repetitions of the memory mapped peripherals.
PeripheralChip SelectAddress Range (HEX)Act Mem Size
Table 2-4. M9328MX21ADSE Memory Map
SDRAMCSD0
Burst FLASHCS0
Ethernet ControllerCS1
External DUARTCS1
Read CPU and
Base board versions
CS1
CS1
0xC000_0000 to 0xC3FF_FFFF64 MB
0xC800 0000 to 0xC9FF_FFFF32 MB
0xCC00 0000 to 0xCC00_000F*16 BYTES
0xCC20 0000 to 0xCC20_000F*16 BYTES
Read 0xCC40_0000*
D7-D0 = CPU, D15-D8 = Base board
2 BYTES
Write to 0xCC80_0000* (Output)2 BYTES
Memory Mapped I/O
CS1
Read 0xCC80_0000* (Input)2 BYTES
* For I/O operations only D15 - D0 are used
2.3.4USB On-The-Go Interface
The i.MX21 USB OTG Device Module interfaces with a Phillips ISP1301BS USB transceiver connected
to P4, a mini AB USB connector. The interface can function as either a USB host or USB device. The
interface includes a Maxim MAX3355EUD+ USB power supply chip which can provide power on the
USB bus in host mode. This power supply chip is enabled by the USB_PWR signal. For details on the
operation of the USB interface, refer to the i.MX21 data sheet. Figure 2-6 shows the USB interface
connection.
i.MX21
USB_PWR
ISP1301BS
D-
D+
VBUS
ID
VBUS
IDIN
IDOUT
SHDN
MAX3355EUD+
P4
USB Device
USB MINI AB
Figure 2-6. USB OTG Interface
2.3.5UART and IrDA
Figure 2-7 shows how to connect the UART and IrDA circuits.
M9328MX21ADSE User’s Manual, Rev. A
2-6Freescale Semiconductor
i.MX21
UART1_TXD1
UART1_RXD1
UART1_RTS1
UART1_CTS1
USBH1_TXDM
USBH1_RXDP
USBH1_RXDM
USBH1_RXDP
SD2_D1
SD2_D2
SD2_D3
SD2_D0
TXD4
RXD4
RTS
CTS
DSR
CD
I*
R
DTR
*
*
*
RS232 Transceiver
EN
RS232 Transceiver
EN
P1
UART1
DCE
P2
UART4
DTE
V
CC
GND
V
S1-1
CC
S1-2
Configuration and Operation
Software Enable
via MMIO Latch
UART3_TXD
UART3_RXD
* If enabled by jumper
Buffer
IrDA
EN
EN
GND
V
CC
GND
Software Enable
via MMIO Latch
S1-3
Software Enable
via MMIO Latch
Figure 2-7. UARTs and IrDA Interface
2.3.6Ethernet
The ADS is equipped with a Cirrus Logic CS8900A-CQ3Z Crystal LAN ISA Ethernet Controller that can
interface with the i.MX21. The CS8900A-CQ3Z has 10BaseT transmit and receive filters and operates in
I/O mode. Figure 2-8 shows the Ethernet interface.
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor2-7
Configuration and Operation
i.MX21
BA1..3
D0..15
CS_LAN
B_OE
B_RW
B_DQM3_EB3
UART3_RTS
V
CC
CS8900A-CQ3Z
SA8
SA9
SA0
SA4..7
SA10..19
SA1..3
D0..15
AEN
IOR
IOW
SBHE
INTRQ0
CHIPSEL
Transformer
Figure 2-8. Ethernet Interface
Isolation
P9
RJ45 Connector
2.3.7Touchscreen ADC
The ADS is equipped with an Analog Devices AD7873BRQZ ADC. The ADC communicates with the
touchscreen of the LCD on the Base board. Variable resistor VR1 on the Base board can be used to change
the VBAT input voltage to the ADC. The i.MX21 communicates with the ADC via the CSPI1 interface.
Setting S1-7 to ON connects CSPI1_SS0 to the ADC chip select. Setting S1-8 to ON connects the ADC
interrupt out to UART3_CTS. Figure 2-9 shows the ADC interface.
V
CC
i.MX21
UART3_CTS
CSPI1_SS0
CSPI1_SCLK
CSPI1_MISO
CSPI1_MOSI
S1
8
7
AD7873BRQZ
PENIRQ
CS
DCLK
DOUT
DIN
VREF
VBAT
X-
VR1
P7
X+
Y+
Y-
LCD CONNECTOR
Figure 2-9. ADC Interface
M9328MX21ADSE User’s Manual, Rev. A
2-8Freescale Semiconductor
Configuration and Operation
2.3.8CD Quality CODEC
The ADS has a Wolfson WM8731SEDS 32-bit linear low power stereo CODEC with a built-in headphone
driver (U24). The CODEC is controlled by the i.MX21, which sends the digital audio data via an SSI2
interface and control data via an I2C interface.
The CODEC has stereo line and mono microphone level audio inputs as well as stereo headphone outputs.
It features a mute function, programmable line level volume control, and a bias voltage output suitable for
an electret type microphone. Table 2-5 shows the CODEC connectors and describes their basic functions.
Table 2-5. Audio Connectors
ConnectorDescriptions
P10Stereo line in jack
P11Dynamic microphone input jack
P12Headphone jack for audio out
The WM8731SEDS data sheet is available at http://www.wolfsonmicro.com/
2.3.9Keypad
The ADS includes an external keypad module that connects to the Base board. The keys provide tactile
feedback. The i.MX21 keypad interface reads the pad via the KCOL[5:0] and KROW[5:0] signals. the
interface has chording diodes to prevent ghost key presses. The keys are labeled with numeric, cursor
control, soft key, and spare key functions, but the actual functionality is determined by user software. The
default keypad can be replaced by a custom design. The UART2 signals that are multiplexed internally
with the KCOL[7,6] and KROW[7,6] signals are brought out to keypad connector P5. This allows the use
of an 8x8 keypad matrix. Table 2-6 shows the key switch connections to the keypad signals by function
name (as labeled on the PCB) and the switch reference designators.
KCOL5KCOL4KCOL3KCOL2KCOL1KCOL0
KROW5
KROW4
KROW3
KROW2
APP1
SW1
APP2
SW7
DOWN
SW13
VOL UP
SW19
Table 2-6. Keypad Layout and Connections
SEND
SW2
HOME
SW8
APP3
SW14
APP4
SW20
KEY 1
SW3
LEFT
SW9
1 -
SW15
4 GHI
SW21
UP
SW4
ACTION
SW10
2 ABC
SW16
5 JKL
SW22
KEY 2
SW5
RIGHT
SW11
3 DEF
SW17
6 MNO
SW23
END
SW6
BACK
SW12
EXTRA 2
SW18
EXTRA 3
SW24
KROW1
KROW0
Freescale Semiconductor2-9
VOL DOWN
SW25
POWER
SW31
EXTRA 1
SW26
RECORD
SW32
M9328MX21ADSE User’s Manual, Rev. A
7 PQRS
SW27
*
SW33
8 TUV
SW28
0 +
SW34
9 WXYZ
SW29
#
SW35
EXTRA 4
SW30
EXTRA 5
SW36
Configuration and Operation
2.3.10Memory Mapped I/O
The ADS uses Memory Mapped I/O to add I/O functions without using the I/O resources of the processor.
The following paragraphs describe the I/O functions.
2.3.10.1Input I/O
A memory read of hex address 0xCC80_0000 inputs the state of the ADS signals connected to latches U5
and U7. Table 2-7 shows which signal is associated with each data bit.
Table 2-7. Input Buffer Signals
BITSignalDescription
BIT 0SD_WPSecure Data Write Protect
BIT 1SW_SELSoftware readable switch
BIT 2RESET_E_UARTExternal UART Reset
BIT 3RESET_BASEEthernet controller Reset
BIT 4CSI_CTL2Image Sensor control 2
BIT 5CSI_CTL1Image Sensor control 1
BIT 6CSI_CTL0Image Sensor control 0
BIT 7UART1_ENUART1 transceiver enable
BIT 8UART4_ENUART4 transceiver enable
BIT 9LCDONLCD enable
BIT 10IRDA_EN IrDA transceiver enable
BIT 11IRDA_FIR_SELReserved
BIT 12IRDA_MD0_BIrDA SD/Mode (inverted)
BIT 13IRDA_MD1Reserved
BIT 14LED4_ONLED 4 control
BIT 15LED3_ONLED 3 control
M9328MX21ADSE User’s Manual, Rev. A
2-10Freescale Semiconductor
Loading...
+ 44 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.