Freescale Semiconductor KITVR500EVM User Manual

Freescale Semiconductor
User’s Guide
KITVR500EVM Evaluation Board
Document Number: KTVR500UG
Rev. 1.0, 8/2014
Figure 1. KITVR500EVM
Contents
2 Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Getting to Know the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4 Installing the GUI and Setting up the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 Board Layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7 Board Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
9 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Important Notice
1 Important Notice
Freescale provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will be replaced by a new kit.
Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typical”, must be validated for each customer application by customer’s technical experts.
Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where personal injury or death may occur.
Should the Buyer purchase or use Freescale products for any such unintended or unauthorized application, the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges Freescale was negligent regarding the design or manufacture of the part.Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners.© Freescale Semiconductor, Inc. 2014
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Getting Started
Jump Start Your Design
2 Getting Started
2.1 Kit Contents/Packing List
The KITVR500EVM contents include:
• Assembled and tested evaluation board/module in anti-static bag.
• Warranty card and Technical support brochure
2.2 Jump Start
Freescale’s analog product development boards help to easily evaluate Freescale products. These tools support analog mixed signal and power solutions including monolithic ICs using proven high-volume SMARTMOS mixed signal technology, and system-in-package devices utilizing power, SMARTMOS and MCU dies. Freescale products enable longer battery life, smaller form factor, component count reduction, ease of design, lower system cost and improved performance in powering state of the art systems.
•Go to www.freescale.com/analogtools
• Locate your kit
• Review your Tool Summary Page
• Look for
• Download documents, software and other information
Once the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM and schematics. Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes everything needed for design.
2.3 Required Equipment and Software
To use this kit, you need:
• Power supply:
Output voltage range from 3.1 to 4.5 V
Current capability from 3.0 to 5.0 A (current requirement is dependent on output loading)
• Supply to board connection cables (capable of withstanding up to 5.0 A current)
• USB (male) to mini USB (male) communication cable
• USB-enabled computer
• Multimeter is recommended
2.4 System Requirements
The kit requires the following to function properly with the software:
• Windows XP or Windows 7 operating system
VR500_GUI_REV_1.1.zip: Graphical User Interface (GUI) for KITVR500EVM
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Getting to Know the Hardware
3 Getting to Know the Hardware
3.1 Board Overview
The KITVR500EVM evaluation board allows full evaluation capability of the 34VR500 PMIC for the QorlQ LS102x family of application processors. It provides access to all output voltage rails as well as control and signal pins through terminal block connectors for an easier out-of-the-box evaluation experience. A single terminal block connector for the input power supply allows the user to supply the board with an external DC power supply to fully evaluate the performance of the device.
3.2 Board Features
The board features are as follows:
• Input voltage operation range from 3.1 to 4.5 V
• Output voltage supplies accessible through detachable terminal blocks
Four buck converters
Five general purpose LDO regulators
One DDR memory termination voltage reference
• On/off push button support
• Hardware configuration flexibility through various jumper headers and resistors
• Integrated USB to I2C programming interface for full control/configuration
Onboard PMIC control through the I2C register map
• On board connectors for interfacing with future evaluation/debug tools
• Compact form factor (4 x 4 in2)
3.3 Device Features
This evaluation board features the following Freescale products:
Table 1. Features
Device Description Features
• Four buck converters
Multi-output DC/DC Regulator for QorIQ LS1
MC34VR500
MC9S08JM60 8-bit USB Cost-Effective JM MCUs
Family of Communications Processors
• Five general purpose linear regulators
• Programmable output voltage, sequence, and timing
• DDR termination reference voltage
• Power control logic with processor interface and event detection
• Individually programmable ON, OFF, Standby, and Sleep modes
• 8-bit HCS08 Central Processing Unit (CPU)
• Up to 24 MHz internal bus (48 MHz HCS08 core) frequency offering 2.7 to 5.5 V across temperature range of -40 °C to +85 °C
• Support for up to 32 peripheral interrupt/reset sources
• On-chip Memory
• Up to 60 k flash read/program/erase over the full operating voltage and temperature
• Up to 4.0 k RAM
• 256 Byte USB RAM
• Support for up to 32 peripheral interrupt/reset sources
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3.4 Board Description
LDO’s
outputs
Buck regulators
outputs
Power
supply
Logic and
monitoring outputs
PC
interface
via the
USB bus
Power
Management
Figure 2 describes the main blocks of the KITVR500EVM.
Getting to Know the Hardware
Table 2. Board Description
Name Summary Description
Power Supply Main power supply connection (3.1 to 4.5 V)
Logic and monitoring outputs I2C, INTB, EN, PORB and STBY connections for monitoring
LDO’s outputs LDO1, 2, 3, 4, 5 REFOUT output connections (can be used to connect a load)
Buck regulators outputs SW1, 2, 3, 4 output connections (can be used to connect a load)
PC Interface To be connected to the PC running the GUI
Figure 2. Board Description
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Getting to Know the Hardware
KITVR500EVM
3.5 Jumper Description
Verify that the jumpers are placed in the right position as shown in Figure 3. For a detailed description of the jumper functionality, refer to
Table 3.
Figure 3. Default Jumper Configuration Diagram
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Table 3. Jumper Description
Jumper Default Description
Getting to Know the Hardware
J6 Closed
J7 Closed Shorts PVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to PVIN net. (debugging option)
J8 Closed Short EN to the MCU
J9 Open Short to pull STBY to PVIN voltage supply
J10 Open Short to hold EN pin low
J11 Open
J12, J13, J14 Closed Short to connect VLDOIN to VIN
J15 Closed Short to connect SCL and SDA to the MCU
J16 Closed Short to connect EN to PVIN
J17 1 - 2
J19, J23, J24
J22
J25 2 - 3
Closed
1 - 2 3 - 4
Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings on the switching supplies
Shorts SWVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to SWVIN net. (debugging option)
VCCI2C Supply selector
• 1-2: Connect VCCI2C to 3V3 LDO
• 3-4: Connect VCCI2C to SW2 output
Buck regulators input power path isolation Short these jumpers to allow PVINx to be powered from the SWVIN supply
Buck regulators input power path isolation
Control Interface input supply selector
• 1-2: Enables PVIN node as the input supply source for the control interface
• 2-3: Enables USB power as the input supply source for the control interface
3.6 Connectors and Terminal Blocks Description
Table 4 presents pin connection for each header present on the KITVR500EVM.
Table 4. Terminal Blocks Descriptions
Terminal Block Function Pin definition
J1 Main Input Supply
J2 I²C Signals
J3 VCCI2C
J4 Interfacing 1
J5 Interfacing 2
J18 LDO4 / LDO5
J21 LDO2 / LDO3
J27 REFOUT / LDO1
J29 SW1
Pin 1 – GND Pin 2 – PVIN Pin 3 – SWVIN
Pin 1 – SCL Pin 2 – SDA
Pin 1 – VCCI2C Pin 2 – GND
Pin 1 – INT_B Pin 3 – POR_B
Pin 1 – STBY Pin 2 – EN Pin 3 – GND
Pin 1 – LDO4 Output Pin 2 – GND Pin 3 – LDO5 Output
Pin 1 – LDO2 Output Pin 2 – GND Pin 3 – LDO3 Output
Pin 1 – REFOUT Output Pin 2 – GND Pin 3 – LDO1 Output
Pin 1 – SW1 Output Pin 2 – GND
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Getting to Know the Hardware
Table 4. Terminal Blocks Descriptions (continued)
J30 SW4
J31 SW2
J32 SW3
Table 5. Connector Description
Connector Function Pin definition
J20 Debug Port 1 Debugging connector for future development tools
J26 BDM Connector
J28 Mini USB Connector
J33 Debug Port 2 Debugging connector for future development tools
J34 Debug Port 3 Debugging connector for future development tools
J35 Debug Port 4 Debugging connector for future development tools
Pin 1 – SW4 Output Pin 2 – GND
Pin 1 – SW2 Output Pin 2 – GND
Pin 1 – SW3 Output Pin 2 – GND
Pin 1 - BKGD_JM60 Pin 2 - GND Pin 3 - NC Pin 4 - RST_JM60 Pin 5 - NC Pin 6 - USB_PWR
Pin 1 - VBUS Pin 2 - D­Pin 3 - D+ Pin 4 - NC Pin 5 - GND Chassis - GND
3.6.1 LDO Input Supply Source Selection
It is possible to modify the LDO input supply sources by removing the Jumpers J12, J13, J14, J17 and connecting another power supply, as one of the buck converters outputs.
LDO INPUT SENSE POINTS
TP11
TP13
DNP
C33
1.0UF
C35
0.1UF
C37
0.1UF
VHALF
TP12
DNP
TP37
REFIN
TP38
VHALF
C63
1.0UF
DNP
DNP
VLDOIN1
VLDOIN23
VLDOIN45
17
27
40
30
29
U1B
VLDOIN1
VLDOIN23
VLDOIN45
REFIN
VHALF
LDO
REF REG
MC34VR500V1ES
LDO1
LDO2
LDO3
LDO4
LDO5
REFOUT
V_LDO1
18
V_LDO2
26
V_LDO3
28
V_LDO4
39
V_LDO5
41
31
REFOUT
VIN
J12
2
1
HDR 1X2 TH
J13
2
1
HDR 1X2 TH
J14
1
2
HDR 1X2 TH
Default: 1-2 shunt
V_SW3
VLDOIN45 VLDOIN23 VLDOIN1
DNP
C54
1.0UF
0
R11
REFIN
C31
1.0UF
Figure 4. LDO Schematic Configuration
LDO OUTPUT SENSE POINTS
TP30
V_LDO1 V_LDO2 V_LDO3 V_LDO4 V_LDO5
DNP
C62
4.7uF
TP34
REFOUT
DNP
C29
1.0UF
TP40
DNP
C32
2.2UF
REFOUT
TP36
DNP
C34
4.7uF
TP18
DNP
C10
2.2UF
TP9
DNP
C4
2.2UF
V_LDO1 V_LDO2
V_LDO3 V_LDO4
V_LDO5
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Getting to Know the Hardware
VIN_SENSE
VDIG
VBG
VCC
LCSADS
Default: 1-2 shunt
Default: 1-2 shunt, 3-4 shunt.
POR_B STBY
INT_B
VR500_EN
Default: 1-2 shunt
Default: No shunt
Default: No shunt
Default: 1-2 shunt
VIN
VCC
VBIAS
VBG
VDIG
VCCI2C
I2C_S CL I2C_S DA
MCU_SDA
MCU_SCL
STBY
INT_ B
POR_B
EN
VR500_EN
VIN
V_SW2
VCCI2C
VCCI2C
PVIN
3V3
PVIN
MCU_SCL3,5 MCU_SDA3,5
STBY 3
INT_ B 3
POR_B 3
EN 3,5
J16
HDR 1X2 TH
1 2
SW1 FSMSM
DNP
12
TP4
DNP
C8
0.47uF
TP6
DNP
TP16
DNP
R7 1M
C51
1.0UF
Control
MC34VR500V1ES
U1A
ICTEST1
5
INT
1
POR
3
SCL
54
SDA
53
STBY
4
VDIG
51
VBG
52
VCCI2C
55
ICTEST2
47
EN
56
VCC
49
VIN
50
VBIAS
43
TP10
DNP
J9
HDR 1X2 TH
1 2
TP14
DNP
J15
HDR 2X2
1 2 3
4
C3
1.0UF
DNP
TP15
DNP
TP8
DNP
R10
10.0K
R6
4.7K
R8
10.0K
R9 100K
C52
1.0UF
R5
4.7K
J10
HDR 1X2 TH
1 2
C53
0.22uF
TP7
DNP
C2
1.0UF
C7
1.0UF
J17
HDR 2X2
1 2 3
4
C6
0.1UF
TP5
DNP
TP3
DNP
J8
HDR 1X2 TH
12
Figure 5. Logic and Core Supplies Schematic
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