Freescale provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY.
It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and
supply terminals. This evaluation board may be used with any development system or other source of I/O signals
by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a
Reference Design and is not intended to represent a final design recommendation for any particular application.
Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking
design as well as attention to supply filtering, transient suppression, and I/O signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing related
protective considerations, including product safety measures typically found in the end product incorporating the
goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate
precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers
applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or
procedural hazards. For any safety concerns, contact Freescale sales and technical support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the
date of delivery and will be replaced by a new kit.
Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters
can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typical”, must be validated for each customer application by customer’s technical experts.
Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are not
designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Freescale
product could create a situation where personal injury or death may occur.
• Assembled and tested evaluation board/module in anti-static bag.
• Warranty card and Technical support brochure
2.2Jump Start
Freescale’s analog product development boards help to easily evaluate Freescale products. These tools support analog mixed signal and
power solutions including monolithic ICs using proven high-volume SMARTMOS mixed signal technology, and system-in-package devices
utilizing power, SMARTMOS and MCU dies. Freescale products enable longer battery life, smaller form factor, component count reduction,
ease of design, lower system cost and improved performance in powering state of the art systems.
•Go to www.freescale.com/analogtools
• Locate your kit
• Review your Tool Summary Page
• Look for
• Download documents, software and other information
Once the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM and schematics.
Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes
everything needed for design.
2.3Required Equipment and Software
To use this kit, you need:
• Power supply:
•Output voltage range from 3.1 to 4.5 V
•Current capability from 3.0 to 5.0 A (current requirement is dependent on output loading)
• Supply to board connection cables (capable of withstanding up to 5.0 A current)
• USB (male) to mini USB (male) communication cable
• USB-enabled computer
• Multimeter is recommended
2.4System Requirements
The kit requires the following to function properly with the software:
• Windows XP or Windows 7 operating system
• VR500_GUI_REV_1.1.zip: Graphical User Interface (GUI) for KITVR500EVM
Freescale Semiconductor, Inc.3
KTVR500UG Rev. 1.0 8/2014
Page 4
Getting to Know the Hardware
3Getting to Know the Hardware
3.1Board Overview
The KITVR500EVM evaluation board allows full evaluation capability of the 34VR500 PMIC for the QorlQ LS102x family of application
processors. It provides access to all output voltage rails as well as control and signal pins through terminal block connectors for an easier
out-of-the-box evaluation experience. A single terminal block connector for the input power supply allows the user to supply the board with
an external DC power supply to fully evaluate the performance of the device.
3.2Board Features
The board features are as follows:
• Input voltage operation range from 3.1 to 4.5 V
• Output voltage supplies accessible through detachable terminal blocks
•Four buck converters
•Five general purpose LDO regulators
•One DDR memory termination voltage reference
• On/off push button support
• Hardware configuration flexibility through various jumper headers and resistors
• Integrated USB to I2C programming interface for full control/configuration
•Onboard PMIC control through the I2C register map
• On board connectors for interfacing with future evaluation/debug tools
• Compact form factor (4 x 4 in2)
3.3Device Features
This evaluation board features the following Freescale products:
Table 1. Features
DeviceDescriptionFeatures
• Four buck converters
Multi-output DC/DC Regulator for QorIQ LS1
MC34VR500
MC9S08JM608-bit USB Cost-Effective JM MCUs
Family of Communications Processors
• Five general purpose linear regulators
• Programmable output voltage, sequence, and timing
• DDR termination reference voltage
• Power control logic with processor interface and event detection
• Individually programmable ON, OFF, Standby, and Sleep modes
• 8-bit HCS08 Central Processing Unit (CPU)
• Up to 24 MHz internal bus (48 MHz HCS08 core) frequency offering 2.7
to 5.5 V across temperature range of -40 °C to +85 °C
• Support for up to 32 peripheral interrupt/reset sources
• On-chip Memory
• Up to 60 k flash read/program/erase over the full operating voltage and
temperature
• Up to 4.0 k RAM
• 256 Byte USB RAM
• Support for up to 32 peripheral interrupt/reset sources
4Freescale Semiconductor, Inc.
KTVR500UG Rev. 1.0 8/2014
Page 5
3.4Board Description
LDO’s
outputs
Buck regulators
outputs
Power
supply
Logic and
monitoring outputs
PC
interface
via the
USB bus
Power
Management
Figure 2 describes the main blocks of the KITVR500EVM.
Getting to Know the Hardware
Table 2. Board Description
NameSummary Description
Power SupplyMain power supply connection (3.1 to 4.5 V)
Logic and monitoring outputsI2C, INTB, EN, PORB and STBY connections for monitoring
LDO’s outputsLDO1, 2, 3, 4, 5 REFOUT output connections (can be used to connect a load)
Buck regulators outputsSW1, 2, 3, 4 output connections (can be used to connect a load)
PC InterfaceTo be connected to the PC running the GUI
Figure 2. Board Description
Freescale Semiconductor, Inc.5
KTVR500UG Rev. 1.0 8/2014
Page 6
Getting to Know the Hardware
KITVR500EVM
3.5Jumper Description
Verify that the jumpers are placed in the right position as shown in Figure 3. For a detailed description of the jumper functionality, refer to
Table 3.
Figure 3. Default Jumper Configuration Diagram
6Freescale Semiconductor, Inc.
KTVR500UG Rev. 1.0 8/2014
Page 7
Table 3. Jumper Description
JumperDefault Description
Getting to Know the Hardware
J6Closed
J7ClosedShorts PVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to PVIN net. (debugging option)
J8ClosedShort EN to the MCU
J9OpenShort to pull STBY to PVIN voltage supply
J10OpenShort to hold EN pin low
J11Open
J12, J13, J14ClosedShort to connect VLDOIN to VIN
J15ClosedShort to connect SCL and SDA to the MCU
J16ClosedShort to connect EN to PVIN
J171 - 2
J19, J23, J24
J22
J252 - 3
Closed
1 - 2
3 - 4
Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings on the switching
supplies
Shorts SWVIN to VIN. Allows one to isolate or connect the 34VR500 logic input supply to SWVIN net. (debugging
option)
VCCI2C Supply selector
• 1-2: Connect VCCI2C to 3V3 LDO
• 3-4: Connect VCCI2C to SW2 output
Buck regulators input power path isolation
Short these jumpers to allow PVINx to be powered from the SWVIN supply
Buck regulators input power path isolation
Control Interface input supply selector
• 1-2: Enables PVIN node as the input supply source for the control interface
• 2-3: Enables USB power as the input supply source for the control interface
3.6Connectors and Terminal Blocks Description
Table 4 presents pin connection for each header present on the KITVR500EVM.
It is possible to modify the LDO input supply sources by removing the Jumpers J12, J13, J14, J17 and connecting another power supply,
as one of the buck converters outputs.
All test points are clearly marked on the evaluation board. Figure 6 shows the location of various test points of interest during evaluation.
Figure 6. Key Test Point Locations
KTVR500UG Rev. 1.0 8/2014
10Freescale Semiconductor, Inc.
Page 11
Getting to Know the Hardware
VIN_SENSE
VDIG
VBG
VCC
LCSADS
Default:
1-2 shunt
Default:
1-2 shunt,
3-4 shunt.
POR_BSTBY
INT_B
VR500_EN
Default:
1-2 shunt
Default:
No shunt
Default:
No shunt
Default:
1-2 shunt
VIN
VCC
VBIAS
VBG
VDIG
VCCI2C
I2C_S CL
I2C_S DA
MCU_SDA
MCU_SCL
STBY
INT_ B
POR_B
EN
VR500_EN
VIN
V_SW2
VCCI2C
VCCI2C
PVIN
3V3
PVIN
MCU_SCL3,5
MCU_SDA3,5
STBY 3
INT_ B 3
POR_B 3
EN 3,5
J16
HDR 1X2 TH
12
SW1
FSMSM
DNP
12
TP4
DNP
C8
0.47uF
TP6
DNP
TP16
DNP
R7
1M
C51
1.0UF
Control
MC34VR500V1ES
U1A
ICTEST1
5
INT
1
POR
3
SCL
54
SDA
53
STBY
4
VDIG
51
VBG
52
VCCI2C
55
ICTEST2
47
EN
56
VCC
49
VIN
50
VBIAS
43
TP10
DNP
J9
HDR 1X2 TH
12
TP14
DNP
J15
HDR 2X2
12
3
4
C3
1.0UF
DNP
TP15
DNP
TP8
DNP
R10
10.0K
R6
4.7K
R8
10.0K
R9
100K
C52
1.0UF
R5
4.7K
J10
HDR 1X2 TH
12
C53
0.22uF
TP7
DNP
C2
1.0UF
C7
1.0UF
J17
HDR 2X2
12
3
4
C6
0.1UF
TP5
DNP
TP3
DNP
J8
HDR 1X2 TH
12
3.7Miscellaneous Components
3.7.1Power on Push Button
A footprint for a normally open, momentary push-button is provided at the EN terminal to allow a momentary low state by pressing the
push button. J8 allows isolation of the EN terminal from the MCU GPIO controlling this pin.
Freescale Semiconductor, Inc.11
Figure 7. Power on Circuit
KTVR500UG Rev. 1.0 8/2014
Page 12
Getting to Know the Hardware
ROTACI
DNI NWODTUHS
ROTACI
DNI TPURRETNI
INT_B
EN
INT _B
EN
PVIN
PVIN
3B
_
TNI5,3NE
R2
200 OHM
Q2
FDV302P
1
32
D1
LED Red
AC
Q3
FDV302P
1
32
D2
LED Red
AC
R3
200 OHM
3.7.2PMIC LED Indicators
LED indicators are provided to notify the PMIC status to the user. Figure 8 shows the PMIC status LEDs D2 and D4, and a Reserved
LED indicator D3, that allows for an external rework connection to the transistor gate if any given signal debug is required.
RESET INDICATOR
PVIN
3
POR_B
POR_B
3
1
Q1
G
G
FDC6327C
2
S
4
D
6
D
200 OHM
5
S
PVIN
R1
R4
200 OHM
13
D3
LED_RED-GRN
POR_B
Red
Grn
42
Table 7 describes the meaning of the LED state.
Table 7. LED State Description
LEDDescription
Interrupt Notification
D2
D3
D1
ON = PMIC has detected an unmasked interrupt
OFF = No interrupt detected
PORB Notification
Green = PMIC is in regulation and operating properly
Red = PMIC is out of regulation
Reserved debug LED
ON = Q3 gate (R84 pad) is low
OFF = Q3 gate (R84 pad) is high or floating
Figure 8. PMIC Status Indicators
12Freescale Semiconductor, Inc.
KTVR500UG Rev. 1.0 8/2014
Page 13
Installing the GUI and Setting up the Hardware
4Installing the GUI and Setting up the Hardware
4.1Installing the GUI Interface
The new “driverless” environment allows automatically detecting and recognizing the board connected through the USB port, enabling the
specific features and controls for each board.
1. Create a directory on your PC as follows: C:\Freescale\KITVR500GUI
2. Extract the KITVR500GUI.zip file into that directory.
3. Launch the "setup.exe" program.
4. When the following popup dialog appears, click the “Install” button.
Figure 9. KITVR500EVM Installation Window
Freescale Semiconductor, Inc.13
KTVR500UG Rev. 1.0 8/2014
Page 14
Installing the GUI and Setting up the Hardware
4.2Configuring the Hardware
The KITVR500EVM operates with a single power supply from 3.1 to 4.5 V and is controlled via USB with help of an integrated USB-I2C
communication bridge. By applying the input voltage supply, the KITVR500EVM powers up according to the default power-up sequence
(34VR500V1) described in the MC34VR500 Data Sheet.
Connect the power supply and the USB communication cables as shown in Figure 10. Multimeter is optional but it is recommended in
order to accurately verify that each one of the output supplies is providing the correct voltage level.
The KITVR500EVM allows the selection of SW2 regulator output or an external 3.3 V LDO
output as the VCCI2C/I2C pull-up supply. By default, the 3.3 V LDO regulator is the source
for the VDDIO supply (J17 = 1–2). If the SW2 regulator is to be set below 3.0 V then make
sure the 3.3 V LDO output is connected to VCCI2C.
14Freescale Semiconductor, Inc.
Figure 10. KITVR500EVM Board Setup
Note:
KTVR500UG Rev. 1.0 8/2014
Page 15
Installing the GUI and Setting up the Hardware
4.2.1Step-by-step Instructions for Setting up the Hardware using GUI
To perform the demonstration examples, the following connections and setup must be performed:
1. Connect the power supply to J1, PVIN, and GND pins.
2. Switch on the power supply with a voltage set up between 3.1 and 4.5 V.
3. Connect the mini USB cable to J28 and to the computer.
4. Launch the VR500GUI, the description on how to use the GUI is provided in KTVR500SWUG
Figure 11. KITVR500GUI
The main features of the KITVR500GUI are:
• Automatic detection of the KITVR500EVM
• Read/write access to the 34VR500 PMIC
• Intuitive interface for controlling the 34VR500
• Monitoring all interrupts manually or continuously
• Scrip editor for prototyping, test emulation, or customized operation of the 34VR500 device
• Saving and recalling customized scripts files
KTVR500UG Rev. 1.0 8/2014
Freescale Semiconductor, Inc.15
Page 16
Schematic
VIN_SENSE
VDIG
VBG
VCC
LCSADS
Default:
1-2 shunt
Default:
1-2 shunt,
3-4 shunt.
POR_BSTBY
INT_B
VR500_EN
Default:
1-2 shunt
Default:
No shunt
Default:
No shunt
Default:
1-2 shunt
VIN
VCC
VBIAS
VBG
VDIG
VCCI2C
I2C_S CL
I2C_S DA
MCU_SDA
MCU_SCL
STBY
INT_ B
POR_B
EN
VR500_EN
VIN
V_SW2
VCCI2C
VCCI2C
PVIN
3V3
PVIN
MCU_SCL3,5
MCU_SDA3,5
STBY 3
INT_ B 3
POR_B 3
EN 3,5
J16
HDR 1X2 TH
12
SW1
FSMSM
DNP
12
TP4
DNP
C8
0.47uF
TP6
DNP
TP16
DNP
R7
1M
C51
1.0UF
Control
MC34VR500V1ES
U1A
ICTEST1
5
INT
1
POR
3
SCL
54
SDA
53
STBY
4
VDIG
51
VBG
52
VCCI2C
55
ICTEST2
47
EN
56
VCC
49
VIN
50
VBIAS
43
TP10
DNP
J9
HDR 1X2 TH
12
TP14
DNP
J15
HDR 2X2
12
3
4
C3
1.0UF
DNP
TP15
DNP
TP8
DNP
R10
10.0K
R6
4.7K
R8
10.0K
R9
100K
C52
1.0UF
R5
4.7K
J10
HDR 1X2 TH
12
C53
0.22uF
TP7
DNP
C2
1.0UF
C7
1.0UF
J17
HDR 2X2
12
3
4
C6
0.1UF
TP5
DNP
TP3
DNP
J8
HDR 1X2 TH
12
5Schematic
LDO INPUT SENSE POINTS
TP11
TP13
DNP
C33
1.0UF
C35
0.1UF
C37
0.1UF
VHALF
TP12
DNP
TP37
REFIN
TP38
VHALF
C63
1.0UF
DNP
DNP
VLDOIN1
VLDOIN23
VLDOIN45
17
27
40
30
29
U1B
VLDOIN1
VLDOIN23
VLDOIN45
REFIN
VHALF
LDO
REF
REG
MC34VR500V1ES
LDO1
LDO2
LDO3
LDO4
LDO5
REFOUT
V_LDO1
18
V_LDO2
26
V_LDO3
28
V_LDO4
39
V_LDO5
41
31
REFOUT
VIN
J12
2
1
HDR 1X2 TH
J13
2
1
HDR 1X2 TH
J14
1
2
HDR 1X2 TH
Default:
1-2 shunt
V_SW3
VLDOIN45 VLDOIN23 VLDOIN1
DNP
C54
1.0UF
0
R11
REFIN
C31
1.0UF
LDO OUTPUT SENSE POINTS
TP30
V_LDO1 V_LDO2 V_LDO3 V_LDO4 V_LDO5
DNP
C62
4.7uF
TP34
REFOUT
DNP
C29
1.0UF
TP40
DNP
C32
2.2UF
REFOUT
TP36
DNP
C34
4.7uF
TP18
DNP
C10
2.2UF
TP9
DNP
C4
2.2UF
V_LDO1 V_LDO2
V_LDO3 V_LDO4
V_LDO5
16Freescale Semiconductor, Inc.
Figure 12. Evaluation Board Schematic, Part 1
KTVR500UG Rev. 1.0 8/2014
Page 17
Schematic
VR500 - CONTROL SIGNALS
TERMINAL BLOCK SECTION
GND
EN
STBY
POR_B
INT _B
5,3
NE
3Y
BT
S
POR_B3
3B_
TNI
J4
SUB_TB_3X1
1
2
3
J5
SUB_TB_3X1
1
2
3
ROTACI
DNI NWODTUHS
ROTACI
DNI TPURRETNI
INT_B
EN
INT _B
EN
PVIN
PVIN
3B
_
TNI5,3NE
R2
200 OHM
Q2
FDV302P
1
32
D1
LED Red
AC
Q3
FDV302P
1
32
D2
LED Red
AC
R3
200 OHM
RESET INDICATOR
POR_B
POR_B
PVIN
PVIN
POR_B
3
Red
Grn
D3
LED_RED-GRN
42
13
R4
200 OHM
G
D
S
G
S
D
Q1
FDC6327C
2
6
1
5
4
3
R1
200 OHM
VR500 - LDO & REFOUT O/P HEADER SECTION
V_LDO1
V_LDO2
V_LDO3
V_LDO4
V_LDO5
REFOUT
V_LDO1V_LDO2V_LDO3V_LDO4
V_LDO5REFOUT
J34
CON_2X10
1
2
34
65
78
910
1112
1314
1516
1718
1920
SWVIN
PVIN
GND
SUB_TB_3X1
J1
SWVINPVINSWVIN
3
2
1
Main Input supply to the board
VR500 Swithcing Regulator input
VR500 Main chip supply &
Supply
PVIN -
SWVIN -
VIN -
Input supply for LDO.
J6
HDR 1X2 TH
Default:
12
1-2 shunt
Input Terminal Block J1 pin 2
Input Terminal Block J1 pin 3
(or)
Feed the power from PVIN
by shunting the head er J6.
Feed the power from PVIN
by shunting the head er J7
(or)
Feed the power from SWVIN
by shunting the head er J11.
Default:
No shunt
J11
12
HDR 1X2 TH
Input Source
VIN
12
J7
HDR 1X2 TH
Default:
1-2 shunt
3,5
MCU_SCL
MCU_SDA3,5
I2C Terminal Blocks
MCU_SCL
MCU_SDA
1
2
VCCI2C
1
VCCI2C
2
GND
J2
SUB_TB_2X1
J3
SUB_TB_2X1
Freescale Semiconductor, Inc.17
Figure 13. Evaluation Board Schematic, Part 2
KTVR500UG Rev. 1.0 8/2014
Page 18
Schematic
GNDGNDGNDGNDGNDGND
GROUND TEST POINTS
TP31
DNP
TP42
DNP
TP28
DNP
TP2
DNP
TP1
DNP
TP41
DNP
3YBTS
VR500 - CONTROL/I2C SIGNALS HEADER
J33
STBYEN
V_LDO1
1
34
78
9
1112
13
1516
1718
1920
CON_2X10
REFOUT
2
INT _B
65
POR_B
10
VCCI2C
MCU_SCL
14
MCU_SDA
PVIN
SWVIN
VR500 - LDO & REFOUT O/P
TERMINAL BLOCK SECTION
J27
REFOUT
GND
V_LDO1
1
2
3
SUB_TB_3X1
EN 3,5
INT _B 3
POR_B 3
MCU_SCL3,5
MCU_SDA3,5
REFOUT= DDR memory reference
voltage,10 mA.
VCCI2C
V_LDO1= 0.80 to 1.55 V, 250 mA
PVINSWVIN
V_LDO3V_LDO2
V_LDO5V_LDO4
V_LDO2
GND
V_LDO3
V_LDO4
GND
V_LDO5
J21
1
2
3
SUB_TB_3X1
J18
1
2
3
SUB_TB_3X1
V_LDO2 = 1.8 to 3.3 V, 100 mA
V_LDO3 = 1.8 to 3.3 V, 350 mA
V_LDO4 = 1.8 to 3.3 V, 100 mA
V_LDO5 = 1.8 to 3.3 V, 200 mA
MOUNTING HOLES
MTG
BH1
MTG
BH3
Figure 14. KITVR500EVM LDO/Control Schematic Part 3
BH4
MTG
BH2
MTG
18Freescale Semiconductor, Inc.
KTVR500UG Rev. 1.0 8/2014
Page 19
PVIN1_1 PVIN1_2PVIN1_3
Default:
1-2 shunt,
3-4 shunt,
5-6 shunt.
LX1
6.0A
V_SW1
PVIN2
Default:
1-2 shunt
2.4A
LX2
FB1
FB2
V_SW2
PVIN3_1 PVIN3_2
Default:
1-2 shunt,
3-4 shunt.
2.65A
LX3
FB3
V_SW3
PVIN4
Default:
1-2 shunt
2.0A
LX4
FB4
V_SW4
PVIN1_1
PVIN1_2
PVIN1_3
LX1
V_SW1
PVIN2LX2
V_SW2
PVIN3_2
PVIN3_1
LX3
V_SW3
PVIN4LX4
V_SW4
SWVIN
V_SW1
SWVIN
V_SW2
SWVIN
V_SW3
SWVIN
V_SW4
C25
22UF
C64
4.7uF
TP27
DNP
TP23
DNP
C61
0.1UF
C21
0.1UF
C9
22UF
C22
22UF
C30
22UF
J19
HDR 2X3
1
2
34
6
5
C57
0.1UF
TP19
DNP
C59
0.1UF
C47
22UF
DNP
L1 1uH
1
2
TP39
DNP
L4 1uH
12
C66
4.7uF
C58
4.7uF
TP20
DNP
TP24
DNP
C13
22UF
DNP
C24
22UF
C48
22UF
DNP
C36
22UF
DNP
C15
22UF
DNP
C12
22UF
C42
22UF
DNP
C14
22UF
DNP
C46
22UF
DNP
C27
22UF
DNP
C40
22UF
L2 1uH
1
2
TP25
DNP
TP33
DNP
C39
22UF
C65
0.1UF
C43
22UF
DNP
TP22
DNP
C56
4.7uF
C11
22UF
TP21
DNP
C41
22UF
TP26
DNP
TP35
DNP
J24
HDR 1X2 TH
12
C49
22UF
DNP
C26
22UF
DNP
C20
22UF
DNP
C23
22UF
C55
0.1UF
C60
4.7uF
L3 1UH
1
2
TP17
DNP
C45
22UF
DNP
J23
HDR 1X2 TH
12
C38
22UF
C1
22UF
DNP
C18
0.1UF
TP32
DNP
TP29
DNP
C44
22UF
DNP
J22
HDR 2X2
1
2
34
SW2
SW3
SW4
SW1
MC34VR500V1ES
U1C
PVIN1_3
12
SGND1
14
FB3
38
PVIN3_2
37
LX3_2
36
DNC4
33
PVIN3_1
34
LX3_1
35
SGND3
32
FB4
19
PVIN4
20
DNC6
44
DNC7
45
DNC8
46
PVIN1_1
7
LX1_1
8
PVIN1_2
10
LX1_2
9
FB1
13
LX1_3
11
DNC2
6
FB2
25
LX2
22
LX4
21
EPGND57SGND2
15
DNC1
2
DNC5
42
DNC3
16
SGND4
48
PVIN2_1
23
PVIN2_2
24
C19
4.7uF
C16
22UF
C28
22UF
C17
4.7uF
VR500-SWITHCING REGULATOR O/P
TERMINAL BLOCK SECTION
SW1
0.625 to 1.875 V
4.5 A (M ax. Peak)
SW3
0.625 to 1.975 V ,
2.5 A (M ax. Peak)
SW4
1.0 A
operates in VTT mode
provide DDR termination
at 50% of SW3
SW2
0.625 to 1.975V ,
1.0 A (M ax. Peak)
V_SW1
V_SW2
V_SW3
V_SW4
J32
SUB_TB_2X1
1
2
J29
SUB_TB_2X1
1
2
J31
SUB_TB_2X1
1
2
J30
SUB_TB_2X1
1
2
VR500-SWITHCING REGULATOR O/P HDR
V
VOUT = 1.242 X ( (R2/R1) + 1) = 3.3V
R2 = ((VOUT/1.242) -1) X R1
LDO REGULATOR 3.3 V
Layout Note :
Place this LDO section
on the bottom s ide of the PCB.
2R19,R20 ZERO RES MF ZERO 1/10W -- 0402ERJ-2GE0R00X
1R2112 KRES MF 12 K 1/10W 1% 0603RK73H1JTTD1202F
1R22 20 KRES MF 20 K 1/10W 5% 0603CR0603-JW-203ELF
2R23,R24
1.5 K
RES MF 1.5 K 1/16W 5% 0402CRCW04021K50JNED
Inductors
41
42
43
44
45
1L11 H
1L21 H
1L31 H
1L41 H
2L5,L6
HI1812V101R10
Coilcraft IND PWR 1 H@100 KHz 6 A
20% SMT
Coilcraft IND PWR 1 H@100 KHZ
2.65 A 20% SMT
TDK IND PWR 1 H@1 MHZ 2 A 30%
SMT
Coilcraft IND PWR 1 H@100 KHZ 2.4
A 30% SMT
IND FER 100 @100 MHZ 8 A 25%
SMD/1812
XAL4020-102MEC
LPS5015-102MLC
VLS252010T-1R0N
LPS4012-102NLC
HI1812V101R-10
Switches, Connectors, Jumpers, and Test Points
46
1F1
0.5 A
FUSE PLYSW 0.5A 13.2V SMTMICROSMD050F-2
SUBASSEMBLY HDR 1X3 TH 197MIL
47
6J1,J4,J5,J18,J21,J27
SUB_TB_3X1
374H SN 138L + CON 1X3 PLUG TB
210-80542,211-79574
TH 5MM 449H
SUBASSEMBLY HDR 1X2 TH 197MIL
48
6J2,J3,J29,J30,J31,J32
SUB_TB_2X1
374H SN 138L + CON 1X2 PLUG TB
210-80539,211-79573
TH 5MM 449H
4912
503
512
521
531
541
J6,J7,J8,J9,J10,J11,J12,
J13,J14,J16,J23,J24
J15,J17,J22
J19,J26
J20
J25
J28
HDR 1X2 TH
HDR 2X2
HDR 2X3
HDR 2X4
HDR 1X3
USB-MiniB
HDR 1X2 TH 100MIL SP 339H AU 118L 210-91-02GB01
HDR 2X2 TH 100MIL CTR 340H SN
105L
HDR 2X3 TH 100MIL CTR 335H AU
95L
HDR 2X4 TH 100MIL CTR 425H AU
310L
5-146258-2
TSW-103-07-S-D
TSW-104-16-G-D
HDR 1X3 TH 100MIL SP 340H AU 118L M20-9990345
CON 5 USB MINI-B RA SHLD SKT
SMT 31MIL SP AU
675031340
Assy
Opt
(2)
(3)
(3)
(3)
(3)
Freescale Semiconductor, Inc.23
KTVR500UG Rev. 1.0 8/2014
Page 24
Board Bill of Materials
Table 8. Bill of Materials
ItemQtySchematic LabelValueDescriptionPart Number
553
561
572
581
5942
Notes
1. Freescale does not assume liability, endorse, or warrant components from external manufacturers are referenced in circuit drawings or tables.
While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their application.
2. Do not populate
3. Critical components. For critical components, it is vital to use the manufacturer listed.