This document is the Hardware User’s Guide for the i.MX
6UltraLite Evaluation Kit (EVK) based on the Freescale
Semiconductor i.MX 6UltraLite Applications Processor.
This board is fully supported by Freescale Semiconductor.
This Manual includes system setup and debugging, and
provides detailed information on the overall design and
usage of the EVK board from a Hardware Systems
perspective.
1.1Board overview
This EVK board is a platform designed to showcase many of
the most commonly used features of the i.MX 6UltraLite
Applications Processor in a small, low cost package. The
i.MX 6UltraLite EVK board is an entry level development
board, which gives the developer the option of becoming
familiar with the processor before investing a large amount
or resources in more specific designs.
RT9193-33GB
UNIONUM1750S-00
MicroSD card connector
256Mbit QSPI Flash
32Gb NAND Flash (unpopulated)
32 Gb eMMC (unpopulated)
LCD connector
HDMI connector (no function by default)
Dual RJ45 Connector for 10/100 Base-T
One USB 2.0 Standard-A host connector
One USB 2.0 Micro-B OTG connector
Audio connectors:
Power connector:
Debug connectors:
Sensor
Camera
CAN
Bluetooth
EMV SIM
User Interface Buttons
3.5 mm Stereo Headphone output
Mono-Microphone input on board
Left & Right Speaker Out connectors
5V DC-Jack, 2.0mm (Power supply: DC5V/3.5A, 2.1mmX5.5mm)
UART to USB connector
RJ-45 connector for 10/100 Base-T
20-pin Standard JTAG connector
eCOMPASS
Accelerometer
Gyroscope (unpopulated)
CMOS Camera connector
CAN bus connector
20-pin Bluetooth Connector
14-pin EMV SIM connector
ON/OFF, Reset button
Connection point for ML414 Coin Cell (unpopulated) for RTC Operation
ARDUINO Headers
Main board: 2.66 inch x 1.27 inch (6.76cm x 4.24 cm), 4-layer board
Base board: 5.12 inch x 4.25 inch (13.0cm x 10.8 cm), 4-layer board
1.2i.MX 6UltraLite EVK contents
The i.MX 6UltraLite EVK contains the following items:
•i.MX 6UltraLite Main board & Base board
•Quick Start Guide
1.3i.MX 6UltraLite EVK board revision history
•Rev A—Proof of Concept
•Rev B—Prototype (Internal Freescale Development)
•Rev C—Production (For Customer)
The board assembly version will be printed on a label, usually attached to the bottom side. The assembly
version will be the letter designation following the schematic revision: base board is 700-28616 REV C,
main board is 700-28617 REVC2.
This chapter provides detailed information about the electrical design and practical considerations of the
EVK board, and is organized to discuss each block in the following block diagram of the EVK board.
The overview of the i.MX 6UltraLite EVK board is shown in the following figure.
Figure 3. Overview of the i.MX 6UltraLite EVK board connection
2.1i.MX 6UltraLite processor
The i.MX 6UltraLite processor represents Freescale Semiconductor’s latest achievement in integrated
multimedia-focused products offering high performance processing with a high degree of functional
integration, targeted towards the growing market of connected devices. The i.MX 6UltraLite processor
features Freescale’s advanced implementation of the single ARM®Cortex®-A7 core, which operates at
speeds up to 528 MHz. The i.MX 6UltraLite includes integrated power management module that reduces
the complexity of external power supply and simplifies the power sequencing. Each processor provides a
16-bit DDR3/LVDDR3/LPDDR2 memory interface and a number of other interfaces for connecting
peripherals, such as WLAN, Bluetooth, GPS, displays, and camera sensors.
The more detail information about the processor can be found in the datasheet and the reference manual,
which can be obtained from the Freescale website.
2.2Boot mode configurations
BOOT_MODE[1:0] are used to select system boot mode. On the i.MX 6UltraLite EVK board, a
dual-switch (SW602) is used to select the input voltage of these two pins, either 0 or 3.3 V.
Typically, internal boot is selected for normal boot, which is configured by external BOOT_CFG GPIOs.
Then the developer must set the switch SW602: D2(MODE0) to OFF, D1(MODE1) to ON, and use
SW601 to select the boot device. This is shown in the following table and figure.