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This document explains how to connect and operate the i.MX27 3-Stack Platform System.
Audience
This document is intended for software, hardware, and system engineers who are planning to use
the i.MX27 hardware and for anyone who wants to understand more about the i.MX27 hardware.
Organization
This document contains the following chapters.
Chapter 1 Intr oduces the features and functionality of the 3-Stack board.
Chapter 2 Provides configuration and setup information.
Chapter 3 Explains how to assemble the boards.
Chapter 4 Provides block diagrams and memory mapping.
Chapter 5 Provides connector pin assignments and signal descriptions.
Courier Is used to identify comman ds, explicit comman d p ar ame ter s, code
examples, expressions, data types, and directives.
ItalicIs used for emphasis, to identify new terms, and for replaceable command
parameters.
Definitions, Acronyms, and Abbreviations
Th e followin g lis t defines the abb re viations used in th is document.
APMS Atlas Power Management System
ATA Har d dr ive interface spec
CD Compact Disk
CM OS Comp leme ntary Meta l Oxide Se miconductor
CPLD Custom Progr ammed Logic Devices
CPU Central Processing Unit
CSI Camera Sensor Imaging
CSPI Serial Peripheral Interface
DCE Data Communication s E quipment
DDR Double Data Rate
DIP Dual In-line Package
DMA Direct Memory Access
DTE Data Terminal Equipment
DUART Dual Universal Asynchronous Receiver/Transmitter
EEPROM Electrically Erasable Progr ammable Read Only Memory
EPROM Erasable Programmable Read Only Memory
FIR Infra Red
GPIO General Purpose Input/Output
GPO General Purpose Output
I
2C Inter-Integrated Circuit
ICE In-Circuit Emulator
I/O I nput/Output
IrDA Infrared Data Association
ISA Instr umentation, System, and Automation Society
JTAG Joint Test Access Group
LAN Local Area Network
LCD Liquid Crystal Display
LED Light Emitting Diode
MB Mega byte
MCU Microcontroller Unit
MM C Multi- med ia Card
MC P M ulti-ch ip p roduct
MS Memory St ick
NVRA M Non -volatile Ra n dom Access Memory
OTG On t he Go
PC Personal Computer
PCMCIA Personal Computer Memory Card International Asso ciation
PCB Printed Circuit Board
PHY Physical interface
POR Power on Reset
PSRAM Pseudo Random Access Memo ry
PWM Pulse Width Modulation
QVGA Graphics Adapter
RAM Random Access Memory
SD SanDisk (Smart Media)
SDRAM Synchronous Dynamic Random Access Memory
SI System International (international syst em of units and measures)
SIMM Single In-Line Memory Module
SPST Single Pole Single Throw
SSI2 Synchro nous Serial Interface
TFT Th in Film Tr ansistor
UART Universal Asynchrono us Receiver/Transmitter
USB Univer sal Serial Bus
The i.MX27 3-Stack Platform System helps you develop new solutions using the i.MX27
ARM9™ MCU and the MC13783 audio and power management chip.
The 3-Stack platform comprises the CPU Engine board, Personality board, and Debug board. The
system suppo r ts application software development, target bo ar d debugging, and optional circuit
cards. The CPU board can be run in stand-alone mode for code development. An LCD display
panel is supplied with the 3-Stack system.
Figure 1-1 shows the major components of the 3-Stack system.
The 3-Stack system can be used in two ways: the development mode requires a three-board
as sembly; the d emons tratio n mode r eq uires only a two-board assembly (without th e Debug
board).
The system includes the following features
.
• Near form-factor demonstration modules and working platforms.
• Solid reference schematics that closely resemble final products to aid customers’ designs.
• Three-board system, which includes:
⎯ CPU board with i.MX27 ARM9 MCU, MC13783 chip
⎯ Personality boar d with peripheral components and interface connectors
⎯ Debug board with two RS-232 interfaces, 10/100 Base-T Ethernet connector, and
current measure connectors.
• Utilizes reliable high-density connector to interface between boards.
Fig ure 1- 2 illu str ates the three-board assembly (left) fo r dev elop ment and th e tw o-boar d a ssembly
(right) for demonstration.
This section contains configuration information, connection descriptions, and other operational information
that may be useful during the development process.
2.1 Debug Board Configuration
Th e D ebug bo ard pro vides an easy, familia r inter face for pr ogramming and debugging the i.MX
development systems and reference platforms.
This section describes the switches and connectors o n t he t op of the Debug board, and the connector to t he
CPU Engine bo ar d on the bott om of the Debug board. The Debug board is a small card that you can insert
o r remov e fr om th e p latfor m. The ab ility to remov e the debug bo ard is a major ad van tage to marketing a nd
sa les tea ms who want to d emonst rate and sh owcase a varie ty of pro ducts an d id ea s in a streamlined, nea r
form factor way, without t he added software development bulk.
2.1.1 Debug Board Top Switches and Connectors
Figure 2-1 ident ifies the switches and connectors located o n top of the Debug board. Table 2-1 describes
the switches and connectors.
S1 Power button, connected to the ON1B input of the MC13783 through the 500 pin connector.
The line is pulled up, and pushing it grounds the line. If MC13783 is in Off, User Off or
Memory Hold Mode, the board can be powered on by pushing the button
S2 Reset button, which resets the Debug board
S3 System reset switch, connected to the RESETB to MX27. The line is pulled up, and pushing it
grounds the line.
S4 Power on switch, which powers up the Debug board when set to 1.
J1 10/100 Base T Ethernet RJ45 Connector
J2 5.0V DC power connector
J3 Current measure connector; measures the current at various points of CPU Engine and
Personality board from the connector
F1 Re-settable fuse; re-settable over-current protection
D1 – D8 LEDs for CPLD debug
D9 LED for debug board 3.3V power; the LED will be bright when debug 3.3V is power on
D11 LED for DC power supply; the LED will be bright when 5.0V DC power is supplied
P1 WEIM Address measure connector; can support CodeTest Interface Probe
P2 WEIM Data measure connector; can support CodeTest Interface Probe
Enable switch; the switch designation settings follow.
ON Serial port UART (DTE) CON3 is selected SW4-1 UART Port Select
OFF Serial port UART (DCE) CON4 is selected
ON Enable NorFlash on Debug board SW4-2 NorFlash Enable
OFF Disable Norflash on Debug board
SW4-8 Power Enable
Boot mode setting switches; SW5 to SW10 settings determine where the processor begins
program execution; the valid combinations of the switch settings follow.
This section describes the switches and connectors o n t he t op of the Personality board, and the connecto r s
on the bottom of the Personality board.
2.2.1 Personality Board Top Connectors
Figure 2-3 ident ifies the connectors on the top of the Personalit y Board.
Figure 2-3 Personality Board Connectors, Top View
Table 2-2 Personality Board Connectors, Top View
Component
Identifier
E1 Wi-Fi antenna
E2 Bluetooth antenna
F1 Resettable over current-protection fuse
J10 Mini USB OTG High speed connector, for USB OTG connection