Freescale Semiconductor DSP56800E User Manual

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DSP56800E_Quick_Start

User’s Manual

Targeting Freescale 56F8xxx Platform

Rev. 2.4, 01/04/2009

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This document contains information on a new product. Specifications and information herein are subject to change without notice.

Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Freescale data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All opening parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale was negligent regarding the design or manufacture of the part. Freescale is registered trademarks of Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. is an Equal Opportunity/Affirmative Action Employer. All other tradenames, trademarks, and registered trademarks are the property of their respective owners.

How to reach us:

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HOME PAGE: http://www.freescale.com/

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Chapter 1

Introduction

1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.1.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.1.1.1 Core-system Infrastructure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.1.1.2 On-chip Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.1.1.3 Sample Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.1.1.4 Graphical Configuration Tool. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

1.1.1.5 FreeMASTER Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

1.2 Quick Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

1.2.1 Install CodeWarrior Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

1.2.2 Install DSP56800E_Quick_Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5

1.2.2.1 Supplementary DSP56800E_Quick_Start Installation Steps . . . . . . . . . . .1-6

1.2.2.2 Install Graphical Configuration Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6

1.2.2.3 Install FreeMASTER (PC Master Software) . . . . . . . . . . . . . . . . . . . . . . .1-8

1.2.3 Install MC56F8xxxEVM Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8

1.2.4 Build and Run Sample Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10

Chapter 2

Core System Infrastructure

2.1 Boot Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.1.1 Power-up/Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.1.2 Start() - entry point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

2.1.3 userPreMain() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

2.1.4 main() the User’s Application Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.1.5 userPostMain() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4

2.2 Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-5

2.3 ArchIO Peripheral Register Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-6

2.4 Core System’s Routines and Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7

2.4.1 Architecture dependent routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7

2.4.1.1 archEnableInt - enable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

2.4.1.2 archEnableIntLvl123 - enable interrupt levels 1, 2 and 3. . . . . . . . . . . . . . 2-7

2.4.1.3 archEnableIntLvl23 - enable interrupts levels 2 and 3 . . . . . . . . . . . . . . . .2-8

2.4.1.4 archDisableInt - disable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

2.4.1.5 archResetLimitBit - reset limit bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

2.4.1.6 archSetNoSat - set no saturation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2.4.1.7 archSetSat32 - set saturation mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

2.4.1.8 archSet2CompRound - set two’s complement rounding mode . . . . . . . . . 2-9

2.4.1.9 archSetConvRound - set convergent rounding mode . . . . . . . . . . . . . . . .2-10

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2.4.1.10 archStop - stop processing state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

2.4.1.11 archTrap - initiate a software interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

2.4.1.12 archWait - wait processing state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

2.4.1.13 archGetLimitBit - get limit bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

2.4.1.14 archGetSetSaturationMode - get and set saturation mode . . . . . . . . . . . . 2-11

2.4.1.15 archDelay - delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12

2.4.2 Macros for peripheral memory access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

2.4.2.1 periphMemRead - memory read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

2.4.2.2 periphMemWrite - memory write. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

2.4.2.3 periphBitSet - set selected bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14

2.4.2.4 periphMemInvBitSet - invert memory content and set selected bits . . . . 2-15

2.4.2.5 periphBitClear - clear selected bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

2.4.2.6 periphBitGrpSR - set bit group to given value . . . . . . . . . . . . . . . . . . . . . 2-16

2.4.2.7 periphBitGrpRS - set bit group to given value . . . . . . . . . . . . . . . . . . . . . 2-16

2.4.2.8 periphBitGrpZS - set bit group to given value . . . . . . . . . . . . . . . . . . . . .2-17

2.4.2.9 periphBitGrpSet - set bit group to given value. . . . . . . . . . . . . . . . . . . . .2-18

2.4.2.10 periphSafeAckByOne - clear (acknowledge) bit flags which are active-high and are cleared by write-one2-19

2.4.2.11 periphBitChange - change selected bits . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19

2.4.2.12 periphBitTest - test selected bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

2.4.3 Miscellaneous Routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-21

2.4.3.1 impyuu - integer multiply unsigned 16b x unsigned 16b . . . . . . . . . . . . .2-21

2.4.3.2 impysu - integer multiply signed 16b x unsigned 16b . . . . . . . . . . . . . . . 2-21

2.4.3.3 shl2 - optimized version of shl intrinsic function . . . . . . . . . . . . . . . . . . . 2-22

2.4.3.4 shr2 - optimized version of shr intrinsic function. . . . . . . . . . . . . . . . . . . 2-23

2.4.4 Intrinsic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-23

2.5 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24

2.5.1 Processing Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24

2.5.1.1 Interrupt Vector Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-24

2.5.1.2 Interrupt Processing Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24

2.5.1.3 ISRs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.5.1.4 Interrupt Priority Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-26

2.5.1.5 Fast Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26

2.5.1.6 Clearing Interrupt Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-26

2.5.2 Configuring Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-27

2.5.2.1 Installing ISRs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-27

2.5.2.2 Assigning Interrupt Priority Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-27

2.5.2.3 Installing Fast Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-28

2.5.2.4 Enabling Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-29

2.5.3 Code Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-29

2.6 Advanced Topics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-34

2.6.1 Project Targets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34

2.6.2 Inside Startup Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-39

2.6.2.1 Symbols Used in Startup Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-39

2.6.2.2 Startup Source Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-41

Chapter 3

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Directory Structure

3.1 Root Directory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.2 Sample Applications Directory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3.3 Tools Directory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2

3.4 Src Directory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

3.5 Stationery Directory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

3.6 User_manuals Directory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

Chapter 4

Developing Software

4.1 Creating a new project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

4.2 On-chip peripheral initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2

4.3 On-chip drivers - interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3

4.3.1 ioctl(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4

4.3.2 read(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

4.3.3 write() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

4.4 Interrupts and Interrupt Service Routines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6

4.5 appconfig.h file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6

Chapter 5

On-chip Drivers

5.1 OCCS Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

5.1.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5.1.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

5.1.2.1 OCCS frequency calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5

5.1.2.2 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-6

5.1.2.3 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6

5.1.2.4 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7

5.1.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-12

5.1.4 OCCS Driver Sample Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-53

5.2 INTC Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-61

5.2.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-61

5.2.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-61

5.2.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-61

5.2.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-62

5.2.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-63

5.2.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-65

5.2.4 INTC Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-81

5.3 WINTC Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-87

5.3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-87

5.3.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-87

5.3.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-87

5.3.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-88

5.3.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-89

5.3.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-91

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5.3.4 INTC Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-103

5.4 COP Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-111

5.4.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-111

5.4.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-111

5.4.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-111

5.4.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-112

5.4.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-112

5.4.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-114

5.4.4 COP Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-128

5.5 SYS Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-133

5.5.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-133

5.5.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-133

5.5.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-134

5.5.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-134

5.5.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-136

5.5.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-144

5.5.4 SYS Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-202

5.6 PMC Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-209

5.6.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-209

5.6.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-209

5.6.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-209

5.6.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-210

5.6.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-210

5.6.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-212

5.6.4 PMC Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-233

5.6.4.1 pmc_demo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-233

5.7 FlexCAN Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-235

5.7.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-235

5.7.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-236

5.7.2.1 FlexCAN Bit-Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-236

5.7.2.2 FlexCAN Message Identifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-237

5.7.2.3 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-239

5.7.2.4 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-239

5.7.2.5 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-240

5.7.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-246

5.7.4 FlexCAN Driver Sample Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-299

5.8 GPIO Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-307

5.8.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-307

5.8.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-307

5.8.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-307

5.8.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-308

5.8.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-309

5.8.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-311

5.8.4 GPIO Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-344

5.9 ADC Driver (MC56F83xx,MC56F801x,MC56F802x/3x) . . . . . . . . . . . . . . . .5-349

5.9.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-349

5.9.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-349

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5.9.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-349

5.9.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-350

5.9.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-352

5.9.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-359

5.9.4 ADC Driver Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-428

5.10 ADC Driver (MC56F800x) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-433

5.10.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-433

5.10.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-433

5.10.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-433

5.10.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-434

5.10.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-434

5.10.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-437

5.10.4 ADC Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-455

5.10.4.1 adc_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-455

5.11 PGA Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-457

5.11.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-457

5.11.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-457

5.11.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-457

5.11.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-458

5.11.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-458

5.11.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-460

5.11.4 PGA Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-478

5.11.4.1 pga_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-478

5.12 PDB Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-479

5.12.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-479

5.12.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-479

5.12.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-479

5.12.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-480

5.12.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-480

5.12.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-482

5.12.4 PDB Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-498

5.12.4.1 PDB_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-498

5.13 Quadrature Decoder Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-499

5.13.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-499

5.13.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-499

5.13.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-499

5.13.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-502

5.13.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-502

5.13.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-506

5.13.4 Quadrature Decoder Driver Application. . . . . . . . . . . . . . . . . . . . . . . . . . . .5-542

5.14 PWM Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-547

5.14.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-547

5.14.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-547

5.14.2.1 PWM Module Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-547

5.14.2.2 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-548

5.14.2.3 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-550

5.14.2.4 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-552

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5.14.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-560

5.14.4 PWM Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-637

5.15 SCI Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-645

5.15.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-645

5.15.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-645

5.15.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-645

5.15.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-646

5.15.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-648

5.15.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-653

5.15.4 SCI Driver Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-706

5.16 SPI Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-713

5.16.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-713

5.16.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-713

5.16.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-713

5.16.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-714

5.16.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-715

5.16.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-720

5.16.4 SPI Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-765

5.17 IIC Driver (MC56F801x,MC56F800x) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-773

5.17.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-773

5.17.1.1 IIC Bus Transactions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-773

5.17.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-774

5.17.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-775

5.17.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-775

5.17.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-777

5.17.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-780

5.17.4 IIC Driver Sample Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-817

5.18 IIC Driver (MC56F802x/3x) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-819

5.18.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-819

5.18.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-819

5.18.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-820

5.18.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-820

5.18.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-821

5.18.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-825

5.18.4 IIC Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-859

5.19 Temperature Sensor System Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-861

5.19.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-861

5.19.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-861

5.19.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-861

5.19.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-862

5.19.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-862

5.19.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-863

5.19.4 Temperature Sensor System Driver Application . . . . . . . . . . . . . . . . . . . . . 5-867

5.20 Quad Timer Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-869

5.20.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-869

5.20.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-869

5.20.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-869

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5.20.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-870

5.20.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-875

5.20.4 Quad Timer Driver Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-924

5.21 PIT Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-931

5.21.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-931

5.21.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-931

5.21.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-931

5.21.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-932

5.21.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-932

5.21.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-934

5.21.4 PIT Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-944

5.21.4.1 dac_pit_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-944

5.21.4.2 dac_cmp_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-944

5.21.4.3 adc_fmstr_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-944

5.22 CMP Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-945

5.22.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-945

5.22.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-945

5.22.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-945

5.22.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-946

5.22.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-946

5.22.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-948

5.22.4 CMP Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-962

5.22.4.1 dac_cmp_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-962

5.23 HSCMP Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-963

5.23.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-963

5.23.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-963

5.23.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-963

5.23.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-964

5.23.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-964

5.23.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-966

5.23.4 HSCMP Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-986

5.23.4.1 hscmp_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-986

5.24 DAC Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-987

5.24.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-987

5.24.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-987

5.24.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-987

5.24.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-988

5.24.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-988

5.24.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-990

5.24.4 DAC Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1008

5.24.4.1 dac_pit_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1008

5.24.4.2 dac_cmp_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1008

5.24.4.3 adc_fmstr_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1008

5.25 MSCAN Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1009

5.25.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1009

5.25.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1009

5.25.2.1 MSCAN Bit-Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1009

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5.25.2.2 CAN Message Identifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1011

5.25.2.4 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1013

5.25.2.5 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1014

5.25.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1020

5.25.4 Message Buffer API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1074

5.25.5 MSCAN Driver Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1088

5.26 RTC Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1089

5.26.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1089

5.26.2 Quick Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1089

5.26.2.1 API Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1089

5.26.2.2 Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1090

5.26.2.3 API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1090

5.26.3 Detailed API Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1092

5.26.4 RTC Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1104

5.26.4.1 rtc_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1104

Chapter 6

FreeMASTER Driver

6.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6.2 Driver Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

6.3 Interrupt Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-3

6.4 New Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-4

6.4.1 Target-side Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-4

6.4.2 Application Command Callbacks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-4

6.5 Driver Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-4

6.6 Driver Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-10

6.6.1 Driver API. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10

6.6.2 Code Listing: freemaster_demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-24

6.6.3 Code Listing: freemaster_demo2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-27

Chapter 7

Graphical Configuration Tool

7.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

7.1.1 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

7.1.2 How does it work? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

7.2 Program usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-3

7.2.1 GUI Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3

7.2.1.1 Peripheral Modules Tree. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-4

7.2.1.2 Peripheral Module Settings Pane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-4

7.2.1.3 Pinout Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4

7.2.1.4 Register View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-5

7.2.1.5 Warnings View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-6

7.2.1.6 Options dialog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-6

7.2.2 Application Configuration File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7

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License

8.1 Software License Agreement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-1

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List of Tables

2-1 archGetSetSaturationMode arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

2-2 archDelay arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

2-3 periphMemRead arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13

2-4 periphMemWrite arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

2-5 periphBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

2-6 periphMemInvBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

2-7 periphBitClear arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

2-8 periphBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16

2-9 periphBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16

2-10 periphBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17

2-11 periphBitSet arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18

2-12 periphSafeAckByOne arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19

2-13 periphBitChange arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19

2-14 periphBitTest arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20

2-15 impyuu arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2-16 impysu arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21

2-17 shl2 arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2-18 shr2 arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23

2-19 Targets of the MC56F8300DEMO project. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34

2-20 Targets of the MC56F8323EVM project.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34

2-21 Targets of the MC56F8346EVM project.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34

2-22 Targets of the MC56F8346CB project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35

2-23 Targets of the MC56F8357EVM project.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36

2-24 Targets of the MC56F8367EVM project.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36

2-25 Targets of the MC56F8013DEMO and MC56F8014DEMO project. . . . . . . . 2-37

2-26 Targets of the MC56F8013CB project. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-37

2-27 Targets of the MC56F8023DEMO, MC56F8023CB and MC56F8025DEMO

project.2-37

2-28 Targets of the MC56F8037EVM project.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-38

5-1 OCCS Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

5-2 OCCS Configuration Items for appconfig.h. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6

5-3 OCCS Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8

5-4 ioctl commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8

5-5 OCCS_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13

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5-6 OCCS_SET_CORE_CLOCK ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-14

5-7 OCCS_SET_POSTSCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-15

5-8 OCCS_SET_PRESCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-16

5-9 OCCS_SET_DIVIDE_BY ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-17

5-10 OCCS_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-18

5-11 OCCS_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19

5-12 OCCS_LOCK_DETECTOR ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-20

5-13 OCCS_TURN_OFF_CHARGE_PUMP ioctl call arguments . . . . . . . . . . . . . 5-21

5-14 OCCS_SET_ZCLOCK SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-22

5-15 OCCS_GET_ZCLOCK SOURCE ioctl call arguments. . . . . . . . . . . . . . . . . . 5-23

5-16 OCCS_READ_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-24

5-17 OCCS_CLEAR_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26

5-18 OCCS_GET_IPBUS_FREQ ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-27

5-19 OCCS_SET_LORTP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-28

5-20 OCCS_WRITE_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . 5-29

5-21 OCCS_WRITE_DIVIDE_BY_REG ioctl call arguments . . . . . . . . . . . . . . . . 5-30

5-22 OCCS_WRITE_OSC_CONTROL_REG ioctl call arguments . . . . . . . . . . . . 5-31

5-23 OCCS_READ_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-32

5-24 OCCS_READ_DIVIDE_BY_REG ioctl call arguments . . . . . . . . . . . . . . . . . 5-33

5-25 OCCS_READ_STATUS_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-34

5-26 OCCS_READ_OSC_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . 5-35

5-27 OCCS_POWER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-36

5-28 OCCS_SHUTDOWN ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-37

5-29 OCCS_SET_ZCLOCK OCCS_SET_PRESCALER_CLOCK ioctl call arguments

5-38

5-30 OCCS_INTERNAL_RELAX_OSC_OPERATION ioctl call arguments . . . . 5-39

5-31 OCCS_ADJUST_RELAX_OSC_FREQ ioctl call arguments . . . . . . . . . . . . . 5-40

5-32 OCCS_TRIM_RELAX_OSC_8MHZ ioctl call arguments . . . . . . . . . . . . . . . 5-41

5-33 OCCS_DIRECT_CLOCK_MODE ioctl call arguments . . . . . . . . . . . . . . . . . 5-42

5-34 OCCS_SELECT_EXT_CLOCK_SOURCE ioctl call arguments . . . . . . . . . . 5-43

5-35 OCCS_WPROTECT_PLL_SETTINGS ioctl call arguments . . . . . . . . . . . . . 5-45

5-36 OCCS_WPROTECT_OSC_SETTINGS ioctl call arguments . . . . . . . . . . . . . 5-46

5-37 OCCS_WPROTECT_CLK_SETTINGS ioctl call arguments . . . . . . . . . . . . . 5-47

5-38 OCCS_SET_CLOCK_CHECK ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-48

5-39 OCCS_TEST_CLOCK_CHECK ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-49

5-40 OCCS_READ_CLOCK_CHECK_REFERENCE ioctl call arguments. . . . . . 5-50

5-41 OCCS_READ_CLOCK_CHECK_TARGET ioctl call arguments . . . . . . . . . 5-51

5-42 OCCS_SELECT_FREQ_RANGE ioctl call arguments. . . . . . . . . . . . . . . . . . 5-52

5-43 INTC Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-61

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5-44 INTC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-62

5-45 INTC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-63

5-46 ioctl commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-63

5-47 INTC_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-66

5-48 INTC_INTERRUPTS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-67

5-49 INTC_SET_IPL_n ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-68

5-50 INTC_SET_IPL_n_RAW ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-69

5-51 INTC_GET_IPL_n_RAW ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-70

5-52 INTC_SET_FASTINTx ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-71

5-53 INTC_SET_FASTINTx_VEC ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-72

5-54 INTC_GET_PENDING_FLAG ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-73

5-55 INTC_READ_CONTROL_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-74

5-56 INTC_GET_INT_STATE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-75

5-57 INTC_GET_INT_LEVEL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-76

5-58 INTC_GET_INT_NUMBER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-77

5-59 INTC_READ_IRQPINS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-78

5-60 INTC_SELECT_EDGE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-79

5-61 INTC_SELECT_LEVEL_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-80

5-62 WINTC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-87

5-63 WINTC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . 5-88

5-64 WINTC Driver Arguments - ioctl. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-89

5-65 ioctl commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-89

5-66 WINTC_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-92

5-67 WINTC_INTERRUPTS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-93

5-68 WINTC_GET_INT_STATE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-94

5-69 WINTC_GET_INT_LEVEL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-95

5-70 WINTC_GET_INT_NUMBER ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-96

5-71 WINTC_ASSIGN_USERx_VECTOR ioctl call arguments . . . . . . . . . . . . . . 5-97

5-72 WINTC_SET_INT_EOnCE_STEP_COUNTER ioctl call arguments . . . . . . 5-98

5-73 WINTC_SET_INT_EOnCE_RECEIVER_REGISTER_FULL ioctl call arguments

5-99

5-74 WINTC_SET_INT_EOnCE_TRANSMIT_REGISTER_EMPTY ioctl call argu-

ments5-100

5-75 WINTC_SET_INT_EOnCE_TRACE_BUFFER ioctl call arguments . . . . . 5-101

5-76 WINTC_SET_INT_EOnCE_BREAKPOINT_UNIT0 ioctl call arguments . 5-102

5-77 COP Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-111

5-78 COP Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-112

5-79 COP Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-112

5-80 ioctl commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-113

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Page 16

5-81 COP_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-115

5-82 COP_DEVICE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-116

5-83 COP_SET_TIMEOUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-117

5-84 COP_READ_COUNTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-118

5-85 COP_CLEAR_COUNTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-119

5-86 COP_CLEAR_COUNTER_PART1 ioctl call arguments . . . . . . . . . . . . . . . 5-120

5-87 COP_CLEAR_COUNTER_PART2 ioctl call arguments . . . . . . . . . . . . . . . 5-121

5-88 COP_RUN_IN_STOP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-122

5-89 COP_RUN_IN_WAIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-123

5-90 COP_WRITE_PROTECT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-124

5-91 COP_LOR_WATCHDOG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-125

5-92 COP_SET_CLOCK_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-126

5-93 COP_SET_CLOCK_PRESCALER ioctl call arguments. . . . . . . . . . . . . . . . 5-127

5-94 Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-133

5-95 SYS Configuration Items for appconfig.h MC56F83xx/MC56F801x . . . . . 5-134

5-96 SYS Configuration Items for appconfig.h MC56F802x/3x. . . . . . . . . . . . . . 5-135

5-97 SYS Configuration Items for appconfig.h MC56F800x . . . . . . . . . . . . . . . . 5-135

5-98 SYS Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-136

5-99 ioctl commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-136

5-100 SYS_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-145

5-101 SYS_STOP ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-146

5-102 SYS_STOP_PERMANENT_DISABLE ioctl call arguments . . . . . . . . . . . . 5-147

5-103 SYS_WAIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-148

5-104 SYS_WAIT_PERMANENT_DISABLE ioctl call arguments. . . . . . . . . . . . 5-149

5-105 SYS_SOFTWARE_RESET ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-150

5-106 SYS_ONCE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-151

5-107 SYS_WRITE_SW_CONTROL_REGn ioctl call arguments . . . . . . . . . . . . . 5-152

5-108 SYS_READ_SW_CONTROL_REGn ioctl call arguments. . . . . . . . . . . . . . 5-153

5-109 SYS_READ_LSH_JTAG_ID ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-154

5-110 SYS_READ_MSH_JTAG_ID ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-155

5-111 SYS_TEST_RESET_SOURCE ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-156

5-112 SYS_CLEAR_RESET_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . 5-158

5-113 SYS_PULL_UP_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-160

5-114 SYS_PULL_UP_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-161

5-115 SYS_CLKOUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-162

5-116 SYS_CLKOUT_SELECT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-163

5-117 SYS_CLKOUT_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-164

5-118 SYS_CLKOUT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-165

5-119 SYS_SET_CLKOUT_0_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . 5-166

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5-120 SYS_SET_CLKOUT_1_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . 5-167

5-121 SYS_ACLK_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-168

5-122 SYS_ACLK_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-169

5-123 SYS_SET_PADS_FUNCTION ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-170

5-124 SYS_ENABLE_INTERNAL_TMR_SIGNAL ioctl call arguments . . . . . . . 5-171

5-125 SYS_DISABLE_INTERNAL_TMR_SIGNAL ioctl call arguments . . . . . . 5-172

5-126 SYS_PERIPH_CLK_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-173

5-127 SYS_PERIPH_CLK_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-174

5-128 SYS_WRITE_IO_SHORT_ADDR_LOCATION_REG ioctl call arguments 5-175 5-129 SYS_READ_IO_SHORT_ADDR_LOCATION_REG ioctl call arguments. 5-176

5-130 SYS_ENABLE_IN_STOP ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-177

5-131 SYS_DISABLE_IN_STOP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-178

5-132 SYS_SET_isig_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-179

5-133 SYS_SET_pad_FUNCTION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-182

5-134 SYS_HS_CLOCK_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-183

5-135 SYS_HS_CLOCK_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-184

5-136 SYS_SET_POWER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-185

5-137 SYS_GET_POWER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-186

5-138 SYS_WPROTECT_CLOCK_SETTINGS ioctl call arguments. . . . . . . . . . . 5-187

5-139 SYS_WPROTECT_SIGNALS_ROUTING ioctl call arguments . . . . . . . . . 5-188

5-140 LVI_GET_LOW_VOLTAGE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-189

5-141 LVI_GET_NONSTICKY_INT_SOURCE ioctl call arguments . . . . . . . . . . 5-190

5-142 LVI_CLEAR_LOW_VOLTAGE_INT ioctl call arguments . . . . . . . . . . . . . 5-191

5-143 LVI_INT_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-192

5-144 LVI_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-193

5-145 LVI_INT_SELECT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-194

5-146 SEMI_SET_DRIVE_BUS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-195

5-147 SEMI_WRITE_BASEREGn ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-196

5-148 SEMI_WRITE_OPTIONREGn ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-197

5-149 SEMI_WRITE_CONTROLREG ioctl call arguments. . . . . . . . . . . . . . . . . . 5-198

5-150 SEMI_READ_BASEREGn ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-199

5-151 SEMI_READ_OPTIONREGn ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-200

5-152 SEMI_READ_CONTROLREG ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-201

5-153 PMC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-209

5-154 PMC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-210

5-155 PMC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-210

5-156 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-211

5-157 PMC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-213

5-158 PMC_CLEAR_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-214

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5-159 PMC_TEST_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-215

5-160 PMC_SET_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-216

5-161 PMC_SET_INT_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-217

5-162 PMC_SET_LOW_VOLTAGE_RESET ioctl call arguments . . . . . . . . . . . . 5-218

5-163 PMC_SET_PARTIAL_POWER_DOWN ioctl call arguments . . . . . . . . . . . 5-219

5-164 PMC_SET_LOW_POWER_REGULATOR_WAIT_MODES ioctl call arguments

5-220

5-165 PMC_TEST_LOW_POWER_REGULATOR_STATUS ioctl call arguments . . . .

5-221

5-166 PMC_SET_LOW_POWER_WAKEUP_INTERRUPT ioctl call arguments 5-222

5-167 PMC_SET_BANDGAP_BUFFER ioctl call arguments . . . . . . . . . . . . . . . . 5-223

5-168 PMC_SET_LOW_VOLTAGE_DETECTOR_ENABLE ioctl call arguments . . . .

5-224

5-169 PMC_SET_LOW_VOLTAGE_DETECTOR_DISABLE ioctl call arguments. . . .

5-225

5-170 PMC_SET_LOW_VOLTAGE_DETECTOR_LEVEL ioctl call arguments. 5-226

5-171 PMC_SET_WPROTECTION ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-227

5-172 PMC_SET_1KHZ_OSC ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-228

5-173 PMC_SET_1KHZ_OSC_TRIM ioctl call arguments . . . . . . . . . . . . . . . . . . 5-229

5-174 PMC_SET_1KHZ_OSC_FACTORY_TRIM ioctl call arguments . . . . . . . . 5-230

5-175 PMC_SET_LVD_TRIM ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-231

5-176 PMC_SET_LVD_FACTORY_TRIM ioctl call arguments . . . . . . . . . . . . . . 5-232

5-177 FlexCAN Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-236

5-178 FlexCAN Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . 5-239

5-179 FlexCAN Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-240

5-180 FlexCAN Module ioctl Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-241

5-181 FlexCAN Module ioctl Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-245

5-182 FCAN_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-247

5-183 FCAN_STOP_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-248

5-184 FCAN_DEBUG_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-249

5-185 FCAN_SOFT_RESET ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-250

5-186 FCAN_SELF_WAKEUP_MODE ioctl call arguments . . . . . . . . . . . . . . . . . 5-251

5-187 FCAN_AUTO_PWRSAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . 5-252

5-188 FCAN_TEST_READY ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-253

5-189 FCAN_TEST_DEBUG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-254

5-190 FCAN_TEST_STOP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-255

5-191 FCAN_INT_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-256

5-192 FCAN_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-257

5-193 FCAN_LOOPBACK_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-258

5-194 FCAN_TIMER_SYNC_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-259

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5-195 FCAN_LISTEN_ONLY_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . 5-260

5-196 FCAN_SET_TX_FIRST_SCHEME ioctl call arguments . . . . . . . . . . . . . . . 5-261

5-197 FCAN_SET_SAMPLING ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-262

5-198 FCAN_SET_PRESCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-263

5-199 FCAN_SET_RJW ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-264

5-200 FCAN_SET_PROP_SEG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-265

5-201 FCAN_SET_PHASE_SEG1, FCAN_SET_PHASE_SEG2 ioctl call arguments . .

5-266

5-202 FCAN_UNLOCK_ALL_MB ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-267

5-203 FCAN_SET_MAXMB ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-268

5-204 FCAN_READ_ERR_AND_STATUS ioctl call arguments. . . . . . . . . . . . . . 5-269

5-205 FCAN_CLEAR_BOFF_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-270

5-206 FCAN_CLEAR_ERR_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-271

5-207 FCAN_CLEAR_WAKE_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-272

5-208 FCAN_CLEAR_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-273

5-209 FCAN_MBINT_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-274

5-210 FCAN_MBINT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-275

5-211 FCAN_READ_MBINT_FLAGS ioctl call arguments. . . . . . . . . . . . . . . . . . 5-276

5-212 FCAN_CLEAR_MBINT_FLAGS ioctl call arguments. . . . . . . . . . . . . . . . . 5-277

5-213 FCAN_SET_RXGMASK ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-278

5-214 FCAN_SET_RXGMASK_RAW ioctl call arguments. . . . . . . . . . . . . . . . . . 5-279

5-215 FCAN_SET_RX14MASK, FCAN_SET_RX15MASK ioctl call arguments 5-280 5-216 FCAN_SET_RX14MASK_RAW, FCAN_SET_RX15MASK_RAW ioctl call ar-

guments5-281

5-217 FCAN_GET_RX_ERR_COUNT ioctl call arguments . . . . . . . . . . . . . . . . . 5-282

5-218 FCAN_GET_TX_ERR_COUNT ioctl call arguments. . . . . . . . . . . . . . . . . . 5-283

5-219 FCAN_GET_MB_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-284

5-220 FCANMB_GET_ID ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-285

5-221 FCANMB_GET_ID_RAW ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-286

5-222 FCANMB_GET_LEN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-287

5-223 FCANMB_GET_DATAPTR ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-288

5-224 FCANMB_GET_CODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-289

5-225 FCANMB_GET_TIMESTAMP ioctl call arguments . . . . . . . . . . . . . . . . . . 5-290

5-226 FCANMB_GET_TIMESTAMP8 ioctl call arguments . . . . . . . . . . . . . . . . . 5-291

5-227 FCANMB_SET_ID ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-292

5-228 FCANMB_SET_ID_V ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-294

5-229 FCANMB_SET_ID_RAW ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-295

5-230 FCANMB_SET_RTR ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-296

5-231 FCANMB_SET_LEN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-297

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5-232 FCANMB_SET_CODE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-298

5-233 GPIO Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-307

5-234 GPIO Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . 5-308

5-235 GPIO Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-309

5-236 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-309

5-237 GPIO_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-312

5-238 GPIO_INIT_ALL ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-313

5-239 GPIO_SETAS_GPIO ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-314

5-240 GPIO_SETAS_PERIPHERAL ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-315

5-241 GPIO_SETAS_INPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-316

5-242 GPIO_SETAS_OUTPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-317

5-243 GPIO_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-318

5-244 GPIO_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-319

5-245 GPIO_PULLUP_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-320

5-246 GPIO_PULLUP_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-321

5-247 GPIO_CLEAR_SW_INT_PENDING ioctl call arguments . . . . . . . . . . . . . . 5-322

5-248 GPIO_SW_INT_ASSERT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-323

5-249 GPIO_INT_DETECTION_ACTIVE_HIGH ioctl call arguments. . . . . . . . . 5-324

5-250 GPIO_INT_DETECTION_ACTIVE_LOW ioctl call arguments . . . . . . . . . 5-325

5-251 GPIO_CLEAR_INT_PENDING ioctl call arguments . . . . . . . . . . . . . . . . . . 5-326

5-252 GPIO_SET_PIN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-327

5-253 GPIO_CLEAR_PIN ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-328

5-254 GPIO_TOGGLE_PIN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-329

5-255 GPIO_READ_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-330

5-256 GPIO_WRITE_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-331

5-257 GPIO_READ_INT_PENDING_REG ioctl call arguments . . . . . . . . . . . . . . 5-332

5-258 GPIO_GET_INT_PENDING_FLAG ioctl call arguments . . . . . . . . . . . . . . 5-333

5-259 GPIO_TEST_INT_PENDING ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-334

5-260 GPIO_SETAS_PUSHPULL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-335

5-261 GPIO_SETAS_OPENDRAIN ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-336

5-262 GPIO_READ_RAW_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-337

5-263 GPIO_SET_HIGH_DRIVE_STRENGTH ioctl call arguments . . . . . . . . . . 5-338

5-264 GPIO_SET_LOW_DRIVE_STRENGTH ioctl call arguments . . . . . . . . . . . 5-339

5-265 GPIO_SET_LOW_PASS_FILTER_ENABLE ioctl call arguments . . . . . . . 5-340

5-266 GPIO_SET_LOW_PASS_FILTER_DISABLE ioctl call arguments . . . . . . 5-341

5-267 GPIO_SET_SLEW_RATE_FILTER_ENABLE ioctl call arguments. . . . . . 5-342

5-268 GPIO_SET_SLEW_RATE_FILTER_DISABLE ioctl call arguments . . . . . 5-343

5-269 EVMs configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-344

5-270 ADC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-349

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5-271 ADC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-350

5-272 ADC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-352

5-273 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-353

5-274 ADC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-360

5-275 ADC_START ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-361

5-276 ADC_STOP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-362

5-277 ADC_SYNC ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-363

5-278 ADC_SIMULT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-364

5-279 ADC_SET_DIVISOR ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-365

5-280 ADC_SET_CHANNEL_CONFIG ioctl call arguments . . . . . . . . . . . . . . . . 5-366

5-281 ADC_SET_SCAN_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-368

5-282 ADC_SET_LIST_SAMPLEx ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-369

5-283 ADC_WRITE_SAMPLE_DISABLE ioctl call arguments . . . . . . . . . . . . . . 5-370

5-284 ADC_WRITE_ZERO_CROSS_CNTRL ioctl call arguments. . . . . . . . . . . . 5-371

5-285 ADC_ZERO_CROSS_CH0 ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-372

5-286 ADC_END_OF_SCAN_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-373

5-287 ADC_ZERO_CROSS_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-374

5-288 ADC_LOW_LIMIT_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-375

5-289 ADC_LOW_LIMIT_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-376

5-290 ADC_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-377

5-291 ADC_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-378

5-292 ADC_TEST_INT_ENABLED ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-379

5-293 ADC_READ_SAMPLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-380

5-294 ADC_READ_ALL_SAMPLES ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-381

5-295 ADC_READ_STATUS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-382

5-296 ADC_READ_LIMIT_STATUS ioctl call arguments . . . . . . . . . . . . . . . . . . 5-384

5-297 ADC_READ_ZERO_CROSS_STATUS ioctl call arguments . . . . . . . . . . . 5-385

5-298 ADC_GET_STATUS_CIP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-386

5-299 ADC_GET_STATUS_EOSI ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-387

5-300 ADC_GET_STATUS_ZCI ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-388

5-301 ADC_GET_STATUS_LLMTI ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-389

5-302 ADC_GET_STATUS_HLMTI ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-390

5-303 ADC_GET_STATUS_RDY ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-391

5-304 ADC_GET_LIMIT_STATUS_LLS ioctl call arguments . . . . . . . . . . . . . . . 5-392

5-305 ADC_GET_LIMIT_STATUS_HLS ioctl call arguments . . . . . . . . . . . . . . . 5-393

5-306 ADC_GET_ZERO_CROSS_STATUS_ZCS ioctl call arguments . . . . . . . . 5-394

5-307 ADC_CLEAR_STATUS_EOSI ioctl call arguments . . . . . . . . . . . . . . . . . . 5-395

5-308 ADC_CLEAR_STATUS_LLMTI ioctl call arguments . . . . . . . . . . . . . . . . . 5-396

5-309 ADC_CLEAR_STATUS_HLMTI ioctl call arguments. . . . . . . . . . . . . . . . . 5-397

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5-310 ADC_CLEAR_STATUS_ZCI ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-398

5-311 ADC_CLEAR_LIMIT_STATUS_LLS ioctl call arguments . . . . . . . . . . . . . 5-399

5-312 ADC_CLEAR_LIMIT_STATUS_HLS ioctl call arguments. . . . . . . . . . . . . 5-400

5-313 ADC_CLEAR_LIMIT_STATUS_BITS ioctl call arguments . . . . . . . . . . . . 5-401

5-314 ADC_CLEAR_ZERO_CROSS_STATUS_ZCS ioctl call arguments. . . . . . 5-402

5-315 ADC_WRITE_OFFSETx ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-403

5-316 ADC_WRITE_LOW_LIMITx ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-404

5-317 ADC_WRITE_LOW_LIMITx ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-405

5-318 ADC_READ_LOW_LIMIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-406

5-319 ADC_READ_HIGH_LIMIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-407

5-320 ADC_READ_OFFSET ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-408

5-321 ADC_POWER_DOWN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-409

5-322 ADC_POWER_UP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-410

5-323 ADC_POWER_SAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-411

5-324 ADC_SET_POWER_UP_DELAY ioctl call arguments . . . . . . . . . . . . . . . . 5-412

5-325 ADC_GET_POWER_STATUS ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-413

5-326 ADC_READ_POWER_CONTROL_REG ioctl call arguments . . . . . . . . . . 5-414

5-327 ADC_CALIB_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-415

5-328 ADC_CALIB_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-416

5-329 ADC_SET_CONVERTER0_CALIB_REF ioctl call arguments . . . . . . . . . . 5-417

5-330 ADC_SET_CONVERTER1_CALIB_REF ioctl call arguments . . . . . . . . . . 5-418

5-331 ADC_POWER_SAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-419

5-332 ADC_POWER_SAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-420

5-333 ADC_SET_VREFL_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-421

5-334 ADC_SET_VREFH_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-422

5-335 ADC_SET_VREFH0_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-423

5-336 ADC_SET_VREFL0_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-424

5-337 ADC_SET_VREFH1_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-425

5-338 ADC_SET_VREFL1_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-426

5-339 ADC_SET_CALIB_SOURCE ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-427

5-340 ADC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-433

5-341 ADC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-434

5-342 ADC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-435

5-343 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-435

5-344 ADC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-438

5-345 ADC_SET_CONVERSION_MODE_A ioctl call arguments . . . . . . . . . . . . 5-439

5-346 ADC_SET_CONVERSION_MODE_B ioctl call arguments . . . . . . . . . . . . 5-440

5-347 ADC_SET_INPUT_CHANNEL_A ioctl call arguments. . . . . . . . . . . . . . . . 5-441

5-348 ADC_SET_INPUT_CHANNEL_B ioctl call arguments. . . . . . . . . . . . . . . . 5-442

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5-349 ADC_TEST_CONVERSION_COMPLETE_A ioctl call arguments . . . . . . 5-443

5-350 ADC_TEST_CONVERSION_COMPLETE_B ioctl call arguments . . . . . . 5-444

5-351 ADC_TEST_CONVERSION_ACTIVE ioctl call arguments . . . . . . . . . . . . 5-445

5-352 ADC_SET_TRIGGER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-446

5-353 ADC_SET_CONVERSION_CLOCK_OUT ioctl call arguments. . . . . . . . . 5-447

5-354 ADC_SET_VOLTAGE_REFERENCE ioctl call arguments. . . . . . . . . . . . . 5-448

5-355 ADC_READ_SAMPLE_A ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-449

5-356 ADC_READ_SAMPLE_B ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-450

5-357 ADC_SET_DIVIDER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-451

5-358 ADC_SET_SAMPLE_TIME ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-452

5-359 ADC_SET_RESOLUTION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-453

5-360 ADC_SET_CLOCK_INPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-454

5-361 PGA Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-457

5-362 PGA Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-458

5-363 PGA Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-458

5-364 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-459

5-365 PGA_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-461

5-366 PGA_SET_TRIGGER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-462

5-367 PGA_SET_GAIN ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-463

5-368 PGA_SET_GAIN_SH ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-464

5-369 PGA_SET_GAIN_DIFF ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-465

5-370 PGA_SET_GAIN_DIFF_2 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-466

5-371 PGA_SET_POWER_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-467

5-372 PGA_ENABLE_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-468

5-373 PGA_DISABLE_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-469

5-374 PGA_SET_SH_BYPASS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-470

5-375 PGA_SET_CALIBRATION_MODE ioctl call arguments . . . . . . . . . . . . . . 5-471

5-376 PGA_SET_CHARGE_PUMP_DIV ioctl call arguments . . . . . . . . . . . . . . . 5-472

5-377 PGA_SET_SW_TRIGGER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-473

5-378 PGA_SET_DIVIDER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-474

5-379 PGA_SET_CLK_GS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-475

5-380 PGA_TEST_RUNNING ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-476

5-381 PGA_TEST_STARTUP_COMPLETE ioctl call arguments . . . . . . . . . . . . . 5-477

5-382 PDB Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-479

5-383 PDB Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-480

5-384 PDB Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-480

5-385 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-481

5-386 PDB_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-483

5-387 PDB_SET_PRESCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-484

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5-388 PDB_SET_TRIGGER_A_OUT ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-485

5-389 PDB_SET_TRIGGER_B_OUT ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-486

5-390 PDB_SET_CONTINUOUS_MODE ioctl call arguments . . . . . . . . . . . . . . . 5-487

5-391 PDB_SET_SW_TRIGGER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-488

5-392 PDB_SET_INPUT_TRIGGER ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-489

5-393 PDB_SET_TRIGGER_A_ENABLE ioctl call arguments . . . . . . . . . . . . . . . 5-490

5-394 PDB_SET_TRIGGER_A_DISABLE ioctl call arguments . . . . . . . . . . . . . . 5-491

5-395 PDB_SET_TRIGGER_B_ENABLE ioctl call arguments . . . . . . . . . . . . . . . 5-492

5-396 PDB_SET_TRIGGER_B_DISABLE ioctl call arguments . . . . . . . . . . . . . . 5-493

5-397 PDB_WRITE_DELAYA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-494

5-398 PDB_WRITE_DELAYA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-495

5-399 PDB_WRITE_MOD ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-496

5-400 PDB_READ_COUNTER_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-497

5-401 Quadrature Decoder Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . 5-499

5-402 decoder_sState Data Structure Members . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-501

5-403 decoder_sEncScale Data Structure Members . . . . . . . . . . . . . . . . . . . . . . . . . 5-501

5-404 decoder_sEncSignals Data Structure Members . . . . . . . . . . . . . . . . . . . . . . . 5-501

5-405 Quadrature Decoder Configuration Items for appconfig.h . . . . . . . . . . . . . . . 5-502

5-406 Quadrature Decoder Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . 5-503

5-407 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-503

5-408 DEC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-507

5-409 DEC_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-508

5-410 DEC_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-509

5-411 DEC_INT_REQUEST_CLEAR ioctl call arguments . . . . . . . . . . . . . . . . . . 5-510

5-412 DEC_CLEAR_HOME_INT_REQUEST ioctl call arguments . . . . . . . . . . . 5-511

5-413 DEC_CLEAR_INDEX_PULSE_INT_REQUEST ioctl call arguments . . . . 5-512

5-414 DEC_CLEAR_WATCHDOG_INT_REQUEST ioctl call arguments. . . . . . 5-513

5-415 DEC_HOME_TRIGGERED_INIT ioctl call arguments . . . . . . . . . . . . . . . . 5-514

5-416 DEC_HOME_EDGE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-515

5-417 DEC_SOFTWARE_TRIGGERED_INIT ioctl call arguments . . . . . . . . . . . 5-516

5-418 DEC_DIRECTION_COUNTING_ENABLE ioctl call arguments . . . . . . . . 5-517

5-419 DEC_SINGLE_PHASE_COUNT ioctl call arguments . . . . . . . . . . . . . . . . . 5-518

5-420 DEC_INDEX_TRIGGERED_INIT ioctl call arguments. . . . . . . . . . . . . . . . 5-519

5-421 DEC_INDEX_EDGE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-520

5-422 DEC_WATCHDOG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-521

5-423 DEC_SWITCH_MATRIX ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-522

5-424 Switch Matrix Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-522

5-425 DEC_WRITE_FILTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-523

5-426 DEC_WRITE_WATCHDOG_TIMEOUT ioctl call arguments . . . . . . . . . . 5-524

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5-427 DEC_READ_POSITION_DIFFERENCE ioctl call arguments. . . . . . . . . . . 5-525

5-428 DEC_READ_REVOLUTION ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-526

5-429 DEC_WRITE_REVOLUTION ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-527

5-430 DEC_READ_POSITION ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-528

5-431 DEC_WRITE_POSITION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-529

5-432 DEC_WRITE_INIT_STATE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-530

5-433 DEC_READ_MONITOR_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-531

5-434 DEC_GET_RAW_ENCSIGNALS ioctl call arguments . . . . . . . . . . . . . . . . 5-532

5-435 DEC_GET_FILTERED_ENCSIGNALS ioctl call arguments . . . . . . . . . . . 5-533

5-436 DEC_READ_HOLD_DATA_REGS ioctl call arguments. . . . . . . . . . . . . . . 5-534

5-437 DEC_READ_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-535

5-438 DEC_CALCULATE_SCALE_COEF ioctl call arguments . . . . . . . . . . . . . . 5-536

5-439 DEC_GET_SCALED_POSITION ioctl call arguments . . . . . . . . . . . . . . . . 5-537

5-440 DEC_GET_SCALED_POSITION_DIFFERENCE ioctl call arguments . . . 5-538

5-441 DEC_HOME_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-539

5-442 DEC_INDEX_PULSE_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-540

5-443 DEC_WATCHDOG_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-541

5-444 EVMs configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-542

5-445 PWM Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-547

5-446 pwm_sComplementaryValues Data Structure Members . . . . . . . . . . . . . . . . 5-549

5-447 pwm_sIndependentValues Data Structure Members . . . . . . . . . . . . . . . . . . . 5-549

5-448 pwm_sOutputControl Data Structure Members . . . . . . . . . . . . . . . . . . . . . . . 5-550

5-449 pwm_sUpdateValueSetVlmode Data Structure Members . . . . . . . . . . . . . . . 5-550

5-450 pwm_sChannelControl Data Structure Members . . . . . . . . . . . . . . . . . . . . . . 5-550

5-451 PWM Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . 5-550

5-452 PWM Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-552

5-453 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-552

5-454 PWM_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-561

5-455 PWM_SET_RELOAD_FREQUENCY ioctl call arguments . . . . . . . . . . . . . 5-562

5-456 PWM_HALF_CYCLE_RELOAD ioctl call arguments. . . . . . . . . . . . . . . . . 5-563

5-457 PWM_SET_CURRENT_POLARITY ioctl call arguments. . . . . . . . . . . . . . 5-564

5-458 PWM_SET_PRESCALER ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-566

5-459 PWM Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-566

5-460 PWM_RELOAD_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-568

5-461 PWM_SET_CURRENT_SENSING ioctl call arguments . . . . . . . . . . . . . . . 5-569

5-462 Correction Method Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-569

5-463 PWM_DEVICE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-570

5-464 PWM_CLEAR_RELOAD_FLAG ioctl call arguments. . . . . . . . . . . . . . . . . 5-571

5-465 PWM_LOAD_OK ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-572

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5-466 PWM_FAULT_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-573

5-467 PWM_FAULT_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-574

5-468 PWM_SET_AUTOMATIC_FAULT_CLEAR ioctl call arguments . . . . . . . 5-575

5-469 PWM_SET_MANUAL_FAULT_CLEAR ioctl call arguments . . . . . . . . . . 5-576

5-470 PWM_CLEAR_FAULT_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-577

5-471 PWM_OUTPUT_PAD ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-578

5-472 PWM_OUTPUT_SOFTWARE_CONTROL ioctl call arguments . . . . . . . . 5-579

5-473 PWM_OUTPUT_CONTROL ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-580

5-474 PWM_SET_MODULO ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-581

5-475 PWM_GET_MODULO ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-582

5-476 PWM_SET_DEADTIME ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-583

5-477 PWM_SET_DEADTIME_0 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-584

5-478 PWM_SET_DEADTIME_1 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-585

5-479 PWM_WRITE_DISABLE_MAPPING_REG1 ioctl call arguments. . . . . . . 5-586

5-480 PWM Pin - Fault Mapping Matrix 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-586

5-481 PWM_WRITE_DISABLE_MAPPING_REG2 ioctl call arguments. . . . . . . 5-588

5-482 PWM Pin - Fault Mapping Matrix 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-588

5-483 PWM_SET_ALIGNMENT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-589

5-484 PWM_SET_NEG_TOP_SIDE_POLARITY ioctl call arguments. . . . . . . . . 5-590

5-485 PWM_SET_NEG_BOTTOM_SIDE_POLARITY ioctl call arguments . . . . 5-591

5-486 PWM_SET_INDEPENDENT_OPERATION ioctl call arguments. . . . . . . . 5-592

5-487 PWM_SET_INDEPENDENT_MODE ioctl call arguments . . . . . . . . . . . . . 5-593

5-488 PWM_SET_COMPLEMENTARY_MODE ioctl call arguments . . . . . . . . . 5-594

5-489 PWM_SET_WRITE_PROTECT ioctl call arguments. . . . . . . . . . . . . . . . . . 5-595

5-490 PWM_HARDWARE_ACCELERATION ioctl call arguments. . . . . . . . . . . 5-596

5-491 PWM_SET_CHANNEL_MASK ioctl call arguments. . . . . . . . . . . . . . . . . . 5-597

5-492 PWM_SET_LOAD_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-598

5-493 PWM_SET_SWAP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-599

5-494 PWM_WRITE_VALUE_REG_x ioctl call arguments . . . . . . . . . . . . . . . . . 5-600

5-495 PWM_WRITE_VALUE_REGS_COMPL ioctl call arguments . . . . . . . . . . 5-601

5-496 PWM_WRITE_VALUE_REGS_INDEP ioctl call arguments . . . . . . . . . . . 5-602

5-497 PWM_READ_FAULT_STATUS_REG ioctl call arguments . . . . . . . . . . . . 5-603

5-498 PWM_READ_COUNTER_REG ioctl call arguments. . . . . . . . . . . . . . . . . . 5-604

5-499 PWM_READ_CONTROL_REG ioctl call arguments. . . . . . . . . . . . . . . . . . 5-605

5-500 PWM_READ_PORT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-606

5-501 PWM_GET_CURRENT_STATUS_INPUTS ioctl call arguments. . . . . . . . 5-607

5-502 PWM_GET_FAULT_INPUTS ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-608

5-503 PWM_GET_FAULT_INPUT_x ioctl call arguments . . . . . . . . . . . . . . . . . . 5-609

5-504 PWM_SOFTWARE_OUTPUTS_CONTROL ioctl call arguments . . . . . . . 5-610

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5-505 PWM_UPDATE_VALUE_REG_x ioctl call arguments . . . . . . . . . . . . . . . . 5-611

5-506 PWM_UPDATE_VALUE_REGS_COMPL ioctl call arguments . . . . . . . . . 5-613

5-507 PWM_UPDATE_VALUE_REGS_INDEP ioctl call arguments . . . . . . . . . . 5-615

5-508 PWM_UPDATE_VALUE_SET_VLMODE ioctl call arguments. . . . . . . . . 5-616

5-509 PWM_SET_MASK_SWAP ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-618

5-510 PWM_DEBUG_OPERATION ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-619

5-511 PWM_WAIT_OPERATION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-620

5-512 PWM_MASK_SWAP_OPERATION ioctl call arguments . . . . . . . . . . . . . . 5-621

5-513 PWM_SET_HALF_CYCLE_INTERNAL_CORRECTION ioctl call arguments .

5-622

5-514 PWM_SET_FULL_CYCLE_INTERNAL_CORRECTION ioctl call arguments. .

5-623

5-515 PWM_READ_INTERNAL_CORRECTION_CONTROL_REG ioctl call argu-

ments5-624

5-516 PWM_SET_SOURCE_0 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-625

5-517 PWM_SET_SOURCE_1 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-626

5-518 PWM_SET_SOURCE_2 ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-627

5-519 PWM_SET_COMPARE_INVERT_x ioctl call arguments . . . . . . . . . . . . . . 5-628

5-520 PWM_SET_ACTIVE_HIGH_FAULTS ioctl call arguments . . . . . . . . . . . . 5-629

5-521 PWM_SET_ACTIVE_LOW_FAULTS ioctl call arguments . . . . . . . . . . . . 5-630

5-522 PWM_DISABLE_SYNC ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-631

5-523 PWM_ENABLE_SYNC_OUT ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-632

5-524 PWM_ENABLE_SYNC_IN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-633

5-525 PWM_WRITE_FILTx_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-634

5-526 PWM_WRITE_FILTx_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-635

5-527 PWM_SET_PULSE_EDGE_CONTROL_x ioctl call arguments . . . . . . . . . 5-636

5-528 SCI Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-645

5-529 SCI Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-646

5-530 SCI Operation Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-646

5-531 Built-in Software Layer Configuration Items for appconfig.h . . . . . . . . . . . . 5-647

5-532 Buffer Space Monitoring Configuration Items. . . . . . . . . . . . . . . . . . . . . . . . 5-648

5-533 SCI Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-649

5-534 SCI Driver Arguments - read/write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-649

5-535 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-650

5-536 read/write modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-653

5-537 SCI_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-654

5-538 SCI_SET_BAUDRATE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-655

5-539 SCI_OPERATING_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-656

5-540 SCI_TRANSMITTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-657

5-541 SCI_RECEIVER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-658

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5-542 SCI_WAKEUP_CONDITION ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-659

5-543 SCI_DATA_FORMAT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-660

5-544 SCI_PARITY ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-661

5-545 SCI_DATA_POLARITY ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-662

5-546 SCI_STOP_IN_WAIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-663

5-547 SCI_SEND_BREAK ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-664

5-548 SCI_WAIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-665

5-549 SCI_WAKEUP ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-666

5-550 SCI_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-667

5-551 SCI_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-668

5-552 SCI_GET_STATUS_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-669

5-553 SCI_CLEAR_STATUS_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-670

5-554 SCI_TEST_STATUS_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-671

5-555 SCI_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-672

5-556 SCI_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-673

5-557 SCI_READ_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-674

5-558 SCI_WRITE_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-675

5-559 SCI_GET_TX_EMPTY ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-676

5-560 SCI_GET_TX_IDLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-677

5-561 SCI_GET_RX_FULL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-678

5-562 SCI_GET_RX_IDLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-679

5-563 SCI_GET_RX_ERROR ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-680

5-564 SCI_GET_RX_OVERRUN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-681

5-565 SCI_GET_RX_NOISE_ERROR ioctl call arguments . . . . . . . . . . . . . . . . . . 5-682

5-566 SCI_GET_RX_FRAMING_ERROR ioctl call arguments. . . . . . . . . . . . . . . 5-683

5-567 SCI_GET_RX_PARITY_ERROR ioctl call arguments. . . . . . . . . . . . . . . . . 5-684

5-568 SCI_GET_RX_ACTIVE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-685

5-569 SCI_LIN_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-686

5-570 SCI_QUEUED_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-687

5-571 SCI_SET_TXEMPTY_CONDITION ioctl call arguments . . . . . . . . . . . . . . 5-688

5-572 SCI_SET_RXFULL_CONDITION ioctl call arguments. . . . . . . . . . . . . . . . 5-689

5-573 SCI_CAN_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-690

5-574 SCI_CAN_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-691

5-575 read function call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-692

5-576 interrupt routines of the SCI driver for the read function in non-blocking mode. . .

5-693

5-577 write function call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-694

5-578 interrupt routines of the SCI driver for the write function in non-blocking mode . .

5-694

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5-579 SCI_CLEAR_EXCEPTION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-695

5-580 SCI0_GET_STATUS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-696

5-581 SCI_WRITE_CANCEL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-697

5-582 SCI_READ_CANCEL ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-698

5-583 SCI_BUFFERED_RX ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-699

5-584 SCI_BUFFERED_TX ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-700

5-585 SCI_GET_RX_CHARS_READY ioctl call arguments . . . . . . . . . . . . . . . . . 5-701

5-586 SCI_GET_RX_BUFFER_FREESPACE ioctl call arguments. . . . . . . . . . . . 5-702

5-587 SCI_GET_TX_BUFFER_FREESPACE ioctl call arguments . . . . . . . . . . . . 5-703

5-588 SCI_SEND_XON ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-704

5-589 SCI_SEND_XOFF ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-705

5-590 SPI Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-713

5-591 SPI Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-714

5-592 SPI Operation Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-714

5-593 Built-in Software Layer Configuration Items . . . . . . . . . . . . . . . . . . . . . . . . . 5-715

5-594 SPI Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-716

5-595 SPI Driver Arguments - read/write. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-716

5-596 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-717

5-597 read/write modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-720

5-598 SPI_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-721

5-599 SPI_DEVICE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-722

5-600 SPI_SET_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-723

5-601 SPI_SET_ORDER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-724

5-602 SPI_SET_CLOCK_POLARITY ioctl call arguments . . . . . . . . . . . . . . . . . . 5-725

5-603 SPI_SET_CLOCK_PHASE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-726

5-604 SPI_SET_MODE_FAULT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-727

5-605 SPI_SET_TX_DATA_SIZE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-728

5-606 SPI_SET_WIRED_OR_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-729

5-607 SPI_SET_BAUD_DIV ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-730

5-608 SPI_RX_FULL_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-731

5-609 SPI_TX_EMPTY_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-732

5-610 SPI_ERROR_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-733

5-611 SPI_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-734

5-612 SPI_INT_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-735

5-613 SPI_INT_SELECT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-736

5-614 SPI_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-737

5-615 SPI_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-738

5-616 SPI_GET_TX_EMPTY ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-739

5-617 SPI_GET_RX_FULL ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-740

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5-618 SPI_GET_RX_OVERFLOW ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-741

5-619 SPI_READ_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-742

5-620 SPI_WRITE_CONTROL_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-743

5-621 SPI_GET_MODE_FAULT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-744

5-622 SPI_GET_ERROR ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-745

5-623 SPI_CLEAR_MODE_FAULT ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-746

5-624 SPI_MULT_BAUD_DIV ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-747

5-625 SPI_TEST_SS_INPUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-748

5-626 SPI_SET_SS_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-749

5-627 SPI_SET_SS_OUTPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-751

5-628 SPI_SET_SS_WIRED_OR_MODE ioctl call arguments . . . . . . . . . . . . . . . 5-752

5-629 SPI_OVERRIDE_SS_INPUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-753

5-630 SPI_QUEUED_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-754

5-631 SPI_SET_TXEMPTY_CONDITION ioctl call arguments . . . . . . . . . . . . . . 5-755

5-632 SPI_SET_RXFULL_CONDITION ioctl call arguments . . . . . . . . . . . . . . . . 5-756

5-633 SPI_CAN_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-757

5-634 SPI_CAN_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-758

5-635 read function call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-759

5-636 Interrupt routines of the SPI driver for the read function in non-blocking mode . . .

5-759

5-637 write function call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-760

5-638 Interrupt routines of the SPI driver for the write function in non-blocking mode . .

5-760

5-639 SPI_CLEAR_EXCEPTION ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-761

5-640 SPI_GET_STATUS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-762

5-641 SPI_WRITE_CANCEL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-763

5-642 SPI_READ_CANCEL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-764

5-643 IIC Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-774

5-644 IIC Configuration Items for appconfig.h MC56F801x. . . . . . . . . . . . . . . . . . 5-775

5-645 IIC Configuration Items for appconfig.h MC56F800x. . . . . . . . . . . . . . . . . . 5-776

5-646 IIC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-777

5-647 IIC Module ioctl Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-777

5-648 IIC_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-781

5-649 IIC_SET_ADDRESS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-782

5-650 IIC_GET_ADDRESS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-783

5-651 IIC_SET_PRESCALER ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-784

5-652 IIC_I_BUS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-785

5-653 IIC_I_BUS_INT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-786

5-654 IIC_MASTER_SLAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-787

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5-655 IIC_GET_MASTER_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-788

5-656 IIC_TX_RX_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-789

5-657 IIC_GET_TX_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-790

5-658 IIC_TX_ACK ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-791

5-659 IIC_REPEAT_START ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-792

5-660 IIC_WRITE_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-793

5-661 IIC_READ_CONTROL_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-794

5-662 IIC_READ_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-795

5-663 IIC_WRITE_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-796

5-664 IIC_SET_NOISE_FILTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-797

5-665 IIC_READ_STATUS_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-798

5-666 IIC_TEST_STATUS_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-799

5-667 IIC_CLEAR_ARBITRATION_LOST ioctl call arguments . . . . . . . . . . . . . 5-800

5-668 IIC_CLEAR_I_BUS_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-801

5-669 IIC_SET_GENERAL_CALL_ADDRESS ioctl call arguments . . . . . . . . . . 5-802

5-670 IIC_SET_ADDRESS_EXTENSION_MODE ioctl call arguments . . . . . . . . 5-803

5-671 IIC_SET_ADDRESS_EXTENSION ioctl call arguments. . . . . . . . . . . . . . . 5-804

5-672 IIC_SET_10BIT_ADDRESS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-805

5-673 IIC_GET_10BIT_ADDRESS ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-806

5-674 IIC_SET_FAST_ACK_NACK ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-807

5-675 IIC_SET_SMBUS_RESPONSE_ADDRESS ioctl call arguments . . . . . . . . 5-808

5-676 IIC_SET_SECOND_IIC_ADDRESS ioctl call arguments . . . . . . . . . . . . . . 5-809

5-677 IIC_SET_TIME_OUT_CLOCK ioctl call arguments . . . . . . . . . . . . . . . . . . 5-810

5-678 IIC_TEST_TIMEOUT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . 5-811

5-679 IIC_CLEAR_LOW_TIMEOUT_FLAG ioctl call arguments . . . . . . . . . . . . 5-812

5-680 IIC_SET_SMBUS_ADDRESS ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-813

5-681 IIC_GET_SMBUS_ADDRESS ioctl call arguments. . . . . . . . . . . . . . . . . . . 5-814

5-682 IIC_WRITE_SCL_LOW_TIMEOUT ioctl call arguments . . . . . . . . . . . . . . 5-815

5-683 IIC_READ_SCL_LOW_TIMEOUT ioctl call arguments . . . . . . . . . . . . . . . 5-816

5-684 IIC Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-819

5-685 IIC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-820

5-686 IIC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-821

5-687 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-821

5-688 IIC_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-826

5-689 IIC_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-827

5-690 IIC_TRY_GRACEFUL_SHUTDOWN ioctl call arguments. . . . . . . . . . . . . 5-828

5-691 IIC_SLAVE_OPERATION ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-829

5-692 IIC_MASTER_OPERATION ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-830

5-693 IIC_USE_REPEATED_START ioctl call arguments . . . . . . . . . . . . . . . . . . 5-831

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5-694 IIC_SET_ADDRESS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-832

5-695 IIC_SET_SPEED_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-833

5-696 IIC_SET_xxxCNT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-834

5-697 IIC_CAN_INITIATE_TRANSACTION ioctl call arguments. . . . . . . . . . . . 5-835

5-698 IIC_INITIATE_TRANSACTION ioctl call arguments . . . . . . . . . . . . . . . . . 5-836

5-699 IIC_INITIATE_SB_TRANSACTION ioctl call arguments . . . . . . . . . . . . . 5-837

5-700 IIC_INITIATE_GC_TRANSACTION ioctl call arguments . . . . . . . . . . . . . 5-838

5-701 IIC_MASTER_TRANSACTION_ACTIVE ioctl call arguments . . . . . . . . . 5-839

5-702 IIC_CAN_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-840

5-703 IIC_READ_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-841

5-704 IIC_CAN_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-842

5-705 IIC_WRITE_DATA ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-843

5-706 IIC_CAN_REQUEST_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-844

5-707 IIC_READ_REQUEST ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-845

5-708 IIC_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-846

5-709 IIC_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-847

5-710 IIC_READ_INT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-848

5-711 IIC_TEST_INT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-849

5-712 IIC_CLEAR_EINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-850

5-713 IIC_CLEAR_GINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-851

5-714 IIC_CLEAR_TINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-852

5-715 IIC_CLEAR_SINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-853

5-716 IIC_CLEAR_ALL_INTS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-854

5-717 IIC_READ_TXABORT_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . 5-855

5-718 IIC_CLEAR_TXABORT_SOURCE ioctl call arguments. . . . . . . . . . . . . . . 5-856

5-719 IIC_READ_STATUS_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-857

5-720 IIC_TEST_STATUS_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-858

5-721 Temperature Sensor System Module Base Address . . . . . . . . . . . . . . . . . . . . 5-861

5-722 Temperature Sensor System Configuration Items for appconfig.h . . . . . . . . 5-862

5-723 Temperature Sensor Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . 5-862

5-724 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-863

5-725 TSENSOR_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-864

5-726 TSENSOR_DEVICE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-865

5-727 TSENSOR_IS_POWERED_ON ioctl call arguments . . . . . . . . . . . . . . . . . . 5-866

5-728 Quad Timer Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-869

5-729 Quad Timer Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . 5-870

5-730 Quad Timer Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-871

5-731 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-871

5-732 QT_INIT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-876

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5-733 QT_SET_COUNT_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-877

5-734 QT_SET_PRIMARY_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . 5-879

5-735 QT_SET_SECONDARY_SOURCE ioctl call arguments . . . . . . . . . . . . . . . 5-880

5-736 QT_SET_COUNT_ONCE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-881

5-737 QT_SET_COUNT_LENGTH ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-882

5-738 QT_SET_COUNT_DIRECTION ioctl call arguments . . . . . . . . . . . . . . . . . 5-883

5-739 QT_CO_CHANNEL_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-884

5-740 QT_SET_OUTPUT_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-885

5-741 QT_CLEAR_FLAG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-886

5-742 QT_CLEAR_COMPARE_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . 5-887

5-743 QT_READ_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-888

5-744 QT_READ_COMPARE_FLAG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-889

5-745 QT_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-890

5-746 QT_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-891

5-747 QT_SET_INPUT_POLARITY ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-892

5-748 QT_READ_EXT_INPUT_PIN ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-893

5-749 QT_SET_CAPTURE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-894

5-750 QT_MASTER_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . 5-895

5-751 QT_EXT_OFLAG_FORCE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-896

5-752 QT_FORCE_OFLAG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-897

5-753 QT_SET_OUTPUT_POLARITY ioctl call arguments . . . . . . . . . . . . . . . . . 5-898

5-754 QT_OUTPUT_ON_EXT_PIN ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-899

5-755 QT_SET_LOAD_CONTROL1 ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-900

5-756 QT_SET_LOAD_CONTROL2 ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-901

5-757 QT_WRITE_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-902

5-758 QT_WRITE_STATUS_CONTROL_REG ioctl call arguments . . . . . . . . . . 5-903

5-759 QT_WRITE_CMP_STATUS_CONTROL_REG ioctl call arguments . . . . . 5-904

5-760 QT_WRITE_COMPARE_REG1 ioctl call arguments. . . . . . . . . . . . . . . . . . 5-905

5-761 QT_WRITE_COMPARE_REG2 ioctl call arguments. . . . . . . . . . . . . . . . . . 5-906

5-762 QT_WRITE_PRELOAD_COMPARE_REG1 ioctl call arguments . . . . . . . 5-907

5-763 QT_WRITE_PRELOAD_COMPARE_REG2 ioctl call arguments . . . . . . . 5-908

5-764 QT_WRITE_LOAD_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-909

5-765 QT_WRITE_COUNTER_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-910

5-766 QT_READ_CONTROL_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-911

5-767 QT_READ_STATUS_CONTROL_REG ioctl call arguments . . . . . . . . . . . 5-912

5-768 QT_READ_CMP_STATUS_CONTROL_REG ioctl call arguments . . . . . . 5-913

5-769 QT_READ_COMPARE_REG1 ioctl call arguments . . . . . . . . . . . . . . . . . . 5-914

5-770 QT_READ_COMPARE_REG2 ioctl call arguments . . . . . . . . . . . . . . . . . . 5-915

5-771 QT_READ_LOAD_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-916

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5-772 QT_READ_COUNTER_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-917

5-773 QT_READ_COUNTER_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-918

5-774 QT_READ_HOLD_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-919

5-775 QT0_MASS_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-920

5-776 QT0_MASS_DISABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-921

5-777 QT_WRITE_FILT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-922

5-778 QT_READ_FILT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-923

5-779 PIT Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-931

5-780 PIT Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-932

5-781 PIT Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-933

5-782 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-933

5-783 PIT_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-935

5-784 PIT_COUNTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-936

5-785 PIT_SLAVE_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-937

5-786 PIT_ROLLOVER_INT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-938

5-787 PIT_CLEAR_ROLLOVER_INT ioctl call arguments. . . . . . . . . . . . . . . . . . 5-939

5-788 PIT_SET_PRESCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-940

5-789 PIT_WRITE_MODULO_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-941

5-790 PIT_READ_MODULO_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-942

5-791 PIT_READ_COUNTER_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-943

5-792 CMP Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-945

5-793 CMP Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-946

5-794 CMP Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-946

5-795 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-947

5-796 CMP_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-949

5-797 CMP_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-950

5-798 CMP_INVERT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-951

5-799 CMP_SELECT_POS_INPUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-952

5-800 CMP_SELECT_NEG_INPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-953

5-801 CMP_SELECT_EXPORT_OUTPUT ioctl call arguments . . . . . . . . . . . . . . 5-954

5-802 CMP_INT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-955

5-803 CMP_INT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-956

5-804 CMP_READ_INT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-957

5-805 CMP_CLEAR_INT_FLAGS ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-958

5-806 CMP_READ_OUTPUT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-959

5-807 CMP_WRITE_FILT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-960

5-808 CMP_READ_FILT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-961

5-809 HSCMP Module Base Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-963

5-810 CMP Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-964

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5-811 CMP Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-965

5-812 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-965

5-813 HSCMP_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-967

5-814 HSCMP_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-968

5-815 HSCMP_SELECT_POS_INPUT ioctl call arguments. . . . . . . . . . . . . . . . . . 5-969

5-816 HSCMP_SELECT_NEG_INPUT ioctl call arguments . . . . . . . . . . . . . . . . . 5-970

5-817 HSCMP_SET_INVERT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-971

5-818 HSCMP_SET_SAMPLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . 5-972

5-819 HSCMP_SET_WINDOWING ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-973

5-820 HSCMP_SET_HIGH_SPEED ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-974

5-821 HSCMP_SET_OUTPUT_PIN ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-975

5-822 HSCMP_SET_OUTPUT_ACTIVE ioctl call arguments. . . . . . . . . . . . . . . . 5-976

5-823 HSCMP_INT_RISING_EDGE ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-977

5-824 HSCMP_INT_FALLING_EDGE ioctl call arguments . . . . . . . . . . . . . . . . . 5-978

5-825 HSCMP_TEST_INT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-979

5-826 HSCMP_CLEAR_INT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . . 5-980

5-827 HSCMP_READ_OUTPUT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-981

5-828 HSCMP_WRITE_FILT_COUNTER ioctl call arguments . . . . . . . . . . . . . . 5-982

5-829 HSCMP_READ_FILT_COUNTER ioctl call arguments . . . . . . . . . . . . . . . 5-983

5-830 HSCMP_WRITE_FILT_REG ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-984

5-831 HSCMP_READ_FILT_REG ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-985

5-832 DAC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-987

5-833 DAC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-988

5-834 DAC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-989

5-835 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-989

5-836 DAC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-991

5-837 DAC_MODULE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-992

5-838 DAC_SET_DATA_FORMAT ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-993

5-839 DAC_SET_SYNC_SOURCE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-994

5-840 DAC_SET_AUTO_MODE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-995

5-841 DAC_ENABLE_FILTER ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-996

5-842 DAC_DISABLE_FILTER ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-997

5-843 DAC_WRITE_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . 5-998

5-844 DAC_READ_CONTROL_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-999

5-845 DAC_WRITE_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-1000

5-846 DAC_READ_DATA ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1001

5-847 DAC_WRITE_STEP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1002

5-848 DAC_READ_STEP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1003

5-849 DAC_WRITE_MINVAL ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-1004

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5-850 DAC_READ_MINVAL ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-1005

5-851 DAC_WRITE_MAXVAL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-1006

5-852 DAC_READ_MAXVAL ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-1007

5-853 MSCAN Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1009

5-854 ID-raw Registers with Standard CAN ID . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1012

5-855 ID-raw Registers with Extended CAN ID . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1012

5-856 MSCAN Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . 5-1013

5-857 MSCAN Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1014

5-858 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1015

5-859 Message Buffer ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1019

5-860 MSCAN_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1021

5-861 MSCAN_SOFT_RESET ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-1022

5-862 MSCAN_DEVICE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1023

5-863 MSCAN_WAKEUP_FILTER ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-1024

5-864 MSCAN_MANUAL_BOFF_RECOVERY ioctl call arguments. . . . . . . . . 5-1025

5-865 MSCAN_LISTEN_ONLY_MODE ioctl call arguments . . . . . . . . . . . . . . . 5-1026

5-866 MSCAN_LOOPBACK_MODE ioctl call arguments . . . . . . . . . . . . . . . . . 5-1027

5-867 MSCAN_SET_CLOCK_SOURCE ioctl call arguments . . . . . . . . . . . . . . . 5-1028

5-868 MSCAN_SET_PRESCALER ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-1029

5-869 MSCAN_SET_RJW ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1030

5-870 MSCAN_SET_TSEG1 ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-1031

5-871 MSCAN_SET_TSEG2 ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . . 5-1032

5-872 MSCAN_SET_SAMPLING ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-1033

5-873 MSCAN_SET_ACC_MODE ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-1034

5-874 MSCAN_SET_ACC_MASKR_32_x ioctl call arguments . . . . . . . . . . . . . 5-1035

5-875 MSCAN_SET_ACC_MASKR_16_x ioctl call arguments . . . . . . . . . . . . . 5-1036

5-876 MSCAN_SET_ACC_MASKR_8_x ioctl call arguments . . . . . . . . . . . . . . 5-1037

5-877 MSCAN_SET_ACC_IDR_32_x ioctl call arguments . . . . . . . . . . . . . . . . . 5-1038

5-878 MSCAN_SET_ACC_IDR_16_x ioctl call arguments . . . . . . . . . . . . . . . . . 5-1039

5-879 MSCAN_SET_ACC_IDR_8_x ioctl call arguments . . . . . . . . . . . . . . . . . . 5-1040

5-880 MSCAN_SLEEP ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1041

5-881 MSCAN_GET_SLEEP_MODE ioctl call arguments . . . . . . . . . . . . . . . . . 5-1042

5-882 MSCAN_AUTO_WAKEUP ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-1043

5-883 MSCAN_TIMESTAMP_TIMER ioctl call arguments . . . . . . . . . . . . . . . . 5-1044

5-884 MSCAN_TEST_SYNCH ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-1045

5-885 MSCAN_TEST_RXACT ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-1046

5-886 MSCAN_TEST_RXFRM ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . 5-1047

5-887 MSCAN_CLEAR_RXFRM ioctl call arguments. . . . . . . . . . . . . . . . . . . . . 5-1048

5-888 MSCAN_STOP_IN_WAIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-1049

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5-889 MSCAN_ERINT_ENABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-1050

5-890 MSCAN_ERINT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . 5-1051

5-891 MSCAN_ERINT_SET_RSTATE_MODE ioctl call arguments . . . . . . . . . 5-1052

5-892 MSCAN_ERINT_SET_TSTATE_MODE ioctl call arguments . . . . . . . . . 5-1053

5-893 MSCAN_TINT_ENABLE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . 5-1054

5-894 MSCAN_TINT_DISABLE ioctl call arguments . . . . . . . . . . . . . . . . . . . . . 5-1055

5-895 MSCAN_GET_ENABLED_TINT ioctl call arguments . . . . . . . . . . . . . . . 5-1056

5-896 MSCAN_READ_ERINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . 5-1057

5-897 MSCAN_READ_EINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . 5-1058

5-898 MSCAN_READ_TINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . . . . 5-1059

5-899 MSCAN_CLEAR_ERINT_FLAGS ioctl call arguments . . . . . . . . . . . . . . 5-1060

5-900 MSCAN_CLEAR_EINT_FLAGS ioctl call arguments. . . . . . . . . . . . . . . . 5-1061

5-901 MSCAN_CLEAR_RINT_FLAG ioctl call arguments. . . . . . . . . . . . . . . . . 5-1062

5-902 MSCAN_CLEAR_WINT_FLAG ioctl call arguments . . . . . . . . . . . . . . . . 5-1063

5-903 MSCAN_SELECT_TXBUFF ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-1064

5-904 MSCAN_SELECT_NEXT_TXBUFF ioctl call arguments. . . . . . . . . . . . . 5-1065

5-905 MSCAN_TRANSMIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-1066

5-906 MSCAN_ABORT_TRANSMIT ioctl call arguments . . . . . . . . . . . . . . . . . 5-1067

5-907 MSCAN_READ_ABORT_ACK ioctl call arguments. . . . . . . . . . . . . . . . . 5-1068

5-908 MSCAN_TEST_BUSOFF_HOLD ioctl call arguments . . . . . . . . . . . . . . . 5-1069

5-909 MSCAN_RECOVER_BUSOFF_STATE ioctl call arguments . . . . . . . . . . 5-1070

5-910 MSCAN_GET_WINNING_ACC_FILTER ioctl call arguments . . . . . . . . 5-1071

5-911 MSCAN_GET_RX_ERR_COUNT ioctl call arguments. . . . . . . . . . . . . . . 5-1072

5-912 MSCAN_GET_TX_ERR_COUNT ioctl call arguments . . . . . . . . . . . . . . . 5-1073

5-913 MSCANMB_GET_ID ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-1075

5-914 MSCANMB_GET_ID_RAW ioctl call arguments . . . . . . . . . . . . . . . . . . . 5-1076

5-915 MSCANMB_GET_LEN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-1077

5-916 MSCANMB_GET_LEN ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-1078

5-917 MSCANMB_GET_DATAPTR ioctl call arguments . . . . . . . . . . . . . . . . . . 5-1079

5-918 MSCANMB_GET_TIMESTAMP ioctl call arguments. . . . . . . . . . . . . . . . 5-1080

5-919 MSCANMB_SET_ID ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . 5-1081

5-920 MSCANMB_SET_ID_V ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . 5-1083

5-921 MSCANMB_SET_ID_RAW ioctl call arguments. . . . . . . . . . . . . . . . . . . . 5-1084

5-922 MSCANMB_SET_RTR ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-1085

5-923 MSCANMB_SET_LEN ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-1086

5-924 MSCANMB_SET_TBP ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . . 5-1087

5-925 RTC Module Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1089

5-926 RTC Configuration Items for appconfig.h . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1090

5-927 RTC Driver Arguments - ioctl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1090

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5-928 ioctl commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1091

5-929 RTC_INIT ioctl call arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1093

5-930 RTC_SET_CLOCK_SOURCE_PRESCALER ioctl call arguments. . . . . . 5-1094

5-931 RTC_SET_CLOCK_PRESCALER ioctl call arguments. . . . . . . . . . . . . . . 5-1095

5-932 RTC_CLOCK_SOURCE ioctl call arguments. . . . . . . . . . . . . . . . . . . . . . . 5-1096

5-933 RTC_SET_INTERRUPT_ENABLE ioctl call arguments . . . . . . . . . . . . . . 5-1097

5-934 RTC_SET_INTERRUPT_DISABLE ioctl call arguments . . . . . . . . . . . . . 5-1098

5-935 RTC_TEST_INTERRUPT_FLAG ioctl call arguments . . . . . . . . . . . . . . . 5-1099

5-936 RTC_CLEAR_INTERRUPT_FLAG ioctl call arguments. . . . . . . . . . . . . . 5-1100

5-937 RTC_WRITE_MODULO_REG ioctl call arguments . . . . . . . . . . . . . . . . . 5-1101

5-938 RTC_READ_MODULO_REG ioctl call arguments . . . . . . . . . . . . . . . . . . 5-1102

5-939 RTC_READ_COUNTER_REG ioctl call arguments . . . . . . . . . . . . . . . . . 5-1103

6-1 FreeMASTER Driver Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

6-2 FreeMASTER Communication Configuration Items for appconfig.h . . . . . . . . 6-5

6-3 TSA Type Constants. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-23

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List of Figures

1-1 Software Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

2-1 Boot Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2-2 Interrupt Processing Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2-3 Memory Checking Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-47

3-1 Root Directory Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3-2 Sample Applications Directory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

3-3 Src Directory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

3-4 Stationery Directory Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

4-1 User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3

5-1 Macro Expansion Process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3

5-2 IIC Bus Transmission Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-774

5-3 IIC Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-818

6-1 FreeMASTER Application Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

7-1 GCT Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2

7-2 GCT Main Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3

7-3 Pinout Page Status Icons. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4

7-4 Pinout Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

7-5 Register View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

7-6 Warnings View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6

7-7 Options dialog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7

7-8 The appconfig.h File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8

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Chapter 1

Introduction

This user’s manual is targeted for Freescale 56F8xxx application developers. Its purpose is to describe the development environment, the software modules and the tools for the 56F8xxx and the Application Programming Interface (API). Simply, this manual describes how to use the Freescale DSP56800E_Quick_Start tool to develop software for the Freescale 56F8xxx Digital Signal Controllers (DSC).

1.1 Overview

The DSP56800E_Quick_Start development environment provides fully debugged peripheral drivers, examples and interfaces, that allow programmers to create their own C application code, independent of the core architecture. This environment has been developed to complement the existing development environment for Freescale 56F8xxx embedded processors. It provides a software infrastructure that allows development of efficient, ready to use high level software applications, that are fully portable and reusable between different core architectures. The maximum portability is achieved for devices with comparable on-chip peripheral modules.

This manual contains information specific only to DSP56800E_Quick_Start tool as it applies to the Freescale 56F8xxx software development. Therefore it is required that users of the DSP56800E_Quick_Start tool should be familiar with the 56800E family in general, as described in the DSP56800E 16-Bit DSP Core Reference Manual (DSP56800ERM/D), MC56F8300 Peripheral User Manual (MC56F8300UM/D) and the 56F8000 Peripheral Reference Manual (MC56F8000RM), before continuing. The 56F8xxx devices are supported by a complete set of hardware development boards - evaluation modules (EVMs) and development system cards for fast system development (e.g. Legacy Motor Interface Daughter Card).

Comprehensive information about available tools and documentation can be found on Freescale web pages:

http://www.freescale.com/

Freescale DSP56800E_Quick_Start tool is designed for and can be fully integrated with Freescale CodeWarrior development tools. Before starting to explore the full feature set of the DSP56800E_Quick_Start, one should install and become familiar with the CodeWarrior development environment.

All together, the DSP56800E_Quick_Start, the CodeWarrior, and the EVMs create a complete and scalable tool solution for easy, fast and efficient development.

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Introduction

HARDWARE

on-chip peripheral modules

ON-CHIP DRIVERS

API

APPLICATION

1.1.1 Features

The DSP56800E_Quick_Start environment is composed of the following major components: core-system infrastructure, on-chip drivers with defined API, sample example applications, Graphical Configuration Tool and FreeMASTER software support. This section brings very illustrative information about these components, while the comprehensive description can be found in specially targeted chapters.

1.1.1.1 Core-system Infrastructure

The core-system infrastructure creates the fundamental infrastructure for the 56F8xxx device operation and enables further integration with other components, e.g. on-chip drivers. The basic development support provided includes: setting of the required operation mode, commonly used macro definitions, portable architecture-dependent register declaration, mechanism for static configuration of on-chip peripherals as well as interrupt vectors, and the project templates.

1.1.1.2 On-chip Drivers

The on-chip drivers isolate the hardware-specific functionality into a set of driver commands with defined API. The API standardizes the interface between the software and the hardware, see Figure 1-1. This isolation enables a high degree of portability or architectural and hardware independence for application code. This is mainly valid for devices with similar peripheral modules. The driver code reuses lead for greater efficiency and performance.

Figure 1-1. Software Structure

1.1.1.3 Sample Applications

The DSP56800E_Quick_Start tool contains many sample applications that demonstrate how to use on-chip drivers and how to implement some user-specific tasks. These sample examples are kept simple and illustrative and their intention is to minimize the learning curve.

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Overview

1.1.1.4 Graphical Configuration Tool

The Graphical Configuration Tool (GCT) is a graphical user interface (GUI), designed to provide static chip and on-chip peripheral module setting/initialization, including association of the interrupt vectors with user interrupt service routines.

The Graphical Configuration Tool is not required in order to use the DSP56800E_Quick_Start environment, i.e. it is optional. Nevertheless, this tool simplifies the configuration of on-chip peripheral modules and the device itself. It also guides the user by supplying a lot of useful information and hints. It is therefore recommended to use the Graphical Configuration Tool.

1.1.1.5 FreeMASTER Software

The FreeMASTER application is a software tool initially created for developers of Motor Control applications, but it may be extended to any other application development. This tool allows remote control of an application using a user-friendly graphical environment running on a PC. It also provides the ability to view some real-time application variables in both textual and graphical form.

Main features:

• Graphical environment

• Visual Basic Script or Java Script can be used for control of target board

• Easy to understand navigation

• Connection to target board possible over a network, including Internet

• Demo mode with password protection support

• Visualization of real-time data in Scope window

• Acquisition of fast data changes using integrated Recorder

• Value interpretation using custom defined text messages

• Built-in support for standard variable types (integer, floating point, bit fields)

• Several built-in transformations for real type variables

• Automatic variable extraction from CodeWarrior linker output files (MAP, ELF)

• Remote control of application execution

The FreeMASTER tool is not required in order to use the DSP56800E_Quick_Start environment, i.e. it is optional. Nevertheless, FreeMASTER is a versatile tool to be used for multipurpose algorithms and applications. It provides a lot of excellent features, including:

• Real-Time debugging

• Diagnostic tool

• Demonstration tool

• Education tool

The full description can be found in the FreeMASTER User Manual attached to the FreeMASTER tool.

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Introduction

1.2 Quick Start

This chapter provides the information required to get the DSP56800E_Quick_Start tool installed and running.

1.2.1 Install CodeWarrior Development Tools

CodeWarrior Development Studio 56800/E Hybrid Controllers provides a complete software development environment for Freescale hybrid controllers. CodeWarrior is a windows based Integrated Development Environment (IDE) with highly efficient C compilers.

As previously mentioned, Freescale DSP56800E_Quick_Start tool is designed for and can be integrated with CodeWarrior development tools. With CodeWarrior tools, users can build applications and integrate other software included as part of the DSP56800E_Quick_Start release. Once the software is built, CodeWarrior tools allows users to download executable images into the target platform and run or debug the downloaded code.

The rest of this section describes the general installation process of the CodeWarrior tools. However, it is recommended to use the installation guide attached to the actual version of CodeWarrior, if available.

To start the installation process, perform the following steps:

1. Insert the CodeWarrior CD-ROM into your computer's CD-ROM drive.

If Auto Install is disabled on your computer, click the Start button, select Run, and type the CD-ROM's drive letter and \Setup.exe in the Open: text box. (e.g. D:\Setup.exe)

2. Follow the CodeWarrior software installation instructions on your screen.

Note: After installing CodeWarrior, remember to restart the computer. This restart ensures that newly installed drivers will be available for use.

3. Register CodeWarrior

• Click the St art button, then select CodeWarrior Registration from the CodeWarrior group. This runs the MWRegister.exe program.

• Enter your registration number and contact information. If you do not have a registration number, leave the Registration Number text box blank. • Click OK and send the resulting text file (e.g. MWRegistration.txt) to license@metrowerks.com. A license key will be sent to you via E-mail.

4. Install the license key.

• Locate the license.dat file in the CodeWarrior installation directory and open this file with any standard text editor, for example, Notepad.

• Copy or type the key starting on a new line at the bottom of the license.dat file. For more detailed instructions see the License_Install.txt file in the Licensing directory.

• Save the license.dat file.

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Quick Start

1.2.2 Install DSP56800E_Quick_Start

In order for the DSP56800E_Quick_Start to integrate itself with the development tools, the CodeWarrior tools should be installed prior to the installation of DSP56800E_Quick_Start installation (see previous section). If the DSP56800E_Quick_Start tool is installed while CodeWarrior is not present, users can only browse the installed software package, but will not be able to build, download and run the released code. However, the installation can be simply completed once CodeWarrior is installed, see Section 1.2.2.1.

The installation itself consists of copying the required files to the destination hard drive, checking the presence of CodeWarrior and creating the shortcut under the Start->Programs menu.

Note: Each DSP56800E_Quick_Start release is installed in its own new directory named DSP56800E_Quick_Start rX.Y (where X.Y denotes the release number). Thus, it enables to maintain the older releases and projects. It gives free choice to select the active release.

To start the installation process, perform the following steps:

1. Execute DSP56800E_Quick_Start_rXY.exe

2. Follow the DSP56800E_Quick_Start software installation instructions on your screen.

To integrate DSP56800E_Quick_Start with CodeWarrior, perform the following steps:

3. Set path to the DSP56800E_Quick_Start source within IDE

a) Launch CodeWarrior IDE from the Start->Programs->Freescale CodeWarrior menu

b) Open IDE Preferences dialog window using Edit->Preferences...

c) Select Source Trees panel from IDE Preferences Panels-General

d) Type DSP56800E_Quick_Start Source to the Name box

e) Choose Absolute Path as a path type

f) Click Choose and locate the DSP56800E_Quick_Start installation directory, e.g.

C:\Program Files\Freescale\DSP56800E_Quick_Start r2.4\src

g) click Add

h) click OK to finish

Setting Up a Remote Connection. A remote connection is a type of connection to use for debugging along with any preferences that connection may need. To create a new remote connection for the DSP56800E_Quick_Start:

a) Launch CodeWarrior IDE from the Start->Programs->Freescale CodeWarrior menu

b) On the main menu, select Edit -> Preferences

c) Click Remote Connections in the left column

d) Click the Add button - the New Connection window appears

e) In the Name edit box, type in HW as the connection name

f) In the Debugger combo box, select CCS 56800E Protocol Plug-in

g) In the Connection Type combo box, select CCS Remote Connection

h) Leave the check boxes unchecked (this is the default state)

i) Click the OK button

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Introduction

j) Click again the Add button - The New Connection window appears

k) In the Name edit box, type in SIM as the connection name

l) In the Debugger combo box, select Sim 56800E Protocol Plug-in

m) In the Connection Type combo box, select Simulator

n) In the Simulation BandWidth combo box, select Medium (this is the default state)

o) Click the OK button

1.2.2.1 Supplementary DSP56800E_Quick_Start Installation Steps

This section describes the additional installation steps required if CodeWarrior is installed after the DSP56800E_Quick_Start installation. Note: if this condition does not apply to you, skip this section completely.

Suppose that CodeWarrior and DSP56800E_Quick_Start are now successfully installed. The next step is to copy the content (i.e. the subdirectory) of the DSP56800E_Quick_Start Stationery

folder (e.g. ...Freescale\DSP56800E_Quick_Start r2.4\stationery) into the CodeWarrior root

folder (e.g. ...\CodeWarrior). This operation “registers” the DSP56800E_Quick_Start project

templates for the newly created projects. It is necessary to integrate DSP56800E_Quick_Start with CodeWarrior as the last step. To do this, perform the following steps:

a) Launch CodeWarrior IDE from the Start->Programs->Freescale CodeWarrior menu

b) Open the IDE Preferences dialog window using Edit->Preferences...

c) Select the Source Trees panel from IDE Preferences Panels-General

d) Type DSP56800E_Quick_Start Source to the Name box

e) Choose Absolute Path as a path type

f) Click Choose and locate the DSP56800E_Quick_Start installation directory, e.g.

C:\Program Files\Freescale\DSP56800E_Quick_Start r2.4\src

g) click Add

h) click OK to finish

1.2.2.2 Install Graphical Configuration Tool

The Graphical Configuration Tool is installed together with the whole DSP56800E_Quick_Start environment as a part of the Typical installation. The graphical configuration tool can also be installed as a selectable component within the Custom installation.

The Graphical Configuration Tool is able to work as stand-alone, but integration with the CodeWarrior IDE increases markedly the efficiency of this tool. This integration is based on the IDE user-configurable menus and its interface for external plug-ins.

To integrate the Graphical Configuration Tool with CodeWarrior IDE, perform the following steps:

a) Launch CodeWarrior IDE from the Start->Programs->Freescale CodeWarrior menu

b) Open the Commands and Key Bindings dialog window using Edit->Commands and

Key Bindings

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Quick Start

c) Unroll the desired menu command group (e.g. Project) from the command tree on the

left side of the dialog box.

d) Click on any item of unrolled tree

e) Click on button New Command

f) Type Co&nfiguration Tool to the Name box (char ‘&’ in front of char ‘n’ enables

selecting assigned menu item using Alt-n)

g) Click on check box Appears in Menus and tick it.

h) Click on button on the right side of the Execute edit box and browse for gct56F800.exe

i) Click on button on the right side of the Arguments edit box and select item Project File

directory from popup menu

j) If you want to assign key binding, click on button New Binding and press chosen key

combination, e.g. Ctrl+F12

k) Press button Save and close the dialog box

Now you should be able to execute the Graphical Configuration Tool from the CodeWarrior IDE menu or by pressing the chosen key shortcut. Note that the DSP56800E_Quick_Start project should be open in the IDE to quickly execute the Graphical Configuration Tool.

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Introduction

1.2.2.3 Install FreeMASTER (PC Master Software)

1.2.2.3.1 System Requirements

The FreeMASTER application can run on any computer with Microsoft Windows 98 or later operating system. Before installing, the Internet Explorer 4.0 or higher (5.5 is recommended) should be installed.

The following requirements result from those for the Internet Explorer 4.0 application:

Computer: 486DX/66 MHz or higher processor

Operating system: Microsoft Windows XP, Windows 2000, Windows NT4 with SP6, Windows

Required software: Internet Explorer 4.0 or higher installed. For selected features (e.g. regular expression-based parsing), Internet Explorer 5.5 or higher is required.

Hard drive space: 8 MB

Other hardware requirements: Mouse, serial RS-232 port for local control, network access for

remote control

1.2.2.3.2 Target Development Board Requirements

To enable the FreeMASTER connection to the target board application, follow the instructions provided with the embedded-side development tool. The recommended and fastest way to start using FreeMASTER is by trying the sample application. Note that the sample application name may still refer the “PC Master” software, which is the previous name of the FreeMASTER tool. FreeMASTER is fully backward compatible with PC Master.

FreeMASTER software relies on the following items to be provided by the target development board:

Interface: Serial communication port or the JTAG port (available on all Freescale EVM boards).

Data RAM Memory: Approximately 160 words of data memory plus the size of the recorder

buffer is needed for the full configuration. Optionally, some features can be disabled to reduce required data memory size.

Program Flash Memory: Required size is approximately 2K words for the full configuration. Optionally, some features can be removed to reduce required program memory size

1.2.2.3.3 Enabling FreeMASTER on Target Application

To enable the FreeMASTER operation on the target board application, see description and an example in Chapter 6, “FreeMASTER Driver.” .

1.2.2.3.4 How to Install

The FreeMASTER application is an optional part of the DSP56800E_Quick_Start environment and must be installed separately, e.g. running the fmaster13-1.exe.

1.2.3 Install MC56F8xxxEVM Hardware

The DSP56800E_Quick_Start for 56F8xxx has been designed and tested with the MC56F83xxEVM or MC56F8xxxDEMO target hardware. If the user wants to quickly exercise software applications included with DSP56800E_Quick_Start, MC56F8xxxEVM/DEMO hardware must be installed.

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Quick Start

The MC56F8xxxEVM/DEMO installation information is provided with CodeWarrior installation and can be found in the following document (located in the CodeWarrior installation directory):

<...>\CodeWarrior\CodeWarrior Manuals\PDF\Targeting_DSP56800E.pdf

It is recommended that all DSP56800E_Quick_Start users read through this document, before proceeding with software development.

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Introduction

1.2.4 Build and Run Sample Application

Once the DSP56800E_Quick_Start tool is installed, the user can build and run any of the released demo applications for the MC56F83xxEVM / MC56F8xxxDEMO by opening and building the project, using the CodeWarrior development environment. We will use pwm_demo.mcp as an example:

Step 1: Launch CodeWarrior IDE from the Start->Programs->Freescale CodeWarrior menu.

Step 2: Using File->Open command, open the pwm_demo.mcp project by selecting, e.g.

..\DSP56800E_Quick_Start r2.4\sample_applications\MC56F8346EVM\pwm_demo directory.

Note: Select the corresponding directory according to your EVM board, for the MC56F8346EVM, open the ..\DSP56800E_Quick_Start r2.4\sample_applications\ MC56F8346EVM\pwm_demo directory.

Step 3: Execute the application in the Debug mode by pressing the F5 key or choose the Debug command from the Project menu.

Step 4: Run the application by pressing the green arrow (Run) in the debug window or choose the Run command from the Project menu.

At this point, the application is running - the LEDs associated to the PWM outputs are flashing now and the green LED is blinking periodically.

The subsequent chapters describe how to create a new application, how to use interrupts, how to use on-chip drivers and other information required to successfully create a new application.

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Chapter 2

Core System Infrastructure

The Core System Infrastructure is one of the three main blocks that compose the DSP56800E_Quick_Start tool (see Section 1.1.1 where the partitioning is described). Its purpose is to provide the fundamental infrastructure for the 56800E device operation (e.g. sets the operation mode, the interrupt handling, the initialization of the global variables, CodeWarrior Compiler options). It also provides some additional support (commonly used macros, data types) and enables further integration with On-chip Drivers.

2.1 Boot Sequence

The Core System Infrastructure provides the fundamental code which is executed before the user’s main function. This code provides basic settings needed to initialize the chip, settings required by the CodeWarrior Compiler, initialization of global variables. Finally it passes control to the user’s application code (the main function).

Note: This chapter describes the boot process of the MC56F83xx family of microcontrollers which contain the Boot Flash memory. The boot process of the devices without the dedicated Boot Flash memory (MC56F80xx) is relatively simpler as the vector table need not to be relocated. Except this difference, the other startup steps are common for all 56800E devices.

For the MC56F83xx devices, the post-reset execution flow may be briefly described as follows (also see Figure 2-1):

1. After processor reset, the execution starts at the Hardware Reset vector in program memory, where the DSP56800E_Quick_Start tool places its jump to the Start() assembly routine

— For the EXTBOOT=1 and EMI_MODE=0 processor configuration (processor external pins are

sampled during reset), the reset vector is located at address 0x0000 and the jump is supplied directly from the first entry of vector table located in the interrupt_vectors section in vectors.c file.

— For another configuration, the reset vector is located at address 0x20000. A jump to the Start()

routine is compiled on this address (in the boot_jump section in vectors.c file) while keeping the full vector table on address 0x0000.

2. If the chip reset is generated by the watchdog module (COP), the same rules as in the previous point apply, except that the second entry of the vector table is used. Again the COP Reset vector is supplied from either the full vector table at address 0x0000 (interrupt_vectors section) or the reset jumps table at address 0x20000 (boot_jump section). The default value of COP Reset vector is Start(), so the standard power-up code is processed. The user is able to redefine the COP Reset service routine same way the other interrupt vectors are installed (see Section 2.5.2 on page 2-27 for more details).

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Core System Infrastructure

JSR

Start()

Power up/Reset

EXTBOOT=1 and EMI_MODE=0

Interrupt Vector Table

in Program Memory

JSR

Start() or COP Isr

JSR

Isr2()

asm void Start() { /* basic init */ ... jsr FuserPreMain

jsr Fmain jsr FuserPostMain debughlt

}

vectors.c

(interrupt_vectors section)

startup.c

void userPreMain() {

... ... ...

}

appconfig.c

void main() {

... ... ...

}

main.c

void userPostMain() {

… …

}

appconfig.c

P:0x0000

P:0x0001

P:0x0002

P:0x0004

P:0x0005

P:0x0003

P:0x20000

P:0x20001

Power up/Reset

EXTBOOT=0 EXTBOOT=1 and EMI_MODE=1

vectors.c

(boot_jump section)

Watchdog Reset

EXTBOOT=0 EXTBOOT=1 and EMI_MODE=1

P:0x20002

P:0x20003

Watchdog Reset

EXTBOOT=1 and EMI_MODE=0

JSR

Start()

JSR

Start() or COP Isr

3. Start() assembly routine (in startup.c file)

4. userPreMain() function (in appconfig.c file)

5. user’s main() function (in default project it is located in main.c)

6. userPostMain() function (in appconfig.c file)

The following subsections provide a detailed description of all initialization performed before user’s main() function is called.

2.1.1 Power-up/Reset

The 56800E core specifies two reset vectors: Hardware Reset and COP Watchdog Reset. These reset vectors are located at first two locations of interrupt vector table at address 0x0000 or 0x20000 depending on the configuration of the EXTBOOT and EMI_MODE pins. These vectors identify the address of the program code where the program control is passed to on reset. In applications developed with the DSP56800E_Quick_Start tool, the default entry point is the Start() assembly routine in the startup.c file.

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Figure 2-1. Boot Sequence

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Boot Sequence

In the DSP56800E_Quick_Start tool, the vector table (vectors.c) is always linked at address 0x0000 for any processor configuration. To assure the startup code gets called after reset even for the configurations where 0x20000 is the default vectors base, two jumps to the Start() are linked at these addresses from the boot_jump section of the vectors.c file for both reset vectors. The startup code then configures the interrupt controller to use the address 0x0000 as the vector table base address.

2.1.2

The entry point of all projects developed with the DSP56800E_Quick_Start tool is the Start() assembly routine located in the startup.c file in {project}\SystemConfig directory. This routine performs the following initialization:

Start()

• configures the interrupt controller to use the address 0x0000 as the vector base address

• sets the OMR register according to the settings in global application configuration file (appconfig.h)

• initializes the On-chip Clock Synthesis (OCCS) module, sets the PLL (by values from appconfig.h) and waits while the generated clock is stable

• sets the External Memory Interface unit (SEMI) to generate the proper chip select signals and the wait states for the external memories according to the appconfig.h file

• [optionally] runs the internal memory tests with halting the processor if memory module is not usable

• initializes the stack pointer (SP) to the address after any data segments

• clears the .bss segment which holds the uninitialized global and static C variables

• copies the initial values from Flash memory to initialized global C variables (.data segment). Either xFlash or pFlash memory can be chosen to hold the initialization data.

• clears and initializes variables in the fardata.bss and fardata.data segments

• clears and initializes variables in the .bss.pmem and .bss.data segment (program RAM-based variables)

- entry point

• initializes the program RAM-based code of the pramcode section.

When all the initialization is done, the functions userPreMain(), main(), userPostMain() are called.

2.1.3 userPreMain()

The userPreMain() function is called before the main application code in the main() function. The user can add any additional initialization code here. The function is located in the appconfig.c file.

2.1.4

The main() function is called after all the code described above is executed (i.e. the processor is initialized and the user’s pre-main code is executed). It is the place where the user writes the application code. By default the function is located in the main.c file, but the file can be renamed by the user.

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the User’s Application Code

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Core System Infrastructure

2.1.5 userPostMain()

The userPostMain() function is called after the main application code is finished. The user can add any additional code he/she wishes. By default the processor is halted by debughlt instruction here. The function is located in the appconfig.c file.

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Boot Sequence

2.2 Data Types

The DSP56800E_Quick_Start tool defines some basic data types to support code portability between different hardware architectures and tools. These basic data types, which are defined in the C header file types.h, support International Telecommunication Union (ITU) generic word types, integer, fractional, and complex data types. This is used throughout the interface definitions for the On-Chip Drivers. Note that in some development environments these data type definitions are located in the prototype.h file.

1. Generic word types

• Word8 - to represent 8-bit signed character variable/value

• UWord8 - to represent 16-bit unsigned character variable/value

• Word16 - to represent 16-bit signed variable/value

• UWord16 - to represent 16-bit unsigned variable/value

• Word32 - to represent 32-bit signed variable/value

• UWord32 - to represent 32-bit unsigned variable/value

2. Integer types

• Int8 - to represent 8-bit signed character variable/value

• UInt8 - to represent 8-bit unsigned character variable/value

• Int16 - to represent 16-bit signed variable/value

• UInt16 - to represent 16-bit unsigned variable/value

• Int32 - to represent 32-bit signed variable/value

• UInt32 - to represent 32-bit unsigned variable/value

3. Fractional types

• Frac16 - to represent 16-bit signed variable/value

• Frac32 - to represent 32-bit signed variable/value

• CFrac16 - to represent 16-bit complex numbers

• CFrac32 - to represent 32-bit complex numbers

4. Miscellaneous types

• bool - to represent boolean variable (true/false)

5. Constants

• true - represents true value

• false - represents false value

• NULL - represents null pointer

• MAX_32 - maximum 32-bit signed (Word32) value

• MIN_32 - minimum 32-bit signed (Word32) value

• MAX_16 - maximum 16-bit signed (Word16) value

• MIN_16 - minimum 16-bit signed (Word16) value

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Core System Infrastructure

2.3

ArchIO

Peripheral Register Structures

The global symbol ArchIO provides a C interface (structure type) to all peripheral and core registers mapped in data memory. All registers are accessed via this structure so there is no need to know and specify the concrete addresses of the registers to write or read. This mechanism increases code readability and portability and simplifies access to registers. The ArchIO is declared in the C header file arch.h.

The ArchIO is of type arch_sIO, which is the structure type composed from another structures, one for each peripheral module.

There are two possible approaches how to define and use the ArchIO structure:

• define ArchIO as the direct (numeric) address of memory-mapped peripheral registers casted to the proper structure type.

• define ArchIO as the extern variable while defining its address by a directive in linker command file.

The second approach is used in the DSP56800E_Quick_Start tool implementation by default.

Example 2-1. Using the ArchIO structure

UWord16 RegValue;

RegValue = ArchIO.TimerD.Channel0.HoldReg; ArchIO.TimerD.Channel0.CompareReg1 = 0x8000;

The Code Example 2-1 reads the timer/counter D0 Hold Register (HOLD) and writes to the timer/counter D0 Compare Register 1 (CMP1).

Example 2-2. Using the ArchIO structure

UWord16 RegValue;

RegValue = periphMemRead(&ArchIO.TimerD.Channel0.HoldReg); periphMemWrite(0x8000, &ArchIO.TimerD.Channel0.CompareReg1);

Code Example 2-2 shows the same operation using the periphMemRead and periphMemWrite macros described later in Section 2.4.2:

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Boot Sequence

2.4 Core System’s Routines and Macros

This section describes routines, macros and intrinsic function redefinition provided by the Core System Infrastructure.

2.4.1 Architecture dependent routines

This section describes architecture dependent routines and macros which provide interface to the 56800E core architecture. It encapsulates the unique features of the 56800E architecture into the abstract APIs. All routines are defined in the arch.h header file.

2.4.1.1 archEnableInt - enable interrupts

Call(s):

void archEnableInt(void);

Arguments: None.

Description: The archEnableInt macro enables all interrupts by clearing bits I1 (Bit 9) and I0

(Bit 8) in the Status Register (SR).

Example 2-3. archEnableInt macro usage

archEnableInt();

2.4.1.2 archEnableIntLvl123 - enable interrupt levels 1, 2 and 3

Call(s):

void archEnableIntLvl123(void);

Arguments: None.

Description: The archEnableIntLvl123 macro enables interrupts at levels 1, 2 and 3 while

masking the interrupts at level 0. It is accomplished by clearing bit I1 (Bit 9) and setting bit I0 (Bit

8) in the Status Register (SR).

Example 2-4. archEnableIntLvl123 macro usage

archEnableIntLvl123();

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2.4.1.3 archEnableIntLvl23 - enable interrupts levels 2 and 3

Call(s):

void archEnableIntLvl23(void);

Arguments: None.

Description: The archEnableIntLvl23 macro enables interrupts at levels 2 and 3 while masking

interrupts at levels 0 and 1. It is accomplished by setting bit I1 (Bit 9) and clearing I0 (Bit 8) in the Status Register (SR).

Example 2-5. archEnableIntLvl23 macro usage

archEnableIntLvl23();

2.4.1.4 archDisableInt - disable interrupts

Call(s):

void archDisableInt(void);

Arguments: None.

Description: The archDisableInt macro disables all maskable interrupts by setting bits I1 and I0

(Bits 9 - 8) in the Status Register (SR).

Example 2-6. archDisableInt macro usage

archDisableInt();

2.4.1.5 archResetLimitBit - reset limit bit

Call(s):

void archResetLimitBit(void);

Arguments: None.

Description: The archResetLimitBit macro resets limit bit (L) - Bit 6 in the Status Register (SR).

Example 2-7. archResetLimitBit macro usage

archResetLimitBit();

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2.4.1.6 archSetNoSat - set no saturation mode

Call(s):

void archSetNoSat(void);

Arguments: None.

Description: The archSetNoSat macro disables the saturation mode. This macro clears the

saturation (SA) bit - Bit 4 in the Operating Mode Register (OMR).

Example 2-8. archSetNoSat macro usage

archResetLimitBit();

2.4.1.7 archSetSat32 - set saturation mode

Call(s):

void archSetSat32(void);

Arguments: None.

Description: The archSetSat32 macro sets the saturation mode. This macro sets the saturation

(SA) bit - Bit 4 in the Operating Mode Register (OMR).

Example 2-9. archSetSat32 macro usage

archSetSat32();

2.4.1.8 archSet2CompRound - set two’s complement rounding mode

Call(s):

void archSet2CompRound(void);

Arguments: None.

Description: The archSet2CompRound macro sets the two’s complement rounding mode. This

macro sets the rounding (R) bit - Bit 5 in the Operating Mode Register (OMR).

Example 2-10. archSet2CompRound macro usage

archSet2CompRound();

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2.4.1.9 archSetConvRound - set convergent rounding mode

Call(s):

void archSetConvRound(void);

Arguments: None.

Description: The archSetConvRound macro sets the convergent rounding mode. This macro

clears the rounding (R) bit - Bit 5 in the Operating Mode Register (OMR).

Example 2-11. archSetConvRound macro usage

archSetConvRound();

2.4.1.10 archStop - stop processing state

Call(s):

void archStop(void);

Arguments: None.

Description: The archStop macro places the processor into the stop processing state by executing

a stop instruction.

Example 2-12. archStop macro usage

archStop();

2.4.1.11 archTrap - initiate a software interrupt

Call(s):

void archTrap(void);

Arguments: None.

Description: The archTrap macro initiates a software interrupt by executing a swi instruction.

Example 2-13. archTrap macro usage

archTrap();

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2.4.1.12 archWait - wait processing state

Call(s):

void archWait(void);

Arguments: None.

Description: The archWait macro places the processor into the wait processing state by

executing a wait instruction.

Example 2-14. archWait macro usage

archWait();

2.4.1.13 archGetLimitBit - get limit bit

Call(s):

Word16 archGetLimitBit(void);

Arguments: None.

Description: The archGetLimitBit inline function returns the status of the limit bit (L) - Bit 6 in

the Status Register (SR).

Returns: The returned value is masked value of the L-bit in SR. It is either 0 - limit bit is cleared or non-zero (0x40) - limit bit is set.

Example 2-15. archGetLimitBit function usage

if(archGetLimitBit()) {

...

}

2.4.1.14 archGetSetSaturationMode - get and set saturation mode

Call(s):

Word16 archGetSetSaturationMode(bool bSatMode);

Arguments:

Table 2-1. archGetSetSaturationMode arguments

bSatMode in State of the saturation mode to be set.

false - set no saturation mode true - set saturation mode

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Description: The archGetSetSaturationMode inline function sets the saturation mode to a user specified value. The function manipulates with the saturation (SA) bit - Bit 4 in the Operating Mode Register (OMR).

Returns: Saturation mode prior to the new state (the return value is masked SA-bit from the previous OMR value).

Example 2-16. archGetSetSaturationMode function usage

Word16 bSatMode; bSatMode = archGetSetSaturationMode(true);

2.4.1.15 archDelay - delay

Call(s):

void archDelay(UWord16 Ticks);

Arguments:

Table 2-2. archDelay arguments

Ticks in Number of CPU cycles to delay (0 to 0xFFFF)

Description: The archDelay inline function delays the program execution by the specified number of CPU cycles.

Returns: None.

Special Issues: The delay corresponds just roughly to the number of CPU cycles.

Example 2-17. archDelay function usage

archDelay(1000);

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2.4.2 Macros for peripheral memory access

This section describes macros for peripheral memory access. The macros are used to read, write, set, clear, change the memory mapped on-chip peripherals. Using these macros offers a greater portability than simply referencing on-chip peripherals with direct memory accesses. All macros are defined in the periph.h header file.

Required Header File(s):

#include “types.h“ #include “periph.h“

2.4.2.1 periphMemRead - memory read

Call(s):

UWord16 periphMemRead(UWord16 *pAddr);

Arguments:

Table 2-3.

pAddr in The memory address from which to read a 16-bit word.

periphMemRead

arguments

Description: The periphMemRead macro reads a 16-bit word from the memory location addressed by parameter pAddr.

Example 2-18. periphMemRead macro usage

UWord16 RegValue;

RegValue = periphMemRead(&ArchIO.TimerD.ch0.hold);

This code reads the content of the timer/counter D0 Hold Register (HOLD).

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2.4.2.2 periphMemWrite - memory write

Call(s):

UWord16 periphMemWrite(UWord16 Data, UWord16 *pAddr);

Arguments:

Table 2-4.

Data in The 16-bit data to write to the memory.

pAddr in The memory address to which to write a 16-bit word.

periphMemWrite

arguments

Description: The periphMemWrite macro writes a 16-bit word (parameter Data) to the memory addressed by parameter pAddr.

Example 2-19. periphMemWrite macro usage

periphMemWrite(0x1234, (UWord16 *) 0x0D60); periphMemWrite(0xABCD, &ArchIO.TimerD.ch0.cmp1);

This code writes 0x1234 to the memory location at address 0x0D60 and value 0xABCD into the timer/counter D0 Compare Register 1.

2.4.2.3 periphBitSet - set selected bits

Call(s):

void periphBitSet(UWord16 Mask, UWord16 *pAddr);

Arguments:

Table 2-5.

Mask in Bit mask.

pAddr in The memory address.

periphBitSet

arguments

Description: The periphBitSet macro sets the selected bits in a memory location addressed by parameter pAddr.

Example 2-20. periphBitSet macro usage

periphBitSet(0xC000, &ArchIO.TimerD.ch0.scr);

This code sets bits 15 and 14 in the timer/counter D0 Status and Control Register (SCR).

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2.4.2.4 periphMemInvBitSet - invert memory content and set selected

bits

Call(s):

void periphMemInvBitSet(UWord16 Mask, UWord16 *pAddr);

Arguments:

Table 2-6.

Mask in Bit mask.

pAddr in The memory address.

periphMemInvBitSet

arguments

Description: The periphMemInvBitSet macro reads the memory content, inverts its value and sets the selected bits in a memory location addressed by parameter pAddr.

Note, that this macro can be used in some special purposes, e.g. for clearing the pending flags.

Example 2-21. periphMemInvBitSet macro usage

periphMemInvBitSet(0x0004, &ArchIO.Sim.rststs);

This code clears the Power On Reset flag in the RSTSTS register.

2.4.2.5 periphBitClear - clear selected bits

Call(s):

void periphBitClear(UWord16 Mask, UWord16 *pAddr);

Arguments:

Table 2-7.

Mask in Bit mask.

pAddr in The memory address.

periphBitClear

arguments

Description: The periphBitClear macro clears the selected bits in a memory location addressed by parameter pAddr.

Example 2-22. periphBitClear macro usage

periphBitClear(0xC000, &ArchIO.TimerD.ch0.scr);

This code clears bits 15 and 14 in the timer/counter D0 Status and Control Register (SCR).

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2.4.2.6 periphBitGrpSR - set bit group to given value

Call(s):

void periphBitGrpSR(UWord16 GroupMask, UWord16 Mask,

UWord16 *pAddr);

Arguments:

Table 2-8.

GroupMask in Group mask

Mask in “ones” bit mask.

pAddr in The memory address.

periphBitSet

arguments

Description: The periphBitGrpSR macro sets the bit group to a given value in a memory location addressed by parameter pAddr. All bits specified by GroupMask are affected. These bits are either set if the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value are cleared.

The “SR” variant uses two non-interruptible instructions bfset and bfclr to accomplish the requested operation. The bfset first sets the “one” bits in the destination location, and bfclr then clears the “zero” bits there.

Caution: This macro is the optimal way how to set the specified group of bits to given value. However, it must be kept in mind that during the short time between these two bit operations, the target memory location goes through the third state where the bit group might contain invalid value (“ones” already set but “zeroes” not yet cleared).

Example 2-23. periphBitGrpSR macro usage

periphBitGrpSR(0x007f, 10, &ArchIO.Pll.plldb);

This code sets the lower 7 bits of PLL Divide-By register to the value 10. Other bits in the register are not affected.

2.4.2.7 periphBitGrpRS - set bit group to given value

Call(s):

void periphBitGrpRS(UWord16 GroupMask, UWord16 Mask,

UWord16 *pAddr);

Arguments:

Table 2-9.

GroupMask in Group mask

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Table 2-9.

Mask in “ones” bit mask.

pAddr in The memory address.

periphBitSet

arguments

Description: The periphBitGrpRS macro sets the bit group to a given value in a memory location addressed by parameter pAddr. All bits specified by GroupMask are affected. The bits are either set if the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value are cleared.

The “RS” variant uses two non-interruptible instructions bfclr and bfset to accomplish the requested operation. The bfclr first clears the “zero” bits in the destination location, and bfset then sets the “one” bits there.

Caution: This macro is the optimal way how to set the specified group of bits to given value. However, it must be kept in mind that during the short time between these two bit operations, the target memory location goes through the third state where the bit group might contain invalid value (“zeroes” already cleared but “ones” not yet set).

Example 2-24. periphBitGrpRS macro usage

periphBitGrpRS(0x007f, 10, &ArchIO.Pll.plldb);

This code sets the lower 7 bits of PLL Divide-By register to the value 10. Other bits in the register are not affected.

2.4.2.8 periphBitGrpZS - set bit group to given value

Call(s):

void periphBitGrpZS(UWord16 GroupMask, UWord16 Mask,

UWord16 *pAddr);

Arguments:

Table 2-10.

GroupMask in Group mask

Mask in “ones” bit mask.

pAddr in The memory address.

Description: The periphBitGrpZS macro sets the bit group to a given value in a memory location addressed by parameter pAddr. All bits specified by GroupMask are affected. The bits are either set if the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value are cleared.

periphBitSet

arguments

The “ZS” variant uses two non-interruptible instructions bfclr and bfset to accomplish the requested operation. The bfclr first clears all bits in GroupMask and bfset then sets the “one” bits there.

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Example 2-25. periphBitGrpZS macro usage

periphBitGrpZS(0x007f, 10, &ArchIO.Pll.plldb);

This code sets the lower 7 bits of PLL Divide-By register to the value 10. Other bits in the register are not affected.

2.4.2.9 periphBitGrpSet - set bit group to given value

Call(s):

void periphBitGrpSet(UWord16 GroupMask, UWord16 Mask,

UWord16 *pAddr);

Arguments:

Table 2-11.

GroupMask in Group mask

Mask in “ones” bit mask.

pAddr in The memory address.

periphBitSet

arguments

Description: The periphBitGrpSet macro sets the bit group to a given value in a memory location addressed by parameter pAddr. All bits specified by GroupMask are affected. The bits are either set if the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value are cleared.

This variant uses the accumulator and read-modify-write instructions to accomplish the requested operation. The memory location is first read to accumulator, the bfclr and bfset instructions are performed on accumulator and the result value is then written back to memory location.

Caution: It might seem this macro is the “proper” way how to set the group of bits to certain value as there are no intermediate invalid values written in the target memory location. However, it is quite dangerous to use this macro when interrupts may occur between the read and write operations. If the interrupt service routine would write the other portion of the target memory location, the written value could be overwritten back with its previous state by the write accumulator operation of periphBitGrpSet.

Example 2-26. periphBitGrpSet macro usage

periphBitGrpSet(0x007f, 10, &ArchIO.Pll.plldb);

This code sets the lower 7 bits of PLL Divide-By register to the value 10. Other bits in the register are not affected (but see “Caution” above).

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2.4.2.10 periphSafeAckByOne - clear (acknowledge) bit flags which

are active-high and are cleared by write-one

Call(s):

void periphSafeAckByOne(UWord16 GroupMask, UWord16 Mask,

UWord16 *pAddr);

Arguments:

Table 2-12.

GroupMask in Group mask

Mask in “ones” bit mask.

pAddr in The memory address.

periphSafeAckByOne

arguments

Description: The periphSafeAckByOne macro clears (acknowledges) bit flags which are active-high and are cleared by write-one in a peripheral memory location addressed by parameter pAddr. The GroupMask specifies all flags which might be affected by clearing procedure. The Mask value specifies flag/flags to be cleared.

Caution: TBD

Example 2-27. periphSafeAckByOne macro usage

periphSafeAckByOne(0x8000 | 0x0100 | 0x0010, 0x0100,

&ArchIO.Decoder0.deccr);

This code clears the Index Pulse Interrupt Request flag in the Decoder Control Register.

2.4.2.11 periphBitChange - change selected bits

Call(s):

void periphBitChange(UWord16 Mask, UWord16 *pAddr);

Arguments:

Table 2-13.

Mask in Bit mask.

pAddr in The memory address.

Description: The periphBitChange macro complements the selected bits in a memory location addressed by parameter pAddr.

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arguments

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Example 2-28. periphBitChange macro usage

periphBitChange(0xC000, &ArchIO.PortB.dr);

This code complements bits 15 and 14 in the Port B Data Register (DR).

2.4.2.12 periphBitTest - test selected bits

Call(s):

UWord16 periphBitTest(UWord16 Mask, UWord16 *pAddr);

Arguments:

Table 2-14.

Mask in Bit mask.

pAddr in The memory address.

periphBitTest

arguments

Description: The periphBitTest macro tests the selected bits if they are set in a memory location addressed by parameter pAddr.

Example 2-29. periphBitTest macro usage

if (periphBitTest(0x8000, &ArchIO.TimerD.ch0.scr)) {

periphBitClear(0x8000, &ArchIO.TimerD.ch0.scr);

};

This code checks if Timer Compare Flag (Bit 15) in the timer/counter D0 Status and Control Register (SCR) is set.

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unsigA unsigB⋅

sig unsig⋅

2.4.3 Miscellaneous Routines

This section describes some additional routines provided by the DSP56800E_Quick_Start tool.

2.4.3.1 impyuu - integer multiply unsigned 16b x unsigned 16b

Call(s):

UWord32 impyuu(UWord16 unsigA, UWord16 unsigB);

Arguments:

Table 2-15. impyuu arguments

unsigA in first argument

unsigB in second argument

Description: The impyuu inline function multiplies a 16-bit unsigned integer with a 16-bit unsigned integer and returns the 32-bit unsigned integer result.

Returns: result of multiplication

Example 2-30. impyuu function usage

UWord16 var1 = 65535U; UWord16 var2 = 65535U; UWord32 result;

result = impyuu(var1, var2); /* returns 4294836225 */

This code multiplies variables var1 and var2 and returns the result in result variable.

2.4.3.2 impysu - integer multiply signed 16b x unsigned 16b

Call(s):

Word32 impysu(Word16 sig, UWord16 unsig);

Arguments:

Table 2-16. impysu arguments

sig in first argument (signed)

unsig in second argument (unsigned)

Description: The impysu function multiplies 16-bit signed integer and 16-bit unsigned integer as an and returns the 32-bit signed integer result.

Returns: result of multiplication

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Example 2-31. impysu function usage

Word16 var1 = -32768; UWord16 var2 = 65535U; Word32 result;

result = impysu(var1, var2); /* returns -2147450880 */

This code multiplies variables var1 and var2 and returns the result in result variable.

2.4.3.3 shl2 - optimized version of

shl

intrinsic function

Call(s):

Word16 shl2(Word16 num, UWord16 shifts);

Arguments:

Table 2-17. shl2 arguments

num in parameter to be shifted

shifts in number of shifts

Description: The shl2 function performs a multi-bit arithmetic shift of the first parameter to the left by the amount specified in the second parameter. The result is returned as a 16-bit integer. This function is the optimized version of the shl intrinsic function (see CodeWarrior Help for more information on shl).

Returns: num parameter shifted shifts times to the left

Example 2-32. shl2 function usage

Word16 var1 = 1; UWord16 var2 = 15; Word16 result;

result = shl2(var1, var2); /* returns 0x8000 */

This code shifts var1 variable var2 times to the left and returns the result in result variable.

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2.4.3.4 shr2 - optimized version of

shr

intrinsic function

Call(s):

Word16 shr2(Word16 num, UWord16 shifts);

Arguments:

Table 2-18. shr2 arguments

num in parameter to be shifted

shifts in number of shifts

Description: The shr2 function performs a multi-bit arithmetic shift of the first parameter to the right by the amount specified in the second parameter. The result is returned as a 16-bit integer. This function is the optimized version of the shr intrinsic function (see CodeWarrior Help for more information on shr).

Returns: num parameter shifted shifts times to the right

Example 2-33. shr2 function usage

Word16 var1 = 16; Word16 result;

result = shr2(var1, 3); /* returns 0x0002 */

This code shifts var1 variable three times to the right and returns the result in the result variable.

2.4.4 Intrinsic Functions

The DSP56800E_Quick_Start tool exploits the system intrinsic functions defined in intrinsics_56800E.h header file distributed with the CodeWarrior Development Studio 56800/E Hybrid Controllers.

To preserve compatibility with the DSP56800_Quick_Start tool, the intrinsics_56800E.h is included in types.h header file.

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2.5 Interrupts

This section describes interrupt processing and interrupt configuration using the DSP56800E_Quick_Start tool. For detailed information on interrupts and interrupt processing for the 56F800E, please see the 56800E 16-Bit Core Reference Manual and the target processor’s User’s Manual.

2.5.1 Processing Interrupts

An interrupt is an event that is generated by a condition inside the microcontroller or from external sources. When such event occurs, the interrupt processing transfers control from the currently executing program to an interrupt service routine (ISR), with the ability to later return to the current program upon completion of the ISR. Among the main uses of interrupts we can have data transfers between microcontroller memory and a peripheral device, or begin of execution of an algorithm upon reception of a new sample. An interrupt can also be used, for example, to exit the microcontroller’s low-power wait processing state.

2.5.1.1 Interrupt Vector Table

The interrupt system on 56F800E can be defined as vectored. Each interrupt source has its own program memory location at a fixed address, to which program control is passed when an interrupt occurs. This program memory location must contain a JSR instruction with the address of the interrupt service routine (ISR). When this interrupt occurs, the JSR instruction is executed and the program control is passed to the ISR. The program memory containing the JSR instructions with the addresses of the ISR is called interrupt vector table.

Depending on processor configuration (the state of the EXTBOOT and EMI_MODE pins during reset), the interrupt vector table might be located at base address 0x0000 or 0x20000. During the code execution, the interrupt vector table base address can be changed by modifying the VBA register of interrupt controller unit (INTC).

In the DSP56800E_Quick_Start tool, the full interrupt vector table is always located at address 0x0000 regardless of the configuration of the EXTBOOT and EMI_MODE pins. The VBA register is set to zero during the startup code. For the case the processor configuration directs reset vector to 0x20000, the jump to startup code is also linked to this address. See Section 2.1.1 on page 2-2 for closer description of the booting process.

In the DSP56800E_Quick_Start tool, the interrupt vector table is implemented in C code which enables to effectively use the C preprocessor. The special macros defined in the global application configuration file (appconfig.h) can be used to setup the interrupt vector and to assign the interrupt priorities.

The interrupt controller and its configuration are described in more details later in Section 2.5.2.1.

2.5.1.2 Interrupt Processing Flow

Figure 2-2 shows an interrupt processing flow. The DSP56800E_Quick_Start tool does not provide any intermediate step when calling the ISR. When an interrupt occurs, the currently executed program is interrupted and the JSR instruction from the interrupt vector table is fetched. Executing the JSR instruction results in the program changing its flow directly to an ISR. Also the status register and the program counter are pushed onto the stack. When the user ISR finishes, it

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user code

Interrupt

Occurs

1) save used registers

2) user code

3) restore registers

4) RTI

JSR

Isr1

Interrupt Vector Table

in Program Memory

JSR

Isr2

JSR

Isr3

Return from Interrupt (PC and SR restored)

Isr2()

PC and SR

saved

executes a Return from Interrupt (RTI) instruction, which pops the program counter and the status register from the hardware stack. It puts the User Code back into the same state as it was in before execution, assuming that the User ISR saved and restored all the registers it had used.

Figure 2-2. Interrupt Processing Flow

2.5.1.3 ISRs

An ISR is a program code that is executed when an interrupt is detected. An ISR is responsible for servicing the cause of the interrupt, such as reading a sample from a port when it is full or transmitting a sample to a port when it is empty. When an interrupt occurs, all other interrupts of the same or of a lower priority are disabled from executing, until the current ISR finishes executing. For this reason, an ISR should be as fast as possible to prevent any overflow or under run condition.

Inside the ISR it is necessary to save, and upon servicing the interrupt, to restore all used registers, including registers from the register bank used by the compiler. The DSP56800E_Quick_Start tool does not provide any automatic saving/restoring of used registers.

The last instruction of an ISR must be “Return from Interrupt” (RTI) instruction. This instruction restores the SR and the PC from the stack.

Both saving/restoring registers and using RTI instead of RTS are provided by the compiler directive #pragma interrupt. #pragma interrupt is used when declaring a C function and it instructs the compiler to save all registers used within a C function and to restore those register values upon exiting. Also it places an RTI instruction instead of an RTS at the end of the function. See Section 2.5.3.

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2.5.1.4 Interrupt Priority Levels

On 56F800E hybrid microcontroller family, each interrupt can be assigned the interrupt priority level (IPL). It is the number from 0 (lowest priority) to 3 (highest priority). When servicing the interrupt, until the RTI instruction is executed, the other interrupts of the same and lower priority levels are masked (temporarily disabled). If there is an interrupt request of the masked priority level, its processing is postponed until the level is unmasked again.

This model assures that the interrupts of the same level can not “nest” one to each other. On the other hand, the higher priority interrupts do nest to the lower priority interrupts.

2.5.1.5 Fast Interrupts

Up to 2 interrupt sources can be declared as Fast Interrupts. The Fast Interrupts jump directly to a service routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table first.

IRQs used as fast interrupts MUST be set to priority level 2. Unexpected results can occur if a fast interrupt vector is set to any other priority.

Caution: A special Fast Interrupt Return instruction (frtid) must be used in order to return from the Fast Interrupt service routine. There are also several limitations in the way how the Fast Interrupt service routine can be coded. See the 56800E Processor Core Reference Manual for more details.

2.5.1.6 Clearing Interrupt Flags

Each on-chip peripheral interrupt source has its own interrupt flag, which must be cleared after the interrupt is serviced. For each peripheral module, the method of clearing the interrupt flag is different. As the DSP56800E_Quick_Start tool does not add any infrastructure code to the interrupt service routines, it also does not clear the interrupt flag inside the ISR. See Code Example 2-34.

Example 2-34. Clearing Interrupt Flags inside ISR

/*******************************************************************************

********************************************************************************/ #pragma interrupt void pwmAReloadISR(void) {

}

This example shows the PWMA Reload Interrupt Service Routine. Note that the PWM_CLEAR_ RELOAD_FLAG ioctl() command is used to clear the Reload Interrupt Flag (Bit 5) in the PWM

Control Register and that this is the user’s responsibility.

PWM A Reload Interrupt Service Routine

/* ISR code */ ... /* clear Reload interrupt flag */ ioctl(PWM_A, PWM_CLEAR_RELOAD_FLAG, NULL);

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2.5.2 Configuring Interrupts

This section describes the configuration of interrupts using the DSP56800E_Quick_Start tool. Interrupt configuration consists of installing the interrupt service routine (ISR) at the specified interrupt vector, enabling the interrupt and setting the interrupt priority level.

2.5.2.1 Installing ISRs

The DSP56800E_Quick_Start tool supports static (compile-time) installation of the ISRs, dynamic installation (run-time) is not supported. In general, static installation of ISRs requires less program memory and has a lower (or even no) time overhead.

The static installation of ISRs consists of writing the address of the ISR to the interrupt vector table for given interrupt source at compilation time. The interrupt vector table is located in the

vectors.c file. By default all interrupt vectors are initialized with the address of the unhandled_interrupt() function in the vectors.c file, which contains the debughlt instruction and

provides an alarm to the user, that this interrupt was not installed but has occurred, which is very useful when debugging. One exception to this is the Hardware Reset vector, which contains the address of the startup code - Start() routine in the startup.c file.

To install a user’s ISR at the xxth interrupt vector add the following #define in appconfig.h:

#define INT_VECTOR_ADDR_xx userISRname

The conditional compilation then forces the compiler to use the userISRname() ISR instead of the default unhandled_interrupt() at the position of the xxth interrupt vector in the interrupt vector table. The userISRname is the placeholder for the name of interrupt service routine with prototype of

void userISRroutine (void)

In your source code, you then put the following code:

#pragma interrupt void userISRname(void) {

/* ISR code */

}

The range of interrupt vectors which can be installed (xx) is 1 to 80. Vector 0 is the Hardware Reset vector and always refers to the Start() code.

2.5.2.2 Assigning Interrupt Priority Levels

As described in Section 2.5.1.4 on page 2-26, each enabled interrupt can be assigned to one interrupt priority level in range from 0 to 3.

There are some exceptions from this rule for the particular interrupt sources which has assigned a fixed priority levels. Also, as there are only two bits (four combinations) to encode five different states of the interrupt source (disabled, level 0,..., level 3) there is always one priority level, which cannot be set for any interrupt.

The DSP56800E_Quick_Start tool hides these difficulties and implementation details described above and simplifies the configuration of the interrupt priority levels to the maximal extent (while keeping the generated code optimal).

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To enable the interrupt servicing and to assign a certain priority level, the user defines the macro:

INT_PRIORITY_LEVEL_xx INTC_LEVELn

To explicitly disable the interrupt, the user can define the macro as

INT_PRIORITY_LEVEL_xx INTC_DISABLED

where xx is the interrupt number (from 1 to 80) and n is the interrupt level (from 0 to 3). The interrupt sources configurations are then applied to a processor core by issuing the INTC_INIT ioctl command, for example in the main function.

The C preprocessor and compiler check the validity of the selected priority level early during the compilation and issues compilation errors if invalid combination of interrupt source number and interrupt priority level is requested (or if priority level is requested to be set for the source with fixed priority level).

2.5.2.3 Installing Fast Interrupts

As described in Section 2.5.1.5 on page 2-26, two interrupt sources can be selected as “Fast Interrupts”. For the fast interrupts, the interrupt controller does not fetch the jsr instruction from the vector table and directly loads the program counter (PC) with address specified in dedicated Fast Interrupt Vector Address (FIVA) registers.

In the DSP56800E_Quick_Start tool, the fast interrupts are automatically configured by the

INTC_INIT code if the user defines the macros:

INTC_FIM0_INIT xx

INTC_FIM1_INIT xx

where xx specifies what interrupt source is to be selected as fast interrupt (0 or 1).

By default, the address of interrupt service routine defined by INT_VECTOR_ADDR_xx is then automatically loaded into the FIVA registers during the INTC_INIT command. The preprocessor also verifies the interrupt identified for a fast interrupt is configured to priority level 2 (which is required for the proper operation).

Caution: A special Fast Interrupt Return instruction (frtid) must be used in order to return from the Fast Interrupt service routine.

If there is another vector address to be used for the fast interrupt processing, instead of the default

INT_VECTOR_ADDR_xx, the following macros can be defined in appconfig.h

INTC_FIVA0_INIT fastint0ISR

INTC_FIVA1_INIT fastint1ISR

where fastint0ISR and fastint1ISR are the placeholders for the fast interrupt service routine names.

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2.5.2.4 Enabling Interrupts

In addition to the interrupt controller peripheral described above, the 56800E core has its own method how to enable and disable the interrupts of certain priority levels. So, regardless the interrupt setting defined by macros in appconfig.h and initialization done by the INTC_INIT command, there is another step to do to enable interrupt servicing in the application.

At the core level, the interrupts can be in four states:

• All interrupts disabled (default state) - use archDisableInt() macro

• All interrupts enabled - use archEnableInt() macro

• Priority levels 1, 2 and 3 enabled, level 0 disabled - use archEnableIntLvl123() macro

• Priority levels 2 and 3 enabled, levels 0 and 1 disabled - use archEnableIntLvl23() macro

2.5.3 Code Example

The following example shows the installation of the ISR into the interrupt vector table and shows how to enable interrupts using the DSP56800E_Quick_Start tool.

The following example shows the installation of the external interrupt IRQA, the timer/counter D2 interrupt and the PWM A reload interrupt. The example shows a part of the code, which must be included in appconfig.h, all three ISRs and the initialization code. ISRs are declared as #pragma interrupt to instruct the compiler to save/restore all used registers and to terminate the ISRs with an RTI instruction. Inside the appconfig.h file, INT_VECTOR_ADDR_xx and ITCN_INT_PRIORITY_xx define statements are used to install the ISR at the specified interrupt vector and to define the interrupt priority level. The achEnableInt() macro and the ITCN driver commands ITCN_INIT_GPRS and ITCN_INIT_IPR are used to enable interrupts.

Example 2-35. Installing ISRs and enabling interrupts

1) appconfig.h file

/***************************************************************************** ** * * Freescale Semiconductor Inc. * (c) Copyright 2004 Freescale Semiconductor, Inc. * (c) Copyright 2001-2004 Motorola, Inc. * ALL RIGHTS RESERVED. * ****************************************************************************** ** * * File Name: appconfig.h * * Description: file for static configuration of the application * (initial values, interrupt vectors) * *****************************************************************************/

#ifndef __APPCONFIG_H #define __APPCONFIG_H

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/*.************************************************************************* * * File generated by Graphical Configuration Tool Mon, 26/Sep/2005, 11:28:11 * ****************************************************************************.* /

#define MC56F8346 #define EXTCLK 8000000L #define APPCFG_DFLTS_OMITTED 1 #define APPCFG_GCT_VERSION 0x02010004L

/*. OCCS Configuration

------------------------------------------- Core frequency: 60 MHz VCO frequency: 240 MHz Enable lock detector: Enable Loss of lock interrupt 0: Disable Loss of lock interrupt 1: Disable Loss of reference clock Interrupt enable: Disable COP operation: Disable COP timeout: 8.38861 sec COP run in Stop Mode: Disable COP run in Wait Mode: Disable COP write protect: Disable .*/ #define OCCS_PLLCR_INIT 0x0082 #define OCCS_PLLDB_INIT 0x201D

/*. SYS Configuration

------------------------------------------- SIM: Power Saving Modes: Stop enabled , Wait enabled OnCE clock to HawkV2 core: Enabled when core TAP enabled SIM - Pull-up disabled: CAN: No Control Bus: No , EMI_MODE: No , JTAG: No PWM A0: No , PWM A1: No RESETB: No XBOOT: No , IRQ: No SIM - Peripheral clock: PWM A: Enable , PWM B: Enable , SPI 0: Enable SPI 1: Enable , SCI 0: Enable , SCI 1: Enable TMR A: Enable , TMR B: Enable , TMR C: Enable TMR D: Enable , DEC 0: Enable , DEC 1: Enable CAN: Enable , ADC A: Enable , ADC B: Enable EMI: Enable SIM - Interrupts: Low voltage 2.2V: Disable Low voltage 2.7V: Disable Clock Output Mode: Off: Tristated .*/ #define SIM_GPS_INIT 0x0000

/*. SEMI Configuration

------------------------------------------- Ext. bus driven when inactive : Disable Base (no CS) Write Wait States: 23 Base (no CS) Read Wait States: 23 Minimal Delay before CS access: 0 Chip Select CS0: Base address: 0x0, Blocksize: 128K , Byte Enable: 128K: Both bytes enable R/W: Read / Write , PS/DS select: PS only Chip Select CS1: Base address: 0x0, Blocksize: 128K , Byte Enable: 128K: Lower byte enable R/W: Read / Write , PS/DS select: DS only

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Chip Select CS2: Base address: 0x0, Blocksize: 128K , Byte Enable: 128K: Upper byte enable R/W: Read / Write , PS/DS select: DS only Chip Select CS3: Base address: 0x0, Blocksize: 32K , Byte Enable: 32K: Disable R/W: Disable , PS/DS select: Disable Wait States CS0: Read Wait States: 3, CS Setup: 0, CS Hold: 0 Write Wait States: 3, CS Setup: 0, CS Hold: 0 Minimal Delay before other CS access: 3 Wait States CS1: Read Wait States: 3, CS Setup: 0, CS Hold: 0 Write Wait States: 3, CS Setup: 0, CS Hold: 0 Minimal Delay before other CS access: 3 Wait States CS2: Read Wait States: 3, CS Setup: 0, CS Hold: 0 Write Wait States: 3, CS Setup: 0, CS Hold: 0 Minimal Delay before other CS access: 3 Wait States CS3: Read Wait States: 23, CS Setup: 0, CS Hold: 0 Write Wait States: 23, CS Setup: 0, CS Hold: 0 Minimal Delay before other CS access: 3 .*/ #define SEMI_CSBAR0_INIT 0x0005 #define SEMI_CSBAR1_INIT 0x0005 #define SEMI_CSBAR2_INIT 0x0005 #define SEMI_CSOR0_INIT 0x1FC3 #define SEMI_CSOR1_INIT 0x1BA3 #define SEMI_CSOR2_INIT 0x1DA3

/*. INTC Configuration

------------------------------------------- All maskable interrupts disabled: No IRQ A trigger mode: Low-level sensitive IRQ B trigger mode: Low-level sensitive .*/ #define INTC_ICTL_INIT 0x0000 #define INT_VECTOR_ADDR_17 irqA_isr #define INT_PRIORITY_LEVEL_17 INTC_LEVEL1

/*. GPIO_D Configuration

------------------------------------------- Pin 0: Function: CS2 , PullUp: Enable , Pin 1: Function: GPIO , Direction: Input , PullUp: Enable , Interrupt: Disable, Int.Polarity: Active high , Pin 6: Function: TXD1 , PullUp: Enable , Pin 7: Function: RXD1 , PullUp: Enable , Pin 8: Function: PS/CS0 , PullUp: Enable , Pin 9: Function: DS/CS1 , PullUp: Enable , Pin 10: Function: ISB0 , PullUp: Enable , Pin 11: Function: ISB1 , PullUp: Enable , Pin 12: Function: ISB2 , PullUp: Enable , .*/ #define GPIO_D_PER_INIT 0x1FC1

/*. End of autogenerated code ********************************************************************** ..*/

#endif

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2) application code (main.c file)

/***************************************************************************** ** * * Freescale Semiconductor Inc. * (c) Copyright 2004 Freescale Semiconductor, Inc. * (c) Copyright 2001-2004 Motorola, Inc. * ALL RIGHTS RESERVED. * ****************************************************************************** ** * * FILE NAME: main.c * * DESCRIPTION: Sample application demonstrating the use of external interrupt * IRQA. Use IRQA button to toggle RED LED. GREEN LED is flashing. * * TARGET: MC56F8346 device * ****************************************************************************** */

#include "qs.h"

#include "occs.h" #include "intc.h" #include "gpio.h"

/* few EVM specific defines */

#define LED_RED BIT_0 #define LED_GREENBIT_2 #define LEDS (LED_RED | LED_GREEN)

/***************************************************************************** **

****************************************************************************** /

#pragma interrupt void irqA_isr(void) {

}

/***************************************************************************** **

****************************************************************************** */ void main(void) {

IRQA Interrupt service routine

/* toggle RED on port C */ ioctl(GPIO_C, GPIO_TOGGLE_PIN, LED_RED);

main

int i;

/* Setup LEDs GPIO on port C (could be done also via appconfig.h) */ ioctl(GPIO_C, GPIO_SETAS_GPIO, LEDS); ioctl(GPIO_C, GPIO_SETAS_OUTPUT, LEDS); ioctl(GPIO_C, GPIO_WRITE_DATA, 0);

/* configure Interrupt Controller (IPR) */

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ioctl(INTC, INTC_INIT, NULL);

/* configure IRQ mode */ ioctl(INTC, INTC_SELECT_EDGE_MODE, INTC_IRQA );

/* enable maskable interrupts in Status Register (SR), bits I1 and I0 */ archEnableInt();

while (1) {

/* keep GREEN flashing */ ioctl(GPIO_C, GPIO_TOGGLE_PIN, LED_GREEN);

for(i=0; i<100; i++)

}

archDelay(0xffff);

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2.6 Advanced Topics

This section describes the implementation details and the system code of each project created from the DSP56800E_Quick_Start tool stationery for the MC56F83xx hybrid controllers.

2.6.1 Project Targets

Each created project contains several targets for different hardware configurations of the microcontroller system. All targets are briefly described in the following tables:

Table 2-19. Targets of the MC56F8300DEMO project.

Target Name

SDM_xFlash Small pFlash

SDM_pFlash Small pFlash

SDM_Simulator Small 0x0000

Data

Model

Code Boot

(0x0000)

(sim)

Table 2-20. Targets of the MC56F8323EVM project.

Target Name

SDM_xFlash Small pFlash

SDM_pFlash Small pFlash

Data

Model

Code Boot

(0x0000)

Memory Used

Data Initial

Location

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a 0x0000

(sim)

Memory Used

Data Initial

Location

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

EVM

Constant

Data

xFlash xFlash n/a Stand Alone application

pFlash xFlash n/a Stand Alone application

n/a 0x0000

Data

xFlash xFlash n/a Stand Alone application

pFlash xFlash n/a Stand Alone application

Data

(sim)

Constant

Data

Board

Jumpers

n/a Software simulator of the

EVM

Board

Jumpers

Target Description

processor core

Target Description

SDM_Simulator Small 0x0000

(sim)

n/a 0x0000

(sim)

n/a 0x0000

(sim)

n/a Software simulator of the

processor core

Table 2-21. Targets of the MC56F8346EVM project.

Target Name

LDM_ExtRam Large Ext RAM

Data

Model

Code Boot

(0x0000)

Memory Used

Data Initial

Location

0x0000 Ext RAM

(0x2000)

Constant

Data

n/a Ext RAM

Data

(0x2000)

EVM

Board

Jumpers

JG3 off JG4 on

Target Description

Standard Debug project with External Memory

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Table 2-21. Targets of the MC56F8346EVM project.

Boot Sequence

LDM_xFlash Large pFlash

(0x0000)

LDM_pFlash Large pFlash

(0x0000)

LDM_IntRam Large Ext RAM

(0x0000)

LDM_Simulator Large 0x0000

(sim)

SDM_ExtRam Small Ext RAM

(0x0000)

SDM_xFlash Small pFlash

(0x0000)

SDM_pFlash Small pFlash

(0x0000)

Table 2-22. Targets of the MC56F8346CB project.

Target Name

Data

Model

Code Boot

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a Int xRAM

(0x0000)

n/a 0x0000

(sim)

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

Memory Used

Data Initial

Location

xFlash xFlash JG3 on Stand Alone application

pFlash xFlash JG3 on Stand Alone application

n/a Int RAM JG3 off

JG4 on

n/a 0x0000

(sim)

n/a Ext RAM

(0x2000)

xFlash xFlash JG3 on Stand Alone application

pFlash xFlash JG3 on Stand Alone application

Constant

Data

n/a Software simulator of the

JG3 off JG4 on

EVM

Board

Jumpers

Debugging/Experimetnal (performance testing on separate P and X buses)

processor core

Standard Debug project with External Memory

Target Description

LDM_ExtRam Large Ext RAM

(0x0000)

LDM_xFlash Large pFlash

(0x0000)

LDM_pFlash Large pFlash

(0x0000)

LDM_IntRam Large Ext RAM

(0x0000)

LDM_Simulator Large 0x0000

(sim)

SDM_ExtRam Small Ext RAM

(0x0000)

SDM_xFlash Small pFlash

(0x0000)

SDM_pFlash Small pFlash

(0x0000)

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a Int xRAM

(0x0000)

n/a 0x0000

(sim)

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a Ext RAM

(0x2000)

xFlash xFlash J5 on Stand Alone application

pFlash xFlash J5 on Stand Alone application

n/a Int RAM J5 off

n/a 0x0000

(sim)

n/a Ext RAM

(0x2000)

xFlash xFlash J5 on Stand Alone application

pFlash xFlash J5 on Stand Alone application

J5 off J4 on

J4 on

n/a Software simulator of the

J5 off J4 on

Standard Debug project with External Memory

Debugging/Experimetnal (performance testing on separate P and X buses)

processor core

Standard Debug project with External Memory

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Table 2-23. Targets of the MC56F8357EVM project.

Target Name

LDM_ExtRam Large Ext RAM

LDM_xFlash Large pFlash

LDM_pFlash Large pFlash

LDM_IntRam Large Ext RAM

LDM_Simulator Large 0x0000

SDM_ExtRam Small Ext RAM

SDM_xFlash Small pFlash

Data

Model

Code Boot

(0x0000)

(sim)

(0x0000)

Memory Used

Data Initial

Location

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a Int xRAM

(0x0000)

n/a 0x0000

(sim)

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

EVM

Constant

Data

n/a Ext RAM

xFlash xFlash JG4 on Stand Alone application

pFlash xFlash JG4 on Stand Alone application

n/a Int RAM JG4 off

n/a 0x0000

n/a Ext RAM

xFlash xFlash JG4 on Stand Alone application

Data

(0x2000)

(sim)

(0x2000)

Board

Jumpers

JG4 off JG5 on

JG5 on

n/a Software simulator of the

JG4 off JG5 on

Target Description

Standard Debug project with External Memory

Debugging/Experimetnal (performance testing on separate P and X buses)

processor core

Standard Debug project with External Memory

SDM_pFlash Small pFlash

(0x0000)

Table 2-24. Targets of the MC56F8367EVM project.

Target Name

LDM_ExtRam Large Ext RAM

LDM_xFlash Large pFlash

LDM_pFlash Large pFlash

LDM_IntRam Large Ext RAM

LDM_Simulator Large 0x0000

Data

Model

Code Boot

(0x0000)

(sim)

0x20000 Int xRAM

(0x0000)

Memory Used

Data Initial

Location

0x0000 Ext RAM

(0x2000)

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

n/a Int xRAM

(0x0000)

n/a 0x0000

(sim)

pFlash xFlash JG4 on Stand Alone application

EVM

Constant

Data

n/a Ext RAM

xFlash xFlash JG4 on Stand Alone application

pFlash xFlash JG4 on Stand Alone application

n/a Int RAM JG4 off

n/a 0x0000

Data

(0x2000)

(sim)

Board

Jumpers

JG4 off JG5 on

JG5 on

n/a Software simulator of the

Target Description

Standard Debug project with External Memory

Debugging/Experimetnal (performance testing on separate P and X buses)

processor core

SDM_ExtRam Small Ext RAM

(0x0000)

0x0000 Ext RAM

(0x2000)

n/a Ext RAM

(0x2000)

JG4 off JG5 on

Standard Debug project with External Memory

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Table 2-24. Targets of the MC56F8367EVM project.

Boot Sequence

SDM_xFlash Small pFlash

(0x0000)

SDM_pFlash Small pFlash

(0x0000)

Table 2-25. Targets of the MC56F8013DEMO and MC56F8014DEMO project.

Target Name

SDM_pFlash Small pFlash

SDM_Simulator Small 0x0000

Data

Model

Code Boot

(0x0000)

(sim)

Table 2-26. Targets of the MC56F8013CB project.

0x20000 Int xRAM

(0x0000)

0x20000 Int xRAM

(0x0000)

Memory Used

Data Initial

Location

0x0000 Int xRAM

(0x0000)

n/a 0x0000

(sim)

xFlash xFlash JG4 on Stand Alone application

pFlash xFlash JG4 on Stand Alone application

EVM

Constant

Data

pFlash Int xRAM

n/a before

Data

(before

Data)

data

Board

Jumpers

n/a Stand Alone application

n/a Software simulator of the

Target Description

processor core

Target Name

SDM_pFlash Small pFlash

SDM_Simulator Small 0x0000

Data

Model

Code Boot

(0x0000)

(sim)

Table 2-27. Targets of the MC56F8023DEMO, MC56F8023CB and MC56F8025DEMO project.

Target Name

SDM_pFlash Small pFlash

SDM_Simulator Small 0x4000

Data

Model

Code Boot

(0x4000)

(sim)

Memory Used

Data Initial

Location

0x0000 Int xRAM

(0x0000)

n/a 0x0000

(sim)

Memory Used

Data Initial

Location

0x4000 Int xRAM

(0x0000)

n/a 0x0000

(sim)

Constant

Data

pFlash Int xRAM

n/a before

Data

pFlash Int xRAM

n/a before

Data

(before

data)

data

Constant

Data

(before

data)

data

EVM

Board

Jumpers

n/a Stand Alone application

n/a Software simulator of the

EVM

Board

Jumpers

n/a Stand Alone application

n/a Software simulator of the

Target Description

processor core

Target Description

processor core

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Table 2-28. Targets of the MC56F8037EVM project.

Target Name

SDM_pFlash Small pFlash

SDM_Simulator Small 0x0000

Data

Model

Code Boot

(0x0000)

(sim)

Memory Used

Data Initial

Location

0x0000 Int xRAM

(0x0000)

n/a 0x0000

(sim)

Constant

Data

pFlash Int xRAM

n/a before

Data

(before

data)

data

EVM

Board

Jumpers

n/a Stand Alone application

n/a Software simulator of the

Target Description

processor core

There is a different linker command file (LCF) for each target, which defines the destination memory ranges used by the linker. Although the syntax of the LCF and C header files are completely different. The LCF for each target is also used as prefix1 header file in its target configuration. The macros defined in the LCF identify the target for further conditional compilation of the project source files.

The trick which enables using a file with the LCF syntax as a header file is shown on Code Example 2-36. It successfully exploits the fact that the ‘#’ sign is treated as a start of comment line in LCF syntax, so the C-like #define statements do not cause the LCF syntax errors. On the other side, the #if 0 ... #endif block excludes the LCF part of the file from C compilation.

1. Prefix file is unconditionaly included at the begining of every compiled C file.

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Example 2-36. LDM_ExtRam.cmd linker command file

#include "version.h" #include "hawkcpu.h"

#define TARGET_LDM /* Large Data Model */ #define TARGET_CODE_EXTRAM /* Code located in external pRAM */ #define TARGET_CONSTDATA_EXTRAM /* Constants and const s located in external xRAM */ #define TARGET_INITDATA_EXTRAM /* Initialized global vars located in external RAM */ #define TARGET_DATA_EXTRAM /* Variables located in external RAM */

#pragma define_section fardata "fardata.data" "fardata.bss" RW #pragma define_section pramcode "pramcode.text" RWX

#if 0 /* everything below is excluded from C compilation */

MEMORY { ... }

SECTIONS { ... }

...

#endif /* end of code excluded by C-preprocessor */

2.6.2 Inside Startup Code

This section goes step-by-step through the processor initialization code described briefly in Section 2.1.2 on page 2-3. The startup code described here can be found in the startup.c file, located in the SystemConfig subdirectory of any project created using the DSP56800E_Quick_Start tool stationery.

2.6.2.1 Symbols Used in Startup Code

2.6.2.1.1 Included Header Files

The master Quick_Start header file qs.h is included in the startup code. This file further includes other critical system files to define common C types, peripheral module base addresses and other types and macros required by the startup code. The application configuration header file appconfig.h is also included so the startup code is able to configure system modules like OCCS (PLL) and SEMI.

#include “qs.h”

2.6.2.1.2 Initial Value of Operation Mode Register (OMR)

Although it is not very common, the initial value of the Operation Mode Register (OMR) can be specified in appconfig.h using the OMR_INIT macro.

The following startup.c statements define the default initial OMR value for the cases when the user had not defined the OMR_INIT in appconfig.h:

#ifndef TARGET_OMR_INIT

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#define TARGET_OMR_INIT 0 #endif

#ifndef OMR_INIT #define OMR_INIT 0|(TARGET_OMR_INIT) #endif

The default initialization value of the OMR is based on the TARGET_OMR_INIT value, which might be defined in the prefix file (LCF) within the active compilation target. Currently, the TARGET_OMR_INIT is not defined in the prefix file of any target, leaving the initial OMR value on 0x0000.

The following OMR bits are important for the proper operation of the C application:

• CM = 0 - optional for C application

• XP = 0 - enabling separate program and data buses (Harvard Architecture)

• R = 0 - rounding off, required for C applications

• SA = 0 - saturation off, required for C applications

• EX = 0 - complete X memory space as external, required by CodeWarrior debugger

The critical OMR bits are checked by the C preprocessor directive, issuing the compile-time warning when found in the OMR_INIT value:

#if (OMR_INIT & (OMR_CM|OMR_XP|OMR_R|OMR_SA)) #warning Initial OMR value might be invalid for the C project #endif #if (OMR_INIT) & OMR_EX #warning CodeWarrior cannot debug projects with OMR.EX bit set #endif

2.6.2.1.3 Other appconfig.h Symbols

Using the OCCS_REQUIRED_LOCK_MODE macro, the user specifies in which lock state of the PLL the setup code continues to the rest of the startup code:

• 0x20 (default) - continue when “coarse” lock mode is reached (bit LCK0 in PLLSR)

• 0x40 - continue when “fine” lock mode is reached (bit LCK1 in PLLSR)

#ifndef OCCS_REQUIRED_LOCK_MODE #define OCCS_REQUIRED_LOCK_MODE 0x20 /* coarse (LCK0) by default */ #endif #if (OCCS_REQUIRED_LOCK_MODE != 0x40) && (OCCS_REQUIRED_LOCK_MODE != 0x20) #error OCCS_REQUIRED_LOCK_MODE must be one of 0x20 (coarse) or 0x40 (fine) #endif

One of the startup code optional features is to perform the internal data RAM checking. The checking algorithm, fully described later in Section 2.6.2.2.7, uses two values which writes, reads and verifies to check each memory location. By default the two values are 0xAAAA and 0x5555. If there is any reason to change the values, the user can define the macros CONFIG_INTRAM_CHECKVALUE1 and CONFIG_INTRAM_CHECKVALUE2 in the appconfig.h file.

#ifndef CONFIG_INTRAM_CHECKVALUE1 #define CONFIG_INTRAM_CHECKVALUE1 0xaaaa #endif #ifndef CONFIG_INTRAM_CHECKVALUE2 #define CONFIG_INTRAM_CHECKVALUE2 0x5555

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#endif

2.6.2.1.4 Linker Command File Symbols

While linking, the linker replaces any zeros generated by compiler for external symbols with proper values calculated during linking process when the physical addresses of the symbols are known. Some values of external symbols can be also specified directly by the directives in the linker command file.

The following symbols are specified by the LCF and provide physical address of memory segments used in the startup code:

/* external constants defined in LCF */ extern _Lstack_addr; extern _Ldata_size; extern _Ldata_ROM_addr; extern _Ldata_RAM_addr; extern _Ldata2_size; extern _Ldata2_ROM_addr; extern _Ldata2_RAM_addr; extern _Ldatap_size; extern _Ldatap_ROM_addr; extern _Ldatap_RAM_addr; extern _Lbss_size; extern _Lbss_start; extern _Lbss2_size; extern _Lbss2_start; extern _Lbssp_size; extern _Lbssp_start; extern _Linternal_RAM_addr; extern _Linternal_RAM_size; extern _Linterrupt_vectors_addr;

2.6.2.2 Startup Source Code

The following subsections describe the source code of the Start assembly function.

asm void Start(void) {

2.6.2.2.1 Initialize Interrupt Vectors Base Address

Depending on the state of the EXTBOOT and EMI_MODE pins during the system reset, the vector table is located at the beginning of the Boot Program Flash or (if Boot Flash is not available) at the beginning of the Program RAM. The startup code always updates the Vector Table Base Address (VBA) to beginning of “.interrupt_vectors” section where the Quick_Start vector table is located. By default this table is always put to the beginning of the Program RAM anyway.

By defining the ARCH_VECTBL_ADDR macro in the appconfig.h configuration file, the VBA may be forced to a custom value.

/* relocate vector table properly */ #ifdef ARCH_VECTBL_ADDR move.l ARCH_VECTBL_ADDR,A #else move.l #_Linterrupt_vectors_addr,A #endif asrr.l #7,A move.w A0,ArchIO.Intc.vba

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2.6.2.2.2 Clear COP Counter and Keep Clearing Values in Registers

On the newer 56F800E-based devices, the COP Watchdog counter is enabled after reset, so it is necessary to clear this counter periodically during any lengthy operation in the startup code. Early in the startup, the COP counter is initially cleared and the clearing values are preserved in registers. The R5, C1 and D1 registers are not changed anywhere in the rest of the startup code and are used to clear the COP without loading the constant values again.

/* clear COP watchdog counter, keep clearing values in registers C1,D1,R5 */ moveu.w #ArchIO.Cop.copctr,R5 move.w 0x5555,C1 move.w 0xAAAA,D1 move.w C1,X:(R5) move.w D1,X:(R5)

2.6.2.2.3 Setup the Operation Mode Register (OMR)

The “one” bits in the OMR_INIT value are set in the Operating Mode Register.

/* setup the OMR */

bfset OMR_INIT,omr nop nop

2.6.2.2.4 Other Initialization

The M01 register is initialized to -1 to activate linear addressing mode with R0 and R1 registers.

/* setup the m01 register for linear addressing */

move.w #-1,x0 moveu.w x0,m01

The values on the Hardware Stack are cleared (for proper debugger behavior).

/* clear (read-out) the hardware stack */

moveu.w hws,la moveu.w hws,la nop nop

2.6.2.2.5 Core Clock Setup (OCCS)

The PLL Oscillator Control Register and the Divide-By Register are initialized with the appconfig.h values if defined. The value in the Divide-By Register controls the prescaler and postscaler frequency divisors and also multiplication factor of the PLL. Note that before the PLLCR register is written, the PLL remains turned off and the system clock is still taken from a default clock source (now divided by prescaler value). The default clock source is an external oscillator or an internal relaxation oscillator on some devices.

/* configure external oscillator and clock mode */

#ifdef OCCS_OSCTL_INIT #define OSCTL_TEMP (OCCS_OSCTL_INIT & 0x3fff) /* keep internal osc. enabled */ move.w #OSCTL_TEMP,ArchIO.Pll.osctl /* OSCTL,even if PLL not used */ nop nop #endif

/* setup the PLL according to appconfig.h values */

#ifdef OCCS_PLLDB_INIT move.w OCCS_PLLDB_INIT,ArchIO.Pll.plldb /* PLLDB, even if PLL not used */ nop nop #endif

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Boot Sequence

On the devices equipped with an internal relaxation oscillator, a user may want to initialize the trimming value in the Oscillator Control Register by the factory-measured value which is saved in the read-only Flash area (FMOPT1 Register).

/* load factory trimming value of the internal relaxation oscillator? */

#if OCCS_USE_FACTORY_TRIM move.w ArchIO.Pll.osctl,x0 move.w ArchIO.Hfm.fmopt1,y0 bfclr #0x03ff,x0 bfclr #0xfc00,y0 or.w y0,x0 move.w x0,ArchIO.Pll.osctl nop #endif

Then, if the PLL Control Register initial value is defined in appconfig.h, the PLL setup code is executed:

#ifdef OCCS_PLLCR_INIT

On the new devices (e.g. 56F802x/3x), all pins are in the GPIO mode after reset, including the pins which may be needed as an external clock or crystal source. The startup code automatically re-configures these pins to the required clock-related mode before switching to an external clock. The new devices are identified by OCCS version 3 and SIM version 4 in the new code.

NOTE:

The peripheral module version identifiers are defined in the arch.h file for each device purely for an internal use in the DSP56800E_Quick_Start code. The version numbers do not rely to chip or silicon version.

/* on new devices, some external pins may be needed if PLLCR.PRESC=1 */

#if defined(OCCS_VERSION_3)&& defined(SIM_VERSION_4) && (OCCS_PLLCR_INIT & 0x4)

/* first get EXT_SEL and CLK_MODE values (see OSCTL register) */ #ifdef OCCS_OSCTL_INIT #define _OCCS_EXTSEL (((OCCS_OSCTL_INIT) >> 10) & 0x3) #define _OCCS_CLKMODE (((OCCS_OSCTL_INIT) >> 12) & 0x1) #else #define _OCCS_EXTSEL 0 /* reset value is 0 */ #define _OCCS_CLKMODE 1 /* reset value is 1 */ #endif

/* primary external clock on GPIO_B6 */ #if _OCCS_EXTSEL == 0 bfset 0x4000, ArchIO.Sim.sim_gpsb0 bfclr 0x2000, ArchIO.Sim.sim_gpsb0 bfset 0x0040, ArchIO.PortB.per

/* alternate external clock on GPIO_B5 */ #elif _OCCS_EXTSEL == 1 bfset 0x1000, ArchIO.Sim.sim_gpsb0 bfclr 0x0800, ArchIO.Sim.sim_gpsb0 bfset 0x0020, ArchIO.PortB.per

/* external clock on XTAL (GPIO_D5)*/ #elif _OCCS_CLKMODE bfset 0x1000, ArchIO.Sim.sim_gpscd

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Core System Infrastructure

bfset 0x0020, ArchIO.PortD.per

/* crystal on EXTAL and XTAL pins (GPIO_D4 and GPIO_D5)*/ #else bfclr 0x1000, ArchIO.Sim.sim_gpscd bfset 0x0030, ArchIO.PortD.per

/* give it some time until crystal/resonator stabilizes */ /* we now run from internal relaxation oscillator / 2 (i.e. 4MHz) */ move.w #5000,x0 /* wait 50ms */ do x0,waitosc rep 36; nop; /* sigle loop pass takes 40 cycles */ move.w C1,X:(R5) /* and also clears the watchdog */ move.w D1,X:(R5) waitosc:

#endif /* _OCCS_EXTSEL cases */

/* switch to external clock source (set PRESC=1) */ nop; bfset 0x4,ArchIO.Pll.pllcr nop nop

#endif /* defined(OCCS_VERSION_3) && (OCCS_PLLCR_INIT & 0x4) */

When the PLL is to be turned on, it is first decided whether the code is running on real chip or in software simulator. The simulator mode is identified by looking at the “clock source” bit-field value in the PLLCR register. In the simulator mode, the PLL setup is skipped because the loop waiting for the PLL lock would never finish.

#if ((OCCS_PLLCR_INIT & 3) == 2) /* PLL active ? */

#define PLLCR_TEMP (OCCS_PLLCR_INIT & 0xfc | 0x01)

/* interrupts off and PLL bypassed */

brclr 1,ArchIO.Pll.pllcr,skip_pll_lock /* skip PLL in simulator mode */

While still running from an external oscillator, the PLL lock detector is activated and it is waiting until the PLL lock is detected. According to appcofing.h setting, the required lock state is either “coarse” or “fine” - which corresponds to the PLLSR bits LCK1 and LCK0. Note that the COP counter is periodically cleared while waiting in the loop.

move.w #PLLCR_TEMP,ArchIO.Pll.pllcr /* PLL lock detector ON, core

pll_lock: move.w C1,X:(R5) /* clear COP watchdog counter while waiting in the loop */ move.w D1,X:(R5)

brclr OCCS_REQUIRED_LOCK_MODE,ArchIO.Pll.pllsr,pll_lock /* test lock */

still on prescaler */

When the PLL is locked, the system clock is switched to PLL and the PLLCR is finally initialized with the user defined value. As the last, the pending PLL interrupts are cleared.

nop nop move.w OCCS_PLLCR_INIT,ArchIO.Pll.pllcr /* PLL locked: final PLL setup */

skip_pll_lock: move.w ArchIO.Pll.pllsr,x0 /* clear pending clkgen interrupts */ move.w x0,ArchIO.Pll.pllsr

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Boot Sequence

nop

If the PLL is not to be enabled, the initial value of the PLL Control Register is simply written.

#else /* ((OCCS_PLLCR_INIT & 3) == 2) PLL not active */

move.w OCCS_PLLCR_INIT,ArchIO.Pll.pllcr /* write PLLCR init value */

#endif /* ((OCCS_PLLCR_INIT & 3) == 2) */ #endif /* OCCS_PLLCR_INIT */

2.6.2.2.6 External Memory Interface Setup (SEMI)

Before the data memory is initialized (the bss segment is cleared and the global variables segment is copied from non-volatile memory), the external memory interface (SEMI) has to be first set up. The initialization is done by copying the initial values defined in appconfig.h to the SEMI peripheral registers.

#ifdef SEMI_BASE

moveu.w #ArchIO.Semi.csbar, R0 moveu.w #ArchIO.Semi.csor, R1 moveu.w #ArchIO.Semi.cstc, R2

#ifdef SEMI_CSBAR0_INIT move.w SEMI_CSBAR0_INIT, X:(R0+0) #endif #ifdef SEMI_CSOR0_INIT move.w SEMI_CSOR0_INIT, X:(R1+0) #endif #ifdef SEMI_CSTC0_INIT move.w SEMI_CSTC0_INIT, X:(R2+0) #endif #ifdef SEMI_CSBAR1_INIT move.w SEMI_CSBAR1_INIT, X:(R0+1) #endif #ifdef SEMI_CSOR1_INIT move.w SEMI_CSOR1_INIT, X:(R1+1) #endif #ifdef SEMI_CSTC1_INIT move.w SEMI_CSTC1_INIT, X:(R2+1) #endif

The memory chip selects signals CS2 to CS7 are shared with GPIO port D pins. So, when any external memory is to be configured on these banks using the values from the appconfig.h file, the appropriate GPIO circuitry is turned off here by setting the Peripheral Enable Register of the GPIO port D.

#ifdef SEMI_CSBAR2_INIT move.w SEMI_CSBAR2_INIT, X:(R0+2) #endif #ifdef SEMI_CSOR2_INIT move.w SEMI_CSOR2_INIT, X:(R1+2) bfset 0x0001, ArchIO.PortD.per /* enable CS2 on GPIO PD0 */ #endif #ifdef SEMI_CSTC2_INIT move.w SEMI_CSTC2_INIT, X:(R2+2) #endif #ifdef SEMI_CSBAR3_INIT move.w SEMI_CSBAR3_INIT, X:(R0+3) #endif #ifdef SEMI_CSOR3_INIT move.w SEMI_CSOR3_INIT, X:(R1+3) bfset 0x0002, ArchIO.PortD.per /* enable CS3 on GPIO PD1 */

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Core System Infrastructure

#endif #ifdef SEMI_CSTC3_INIT move.w SEMI_CSTC3_INIT, X:(R2+3) #endif #ifdef SEMI_CSBAR4_INIT move.w SEMI_CSBAR4_INIT, X:(R0+4) #endif #ifdef SEMI_CSOR4_INIT move.w SEMI_CSOR4_INIT, X:(R1+4) bfset 0x0004, ArchIO.PortD.per /* enable CS4 on GPIO PD2 */ #endif #ifdef SEMI_CSTC4_INIT move.w SEMI_CSTC4_INIT, X:(R2+4) #endif #ifdef SEMI_CSBAR5_INIT move.w SEMI_CSBAR5_INIT, X:(R0+5) #endif #ifdef SEMI_CSOR5_INIT move.w SEMI_CSOR5_INIT, X:(R1+5) bfset 0x0008, ArchIO.PortD.per /* enable CS5 on GPIO PD3 */ #endif #ifdef SEMI_CSTC5_INIT move.w SEMI_CSTC5_INIT, X:(R2+5) #endif #ifdef SEMI_CSBAR6_INIT move.w SEMI_CSBAR6_INIT, X:(R0+6) #endif #ifdef SEMI_CSOR6_INIT move.w SEMI_CSOR6_INIT, X:(R1+6) bfset 0x0010, ArchIO.PortD.per /* enable CS6 on GPIO PD4 */ #endif #ifdef SEMI_CSTC6_INIT move.w SEMI_CSTC6_INIT, X:(R2+6) #endif #ifdef SEMI_CSBAR7_INIT move.w SEMI_CSBAR7_INIT, X:(R0+7) #endif #ifdef SEMI_CSOR7_INIT move.w SEMI_CSOR7_INIT, X:(R1+7) bfset 0x0020, ArchIO.PortD.per /* enable CS7 on GPIO PD5 */ #endif #ifdef SEMI_CSTC7_INIT move.w SEMI_CSTC7_INIT, X:(R2+7) #endif

As the last, the SEMI Bus Control Register is initialized.

/* global wait states not covered by CS registers */ #ifdef SEMI_BCR_INIT move.w SEMI_BCR_INIT, ArchIO.Semi.bcr #endif

#endif /* SEMI_BASE */

2.6.2.2.7 Internal Memory Checking

Checking the internal data RAM is an optional feature of the startup code. When the INTXRAM_CHECK_ENABLED macro is defined in appconfig.h, this feature is activated.

The memory checking process consists of tree parts:

• Complete memory fill (value 0xAAAA) & read + compare

• Single write, read & compare for each memory location

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• Two immediate reads from different memory locations & compare

0xAAAA

1. All memory is filled with test value (0xAAAA)

0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA

0xAAAA

2. Each memory location is read and compared with written value

0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA

TEST1: read & compare with 0xAAAA

0x5555

3. Another test value (0x5555) is written. Then two consecutive locations are read

0xAAAA 0xAAAA 0xAAAA 0xAAAA 0xAAAA

Both locations are read

TEST2: the newly written location is read & compared with 0x5555 TEST3: the second location should still contain the previous value (0xAAAA)

Boot Sequence

Figure 2-3. Memory Checking Process

In case if any of the three tests fails, the application execution is halted by debughlt and stop instructions.

The compile-time warning is issued when the internal memory checking is activated in targets that do not use the internal memory.

/* internal RAM memory test */

#ifdef INTXRAM_CHECK_ENABLED #ifndef TARGET_DATA_INTRAM #warning Internal Memory Checking is active but variables go elsewhere #endif

move.l #>>_Linternal_RAM_addr,r1 /* memory pointer */ move.l #>>_Linternal_RAM_size,r2 /* memory size */ move.w CONFIG_INTRAM_CHECKVALUE1, x0 /* x0=write/test value 1 */ move.w CONFIG_INTRAM_CHECKVALUE2, y0 /* y0=write/test value 2; */ move.w #0,b /* b0=0, b1 will be used as "b" */

t1passed:

rep r2; move.w x0,x:(r1)+ /* fill memory with value test1 */

move.l #>>_Linternal_RAM_addr,r1 /* initialize verify memory pointer */ do r2,end_intramcheck1 /* start verify loop */

move.w C1,X:(R5) /* clear COP watchdog counter */ move.w D1,X:(R5)

cmp.w x:(r1),x0 /* TEST1: read & compare */ beq <t1passed /* TEST1: OK ? */ debughlt

move.w y0,x:(r1) /* TEST2: write test2 */ move.w x:(r1+1),y1 /* read from incremented address (see TEST3) */

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Core System Infrastructure

cmp.w x:(r1),y0 /* read written value & compare (should be test2) */ beq <t2passed /* TEST2: OK ? */

nop debughlt /* !! MEMORY TEST FAILED !! */ stop

t2passed:

t3passed:

end_intramcheck1:

move.w lc,b /* skip TEST3 for the last memory cell (when LC==1) */ cmp.w #1,b ble <t3passed cmp.w y1,x0 /* TEST3: value from incremented addr. should be ==test1 */ beq <t3passed /* TEST3: OK ? */

nop debughlt /* !! MEMORY TEST FAILED !! */ stop

move.w b0,x:(r1)+ /* clear checked memory location */ nop nop /* without nops, the branch to t3passed above */ nop /* could confuse the hardware loop unit */

#endif

2.6.2.2.8 Stack Pointer Initialization

The stack pointer (SP) register is initialized to the first odd value after _Lstack_addr symbol generated by linker command file. The first stack location is then initialized to NULL.

/* initialize stack */

move.l #>>_Lstack_addr,r0 bftsth #$0001,r0 bcc <noinc

noinc:

adda #1,r0

tfra r0,sp move.w #0,r1 nop move.w r1,x:(sp) adda #1,sp

2.6.2.2.9 Clearing .bss, .bss.pmem and fardata.bss Segments

The .bss is the memory segment containing the global or static C variables to which are not assigned initial values (or the initial value is 0). This segment is cleared by the startup code so the global and static C variables are initialized to 0.

Note that the COP counter is periodically cleared in all loops below.

/* clear BSS segment (can't use 'do' and its 16 bit loop counter) */

move.l #>>_Lbss_size,r2 /* bss size */ tsta.l r2 beq <end_clearbss; /* skip if size is 0 */ move.l #>>_Lbss_start,r1 /* dest address */

loop_clearbss:

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move.w #0,x0

move.w C1,X:(R5) /* clear COP watchdog counter */ move.w D1,X:(R5) move.w x0,x:(r1)+ /* clear value at r1 */

Freescale Semiconductor DSP56800E User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

1.1 Overview

1.1.1 Features

1.1.1.1 Core-system Infrastructure

1.1.1.2 On-chip Drivers

1.1.1.3 Sample Applications

1.1.1.4 Graphical Configuration Tool

1.1.1.5 FreeMASTER Software

1.2 Quick Start

1.2.1 Install CodeWarrior Development Tools

1.2.2 Install DSP56800E_Quick_Start

1.2.2.1 Supplementary DSP56800E_Quick_Start Installation Steps

1.2.2.2 Install Graphical Configuration Tool

1.2.2.3 Install FreeMASTER (PC Master Software)

1.2.2.3.1 System Requirements

1.2.2.3.2 Target Development Board Requirements

1.2.2.3.3 Enabling FreeMASTER on Target Application

1.2.2.3.4 How to Install

1.2.3 Install MC56F8xxxEVM Hardware

1.2.4 Build and Run Sample Application

2.1 Boot Sequence

2.1.1 Power-up/Reset

2.1.3 userPreMain()

2.1.5 userPostMain()

2.2 Data Types

2.4 Core System’s Routines and Macros

2.4.1 Architecture dependent routines

2.4.1.1 archEnableInt - enable interrupts

2.4.1.2 archEnableIntLvl123 - enable interrupt levels 1, 2 and 3

2.4.1.3 archEnableIntLvl23 - enable interrupts levels 2 and 3

2.4.1.4 archDisableInt - disable interrupts

2.4.1.5 archResetLimitBit - reset limit bit

2.4.1.6 archSetNoSat - set no saturation mode

2.4.1.7 archSetSat32 - set saturation mode

2.4.1.8 archSet2CompRound - set two’s complement rounding mode

2.4.1.9 archSetConvRound - set convergent rounding mode

2.4.1.10 archStop - stop processing state

2.4.1.11 archTrap - initiate a software interrupt

2.4.1.12 archWait - wait processing state

2.4.1.13 archGetLimitBit - get limit bit

2.4.1.14 archGetSetSaturationMode - get and set saturation mode

2.4.1.15 archDelay - delay

2.4.2 Macros for peripheral memory access

2.4.2.1 periphMemRead - memory read

2.4.2.2 periphMemWrite - memory write

2.4.2.3 periphBitSet - set selected bits

2.4.2.5 periphBitClear - clear selected bits

2.4.2.6 periphBitGrpSR - set bit group to given value

2.4.2.7 periphBitGrpRS - set bit group to given value

2.4.2.8 periphBitGrpZS - set bit group to given value

2.4.2.9 periphBitGrpSet - set bit group to given value

2.4.2.11 periphBitChange - change selected bits

2.4.2.12 periphBitTest - test selected bits

2.4.3 Miscellaneous Routines

2.4.3.1 impyuu - integer multiply unsigned 16b x unsigned 16b

2.4.3.2 impysu - integer multiply signed 16b x unsigned 16b

2.4.4 Intrinsic Functions

2.5 Interrupts

2.5.1 Processing Interrupts

2.5.1.1 Interrupt Vector Table

2.5.1.2 Interrupt Processing Flow

2.5.1.3 ISRs

2.5.1.4 Interrupt Priority Levels

2.5.1.5 Fast Interrupts

2.5.1.6 Clearing Interrupt Flags

2.5.2 Configuring Interrupts

2.5.2.1 Installing ISRs

2.5.2.2 Assigning Interrupt Priority Levels

2.5.2.3 Installing Fast Interrupts

2.5.2.4 Enabling Interrupts

2.5.3 Code Example

2.6 Advanced Topics

2.6.1 Project Targets

2.6.2 Inside Startup Code

2.6.2.1 Symbols Used in Startup Code

2.6.2.1.1 Included Header Files

2.6.2.1.2 Initial Value of Operation Mode Register (OMR)