This manual describes the hardware on the 56F8037EVM in detail.
Audience
This document is intended for application developers who are creating software for
devices using the Freescale 56F8037 part or a member of the 56F8000 family that is
compatible with this part.
Organization
This manual is organized into two chapters and two appendices.
•Chapter 1, Introduction, provides an overview of the Evaluation Module and its
features.
•Chapter 2, Technical Summary, describes the 56F8037EVM hardware in detail.
•Appendix A, 56F8037EVM Schematics, contains the schematics of the
56F8037EVM.
•Appendix B, 56F8037EVM Bill of Material,provides a list of the materials used on
the 56F8037EVM.
Suggested Reading
More documentation on the 56F8037EVM and the MC56F8037EVM kit may be found at
URL:
www. freescale.com
Preface, Rev. 0
Freescale Semiconductorvii
Preliminary
Notation Conventions
This manual uses the following notational conventions:
Term or ValueSymbolExamplesExceptions
Active High
Signals
(Logic One)
Active Low
Signals
(Logic Zero)
Hexadecimal
Values
Decimal ValuesNo special symbol
Binary ValuesBegin with the letter
NumbersConsidered positive
Blue TextLinkable on-line...refer to Chapter 7, License
BoldReference sources,
No special symbol
attached to the
signal name
Noted with an
overbar in text and
in most figures
Begin with a “$”
symbol
attached to the
number
“b” attached to the
number
unless specifically
noted as a negative
value
paths, emphasis
A0
CLKO
WE
OE
$0FF0
$80
10
34
b1010
b0011
5
-10
...see:
http://www.freescale.com/
In schematic drawings,
Active Low Signals may be
noted by a backslash: /WE
Voltage is often shown as
positive: +3.3V
viii Freescale Semiconductor
56F8037EVM User Manual, Rev. 0
Preliminary
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.
56F8037
Digital signal controller with motor control peripherals
A/DAnalog-to-Digital; a method of converting Analog signals to Digital values
ADCAnalog-to-Digital Converter; a peripheral on the 56F8037 part
D/A
DAC
EOnCE
Digital-to-Analog; a method of converting Digital values to Analog signals
Digital-to-Analog Converter; a peripheral on the 56F8037 part
Enhanced On-Chip Emulation; a debug bus and port which enables a designer
to create a low-cost hardware interface for a professional-quality debug
environment
EVM
Evaluation Module; a hardware platform which allows a customer to evaluate
the silicon and develop his application
GPIO
General Purpose Input and Output port on Freescale’s family of digital signal
controllers; does not share pin functionality with any other peripheral on the
chip and can only be set as an input, an output, or a level-sensitive interrupt
input
IC
JTAG
Integrated Circuit
Joint Test Action Group; a bus protocol/interface used for test and debug
LED
LQFP
OnCE
PCB
PWM
SCI
SPI
TM
Light Emitting Diode
Low-profile Quad Flat Package
On-Chip Emulation, a debug bus and port created to allow a means for low-cost
hardware to provide a professional-quality debug environment
Printed Circuit Board
Pulse Width Modulation
Serial Communications Interface; a peripheral on Freescale’s family of digital
signal controllers
Serial Peripheral Interface; a peripheral on Freescale’s family of digital signal
controllers
Freescale Semiconductorix
Preliminary
Preface, Rev. 0
References
The following sources were referenced to produce this manual:
[1] DSP56800E Reference Manual, DSP56800ERM, Freescale Semiconductor, Inc.
[2] 56F802X and 56F803X Peripheral Reference Manual, MC56F80XXRM,
Freescale Semiconductor, Inc.
[3] 56F8037 Technical Data, MC56F8037, Freescale Semiconductor, Inc.
x Freescale Semiconductor
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Preliminary
Chapter 1
Introduction
The 56F8037EVM is used to demonstrate the abilities of the 56F8037 digital signal controller
and to provide a hardware tool allowing the development of applications.
The 56F8037EVM is an evaluation module board that includes a 56F8037 part, USB interface,
user LEDs, user pushbutton switches and a daughter card connector. The daughter card
connector allows signal monitoring and expandability of user features.
The 56F8037EVM is designed for the following purposes:
•Allowing new users to become familiar with the features of the 56800E architecture. The
tools and examples provided with the 56F8037EVM facilitate evaluation of the feature set
and the benefits of the family.
•Serving as a platform for real-time software development. The tool suite enables the user
to develop and simulate routines, download the software to on-chip memory, run it, and
debug it using a debugger via the JTAG/Enhanced OnCE (EOnCE) port. The breakpoint
features of the EOnCE port enable the user to easily specify complex break conditions and
to execute user-developed software at full speed until the break conditions are satisfied.
The ability to examine and modify all user-accessible registers, memory and peripherals
through the EOnCE port greatly facilitates the task of the developer.
•Serving as a platform for hardware development. The hardware platform enables the user
to connect external hardware peripherals. The on-board peripherals can be disabled,
providing the user with the ability to reassign any and all of the processor's peripherals.
The EOnCE port's unobtrusive design means that all memory on the board and on the
processor is available to the user.
1.1 56F8037EVM Architecture
The 56F8037EVM facilitates the evaluation of various features present in the 56F8037 part. The
56F8037EVM can be used to develop real-time software and hardware products. The
56F8037EVM provides the features necessary for a user to write and debug software,
Freescale Semiconductor1-1
Preliminary
Introduction, Rev. 0
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