Designed for WLL/MMDS/BWA or UMTS driver applications with frequencies
from 1.8 to 3.6 GHz. Device is unmatched and is suitable for use in Class AB
linear base station applications.
Output Power — 300 mWatt
Power Gain — 11.5 dB
Efficiency — 25%
• 3 Watts P1dB @ 3.55 GHz
N
• Excellent Phase Linearity and Group Delay Characteristics
• High Gain, High Efficiency and High Linearity
• N Suffix Indicates Lead- Free Terminations. RoHS Compliant.
• In Tape and Reel. T1 Suffix = 1000 Units per 12 mm, 7 inch Reel.
3.5 GHz, 3 W, 12 V
POWER FET
GaAs PHEMT
CASE 466-03, STYLE 1
PLD-1.5
PLASTIC
RMATI
Table 1. Maximum Ratings
RatingSymbolValueUnit
Drain-Source VoltageV
Total Device Dissipation @ TC = 25°C
Derate above 25°C
Gate- Source VoltageV
RF Input PowerP
HIVE INF
Storage Temperature RangeT
Channel Temperature
Operating Case Temperature RangeT
Table 2. Thermal Characteristics
AR
Thermal Resistance, Junction to CaseClass ABR
Table 3. Moisture Sensitivity Level
Per JESD 22-A113, IPC/JEDEC J-STD - 0201260°C
1. For reliable operation, the operating channel temperature should not exceed 150°C.
2. Simulated.
(1)
CharacteristicSymbolValueUnit
Test MethodologyRatingPackage Peak TemperatureUnit
DSS
P
GS
stg
T
ch
θ
D
in
C
JC
15Vdc
(2)
8.1
(2)
0.05
-5Vdc
29dBm
-65 to +150°C
175°C
-20 to +85°C
(2)
18.5
W
W/°C
ARCHIVE INFORMATION
°C/W
Freescale Semiconductor, Inc., 2006, 2008. All rights reserved.
RF Device DataFreescale Semiconductor
MRFG35003NT1
1
C
O
O
Table 4. Electrical Characteristics
CharacteristicSymbolMinTypMaxUnit
Saturated Drain Current
(V
= 3.5 Vdc, VGS = 0 Vdc)
DS
Off State Leakage Current
(VGS = - 0.4 Vdc, VDS = 0 Vdc)
Off State Drain Current
(VDS = 12 Vdc, VGS = -2.5 Vdc)
Off State Current
(VDS = 28.5 Vdc, VGS = -2.5 Vdc)
Gate- Source Cut - off Voltage
(VDS = 3.5 Vdc, IDS = 6.5 mA)
Quiescent Gate Voltage
(VDS = 12 Vdc, ID = 55 mA)
Power Gain
N
(VDD = 12 Vdc, IDQ = 55 mA, f = 3.55 GHz)
Output Power, 1 dB Compression Point
(VDD = 12 Vdc, IDQ = 55 mA, f = 3.55 GHz)
Drain Efficiency
(VDD = 12 Vdc, IDQ = 55 mA, P
f = 3.55 GHz)
Adjacent Channel Power Ratio
(VDD = 12 Vdc, P
f = 3.55 GHz, W- CDMA, 8.5 P/A @ 0.01% Probability,
RMATI
64 CH, 3.84 MCPS)
= 0.30 W Avg., IDQ = 55 mA,
out
(TC = 25°C unless otherwise noted)
= 0.30 W Avg.,
out
I
DSS
I
GSS
I
DSO
I
DSX
V
GS(th)
V
GS(Q)
G
ps
P
1dB
h
D
ACPR—-42-40dBc
—1.3—Adc
—< 1.0100µAdc
——450µAdc
—< 1.07mAdc
-1.2-0.9- 0.7Vdc
-1.2-0.9- 0.7Vdc
1011.5—dB
—3—W
2325—%
HIVE INF
AR
MRFG35003NT1
2
ARCHIVE INFORMATION
RF Device Data
Freescale Semiconductor
C
O
O
V
GS
N
C10
C9C8C7C6C5C4
RF
INPUT
Z1Z2Z3Z4Z10 Z11Z12 Z13Z14Z16Z17Z18
C1C20
C13C14C15C16C17C18C19
R1
C2 C3C11 C12
Z5Z15
C21C22C24
Z9Z8Z6 Z7
C23
C26
C25C27C28
V
RF
OUTPUT
DD
Z1, Z180.125″ x 0.044″ Microstrip
Z20.409″ x 0.044″ Microstrip
Z30.326″ x 0.288″ Microstrip
Z40.333″ x 0.572″ Microstrip
Z5, Z150.527″ x 0.015″ Microstrip
RMATI
Table 5. 3.5 GHz Test Circuit Component Designations and Values
PartDescriptionPart NumberManufacturer
C1, C207.5 pF Chip Capacitors100A7R5JP150XAT C
C2, C3, C11, C123.9 pF Chip Capacitors (0805)08051J3R9BBTAV X
C4, C1310 pF Chip Capacitors100A100JP500XATC
C5, C14100 pF Chip Capacitors100A101JP500XATC
HIVE INF
C6, C15100 pF Chip Capacitors100B101JP500XATC
C7, C161000 pF Chip Capacitors100B102JP500XATC
C8, C173.9 µF Chip CapacitorsATC
C9, C180.1 µF Chip CapacitorsATC
C10, C1922 µF, 35 V Tantalum Surface Mount CapacitorsATC
Z6, Z8, Z10 0.050″ x 0.025″ Microstrip
Z7, Z90.097″ x 0.025″ Microstrip
Figure 1. 3.5 GHz Test Circuit Schematic
100 W Chip Resistor
Z110.082″ x 0.372″ Microstrip
Z120.169″ x 0.471″ Microstrip
Z130.196″ x 0.093″ Microstrip
Z140.313″ x 0.338″ Microstrip
Z160.200″ x 0.065″ Microstrip
Z170.472″ x 0.044″ Microstrip
PCBRogers 4350, 0.020″, εr = 3.5
ARCHIVE INFORMATION
Newark
RF Device Data
Freescale Semiconductor
MRFG35003NT1
3
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