Designed for broadband commercial and industrial applications at frequen-
MRF1517NT1
cies to 520 MHz. The high gain and broadband performance of this device
makes it ideal for large-signal, common source amplifier applications in 7.5 volt
portable FM equipment.
• Specified Performance @ 520 MHz, 7.5 Volts
D
Output Power — 8 Watts
Power Gain — 11 dB
Efficiency — 55%
• Capable of Handling 20:1 VSWR, @ 9.5 Vdc,
520 MHz, 2 dB Overdrive
Features
• Characterized with Series Equivalent Large-Signal
Impedance Parameters
G
520 MHz, 8 W, 7.5 V
LATERAL N - CHANNEL
BROADBAND
RF POWER MOSFET
• Excellent Thermal Stability
• Broadband UHF/VHF Demonstration Amplifier
Information Available Upon Request
S
• N Suffix Indicates Lead- Free Terminations. RoHS Compliant.
• Available in Tape and Reel.
T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel.
CASE 466-03, STYLE 1
PLD-1.5
PLASTIC
Table 1. Maximum Ratings
RatingSymbolValueUnit
Drain-Source Voltage
Gate-Source VoltageV
Drain Current — ContinuousI
Total Device Dissipation @ TC = 25°C
Derate above 25°C
Storage Temperature RangeT
Operating Junction TemperatureT
(1)
(2)
V
DSS
GS
D
P
D
stg
J
-0.5, +25Vdc
± 20Vdc
4Adc
62.5
0.50
- 65 to +150°C
150°C
Table 2. Thermal Characteristics
CharacteristicSymbolValue
Thermal Resistance, Junction to CaseR
θ
JC
(3)
2°C/W
Table 3. Moisture Sensitivity Level
Test MethodologyRatingPackage Peak TemperatureUnit
Per JESD 22-A113, IPC/JEDEC J- STD -0201260°C
1. Not designed for 12.5 volt applications.
TJ–T
2. Calculated based on the formula PD =
3. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access
the MTTF calculators by product.
R
C
θJC
W
W/°C
Unit
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Freescale Semiconductor, Inc., 2006. All rights reserved.
RF Device DataFreescale Semiconductor
MRF1517NT1
1
Page 2
Table 4. Electrical Characteristics
(TC = 25°C unless otherwise noted)
CharacteristicSymbolMinTypMaxUnit
Off Characteristics
Zero Gate Voltage Drain Current
(VDS = 35 Vdc, VGS = 0)
Gate-Source Leakage Current
(VGS = 10 Vdc, VDS = 0)
On Characteristics
Gate Threshold Voltage
(VDS = 7.5 Vdc, ID = 120 µAdc)
Drain-Source On-Voltage
(VGS = 10 Vdc, ID = 1 Adc)
Forward Transconductance
(VDS = 10 Vdc, ID = 2 Adc)
Dynamic Characteristics
Input Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Output Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Reverse Transfer Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Functional Tests (In Freescale Test Fixture)
Common-Source Amplifier Power Gain
(VDD = 7.5 Vdc, P
= 8 Watts, IDQ = 150 mA, f = 520 MHz)
out
Drain Efficiency
(VDD = 7.5 Vdc, P
= 8 Watts, IDQ = 150 mA, f = 520 MHz)
out
I
I
V
GS(th)
V
DS(on)
C
C
C
G
DSS
GSS
g
fs
iss
oss
rss
ps
——1µAdc
——1µAdc
11.72.1Vdc
—0.5—Vdc
—0.9—S
—66—pF
—38—pF
—6—pF
—14—dB
η—70—%
MRF1517NT1
2
RF Device Data
Freescale Semiconductor
Page 3
V
GG
C9
C8
+
C7
R3
B1
R2
C18
B2
V
DD
+
C15
C16C17
R1
N1
RF
INPUT
B1, B2Short Ferrite Bead, Fair Rite Products
C1300 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C12, C130 to 20 pF, Trimmer Capacitor
C5, C1143 pF, 100 mil Chip Capacitor
C6, C18120 pF, 100 mil Chip Capacitor
C7, C1510 µF, 50 V Electrolytic Capacitor
C8, C160.1 µF, 100 mil Chip Capacitor
C9, C171,000 pF, 100 mil Chip Capacitor
C14330 pF, 100 mil Chip Capacitor
L155.5 nH, 5 Turn, Coilcraft
N1, N2Type N Flange Mount
C1
Z2Z3
Z1
C2
(2743021446)
C3
Z4Z5
C4
C5
Figure 1. 480 - 520 MHz Broadband Test Circuit
DUT
C6
Z6
L1
Z7
Z8
Z9Z10
C10
C11
R115 Ω, 0805 Chip Resistor
R21.0 kΩ, 1/8 W Resistor
R333 kΩ, 1/2 W Resistor
Z10.315″ x 0.080″ Microstrip
Z21.415″ x 0.080″ Microstrip
Z30.322″ x 0.080″ Microstrip
Z40.022″ x 0.080″ Microstrip
Z5, Z60.260″ x 0.223″ Microstrip
Z70.050″ x 0.080″ Microstrip
Z80.625″ x 0.080″ Microstrip
Z90.800″ x 0.080″ Microstrip
Z100.589″ x 0.080″ Microstrip
BoardGlass Teflon, 31 mils, 2 oz. Copper
C12
C13
N2
C14
RF
OUTPUT
TYPICAL CHARACTERISTICS, 480 - 520 MHz
10
8
6
4
, OUTPUT POWER (WATTS)
out
2
P
0
0
Figure 2. Output Power versus Input Power
500 MHz
480 MHz
0.61.00.4
Pin, INPUT POWER (WATTS)
0
520 MHz
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
VDD = 7.5 VdcVDD = 7.5 Vdc
0.80.2
−25
520 MHz
2
480 MHz
3
P
546879
, OUTPUT POWER (WATTS)
out
500 MHz
Figure 3. Input Return Loss versus
Output Power
101
RF Device Data
Freescale Semiconductor
MRF1517NT1
3
Page 4
TYPICAL CHARACTERISTICS, 480 - 520 MHz
18
16
14
12
GAIN (dB)
10
8
6
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
500 MHz
2
31
P
out
480 MHz
520 MHz
VDD = 7.5 VdcVDD = 7.5 Vdc
56479108
, OUTPUT POWER (WATTS)
Figure 4. Gain versus Output Power
500 MHz
520 MHz
480 MHz
Pin = 27 dBm
VDD = 7.5 Vdc
80
70
60
50
40
30
Eff, DRAIN EFFICIENCY (%)
20
10
14
480 MHz
520 MHz
2
35
P
, OUTPUT POWER (WATTS)
out
500 MHz
68791011
Figure 5. Drain Efficiency versus Output Power
80
480 MHz
70
500 MHz
520 MHz
Pin = 27 dBm
VDD = 7.5 Vdc
Eff, DRAIN EFFICIENCY (%)
60
50
40
0
0
2001000400600
IDQ, BIASING CURRENT (mA)
Figure 6. Output Power versus Biasing Current
12
10
500 MHz
520 MHz
480 MHz
69107
VDD, SUPPLY VOLTAGE (VOLTS)
8
Pin = 27 dBm
IDQ = 150 mA
, OUTPUT POWER (WATTS)
out
P
8
6
4
2
0
5
Figure 8. Output Power versus Supply Voltage
800
30
200
4000
IDQ, BIASING CURRENT (mA)
6001000
800
Figure 7. Drain Efficiency versus Biasing Current
80
480 MHz
Pin = 27 dBm
IDQ = 150 mA
9
Eff, DRAIN EFFICIENCY (%)
70
500 MHz
60
50
40
30
5
520 MHz
678 10
VDD, SUPPLY VOLTAGE (VOLTS)
Figure 9. Drain Efficiency versus Supply Voltage
MRF1517NT1
4
RF Device Data
Freescale Semiconductor
Page 5
V
GG
C8
C7
+
C6
R3
B1
R2
C17
B2
V
DD
+
C14
C15C16
R1
N1
RF
INPUT
B1, B2Short Ferrite Bead, Fair Rite Products
C1, C13300 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C11, C120 to 20 pF, Trimmer Capacitor
C5, C17130 pF, 100 mil Chip Capacitor
C6, C1410 µF, 50 V Electrolytic Capacitor
C7, C150.1 µF, 100 mil Chip Capacitor
C8, C161,000 pF, 100 mil Chip Capacitor
C933 pF, 100 mil Chip Capacitor
L155.5 nH, 5 Turn, Coilcraft
N1, N2Type N Flange Mount
Z1
C1
(2743021446)
Z2Z3
C2
C3
Z4
C4
Figure 10. 400 - 440 MHz Broadband Test Circuit
DUT
C5
Z5
L1
Z6Z8Z9
Z7
C13
C10
C9
R112 Ω, 0805 Chip Resistor
R21.0 kΩ, 1/8 W Resistor
R333 kΩ, 1/2 W Resistor
Z10.617″ x 0.080″ Microstrip
Z20.723″ x 0.080″ Microstrip
Z30.513″ x 0.080″ Microstrip
Z4, Z50.260″ x 0.223″ Microstrip
Z60.048″ x 0.080″ Microstrip
Z70.577″ x 0.080″ Microstrip
Z81.135″ x 0.080″ Microstrip
Z90.076″ x 0.080″ Microstrip
BoardGlass Teflon, 31 mils, 2 oz. Copper
C11
C12
N2
RF
OUTPUT
10
, OUTPUT POWER (WATTS)
out
P
TYPICAL CHARACTERISTICS, 400 - 440 MHz
9
8
7
6
5
4
3
2
1
0
0
420 MHz
Figure 11. Output Power versus Input Power
400 MHz
440 MHz
VDD = 7.5 VdcVDD = 7.5 Vdc
0.30.50.2
Pin, INPUT POWER (WATTS)
0
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
0.40.1
−25
21
45
3
P
, OUTPUT POWER (WATTS)
out
400 MHz
420 MHz
440 MHz
689710
Figure 12. Input Return Loss versus Output Power
RF Device Data
Freescale Semiconductor
MRF1517NT1
5
Page 6
TYPICAL CHARACTERISTICS, 400 - 440 MHz
17
15
13
11
GAIN (dB)
9
7
5
1
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
0
0
420 MHz
400 MHz
2
35
4679810
P
, OUTPUT POWER (WATTS)
out
440 MHz
VDD = 7.5 Vdc
Figure 13. Gain versus Output Power
400 MHz
440 MHz
Pin = 25.5 dBm
VDD = 7.5 Vdc
2001000400600
IDQ, BIASING CURRENT (mA)
800
420 MHz
70
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
2
14
400 MHz
35
P
, OUTPUT POWER (WATTS)
out
440 MHz
VDD = 7.5 Vdc
68791011
Figure 14. Drain Efficiency versus Output Power
80
70
440 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
200
IDQ, BIASING CURRENT (mA)
400 MHz
4000
420 MHz
Pin = 25.5 dBm
VDD = 7.5 Vdc
6001000
800
420 MHz
Figure 15. Output Power versus Biasing Current
12
10
, OUTPUT POWER (WATTS)
out
P
400 MHz
8
6
4
2
0
5
69107
VDD, SUPPLY VOLTAGE (VOLTS)
420 MHz
440 MHz
Pin = 25.5 dBm
IDQ = 150 mA
8
Figure 17. Output Power versus Supply Voltage
MRF1517NT1
6
Figure 16. Drain Efficiency versus Biasing Current
80
70
420 MHz
60
440 MHz
400 MHz
Pin = 25.5 dBm
IDQ = 150 mA
9
Eff, DRAIN EFFICIENCY (%)
50
40
30
5
67 810
VDD, SUPPLY VOLTAGE (VOLTS)
Figure 18. Drain Efficiency versus Supply Voltage
RF Device Data
Freescale Semiconductor
Page 7
V
GG
C8
C7
+
C6
R3
B1
R2
C17
B2
V
DD
+
C14
C15C16
R1
N1
RF
INPUT
B1, B2Short Ferrite Bead, Fair Rite Products
C1240 pF, 100 mil Chip Capacitor
C2, C3, C4, C10,
C11, C120 to 20 pF, Trimmer Capacitor
C5, C17130 pF, 100 mil Chip Capacitor
C6, C1410 mF, 50 V Electrolytic Capacitor
C7, C150.1 mF, 100 mil Chip Capacitor
C8, C161,000 pF, 100 mil Chip Capacitor
C939 pF, 100 mil Chip Capacitor
C13330 pF, 100 mil Chip Capacitor
L155.5 nH, 5 Turn, Coilcraft
N1, N2Type N Flange Mount
Z1
C1
(2743021446)
Z2Z3
C2
C3
Z4
C4
Figure 19. 440 - 480 MHz Broadband Test Circuit
C5
DUT
L1
C13
N2
RF
OUTPUT
Z5
Z6
Z7
Z8Z9
C10
C9
R115 Ω, 0805 Chip Resistor
R21.0 kΩ, 1/8 W Resistor
R333 kΩ, 1/2 W Resistor
Z10.471″ x 0.080″ Microstrip
Z21.082″ x 0.080″ Microstrip
Z30.372″ x 0.080″ Microstrip
Z4, Z50.260″ x 0.223″ Microstrip
Z60.050″ x 0.080″ Microstrip
Z70.551″ x 0.080″ Microstrip
Z80.825″ x 0.080″ Microstrip
Z90.489″ x 0.080″ Microstrip
BoardGlass Teflon, 31 mils, 2 oz. Copper
C11
C12
10
, OUTPUT POWER (WATTS)
out
P
TYPICAL CHARACTERISTICS, 440 - 480 MHz
9
8
7
6
5
4
3
2
1
0
0.0
Figure 20. Output Power versus Input Power
440 MHz
460 MHz
480 MHz
VDD = 7.5 VdcVDD = 7.5 Vdc
0.4
Pin, INPUT POWER (WATTS)
0.6
0
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
0.80.2
−25
21
3
P
460 MHz
440 MHz
480 MHz
5
4697810
, OUTPUT POWER (WATTS)
out
Figure 21. Input Return Loss versus Output Power
RF Device Data
Freescale Semiconductor
MRF1517NT1
7
Page 8
TYPICAL CHARACTERISTICS, 440 - 480 MHz
17
15
13
11
GAIN (dB)
9
7
5
1
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
0
0
440 MHz
460 MHz
480 MHz
VDD = 7.5 Vdc
2
4
35
P
, OUTPUT POWER (WATTS)
out
687910
Figure 22. Gain versus Output Power
440 MHz
480 MHz
460 MHz
Pin = 27.5 dBm
2001000400600
IDQ, BIASING CURRENT (mA)
800
70
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
2
14
480 MHz
35
P
, OUTPUT POWER (WATTS)
out
440 MHz
68791011
460 MHz
VDD = 7.5 Vdc
Figure 23. Drain Efficiency versus Output Power
80
70
480 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
200
460 MHz
440 MHz
Pin = 27.5 dBm
4000
IDQ, BIASING CURRENT (mA)
6001000
800
Figure 24. Output Power versus Biasing Current
12
10
440 MHz
480 MHz
69107
VDD, SUPPLY VOLTAGE (VOLTS)
8
460 MHz
Pin = 27.5 dBmPin = 27.5 dBm
, OUTPUT POWER (WATTS)
out
P
8
6
4
2
0
5
Figure 26. Output Power versus Supply Voltage
MRF1517NT1
8
Figure 25. Drain Efficiency versus Biasing Current
80
70
480 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
5
460 MHz
440 MHz
678 10
VDD, SUPPLY VOLTAGE (VOLTS)
9
Figure 27. Drain Efficiency versus Supply Voltage
RF Device Data
Freescale Semiconductor
Page 9
TYPICAL CHARACTERISTICS
9
10
)
2
8
10
7
10
MTTF FACTOR (HOURS X AMPS
6
10
90110130150170190100120140160180200
TJ, JUNCTION TEMPERATURE (°C)
This above graph displays calculated MTTF in hours x ampere
drain current. Life tests at elevated temperatures have correlated to
better than ±10% of the theoretical prediction for metal failure. Divide
MTTF factor by I
Figure 28. MTTF Factor versus Junction Temperature
2
for MTTF in a particular application.
D
210
2
RF Device Data
Freescale Semiconductor
MRF1517NT1
9
Page 10
520
Z
f = 480 MHz
520
in
ZOL*
f = 480 MHz
Zo = 10 Ω
f = 440 MHz
f = 480 MHz
480
ZOL*
Zo = 10 Ω
Z
in
440
f = 440 MHz
400
f = 440 MHz
Z
in
ZOL*
400
Zo = 10 Ω
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
Ω
out
= 8 W
ZOL*
Ω
4801.06 +j1.823.51 +j0.99
5000.97 +j2.012.82 +j0.75
5200.975 +j2.37 1.87 +j1.03
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability.
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
Ω
out
4401.62 +j3.413.25 +j0.98
4601.85 +j3.353.05 +j0.93
4801.91 +j3.312.54 +j0.84
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
Input
Matching
Device
Under Test
Network
= 8 W
ZOL*
Ω
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
Ω
4001.96 +j3.322.52 +j0.39
4202.31 +j3.562.61 +j0.64
4401.60 +j3.452.37 +j1.04
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output
power, voltage, frequency,
and ηD > 50 %.
Output
Matching
Network
out
= 8 W
ZOL*
Ω
MRF1517NT1
10
Z
in
ZOL*
Figure 29. Series Equivalent Input and Output Impedance
RF Device Data
Freescale Semiconductor
Page 11
Table 5. Common Source Scattering Parameters (VDD = 7.5 Vdc)
IDQ = 150 mA
f
MHz
S
11
|S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
500.84- 15217.66970.01600.77- 167
1000.84-1648.86850.01650.78-172
2000.86-1704.17720.015-50.79- 173
3000.88-1712.54620.014-80.80- 172
4000.90-1721.72550.013-250.83- 172
5000.92-1721.28500.013-100.84- 172
6000.94-1730.98460.014-220.86- 171
7000.95-1730.76410.010-300.86- 172
8000.96-1740.61380.011-140.86- 171
9000.96-1750.50330.011-310.85- 172
10000.97- 1750.40310.006550.88-171
S
21
S
12
S
IDQ = 800 mA
f
MHz
S
11
|S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
500.90- 16520.42940.01810.76- 164
1000.89-17210.20870.015-70.77- 170
2000.90-1754.96790.015-120.77- 172
3000.90-1763.17730.017-20.80- 171
4000.91-1762.26670.01310.82-172
5000.92-1761.75630.011-60.83- 171
6000.93-1761.39590.012-310.85- 171
7000.94-1761.14550.015-340.88- 171
8000.94-1760.93510.008-220.87- 171
9000.95-1770.78450.00720.87-172
10000.96- 1770.65430.008-400.90- 170
S
21
S
12
S
22
22
IDQ = 1.5 A
f
MHz
S
11
|S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
500.92- 16519.90950.01730.76- 164
1000.90-1729.93880.01820.77-170
2000.91-1764.84800.016-40.77- 172
3000.91-1763.10740.014-110.80- 172
4000.92-1762.22680.014-140.81- 172
5000.93-1761.73640.016-80.83- 171
6000.94-1761.39610.013-240.85- 171
7000.94-1761.12560.013-240.87- 171
8000.95-1760.93520.009-120.87- 171
9000.96-1770.78460.008100.87- 173
10000.97- 1770.64440.01240.89- 169
S
21
S
12
S
RF Device Data
Freescale Semiconductor
22
MRF1517NT1
11
Page 12
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
This device is a common - source, RF power, N- Channel
F
Note AN211A, “FETs in Theory and Practice”, is suggested
reading for those not familiar with the construction and characteristics of FETs.
This surface mount packaged device was designed primarily for VHF and UHF portable power amplifier applications. Manufacturability is improved by utilizing the tape and
reel capability for fully automated pick and placement of
parts. However, care should be taken in the design process
to insure proper heat sinking of the device.
The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely mismatched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate - to -drain (C
gate - to - source (C
). The PN junction formed during fab-
gs
rication of the RF MOSFET results in a junction capacitance
from drain- to - source (C
terized as input (C
(C
) capacitances on data sheets. The relationships be-
rss
ds
), output (C
iss
tween the inter-terminal capacitances and those given on
data sheets are shown below. The C
two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate.
In the latter case, the numbers are lower. However, neither
method represents the actual operating conditions in RF applications.
C
gd
Gate
C
gs
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full-on condition. This on - resistance, R
in the linear region of the output characteristic and is specified at a specific gate-source voltage and drain current. The
etal- Oxide Semiconductor
), and
gd
). These capacitances are charac-
) and reverse transfer
oss
can be specified in
iss
Drain
C
= Cgd + C
C
ds
Source
iss
C
oss
C
rss
= C
= C
gd
DS(on)
+ C
gd
, occurs
gs
ds
drain- source voltage under these conditions is termed
V
. For MOSFETs, V
DS(on)
has a positive temperature
DS(on)
coefficient at high temperatures because it contributes to the
power dissipation within the device.
BV
values for this device are higher than normally re-
DSS
quired for typical applications. Measurement of BV
DSS
is not
recommended and may result in possible damage to the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide.
The DC input resistance is very high - on the order of 10
9
Ω
— resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate- to - source threshold voltage,
V
.
GS(th)
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can
result in turn- on of the devices due to voltage build - up on
the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate - to -source. If gate protection is required, an external zener diode is recommended.
Using a resistor to keep the gate - to -source impedance low
also helps dampen transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate- drain capacitance. If the
gate - to - source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate- threshold voltage
and turn the device on.
DC BIAS
Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the
source. RF power FETs operate optimally with a quiescent
drain current (I
This device was characterized at I
), whose value is application dependent.
DQ
= 150 mA, which is the
DQ
suggested value of bias current for typical applications. For
special applications such as linear amplification, I
DQ
may
have to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is
very dependent on frequency and load line.
MRF1517NT1
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RF Device Data
Freescale Semiconductor
Page 13
MOUNTING
The specified maximum thermal resistance of 2°C/W assumes a majority of the 0.065″ x 0.180″ source contact on
the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of
the thermal design should be to minimize the temperature at
the back side of the package. Refer to Freescale Application
Note AN4005/D, “Thermal Management and Mounting Method for the PLD- 1.5 RF Power Surface Mount Package,” and
Engineering Bulletin EB209/D, “Mounting Method for RF
Power Leadless Surface Mount Transistor” for additional information.
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for this device. For examples
see Freescale Application Note AN721, “Impedance
Matching Networks Applied to RF Power Transistors.”
Large - signal impedances are provided, and will yield a good
first pass approximation.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of this device
yields a device capable of self oscillation. Stability may be
achieved by techniques such as drain loading, input shunt
resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series
with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region.
Two- port stability analysis with this device’s
S- parameters provides a useful tool for selection of loading
or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, “RF Small - Signal Design
Using Two- Port Parameters” for a discussion of two port
network theory and stability.
RF Device Data
Freescale Semiconductor
MRF1517NT1
13
Page 14
PACKAGE DIMENSIONS
B
ZONE V
ZONE W
A
F
3
0.095
2.41
0.146
3.71
0.115
2.92
21
D
R
L
0.115
2.92
0.020
4
N
0.35 (0.89) X 45 5
K
Q
U
H
4
1
3
G
ZONE X
2
S
VIEW Y- Y
C
__
"
P
YY
NOTES:
1. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1984.
2. CONTROLLING DIMENSION: INCH
3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W,
AND X.
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Document Number: MRF1517N
RF Device Data
Rev. 5, 9/2006
Freescale Semiconductor
MRF1517NT1
15
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