Freescale MRF 1517 NT 1 Service Manual

Page 1
www.DataSheet4U.com
Freescale Semiconductor
Technical Data
RF Power Field Effect Transistor
N-Channel Enhancement - Mode Lateral MOSFET
Document Number: MRF1517N
Rev. 5, 9/2006
MRF1517NT1
cies to 520 MHz. The high gain and broadband performance of this device makes it ideal for large-signal, common source amplifier applications in 7.5 volt portable FM equipment.
Specified Performance @ 520 MHz, 7.5 Volts
D
Output Power — 8 Watts Power Gain — 11 dB Efficiency — 55%
Capable of Handling 20:1 VSWR, @ 9.5 Vdc, 520 MHz, 2 dB Overdrive
Features
Characterized with Series Equivalent Large-Signal Impedance Parameters
G
520 MHz, 8 W, 7.5 V
LATERAL N - CHANNEL
BROADBAND
RF POWER MOSFET
Excellent Thermal Stability
Broadband UHF/VHF Demonstration Amplifier
Information Available Upon Request
S
N Suffix Indicates Lead- Free Terminations. RoHS Compliant.
Available in Tape and Reel.
T1 Suffix = 1,000 Units per 12 mm, 7 Inch Reel.
CASE 466-03, STYLE 1
PLD-1.5
PLASTIC
Table 1. Maximum Ratings
Rating Symbol Value Unit
Drain-Source Voltage
Gate-Source Voltage V
Drain Current — Continuous I
Total Device Dissipation @ TC = 25°C
Derate above 25°C
Storage Temperature Range T
Operating Junction Temperature T
(1)
(2)
V
DSS
GS
D
P
D
stg
J
-0.5, +25 Vdc
± 20 Vdc
4 Adc
62.5
0.50
- 65 to +150 °C
150 °C
Table 2. Thermal Characteristics
Characteristic Symbol Value
Thermal Resistance, Junction to Case R
θ
JC
(3)
2 °C/W
Table 3. Moisture Sensitivity Level
Test Methodology Rating Package Peak Temperature Unit
Per JESD 22-A113, IPC/JEDEC J- STD -020 1 260 °C
1. Not designed for 12.5 volt applications. TJ–T
2. Calculated based on the formula PD =
3. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access
the MTTF calculators by product.
R
C
θJC
W
W/°C
Unit
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed.
Freescale Semiconductor, Inc., 2006. All rights reserved.
RF Device Data Freescale Semiconductor
MRF1517NT1
1
Page 2
Table 4. Electrical Characteristics
(TC = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Off Characteristics
Zero Gate Voltage Drain Current
(VDS = 35 Vdc, VGS = 0)
Gate-Source Leakage Current
(VGS = 10 Vdc, VDS = 0)
On Characteristics
Gate Threshold Voltage
(VDS = 7.5 Vdc, ID = 120 µAdc)
Drain-Source On-Voltage
(VGS = 10 Vdc, ID = 1 Adc)
Forward Transconductance
(VDS = 10 Vdc, ID = 2 Adc)
Dynamic Characteristics
Input Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Output Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Reverse Transfer Capacitance
(VDS = 7.5 Vdc, VGS = 0, f = 1 MHz)
Functional Tests (In Freescale Test Fixture)
Common-Source Amplifier Power Gain
(VDD = 7.5 Vdc, P
= 8 Watts, IDQ = 150 mA, f = 520 MHz)
out
Drain Efficiency
(VDD = 7.5 Vdc, P
= 8 Watts, IDQ = 150 mA, f = 520 MHz)
out
I
I
V
GS(th)
V
DS(on)
C
C
C
G
DSS
GSS
g
fs
iss
oss
rss
ps
1 µAdc
1 µAdc
1 1.7 2.1 Vdc
0.5 Vdc
0.9 S
66 pF
38 pF
6 pF
14 dB
η 70 %
MRF1517NT1
2
RF Device Data
Freescale Semiconductor
Page 3
V
GG
C9
C8
+
C7
R3
B1
R2
C18
B2
V
DD
+
C15
C16C17
R1
N1
RF
INPUT
B1, B2 Short Ferrite Bead, Fair Rite Products
C1 300 pF, 100 mil Chip Capacitor C2, C3, C4, C10, C12, C13 0 to 20 pF, Trimmer Capacitor C5, C11 43 pF, 100 mil Chip Capacitor C6, C18 120 pF, 100 mil Chip Capacitor C7, C15 10 µF, 50 V Electrolytic Capacitor C8, C16 0.1 µF, 100 mil Chip Capacitor C9, C17 1,000 pF, 100 mil Chip Capacitor C14 330 pF, 100 mil Chip Capacitor L1 55.5 nH, 5 Turn, Coilcraft N1, N2 Type N Flange Mount
C1
Z2 Z3
Z1
C2
(2743021446)
C3
Z4 Z5
C4
C5
Figure 1. 480 - 520 MHz Broadband Test Circuit
DUT
C6
Z6
L1
Z7
Z8
Z9 Z10
C10
C11
R1 15 , 0805 Chip Resistor R2 1.0 k, 1/8 W Resistor R3 33 k, 1/2 W Resistor Z1 0.315 x 0.080 Microstrip Z2 1.415 x 0.080 Microstrip Z3 0.322 x 0.080 Microstrip Z4 0.022 x 0.080 Microstrip Z5, Z6 0.260 x 0.223 Microstrip Z7 0.050 x 0.080 Microstrip Z8 0.625 x 0.080 Microstrip Z9 0.800 x 0.080 Microstrip Z10 0.589 x 0.080 Microstrip Board Glass Teflon, 31 mils, 2 oz. Copper
C12
C13
N2
C14
RF OUTPUT
TYPICAL CHARACTERISTICS, 480 - 520 MHz
10
8
6
4
, OUTPUT POWER (WATTS)
out
2
P
0
0
Figure 2. Output Power versus Input Power
500 MHz
480 MHz
0.6 1.00.4
Pin, INPUT POWER (WATTS)
0
520 MHz
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
VDD = 7.5 Vdc VDD = 7.5 Vdc
0.80.2
−25
520 MHz
2
480 MHz
3
P
546879
, OUTPUT POWER (WATTS)
out
500 MHz
Figure 3. Input Return Loss versus
Output Power
101
RF Device Data Freescale Semiconductor
MRF1517NT1
3
Page 4
TYPICAL CHARACTERISTICS, 480 - 520 MHz
18
16
14
12
GAIN (dB)
10
8
6
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
500 MHz
2
31
P
out
480 MHz
520 MHz
VDD = 7.5 Vdc VDD = 7.5 Vdc
56479108
, OUTPUT POWER (WATTS)
Figure 4. Gain versus Output Power
500 MHz
520 MHz
480 MHz
Pin = 27 dBm
VDD = 7.5 Vdc
80
70
60
50
40
30
Eff, DRAIN EFFICIENCY (%)
20
10
14
480 MHz
520 MHz
2
35
P
, OUTPUT POWER (WATTS)
out
500 MHz
68791011
Figure 5. Drain Efficiency versus Output Power
80
480 MHz
70
500 MHz
520 MHz
Pin = 27 dBm
VDD = 7.5 Vdc
Eff, DRAIN EFFICIENCY (%)
60
50
40
0
0
200 1000400 600
IDQ, BIASING CURRENT (mA)
Figure 6. Output Power versus Biasing Current
12
10
500 MHz
520 MHz
480 MHz
69107
VDD, SUPPLY VOLTAGE (VOLTS)
8
Pin = 27 dBm
IDQ = 150 mA
, OUTPUT POWER (WATTS)
out
P
8
6
4
2
0
5
Figure 8. Output Power versus Supply Voltage
800
30
200
4000
IDQ, BIASING CURRENT (mA)
600 1000
800
Figure 7. Drain Efficiency versus Biasing Current
80
480 MHz
Pin = 27 dBm
IDQ = 150 mA
9
Eff, DRAIN EFFICIENCY (%)
70
500 MHz
60
50
40
30
5
520 MHz
678 10
VDD, SUPPLY VOLTAGE (VOLTS)
Figure 9. Drain Efficiency versus Supply Voltage
MRF1517NT1
4
RF Device Data
Freescale Semiconductor
Page 5
V
GG
C8
C7
+
C6
R3
B1
R2
C17
B2
V
DD
+
C14
C15C16
R1
N1
RF
INPUT
B1, B2 Short Ferrite Bead, Fair Rite Products
C1, C13 300 pF, 100 mil Chip Capacitor C2, C3, C4, C10, C11, C12 0 to 20 pF, Trimmer Capacitor C5, C17 130 pF, 100 mil Chip Capacitor C6, C14 10 µF, 50 V Electrolytic Capacitor C7, C15 0.1 µF, 100 mil Chip Capacitor C8, C16 1,000 pF, 100 mil Chip Capacitor C9 33 pF, 100 mil Chip Capacitor L1 55.5 nH, 5 Turn, Coilcraft N1, N2 Type N Flange Mount
Z1
C1
(2743021446)
Z2 Z3
C2
C3
Z4
C4
Figure 10. 400 - 440 MHz Broadband Test Circuit
DUT
C5
Z5
L1
Z6 Z8 Z9
Z7
C13
C10
C9
R1 12 , 0805 Chip Resistor R2 1.0 k, 1/8 W Resistor R3 33 k, 1/2 W Resistor Z1 0.617 x 0.080 Microstrip Z2 0.723 x 0.080 Microstrip Z3 0.513 x 0.080 Microstrip Z4, Z5 0.260 x 0.223 Microstrip Z6 0.048 x 0.080 Microstrip Z7 0.577 x 0.080 Microstrip Z8 1.135 x 0.080 Microstrip Z9 0.076 x 0.080 Microstrip Board Glass Teflon, 31 mils, 2 oz. Copper
C11
C12
N2
RF OUTPUT
10
, OUTPUT POWER (WATTS)
out
P
TYPICAL CHARACTERISTICS, 400 - 440 MHz
9
8
7
6
5
4
3
2
1
0
0
420 MHz
Figure 11. Output Power versus Input Power
400 MHz
440 MHz
VDD = 7.5 Vdc VDD = 7.5 Vdc
0.3 0.50.2
Pin, INPUT POWER (WATTS)
0
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
0.40.1
−25 21
45
3
P
, OUTPUT POWER (WATTS)
out
400 MHz
420 MHz
440 MHz
689710
Figure 12. Input Return Loss versus Output Power
RF Device Data Freescale Semiconductor
MRF1517NT1
5
Page 6
TYPICAL CHARACTERISTICS, 400 - 440 MHz
17
15
13
11
GAIN (dB)
9
7
5
1
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
0
0
420 MHz
400 MHz
2
35
4679810
P
, OUTPUT POWER (WATTS)
out
440 MHz
VDD = 7.5 Vdc
Figure 13. Gain versus Output Power
400 MHz
440 MHz
Pin = 25.5 dBm
VDD = 7.5 Vdc
200 1000400 600
IDQ, BIASING CURRENT (mA)
800
420 MHz
70
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
2
14
400 MHz
35
P
, OUTPUT POWER (WATTS)
out
440 MHz
VDD = 7.5 Vdc
68791011
Figure 14. Drain Efficiency versus Output Power
80
70
440 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
200
IDQ, BIASING CURRENT (mA)
400 MHz
4000
420 MHz
Pin = 25.5 dBm
VDD = 7.5 Vdc
600 1000
800
420 MHz
Figure 15. Output Power versus Biasing Current
12
10
, OUTPUT POWER (WATTS)
out
P
400 MHz
8
6
4
2
0
5
69107
VDD, SUPPLY VOLTAGE (VOLTS)
420 MHz
440 MHz
Pin = 25.5 dBm
IDQ = 150 mA
8
Figure 17. Output Power versus Supply Voltage
MRF1517NT1
6
Figure 16. Drain Efficiency versus Biasing Current
80
70
420 MHz
60
440 MHz
400 MHz
Pin = 25.5 dBm
IDQ = 150 mA
9
Eff, DRAIN EFFICIENCY (%)
50
40
30
5
67 8 10
VDD, SUPPLY VOLTAGE (VOLTS)
Figure 18. Drain Efficiency versus Supply Voltage
RF Device Data
Freescale Semiconductor
Page 7
V
GG
C8
C7
+
C6
R3
B1
R2
C17
B2
V
DD
+
C14
C15C16
R1
N1
RF
INPUT
B1, B2 Short Ferrite Bead, Fair Rite Products
C1 240 pF, 100 mil Chip Capacitor C2, C3, C4, C10, C11, C12 0 to 20 pF, Trimmer Capacitor C5, C17 130 pF, 100 mil Chip Capacitor C6, C14 10 mF, 50 V Electrolytic Capacitor C7, C15 0.1 mF, 100 mil Chip Capacitor C8, C16 1,000 pF, 100 mil Chip Capacitor C9 39 pF, 100 mil Chip Capacitor C13 330 pF, 100 mil Chip Capacitor L1 55.5 nH, 5 Turn, Coilcraft N1, N2 Type N Flange Mount
Z1
C1
(2743021446)
Z2 Z3
C2
C3
Z4
C4
Figure 19. 440 - 480 MHz Broadband Test Circuit
C5
DUT
L1
C13
N2
RF OUTPUT
Z5
Z6
Z7
Z8 Z9
C10
C9
R1 15 , 0805 Chip Resistor R2 1.0 k, 1/8 W Resistor R3 33 k, 1/2 W Resistor Z1 0.471 x 0.080 Microstrip Z2 1.082 x 0.080 Microstrip Z3 0.372 x 0.080 Microstrip Z4, Z5 0.260 x 0.223 Microstrip Z6 0.050 x 0.080 Microstrip Z7 0.551 x 0.080 Microstrip Z8 0.825 x 0.080 Microstrip Z9 0.489 x 0.080 Microstrip Board Glass Teflon, 31 mils, 2 oz. Copper
C11
C12
10
, OUTPUT POWER (WATTS)
out
P
TYPICAL CHARACTERISTICS, 440 - 480 MHz
9
8
7
6
5
4
3
2
1
0
0.0
Figure 20. Output Power versus Input Power
440 MHz
460 MHz
480 MHz
VDD = 7.5 Vdc VDD = 7.5 Vdc
0.4
Pin, INPUT POWER (WATTS)
0.6
0
−5
−10
−15
−20
IRL, INPUT RETURN LOSS (dB)
0.80.2
−25 21
3
P
460 MHz
440 MHz
480 MHz
5
46 978 10
, OUTPUT POWER (WATTS)
out
Figure 21. Input Return Loss versus Output Power
RF Device Data Freescale Semiconductor
MRF1517NT1
7
Page 8
TYPICAL CHARACTERISTICS, 440 - 480 MHz
17
15
13
11
GAIN (dB)
9
7
5
1
12
10
8
6
4
, OUTPUT POWER (WATTS)
out
P
2
0
0
440 MHz
460 MHz
480 MHz
VDD = 7.5 Vdc
2
4
35
P
, OUTPUT POWER (WATTS)
out
687910
Figure 22. Gain versus Output Power
440 MHz
480 MHz
460 MHz
Pin = 27.5 dBm
200 1000400 600
IDQ, BIASING CURRENT (mA)
800
70
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
2
14
480 MHz
35
P
, OUTPUT POWER (WATTS)
out
440 MHz
68791011
460 MHz
VDD = 7.5 Vdc
Figure 23. Drain Efficiency versus Output Power
80
70
480 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
200
460 MHz
440 MHz
Pin = 27.5 dBm
4000
IDQ, BIASING CURRENT (mA)
600 1000
800
Figure 24. Output Power versus Biasing Current
12
10
440 MHz
480 MHz
69107
VDD, SUPPLY VOLTAGE (VOLTS)
8
460 MHz
Pin = 27.5 dBm Pin = 27.5 dBm
, OUTPUT POWER (WATTS)
out
P
8
6
4
2
0
5
Figure 26. Output Power versus Supply Voltage
MRF1517NT1
8
Figure 25. Drain Efficiency versus Biasing Current
80
70
480 MHz
Eff, DRAIN EFFICIENCY (%)
60
50
40
30
5
460 MHz
440 MHz
678 10
VDD, SUPPLY VOLTAGE (VOLTS)
9
Figure 27. Drain Efficiency versus Supply Voltage
RF Device Data
Freescale Semiconductor
Page 9
TYPICAL CHARACTERISTICS
9
10
)
2
8
10
7
10
MTTF FACTOR (HOURS X AMPS
6
10
90 110 130 150 170 190100 120 140 160 180 200
TJ, JUNCTION TEMPERATURE (°C)
This above graph displays calculated MTTF in hours x ampere drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by I
Figure 28. MTTF Factor versus Junction Temperature
2
for MTTF in a particular application.
D
210
2
RF Device Data Freescale Semiconductor
MRF1517NT1
9
Page 10
520
Z
f = 480 MHz
520
in
ZOL*
f = 480 MHz
Zo = 10
f = 440 MHz
f = 480 MHz
480
ZOL*
Zo = 10
Z
in
440
f = 440 MHz
400
f = 440 MHz
Z
in
ZOL*
400
Zo = 10
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
out
= 8 W
ZOL*
480 1.06 +j1.82 3.51 +j0.99
500 0.97 +j2.01 2.82 +j0.75
520 0.975 +j2.37 1.87 +j1.03
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output power, voltage, frequency, and ηD > 50 %.
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability.
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
out
440 1.62 +j3.41 3.25 +j0.98
460 1.85 +j3.35 3.05 +j0.93
480 1.91 +j3.31 2.54 +j0.84
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output power, voltage, frequency, and ηD > 50 %.
Input Matching
Device Under Test
Network
= 8 W
ZOL*
VDD = 7.5 V, IDQ = 150 mA, P
f
MHz
Z
in
400 1.96 +j3.32 2.52 +j0.39
420 2.31 +j3.56 2.61 +j0.64
440 1.60 +j3.45 2.37 +j1.04
Zin= Complex conjugate of source
impedance.
ZOL* = Complex conjugate of the load
impedance at given output power, voltage, frequency, and ηD > 50 %.
Output Matching Network
out
= 8 W
ZOL*
MRF1517NT1
10
Z
in
ZOL*
Figure 29. Series Equivalent Input and Output Impedance
RF Device Data
Freescale Semiconductor
Page 11
Table 5. Common Source Scattering Parameters (VDD = 7.5 Vdc)
IDQ = 150 mA
f
MHz
S
11
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.84 - 152 17.66 97 0.016 0 0.77 - 167
100 0.84 -164 8.86 85 0.016 5 0.78 -172
200 0.86 -170 4.17 72 0.015 -5 0.79 - 173
300 0.88 -171 2.54 62 0.014 -8 0.80 - 172
400 0.90 -172 1.72 55 0.013 -25 0.83 - 172
500 0.92 -172 1.28 50 0.013 -10 0.84 - 172
600 0.94 -173 0.98 46 0.014 -22 0.86 - 171
700 0.95 -173 0.76 41 0.010 -30 0.86 - 172
800 0.96 -174 0.61 38 0.011 -14 0.86 - 171
900 0.96 -175 0.50 33 0.011 -31 0.85 - 172
1000 0.97 - 175 0.40 31 0.006 55 0.88 -171
S
21
S
12
S
IDQ = 800 mA
f
MHz
S
11
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.90 - 165 20.42 94 0.018 1 0.76 - 164
100 0.89 -172 10.20 87 0.015 -7 0.77 - 170
200 0.90 -175 4.96 79 0.015 -12 0.77 - 172
300 0.90 -176 3.17 73 0.017 -2 0.80 - 171
400 0.91 -176 2.26 67 0.013 1 0.82 -172
500 0.92 -176 1.75 63 0.011 -6 0.83 - 171
600 0.93 -176 1.39 59 0.012 -31 0.85 - 171
700 0.94 -176 1.14 55 0.015 -34 0.88 - 171
800 0.94 -176 0.93 51 0.008 -22 0.87 - 171
900 0.95 -177 0.78 45 0.007 2 0.87 -172
1000 0.96 - 177 0.65 43 0.008 -40 0.90 - 170
S
21
S
12
S
22
22
IDQ = 1.5 A
f
MHz
S
11
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.92 - 165 19.90 95 0.017 3 0.76 - 164
100 0.90 -172 9.93 88 0.018 2 0.77 -170
200 0.91 -176 4.84 80 0.016 -4 0.77 - 172
300 0.91 -176 3.10 74 0.014 -11 0.80 - 172
400 0.92 -176 2.22 68 0.014 -14 0.81 - 172
500 0.93 -176 1.73 64 0.016 -8 0.83 - 171
600 0.94 -176 1.39 61 0.013 -24 0.85 - 171
700 0.94 -176 1.12 56 0.013 -24 0.87 - 171
800 0.95 -176 0.93 52 0.009 -12 0.87 - 171
900 0.96 -177 0.78 46 0.008 10 0.87 - 173
1000 0.97 - 177 0.64 44 0.012 4 0.89 - 169
S
21
S
12
S
RF Device Data Freescale Semiconductor
22
MRF1517NT1
11
Page 12
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
This device is a common - source, RF power, N- Channel
enhancement mode, Lateral M
ield-Effect Transistor (MOSFET). Freescale Application
F Note AN211A, “FETs in Theory and Practice”, is suggested reading for those not familiar with the construction and char­acteristics of FETs.
This surface mount packaged device was designed pri­marily for VHF and UHF portable power amplifier applica­tions. Manufacturability is improved by utilizing the tape and reel capability for fully automated pick and placement of parts. However, care should be taken in the design process to insure proper heat sinking of the device.
The major advantages of Lateral RF power MOSFETs in­clude high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mis­matched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate - to -drain (C gate - to - source (C
). The PN junction formed during fab-
gs
rication of the RF MOSFET results in a junction capacitance from drain- to - source (C terized as input (C (C
) capacitances on data sheets. The relationships be-
rss
ds
), output (C
iss
tween the inter-terminal capacitances and those given on data sheets are shown below. The C two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero volts at the gate.
In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF ap­plications.
C
gd
Gate
C
gs
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance in the full-on condition. This on - resistance, R in the linear region of the output characteristic and is speci­fied at a specific gate-source voltage and drain current. The
etal- Oxide Semiconductor
), and
gd
). These capacitances are charac-
) and reverse transfer
oss
can be specified in
iss
Drain
C
= Cgd + C
C
ds
Source
iss
C
oss
C
rss
= C
= C
gd
DS(on)
+ C
gd
, occurs
gs
ds
drain- source voltage under these conditions is termed V
. For MOSFETs, V
DS(on)
has a positive temperature
DS(on)
coefficient at high temperatures because it contributes to the power dissipation within the device.
BV
values for this device are higher than normally re-
DSS
quired for typical applications. Measurement of BV
DSS
is not recommended and may result in possible damage to the de­vice.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The DC input resistance is very high - on the order of 10
9
— resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to the gate greater than the gate- to - source threshold voltage, V
.
GS(th)
Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are es­sentially capacitors. Circuits that leave the gate open - cir­cuited or floating should be avoided. These conditions can result in turn- on of the devices due to voltage build - up on the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal monolithic zener diode from gate - to -source. If gate protec­tion is required, an external zener diode is recommended. Using a resistor to keep the gate - to -source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate- drain capacitance. If the gate - to - source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate- threshold voltage and turn the device on.
DC BIAS
Since this device is an enhancement mode FET, drain cur­rent flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent drain current (I This device was characterized at I
), whose value is application dependent.
DQ
= 150 mA, which is the
DQ
suggested value of bias current for typical applications. For special applications such as linear amplification, I
DQ
may
have to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current. There­fore, the gate bias circuit may generally be just a simple re­sistive divider network. Some special applications may require a more elaborate bias system.
GAIN CONTROL
Power output of this device may be controlled to some de­gree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. This characteristic is very dependent on frequency and load line.
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MOUNTING
The specified maximum thermal resistance of 2°C/W as­sumes a majority of the 0.065 x 0.180 source contact on the back side of the package is in good contact with an ap­propriate heat sink. As with all RF power devices, the goal of the thermal design should be to minimize the temperature at the back side of the package. Refer to Freescale Application Note AN4005/D, “Thermal Management and Mounting Meth­od for the PLD- 1.5 RF Power Surface Mount Package,” and Engineering Bulletin EB209/D, “Mounting Method for RF Power Leadless Surface Mount Transistor” for additional in­formation.
AMPLIFIER DESIGN
Impedance matching networks similar to those used with bipolar transistors are suitable for this device. For examples see Freescale Application Note AN721, “Impedance Matching Networks Applied to RF Power Transistors.”
Large - signal impedances are provided, and will yield a good first pass approximation.
Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of this device yields a device capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. The RF test fix­ture implements a parallel resistor and capacitor in series with the gate, and has a load line selected for a higher effi­ciency, lower gain, and more stable operating region.
Two- port stability analysis with this device’s S- parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Free­scale Application Note AN215A, “RF Small - Signal Design Using Two- Port Parameters” for a discussion of two port network theory and stability.
RF Device Data Freescale Semiconductor
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PACKAGE DIMENSIONS
B
ZONE V
ZONE W
A
F
3
0.095
2.41
0.146
3.71
0.115
2.92
21
D
R
L
0.115
2.92
0.020
4
N
0.35 (0.89) X 45 5
K
Q
U
H
4
1
3
G
ZONE X
2
S
VIEW Y- Y
C
__
"
P
YY
NOTES:
1. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1984.
2. CONTROLLING DIMENSION: INCH
3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W, AND X.
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4. SOURCE
CASE 466- 03
ISSUE D PLD- 1.5
10 DRAFT
_
E
SOLDER FOOTPRINT
DIM MIN MAX MIN MAX
A 0.255 0.265 6.48 6.73 B 0.225 0.235 5.72 5.97 C 0.065 0.072 1.65 1.83 D 0.130 0.150 3.30 3.81 E 0.021 0.026 0.53 0.66 F 0.026 0.044 0.66 1.12 G 0.050 0.070 1.27 1.78 H 0.045 0.063 1.14 1.60 J 0.160 0.180 4.06 4.57 K 0.273 0.285 6.93 7.24 L 0.245 0.255 6.22 6.48 N 0.230 0.240 5.84 6.10 P 0.000 0.008 0.00 0.20 Q 0.055 0.063 1.40 1.60 R 0.200 0.210 5.08 5.33 S 0.006 0.012 0.15 0.31 U 0.006 0.012 0.15 0.31
ZONE V 0.000 0.021 0.00 0.53
ZONE W 0.000 0.010 0.00 0.25
ZONE X 0.000 0.010 0.00 0.25
0.51
inches
mm
MILLIMETERSINCHES
PLASTIC
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Document Number: MRF1517N
RF Device Data
Rev. 5, 9/2006
Freescale Semiconductor
MRF1517NT1
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