Freescale Semiconductor
Technical Data
RF Power Field Effect Transistor
N-Channel Enhancement - Mode Lateral MOSFET
Designed for broadband commercial and industrial applications with frequencies to 520 MHz. The high gain and broadband performance of this device
make it ideal for large-signal, common source amplifier applications in 7.5 volt
portable and 12.5 volt mobile FM equipment.
• Specified Performance @ 520 MHz, 12.5 Volts
Output Power — 3 Watts
Power Gain — 11 dB
Efficiency — 55%
• Capable of Handling 20:1 VSWR, @ 15.5 Vdc,
520 MHz, 2 dB Overdrive
Features
• Excellent Thermal Stability
• Characterized with Series Equivalent Large-Signal
G
Impedance Parameters
• N Suffix Indicates Lead- Free Terminations. RoHS Compliant.
• In Tape and Reel. T1 Suffix = 1,000 Units per 12 mm,
7 Inch Reel.
D
S
Document Number: MRF1513N
Rev. 10, 2/2008
MRF1513NT1
520 MHz, 3 W, 12.5 V
LATERAL N - CHANNEL
BROADBAND
RF POWER MOSFET
CASE 466-03, STYLE 1
PLD-1.5
PLASTIC
Table 1. Maximum Ratings
Rating Symbol Value Unit
Drain-Source Voltage V
Gate-Source Voltage V
Drain Current — Continuous I
Total Device Dissipation @ TC = 25°C
Derate above 25°C
Storage Temperature Range T
Operating Junction Temperature T
(1)
DSS
GS
D
P
stg
D
J
-0.5, +40 Vdc
± 20 Vdc
2 Adc
31.25
0.25
- 65 to +150 °C
150 °C
Table 2. Thermal Characteristics
Characteristic Symbol Value
Thermal Resistance, Junction to Case R
θ
JC
(2)
4 °C/W
Table 3. Moisture Sensitivity Level
Test Methodology Rating Package Peak Temperature Unit
Per JESD 22-A113, IPC/JEDEC J- STD -020 1 260 °C
TJ–T
1. Calculated based on the formula PD =
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access
MTTF calculators by product.
R
C
θJC
W
W/°C
Unit
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Freescale Semiconductor, Inc., 2008. All rights reserved.
RF Device Data
Freescale Semiconductor
MRF1513NT1
1
Table 4. Electrical Characteristics
(TC = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Off Characteristics
Zero Gate Voltage Drain Current
(VDS = 40 Vdc, VGS = 0 Vdc)
Gate-Source Leakage Current
(VGS = 10 Vdc, VDS = 0 Vdc)
On Characteristics
Gate Threshold Voltage
(VDS = 12.5 Vdc, ID = 60 µA)
Drain-Source On-Voltage
(VGS = 10 Vdc, ID = 500 mAdc)
Dynamic Characteristics
Input Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz)
Output Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz)
Reverse Transfer Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz)
Functional Tests (In Freescale Test Fixture)
Common-Source Amplifier Power Gain
(VDD = 12.5 Vdc, P
= 3 Watts, IDQ = 50 mA, f = 520 MHz)
out
Drain Efficiency
(VDD = 12.5 Vdc, P
= 3 Watts, IDQ = 50 mA, f = 520 MHz)
out
I
I
V
GS(th)
V
DS(on)
C
C
C
G
DSS
GSS
iss
oss
rss
ps
— — 1 µAdc
— — 1 µAdc
1 1.7 2.1 Vdc
— 0.65 — Vdc
— 33 — pF
— 16.5 — pF
— 2.2 — pF
— 15 — dB
η — 65 — %
MRF1513NT1
2
RF Device Data
Freescale Semiconductor
V
GG
C9
C8
+
C7
R4
B1
R3
C17
B2
V
DD
+
C14
C15C16
R1
N1
RF
INPUT
C1
B1, B2 Short Ferrite Beads, Fair Rite Products
C1, C13 240 pF, 100 mil Chip Capacitors
C2, C3, C4, C10,
C11, C12 0 to 20 pF Trimmer Capacitors
C5, C6, C17 120 pF, 100 mil Chip Capacitors
C7, C14 10 mF, 50 V Electrolytic Capacitors
C8, C15 1,200 pF, 100 mil Chip Capacitors
C9, C16 0.1 mF, 100 mil Chip Capacitors
L1 55.5 nH, 5 Turn, Coilcraft
N1, N2 Type N Flange Mounts
R1, R3 15 Ω Chip Resistors (0805)
R2 1 kΩ, 1/8 W Resistor
Z2
Z1
C2
Z3 Z4
C3
#2743021446
C4
C5
Figure 1. 450 - 520 MHz Broadband Test Circuit
R2
Z5 Z6
C6
Z7
DUT
R4 33 kΩ, 1/8 W Resistor
Z1 0.236″ x 0.080″ Microstrip
Z2 0.981″ x 0.080″ Microstrip
Z3 0.240″ x 0.080″ Microstrip
Z4 0.098″ x 0.080″ Microstrip
Z5 0.192″ x 0.080″ Microstrip
Z6, Z7 0.260″ x 0.223″ Microstrip
Z8 0.705″ x 0.080″ Microstrip
Z9 0.342″ x 0.080″ Microstrip
Z10 0.347″ x 0.080″ Microstrip
Z11 0.846″ x 0.080″ Microstrip
Board Glass PTFE, 31 mils, 2 oz. Copper
L1
Z8
Z9 Z10
C11C10
Z11
C13
C12
N2
RF
OUTPUT
TYPICAL CHARACTERISTICS, 450 - 520 MHz
5
4
3
2
, OUTPUT POWER (WATTS)
out
1
P
0
0
0.05
Pin, INPUT POWER (WATTS)
Figure 2. Output Power versus Input Power
450 MHz
0.10
470 MHz
520 MHz
500 MHz
VDD = 12.5 Vdc
0.15 0.20
0
−5
−10
500 MHz
470 MHz
−15
520 MHz
IRL, INPUT RETURN LOSS (dB)
−20
VDD = 12.5 Vdc
450 MHz
10
P
234
, OUTPUT POWER (WATTS)
out
Figure 3. Input Return Loss
versus Output Power
5
RF Device Data
Freescale Semiconductor
MRF1513NT1
3
TYPICAL CHARACTERISTICS, 450 - 520 MHz
16
15
14
13
GAIN (dB)
12
11
10
0
6
5
4
3
, OUTPUT POWER (WATTS)
out
P
2
1
0
450 MHz
520 MHz
1
P
, OUTPUT POWER (WATTS)
out
470 MHz
500 MHz
VDD = 12.5 Vdc
234
Figure 4. Gain versus Output Power
450 MHz
520 MHz
VDD = 12.5 Vdc
Pin = 20.3 dBm
200 600400100
IDQ, BIASING CURRENT (mA)
300 300
500
470 MHz
500 MHz
70
60
50
40
Eff, DRAIN EFFICIENCY (%)
30
20
5
0
2
P
, OUTPUT POWER (WATTS)
out
520 MHz
500 MHz
31
470 MHz
450 MHz
VDD = 12.5 Vdc
45
Figure 5. Drain Efficiency versus Output Power
70
65
520 MHz
470 MHz
60
500 MHz
55
450 MHz
50
Eff, DRAIN EFFICIENCY (%)
45
40
100 600
200
IDQ, BIASING CURRENT (mA)
VDD = 12.5 Vdc
Pin = 20.3 dBm
4000
500
Figure 6. Output Power versus Biasing Current
5
4
3
450 MHz
520 MHz
500 MHz
11
VDD, SUPPLY VOLTAGE (VOLTS)
, OUTPUT POWER (WATTS)
out
P
2
1
0
8
470 MHz
9151610
Figure 8. Output Power versus Supply Voltage
MRF1513NT1
4
Pin = 20.3 dBm
IDQ = 50 mA
1412 13
Figure 7. Drain Efficiency versus
Biasing Current
80
70
60
50
40
Eff, DRAIN EFFICIENCY (%)
30
20
470 MHz
520 MHz
450 MHz
500 MHz
Pin = 20.3 dBm
IDQ = 50 mA
8
91011 16
VDD, SUPPLY VOLTAGE (VOLTS)
12
Figure 9. Drain Efficiency versus Supply Voltage
RF Device Data
Freescale Semiconductor
1513 14
V
GG
C9
C8
+
C7
R4
B1
R3
C16
B2
V
DD
+
C13
C14C15
N1
RF
INPUT
B1, B2 Short Ferrite Bead, Fair Rite Products
C1, C12 330 pF, 100 mil Chip Capacitors
C2, C3, C4,
C10, C11 1 to 20 pF Trimmer Capacitors
C5, C6, C16 120 pF, 100 mil Chip Capacitors
C7, C13 10 µF, 50 V Electrolytic Capacitors
C8, C14 1,200 pF, 100 mil Chip Capacitors
C9, C15 0.1 mF, 100 mil Chip Capacitors
L1 55.5 nH, 5 Turn, Coilcraft
N1, N2 Type N Flange Mounts
R1 15 Ω Chip Resistor (0805)
R2 1 kΩ, 1/8 W Resistor
Z1
C1
Z2 Z3 Z4
C2
#2743021446
C3
C4
Figure 10. 400 - 470 MHz Broadband Test Circuit
R1
C5
R2
Z5 Z6
C6
Z7
DUT
R3 15 Ω Chip Resistor (0805)
R4 33 kΩ, 1/8 W Resistor
Z1 0.253″ x 0.080″ Microstrip
Z2 0.958″ x 0.080″ Microstrip
Z3 0.247″ x 0.080″ Microstrip
Z4 0.193″ x 0.080″ Microstrip
Z5 0.132″ x 0.080″ Microstrip
Z6, Z7 0.260″ x 0.223″ Microstrip
Z8 0.494″ x 0.080″ Microstrip
Z9 0.941″ x 0.080″ Microstrip
Z10 0.452″ x 0.080″ Microstrip
Board Glass PTFE, 31 mils, 2 oz. Copper
L1
Z8 Z10
C10
Z9
C11
C12
N2
RF
OUTPUT
TYPICAL CHARACTERISTICS, 400 - 470 MHz
5
4
3
2
, OUTPUT POWER (WATTS)
out
1
P
0
0 0.080.02
Pin, INPUT POWER (WATTS)
0.06 0.120.04
Figure 11. Output Power versus Input Power
440 MHz
400 MHz
470 MHz
VDD = 12.5 Vdc
0.10
0
−5
−10
−15
IRL, INPUT RETURN LOSS (dB)
−20
VDD = 12.5 Vdc
440 MHz
400 MHz
470 MHz
1
P
20
, OUTPUT POWER (WATTS)
out
3
Figure 12. Input Return Loss
versus Output Power
45
RF Device Data
Freescale Semiconductor
MRF1513NT1
5
TYPICAL CHARACTERISTICS, 400 - 470 MHz
18
17
16
15
GAIN (dB)
14
13
12
0
6
5
4
3
, OUTPUT POWER (WATTS)
out
P
2
1
0
70
470 MHz
400 MHz
440 MHz
VDD = 12.5 Vdc
2
P
, OUTPUT POWER (WATTS)
out
31
4
5
Figure 13. Gain versus Output Power
400 MHz
440 MHz
470 MHz
VDD = 12.5 Vdc
Pin = 18.7 dBm
100 300
200 600400300
IDQ, BIASING CURRENT (mA)
500
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
04
P
out
Figure 14. Drain Efficiency versus Output
70
470 MHz
65
60
440 MHz
55
400 MHz
50
Eff, DRAIN EFFICIENCY (%)
45
40
100 600
IDQ, BIASING CURRENT (mA)
470 MHz
400 MHz
440 MHz
2
, OUTPUT POWER (WATTS)
31
Power
200
4000
VDD = 12.5 Vdc
5
VDD = 12.5 Vdc
Pin = 18.7 dBm
500
5
4
3
2
, OUTPUT POWER (WATTS)
out
P
1
0
8
MRF1513NT1
6
Figure 15. Output Power versus
Biasing Current
400 MHz
12
10 14 15
VDD, SUPPLY VOLTAGE (VOLTS)
1391611
440 MHz
Pin = 18.7 dBm
IDQ = 50 mA
Figure 17. Output Power versus
Supply Voltage
470 MHz
Eff, DRAIN EFFICIENCY (%)
Figure 16. Drain Efficiency versus
Biasing Current
80
70
60
50
40
30
20
8
470 MHz
440 MHz
400 MHz
Pin = 18.7 dBm
IDQ = 50 mA
91011 16
VDD, SUPPLY VOLTAGE (VOLTS)
12
1513 14
Figure 18. Drain Efficiency versus
Supply Voltage
RF Device Data
Freescale Semiconductor
V
GG
C9
C8
+
C7
R4
B1
R3
C17
B2
V
DD
+
C14
C15C16
RF
INPUT
N1
Z1
C1
B1, B2 Short Ferrite Beads, Fair Rite Products
C1, C13 330 pF, 100 mil Chip Capacitors
C2, C4, C10, C12 0 to 20 pF Trimmer Capacitors
C3 12 pF, 100 mil Chip Capacitor
C5 130 pF, 100 mil Chip Capacitor
C6, C17 120 pF, 100 mil Chip Capacitors
C7, C14 10 µF, 50 V Electrolytic Capacitors
C8, C15 1,000 pF, 100 mil Chip Capacitors
C9, C16 0.1 µF, 100 mil Chip Capacitors
C11 18 pF, 100 mil Chip Capacitor
L1 26 nH, 4 Turn, Coilcraft
L2 8 nH, 3 Turn, Coilcraft
L3 55.5 nH, 5 Turn, Coilcraft
C2
L1
C3
#2743021446
Z2
C4
R1
Z3
C5
R2
Z4 Z5
DUT
C6
L4
Z6
Z7
L4 33 nH, 5 Turn, Coilcraft
N1, N2 Type N Flange Mounts
R1 15 W Chip Resistor (0805)
R2 56 W, 1/8 W Chip Resistor
R3 10 W, 1/8 W Chip Resistor
R4 33 kW, 1/8 W Chip Resistor
Z1 0.115″ x 0.080″ Microstrip
Z2 0.230″ x 0.080″ Microstrip
Z3 1.034″ x 0.080″ Microstrip
Z4 0.202″ x 0.080″ Microstrip
Z5, Z6 0.260″ x 0.223″ Microstrip
Z7 1.088″ x 0.080″ Microstrip
Z8 0.149″ x 0.080″ Microstrip
Z9 0.171″ x 0.080″ Microstrip
Z10 0.095″ x 0.080″ Microstrip
Board Glass PTFE, 31 mils, 2 oz. Copper
L2
Z8
C10
L3
C11
Z9 Z10
C12
C13
RF
OUTPUT
N2
Figure 19. 135 - 175 MHz Broadband Test Circuit
TYPICAL CHARACTERISTICS, 135 - 175 MHz
5
4
3
2
, OUTPUT POWER (WATTS)
out
1
P
0
0
Pin, INPUT POWER (WATTS)
Figure 20. Output Power versus Input Power
175 MHz
135 MHz
VDD = 12.5 Vdc VDD = 12.5 Vdc
0.10
155 MHz
0.15
0
−5
−10
−15
IRL, INPUT RETURN LOSS (dB)
0.200.05
−20
1
P
out
135 MHz
155 MHz
175 MHz
20
, OUTPUT POWER (WATTS)
3
45
Figure 21. Input Return Loss
versus Output Power
RF Device Data
Freescale Semiconductor
MRF1513NT1
7
TYPICAL CHARACTERISTICS, 135 - 175 MHz
18
17
16
15
GAIN (dB)
14
13
12
0
6
5
4
, OUTPUT POWER (WATTS)
3
out
P
2
0
135 MHz
155 MHz
175 MHz
VDD = 12.5 Vdc
2
P
, OUTPUT POWER (WATTS)
out
31
4
Figure 22. Gain versus Output Power
175 MHz
155 MHz
135 MHz
VDD = 12.5 Vdc
Pin = 19.5 dBm
200 600400100
IDQ, BIASING CURRENT (mA)
300 100
500 500
70
60
50
40
30
20
Eff, DRAIN EFFICIENCY (%)
10
0
5
0
155 MHz
P
out
135 MHz
175 MHz
3
, OUTPUT POWER (WATTS)
VDD = 12.5 Vdc
4152
Figure 23. Drain Efficiency versus Output
Power
80
75
175 MHz
Eff, DRAIN EFFICIENCY (%)
70
65
60
55
50
200
IDQ, BIASING CURRENT (mA)
300 600
155 MHz
135 MHz
VDD = 12.5 Vdc
Pin = 19.5 dBm
4000
5
4
3
2
, OUTPUT POWER (WATTS)
out
P
1
0
8
MRF1513NT1
8
Figure 24. Output Power versus
Biasing Current
175 MHz
135 MHz
155 MHz
Pin = 19.5 dBm
IDQ = 50 mA
13
10 1514
VDD, SUPPLY VOLTAGE (VOLTS)
1291611
Figure 26. Output Power versus
Supply Voltage
Eff, DRAIN EFFICIENCY (%)
Figure 25. Drain Efficiency versus
Biasing Current
80
70
60
50
40
30
20
9
8
10 14 15
VDD, SUPPLY VOLTAGE (VOLTS)
135 MHz
155 MHz
1211 13 16
175 MHz
Pin = 19.5 dBm
IDQ = 50 mA
Figure 27. Drain Efficiency versus
Supply Voltage
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
8
10
)
2
7
10
MTTF FACTOR (HOURS X AMPS
6
10
90 110 130 150 170 190100 120 140 160 180 200
TJ, JUNCTION TEMPERATURE (°C)
This above graph displays calculated MTTF in hours x ampere
drain current. Life tests at elevated temperatures have correlated to
better than ±10% of the theoretical prediction for metal failure. Divide
MTTF factor by I
Figure 28. MTTF Factor versus Junction Temperature
2
for MTTF in a particular application.
D
210
2
RF Device Data
Freescale Semiconductor
MRF1513NT1
9
f = 520 MHz
450
Zo = 10 Ω
Z
in
f = 520 MHz
ZOL*
450
470
Z
f = 400 MHz
in
f = 400 MHz
470
ZOL*
135
f = 175 MHz
Z
in
f = 175 MHz
ZOL*
135
Zo = 10 Ω
VDD = 12.5 V, IDQ = 50 mA, P
f
MHz
Z
in
Ω
out
= 3 W
ZOL*
Ω
450 4.64 +j5.82 13.11 +j2.15
470 5.42 +j6.34 12.16 +j3.26
500 5.96 +j5.45 11.03 +j5.42
520 4.28 +j4.94 10.99 +j7.18
Zin= Complex conjugate of source
impedance with parallel 15 Ω
resistor and 120 pF capacitor in
series with gate. (See Figure 1).
ZOL* = Complex conjugate of the load
impedance at given output power,
voltage, frequency, and ηD > 50 %.
Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability.
VDD = 12.5 V, IDQ = 50 mA, P
f
MHz
Z
in
Ω
out
400 4.72 +j4.38 12.57 +j1.88
440 4.88 +j6.34 11.21 +j5.87
470 3.22 +j5.24 9.82 +j8.63
Zin= Complex conjugate of source
impedance with parallel 15 Ω
resistor and 130 pF capacitor in
series with gate. (See Figure 10).
ZOL* = Complex conjugate of the load
impedance at given output power,
voltage, frequency, and ηD > 50 %.
Input
Matching
Device
Under Test
Network
= 3 W
ZOL*
Ω
VDD = 12.5 V, IDQ = 50 mA, P
f
MHz
Z
in
Ω
135 16.55 +j1.82 22.01 +j10.32
155 15.59 +j5.38 22.03 +j8.07
175 15.55 +j9.43 22.08 +j6.85
Zin= Complex conjugate of source
impedance with parallel 15 Ω
resistor and 130 pF capacitor in
series with gate. (See Figure 19).
ZOL* = Complex conjugate of the load
impedance at given output power,
voltage, frequency, and ηD > 50 %.
Output
Matching
Network
out
= 3 W
ZOL*
Ω
MRF1513NT1
10
Z
in
ZOL*
Figure 29. Series Equivalent Input and Output Impedance
RF Device Data
Freescale Semiconductor
Table 5. Common Source Scattering Parameters (VDD = 12.5 Vdc)
f
f
f
IDQ = 50 mA
S
11
MHz
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.93 -94 22.09 125 0.044 33 0.77 -81
100 0.81 -131 12.78 101 0.052 6 0.61 -115
200 0.76 -153 6.31 81 0.047 -10 0.59 - 135
300 0.76 -160 3.92 69 0.044 -19 0.64 - 142
400 0.77 -164 2.74 60 0.040 -26 0.70 - 147
500 0.79 -167 1.99 54 0.036 -31 0.75 - 151
600 0.80 -169 1.55 48 0.034 -37 0.80 - 155
700 0.81 -171 1.25 44 0.028 -40 0.82 - 158
800 0.82 -172 1.02 38 0.027 -42 0.86 - 161
900 0.83 -173 0.85 35 0.017 -42 0.88 - 163
1000 0.84 - 175 0.70 29 0.018 -49 0.91 -166
S
21
S
12
IDQ = 500 mA
S
11
MHz
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.84 - 127 32.57 11 2 0.025 17 0.64 -130
100 0.80 -152 17.23 97 0.025 13 0.64 -153
200 0.78 -166 8.62 85 0.025 -9 0.65 - 163
300 0.78 -171 5.58 79 0.023 -9 0.67 - 166
400 0.78 -173 4.08 72 0.022 -9 0.69 - 166
500 0.78 -175 3.14 68 0.020 -10 0.71 - 167
600 0.79 -176 2.55 63 0.022 -15 0.74 - 168
700 0.79 -177 2.14 60 0.019 -20 0.76 - 168
800 0.80 -178 1.80 54 0.018 -31 0.79 - 170
900 0.81 -178 1.54 51 0.015 -25 0.80 - 170
1000 0.82 - 179 1.31 46 0.012 -36 0.81 -172
S
21
S
12
S
22
S
22
IDQ = 1 A
S
11
MHz
|S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ
50 0.84 - 129 32.57 111 0.023 24 0.61 - 137
100 0.80 -153 17.04 97 0.024 13 0.64 -156
200 0.78 -167 8.52 85 0.023 5 0.65 - 165
300 0.77 -172 5.53 79 0.020 -7 0.67 - 167
400 0.77 -174 4.06 73 0.020 -11 0.69 -167
500 0.78 -175 3.13 69 0.021 -9 0.72 - 167
600 0.78 -177 2.54 64 0.017 -26 0.74 - 168
700 0.78 -177 2.13 60 0.017 -14 0.75 - 168
800 0.79 -178 1.81 55 0.015 -23 0.78 - 170
900 0.80 -178 1.54 51 0.013 -31 0.79 - 170
1000 0.80 - 179 1.30 46 0.011 -17 0.80 -172
S
21
S
12
S
22
MRF1513NT1
RF Device Data
Freescale Semiconductor
11
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
This device is a common - source, RF power, N- Channel
enhancement mode, Lateral M
ield- Effect Transistor (MOSFET). Freescale Application
F
Note AN211A, “FETs in Theory and Practice”, is suggested
reading for those not familiar with the construction and characteristics of FETs.
This surface mount packaged device was designed primarily for VHF and UHF portable power amplifier applications. Manufacturability is improved by utilizing the tape and
reel capability for fully automated pick and placement of
parts. However, care should be taken in the design process
to insure proper heat sinking of the device.
The major advantages of Lateral RF power MOSFETs include high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely mismatched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate - to -drain (C
gate - to - source (C
). The PN junction formed during fab-
gs
rication of the RF MOSFET results in a junction capacitance
from drain- to - source (C
terized as input (C
(C
) capacitances on data sheets. The relationships be-
rss
ds
), output (C
iss
tween the inter-terminal capacitances and those given on
data sheets are shown below. The C
two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate.
In the latter case, the numbers are lower. However, neither
method represents the actual operating conditions in RF applications.
C
gd
Gate
C
gs
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full-on condition. This on - resistance, R
in the linear region of the output characteristic and is specified at a specific gate-source voltage and drain current. The
etal- Oxide Semiconductor
), and
gd
). These capacitances are charac-
) and reverse transfer
oss
can be specified in
iss
Drain
C
= Cgd + C
C
ds
Source
iss
C
oss
C
= C
rss
= C
gd
gd
DS(on)
gs
+ C
ds
, occurs
drain- source voltage under these conditions is termed
V
. For MOSFETs, V
DS(on)
has a positive temperature
DS(on)
coefficient at high temperatures because it contributes to the
power dissipation within the device.
BV
values for this device are higher than normally re-
DSS
quired for typical applications. Measurement of BV
DSS
is not
recommended and may result in possible damage to the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide.
The DC input resistance is very high - on the order of 10
9
Ω
— resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate- to - source threshold voltage,
V
.
GS(th)
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open - circuited or floating should be avoided. These conditions can
result in turn- on of the devices due to voltage build - up on
the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate - to -source. If gate protection is required, an external zener diode is recommended.
Using a resistor to keep the gate - to -source impedance low
also helps dampen transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate- drain capacitance. If the
gate - to - source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate- threshold voltage
and turn the device on.
DC BIAS
Since this device is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the
source. RF power FETs operate optimally with a quiescent
drain current (I
This device was characterized at I
), whose value is application dependent.
DQ
= 50 mA, which is the
DQ
suggested value of bias current for typical applications. For
special applications such as linear amplification, I
DQ
may
have to be selected to optimize the critical parameters.
The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of this device may be controlled to some degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is
very dependent on frequency and load line.
MRF1513NT1
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RF Device Data
Freescale Semiconductor
MOUNTING
The specified maximum thermal resistance of 4°C/W assumes a majority of the 0.065″ x 0.180″ source contact on
the back side of the package is in good contact with an appropriate heat sink. As with all RF power devices, the goal of
the thermal design should be to minimize the temperature at
the back side of the package. Refer to Freescale Application
Note AN4005/D, “Thermal Management and Mounting Method for the PLD-1.5 RF Power Surface Mount Package” for
additional information.
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for this device. For examples
see Freescale Application Note AN721, “Impedance
Matching Networks Applied to RF Power Transistors.”
Large - signal impedances are provided, and will yield a good
first pass approximation.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of this device
yields a device capable of self oscillation. Stability may be
achieved by techniques such as drain loading, input shunt
resistive loading, or output to input feedback. The RF test fixture implements a parallel resistor and capacitor in series
with the gate, and has a load line selected for a higher efficiency, lower gain, and more stable operating region.
Two- port stability analysis with this device’s
S- parameters provides a useful tool for selection of loading
or feedback circuitry to assure stable operation. See Freescale Application Note AN215A, “RF Small - Signal Design
Using Two- Port Parameters” for a discussion of two port
network theory and stability.
RF Device Data
Freescale Semiconductor
MRF1513NT1
13
PACKAGE DIMENSIONS
B
ZONE V
ZONE W
A
F
3
0.095
2.41
0.146
3.71
0.115
2.92
21
D
R
L
0.115
2.92
0.020
4
N
0.35 (0.89) X 45 5
K
Q
U
H
4
1
3
G
ZONE X
2
S
VIEW Y- Y
C
__
"
P
YY
NOTES:
1. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1984.
2. CONTROLLING DIMENSION: INCH
3. RESIN BLEED/FLASH ALLOWABLE IN ZONE V, W,
AND X.
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4. SOURCE
CASE 466- 03
ISSUE D
PLD- 1.5
10 DRAFT
_
E
SOLDER FOOTPRINT
DIM MIN MAX MIN MAX
A 0.255 0.265 6.48 6.73
B 0.225 0.235 5.72 5.97
C 0.065 0.072 1.65 1.83
D 0.130 0.150 3.30 3.81
E 0.021 0.026 0.53 0.66
F 0.026 0.044 0.66 1.12
G 0.050 0.070 1.27 1.78
H 0.045 0.063 1.14 1.60
J 0.160 0.180 4.06 4.57
K 0.273 0.285 6.93 7.24
L 0.245 0.255 6.22 6.48
N 0.230 0.240 5.84 6.10
P 0.000 0.008 0.00 0.20
Q 0.055 0.063 1.40 1.60
R 0.200 0.210 5.08 5.33
S 0.006 0.012 0.15 0.31
U 0.006 0.012 0.15 0.31
ZONE V 0.000 0.021 0.00 0.53
ZONE W 0.000 0.010 0.00 0.25
ZONE X 0.000 0.010 0.00 0.25
0.51
inches
mm
MILLIMETERSINCHES
PLASTIC
MRF1513NT1
14
RF Device Data
Freescale Semiconductor
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process.
Application Notes
• AN211A: Field Effect Transistors in Theory and Practice
• AN215A: RF Small- Signal Design Using Two - Port Parameters
• AN721: Impedance Matching Networks Applied to RF Power Transistors
• AN4005: Thermal Management and Mounting Method for the PLD 1.5 RF Power Surface Mount Package
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision Date Description
10 Feb. 2008 • Changed DC Bias IDQ value from 150 to 50 to match Functional Test IDQ specification, p. 12
• Added Product Documentation and Revision History, p. 15
RF Device Data
Freescale Semiconductor
MRF1513NT1
15
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MRF1513NT1
Document Number: MRF1513N
Rev. 10, 2/2008
16
RF Device Data
Freescale Semiconductor
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