Freescale MCF51JM128 DATA SHEET
Freescale Semiconductor
80 LQFP
14 mm 14 mm
64 LQFP
10 mm 10 mm
64 QFP
14 mm 14 mm
44 LQFP
10 mm 10 mm
Data Sheet: Technical Data
MCF51JM128 ColdFire
Microcontroller
The MCF51JM128 is a member of the ColdFire family of
32-bit reduced instruction set computing (RISC)
microprocessors. This document provides an overview of the
MCF51JM128 series, focusing on its highly integrated and
diverse feature set.
The MCF51JM128 series is based on the V1 ColdFire core
and operates at processor core speeds up to 50.33 MHz. As
part of Freescale’s Controller Continuum
upgrade for designs based on the MC9S08JM60 series of 8-bit
microcontrollers.
®
, it is an ideal
Document Number: MCF51JM128
Rev. 4, 05/2012
MCF51JM128
The MCF51JM128 features the following functional units:
• V1 ColdFire core with background debug module
• Up to 128 KB of flash memory
• Up to 16 KB of static RAM (SRAM)
• Multipurpose clock generator (MCG)
• Dual-role Universal Serial Bus On-The-Go device
(USBOTG)
• Controller-area network (MSCAN)
• Cryptographic acceleration unit (CAU)
• Random number generator accelerator (RNGA)
• Analog comparators (ACMP)
• Analog-to-digital converter (ADC) with up to 12 channels
• Two Inter-integrated circuit (IIC) modules
• Two serial peripheral interfaces (SPI)
• Two serial communications interfaces (SCI)
• Carrier modulation timer (CMT)
• Eight-channel timer/pulse-width modulators (TPM)
• Real-time counter (RTC)
• 66 general-purpose input/output (GPIO) modules plus
Interrupt request input
• Eight keyboard interrupts (KBI)
• 16-bit Rapid GPIO
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008-2012. All rights reserved.
Table of Contents
1 MCF51JM128 Family Configurations . . . . . . . . . . . . . . . . . . . .3
1.1 Device Comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.4 Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.5 Pinouts and Packaging. . . . . . . . . . . . . . . . . . . . . . . . .10
2 Preliminary Electrical Characteristics . . . . . . . . . . . . . . . . . . .15
2.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .15
2.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .15
2.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .16
2.4 Electrostatic Discharge (ESD) Protection Characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
2.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
2.6 Supply Current Characteristics. . . . . . . . . . . . . . . . . . .21
2.7 Analog Comparator (ACMP) Electricals . . . . . . . . . . . .23
2.8 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .23
2.9 External Oscillator (XOSC) Characteristics . . . . . . . . .26
2.10 MCG Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .27
2.11 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
2.12 SPI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
2.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.14 USB Electricals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.15 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
3 Mechanical Outline Drawings. . . . . . . . . . . . . . . . . . . . . . . . .36
3.1 80-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
3.2 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
3.3 64-pin QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
3.4 44-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
4 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
List of Figures
Figure 1.MCF51JM128 Block Diagram. . . . . . . . . . . . . . . . . . . . 4
Figure 2.80-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 3.64-pin QFP and LQFP . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4.44-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5.Typical Low-side Drive (sink) characteristics – High Drive
(PTxDSn = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 6.Typical Low-side Drive (sink) characteristics – Low Drive
(PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 7.Typical High-side Drive (source) characteristics – High
Drive (PTxDSn = 1). . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8.T ypical High-side Drive (source) characteristics – Low Drive
(PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 9.ADC Input Impedance Equivalency Diagram . . . . . . . 24
Figure 10.Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11.IRQ/KBIPx Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 12.Timer External Clock. . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 13.Timer Input Capture Pulse. . . . . . . . . . . . . . . . . . . . . 30
Figure 14.SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . 32
Figure 15.SPI Master Timing (CPHA = 1) . . . . . . . . . . . . . . . . . 32
Figure 16.SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . 33
Figure 17.SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . 33
Figure 18.80-pin LQFP Diagram - I . . . . . . . . . . . . . . . . . . . . . . 36
Figure 19.80-pin LQFP Diagram - II. . . . . . . . . . . . . . . . . . . . . . 37
Figure 20.80-pin LQFP Diagram - III . . . . . . . . . . . . . . . . . . . . . 38
Figure 21.64-pin LQFP Diagram - I . . . . . . . . . . . . . . . . . . . . . . 39
Figure 22.64-pin LQFP Diagram - II. . . . . . . . . . . . . . . . . . . . . . 40
Figure 23.64-pin LQFP Diagram - III . . . . . . . . . . . . . . . . . . . . . 41
Figure 24.64-pin QFP Diagram - I . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 25.64-pin QFP Diagram - II. . . . . . . . . . . . . . . . . . . . . . . 43
Figure 26.64-pin QFP Diagram - III . . . . . . . . . . . . . . . . . . . . . . 44
Figure 27.44-pin LQFP Diagram - I . . . . . . . . . . . . . . . . . . . . . . 45
Figure 28.44-pin LQFP Diagram - II. . . . . . . . . . . . . . . . . . . . . . 46
Figure 29.44-pin LQFP Diagram - III . . . . . . . . . . . . . . . . . . . . . . 47
List of Tables
Table 1. MCF51JM128 Series Device Comparison . . . . . . . . . . 3
Table 2. MCF51JM128 Series Functional Units . . . . . . . . . . . . . 5
Table 3. Orderable Part Number Summary. . . . . . . . . . . . . . . . . 8
Table 4. Pin Assignments by Package and Pin Sharing Priority 12
Table 5. Parameter Classifications . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . 16
Table 7. Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 16
Table 8. ESD and Latch-up Test Conditions . . . . . . . . . . . . . . . 17
Table 9. ESD and Latch-Up Protection Characteristics. . . . . . . 18
Table 10.DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 11. Supply Current Characteristics. . . . . . . . . . . . . . . . . . 21
Table 12.Analog Comparator Electrical Specifications. . . . . . . . 23
Table 13.5 Volt 12-bit ADC Operating Conditions . . . . . . . . . . . 23
T able14.5 Volt 12-bit ADC Characteristics (VREFH = VDDA, VREFL
= VSSA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 15.Oscillator Electrical Specifications (Temperature Range =
–40 to 105×C Ambient) . . . . . . . . . . . . . . . . . . . . . . . . 26
T able16.MCG Frequency Specifications (T emperature Range = –40
to 125×C Ambient) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 17.Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 18.TPM Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 19.MSCAN Wake-up Pulse Characteristics . . . . . . . . . . . 30
Table 20.SPI Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 21.Flash Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 22.Internal USB 3.3V Voltage Regulator Characteristics . 35
Table 23.Internal Revision History . . . . . . . . . . . . . . . . . . . . . . . 50
Table 24.Changes Between Revisions. . . . . . . . . . . . . . . . . . . . 51
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor2
1 MCF51JM128 Family Configurations
1.1 Device Comparison
The MCF51JM128 series consists of the devices compared in Table 1.
Table 1. MCF51JM128 Series Device Comparison
MCF51JM128 Family Configurations
MCF51JM128 MCF51JM64
Feature
80-pin 64-pin 44-pin 80-pin 64-pin 44-pin 80-pin 64-pin 44-pin
Flash memory size (KB) 128 64 32
RAM size (KB) 16 16 16
V1 ColdFire core with BDM (background
debug module)
ACMP (analog comparator) Yes
ADC channels (12-bit) 12 8 12 8 12 8
CAN (controller area network) Yes Yes No Yes Yes No Yes Yes No
RNGA + CAU Yes
CMT (carrier modulator timer) Yes
COP (computer operating properly) Yes
IIC1 (inter-integrated circuit) Yes
IIC2 Yes No Yes No Yes No
IRQ (interrupt request input) Yes
KBI (keyboard interrupts) 8 8 6 8 86886
LVD (low-voltage detector) Yes
Yes
1
MCF51JM32
MCG (multipurpose clock generator) Yes
Port I/O
RGPIO (rapid general-purpose I/O) 16 6 0 16 6 0 16 6 0
RTC (real-time counter) Yes
SCI1 (serial communications interface) Yes
SCI2 Yes
SPI1 (serial peripheral interface) Yes
SPI2 Yes
TPM1 (timer/pulse-width modulator)
channels
TPM2 channels 2
USBOTG (USB On-The-G o du a l -rol e
controller)
XOSC (crystal oscillator) Yes
1
Freescale Semiconductor 3
2
Only existed on speci al pa rt number
66 51 33 66 51 33 66 51 33
664664664
Yes
MCF51JM128 ColdFire Microcontroller, Rev. 4
MCF51JM128 Family Configurations
Port B
PTB3/SS2/ADP3
PTB4/KBIP4/ADP4
PTB5/KBIP5/ADP5
PTB2/SPSCK2/ADP2
PTB1/MOSI2/ADP1
PTB0/MISO2/ADP0
PTB6/ADP6
PTB7/ADP7
Port D
PTD3/KBIP3/ADP10
PTD4/ADP11
PTD5
PTD2/KBIP2/ACMPO
PTD1/ACMP–/ADP9
PTD0/ACMP+/ADP8
PTD6
PTD7
Port C
PTC3/TXD2
PTC4
PTC5/RXD2
PTC2/IRO
PTC1/SDA1
PTC0/SCL1
PTC6/RXCAN
PTC7
Port F
PTF3/TPM1CH5
PTF4/TPM2CH0
PTF5/TPM2CH1
PTF2/TPM1CH4
PTF1/TPM1CH3
PTF0/TPM1CH2
PTF6
PTF7/TXCAN
Port E
PTE3/TPM1CH1
PTE4/MISO1
PTE5/MOSI1
PTE2/TPM1CH0
PTE1/RXD1
PTE0/TXD1
PTE6/SPSCK1
PTE7/SS1
Port G
PTG3/KBIP7
PTG4/XTAL
PTG5/EXTAL
PTG2/KBIP6
PTG1/KBIP1
PTG0/KBIP0
PTG6
PTG7
Port H
PTH3/RGPIO9
PTH4/RGPIO10
PTH2/RGPIO8
PTH1/SCL2
PTH0/SDA2
Port J
PTJ3/RGPIO14
PTJ4/RGPIO15
PTJ2/RGPIO13
PTJ1/RGPIO12
PTJ0/RGPIO11
Port A
PTA3/RGPIO3
PTA4/RGPIO4
PTA5/RGPIO5
PTA2/RGPIO2
PTA1/RGPIO1
PTA0/RGPIO0
PTA6/RGPIO6
PTA7/RGPIO7
ADC
VREFH
VREFL
VDDAD
VSSAD
CAN
TPMCLK
TPM1
TPMCLK
SPI1
SCI1
MCG
IIC2
USB
VREG
SYSCTL
V1 ColdFire core
CMT
Port C:
IRO
Port H:
SCL2
SDA2
Port G:
EXTAL
XTAL
Port E:
RXD1
TXD1
Port E:
SS1
SPSCK1
MOSI1
MISO1
Port F:
TPM1CH5
TPM1CH4
TPM1CH3
TPM1CH2
Port E:
TPM1CH1
TPM1CH0
TPM2
Port F:
TPM2CH1
TPM2CH0
Port C:
RXCAN
Port F:
TXCAN
IIC1
Port C:
SDA1
SCL1
SCI2
Port C:
RXD2
TXD2
Port B:
ADP7
ADP6
ADP5
ADP4
ADP3
ADP2
ADP1
ADP0
Port D:
ADP11
ADP10
ADP9
ADP8
SPI2
Port B:
SS2
SPSCK2
MOSI2
MISO2
KBI
Port B:
KBIP5
KBIP4
Port D:
KBIP3
KBIP2
Port G:
KBIP7
KBIP6
KBIP1
KBIP0
RAM
RGPIO
Port J:
RGPIO15
RGPIO14
RGPIO13
RGPIO12
RGPIO11
Port H:
RGPIO10
RGPIO9
RGPIO8
Port A:
RGPIO7
RGPIO6
RGPIO5
RGPIO4
RGPIO3
RGPIO2
RGPIO1
RGPIO0
ACMP
Port D:
ACMPO
ACMP–
ACMP+
RTC
INTC
RNGA
IRQ/TPMCLK
VREFH
VREFL
VDDA
VSSA
BKGD/MS
RESET
VDD
VSS
VSS
USBDN
USBDP
VUSB33
FLASH
128 or 64 KB
16 or 8 KB
VDD
XOSC
BDM
DBG
CAU
COP
IRQ
LVD
2
Up to 16 pins on Ports A, H, and J are shared with the ColdFire Rapid GPIO module.
1.2 Block Diagram
Figure 1 shows the connections between the MCF51JM128 series pins and modules.
Figure 1. MCF51JM128 Block Diagram
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor4
MCF51JM128 Family Configurations
1.3 Features
Table 2 describes the functional units of the MCF51JM128 series.
Table 2. MCF51JM128 Series Functional Units
Unit Function
CF1CORE (V1 ColdFire core) Executes programs and interrupt handlers
BDM (background debug module) Provides a single-pin debugging interface (part of the V1 ColdFire core)
DBG (debug) Provides debugging and emulation capabilities (part of the V1 ColdFire core)
SYSCTL (system control) Provides LVD, COP, external interrupt request, and so on
FLASH (flash memory) Provides storage for program code and constants
RAM (random-access memory) Provides storage for program code, constants, and variables
RGPIO (rapid general-purpose input/output) Allows I/O port access at CPU clock speeds
VREG (voltage regulator) Controls power management throughout the device
USBOTG (USB On-The-Go) Supports the USB On-The-Go dual-role controller
ADC (analog-to-digital converter) Measures analog voltages at up to 12 bits of resolution
TPM1, TPM2 (timer/pulse-width modulators) Provide a variety of timing-based features
CF1_INTC (interrupt controller) Controls and prioritizes all device interrupts
CAU (cryptographic acceleration unit) Co-processor support for DES, 3DES, AES, MD5, and SHA-1
RNGA (random number generator accelerator) 32-bit random number generator that complies with FIPS-140
RTC (real-time counter) Provides a constant-time base with optional interrupt
ACMP (analog comparator) Compares two analog inputs
CMT (carrier modulator timer) Infrared output used for the Remote Controller
IIC1, IIC2 (inter-integrated circuits) Supports the standard IIC communications protoc ol
KBI (keyboard interrupt) Provides pin interrupt capabilities
MCG (multipurpose clock generator) Provides clocking options for the device, including a phase-locked loop (PLL)
and frequency-locked loop (FLL) for multiplying slower reference clock
sources
XOSC (crystal oscillator) Supports low/high range crystals
CAN (controller area network) Supports standard CAN communications protocol
SCI1, SCI2 (serial communications interfaces) Serial communications UARTs that can support RS-232 and LIN protocols
SPI1, SPI2 (serial peripheral interfaces) Provide a 4-pin synchronous serial interface
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor 5
MCF51JM128 Family Configurations
1.3.1 Feature List
• 32-bit Version 1 ColdFire Central Processor Unit (CPU)
— Up to 50.33 MHz at 2.7 V – 5.5 V
— Performance (Dhrystone 2.1):
– 0.94 Dhrystone 2.1 MIPS per MHz when running from in tern al RAM
– 0.76 Dhrystone 2.1 MIPS per MHz when running from flash
— Implements Instruction Set Revision C (ISA_C)
— Supports up to 30 peripheral interrupt requests and seven software interrupts
• On-chip memory
— Up to 128 KB Flash memory with read/program/erase over full operating voltage and temperature range
— Up to 16 KB static random access memory (RAM)
— Security circuitry to prevent unauthorized access to RAM and flash contents
• Power-saving modes
— Two low-power stop plus wait modes
— Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents; this behavior
allows clocks to remain enabled to specific perhipherals in Stop3 mode
— Very lower power real-time counter for use in run, wait, and stop modes with internal and external clock sources
• Four Clock Source Options
— Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz
or 1 MHz to 16 MHz
— FLL/PLL controlled by internal or external reference
— Trimmable internal reference allows 0.2% resolution and 2% deviation
• System protection features
— W atchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source
or bus clock
— Low-voltage detection with reset or interrupt; selectable trip points
— Illegal opcode and illegal address detection with programmable reset or exception response
— Flash block protection
• Debug support
— Single-wire Background debug interface
— 4 Program Counters plus two address (optional data) breakpoint registers with programmable 1- or 2-level trigger
response
— 64-entry processor status and debug data trace buffer with programmable start/stop conditions
• Universal Serial Bus (USB) On-The-Go dual-role controller
— Full-speed USB device controller
– Fully compliant with USB specificatio n 1.1 and 2.0
– 16 bidirectional endpoints, with double buffering to provide the maximum throughput
– Supports control, bu lk, interrupt, and isochronous endpoints
– Supports bus-powered capabi lit y with low-power consumption
— Full-speed / low-speed host controller
– Host mode allows control, bulk, interrupt, and isochronous transfers
— OTG protocol logic
— On-chip USB transceiver
— On-chip 3.3 V USB regulator and pull-up resistors save system cost
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor6
MCF51JM128 Family Configurations
• Controller area network (MSCAN)
— Implementation of the CAN protocol — Version 2.0A/B
— Five receive buffers with FIFO storage scheme
— Three transmit buffers with internal prioritization using a “local priority” concept
— Flexible maskable identifier filter programmable as 2x32-bit, 4x16-bit, or 8x8-bit
— Programmable wakeup functionality with integrated low-pass filter
— Programmable loopback mode supports self-test operation
— Programmable bus-off recovery functionality
— Internal timer for time-stamping of received and transmitted messages
• Cryptographic acceleration unit (CAU)
— Co-processor support of DES, 3DES, AES, MD5, and SHA-1
• Random number generator accelerator (RNGA)
— 32-bit random number generator that complies with FIPS-140
• Analog-to-digital converter (ADC)
— 12-channel, 12-bit resolution
— Output formatted in 12-, 10-, or 8-bit right-justified format
— Single or continuous conversion, and selectable asynchronous hardware conversion trigger
— Operation in Stop3 mode
— Automatic compare function
— Internal temperature sensor
• Analog comparators (ACMP)
— Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator output
— Option to compare to fixed internal bandgap reference voltage
— Option to route output to TPM module
— Operation in Stop3 mode
• Inter-integrated circuit (IIC)
— Up to 100 kbps with maximum bus loading
— Multi-master operation
— Programmable slave address
— Supports broadcast mode and 10-bit address extension
• Serial communications interfaces (SCI)
— T wo SCIs with full-duplex, non-return-to-zero (NRZ) format
— LIN master extended break generation
— LIN slave extended break detection
— Programmable 8-bit or 9-bit character length
— Wake up on active edge
• Serial peripheral interfaces (SPI)
— Two serial peripheral interfaces with full-duplex or single-wire bidirectional
— Double-buffered transmit and receive
— Programmable transmit bit rate, phase, polarity, and Slave Select output
— MSB-first or LSB-first shifting
• Timer/pulse width modulator (TPM)
— 16-bit free-running or modulo up/down count operation
— Up to eight channels, where each channel can be an input capture, output compare, or edge-aligned PWM
— One interrupt per channel plus terminal count interrupt
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor 7
MCF51JM128 Family Configurations
•RTC
— 8-bit modulus counter with binary- or decimal-based prescaler
— External clock source for precise time base, time-of-day, calendar or task scheduling functions
— Free running on-chip low power os cil lator (1 kHz) for cyclic wake-up without external components
• Carrier modulator timer (CMT)
— carrier generator, modulator, and transmitter drive the infrared out (IRO) pin
— operation in independent high/low time control, baseband, FSK, and direct IRO control modes
• Input/Output
— 66 GPIOs
— Eight keyboard interrupt pins with selectable polarity
— Hysteresis and configurable pull-up device on all input pins; configurable slew rate and drive strength on all output
pins
— 16 bits of Rapid GPIO connected to the processor’s local 32-bit platform bus with set, clear, and faster toggle
functionality
1.4 Part Numbers
Table 3. Orderable Part Number Summary
Freescale Part
Number
MCF51JM128EVLK MCF51JM128 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM128VLK MCF51JM128 ColdFire Microcontroller 128 / 16 80 LQFP –40 to +105 C
MCF51JM128EVLH MCF51JM128 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM128VLH MCF51JM128 ColdFire Microcontroller 128 / 16 64 LQFP –40 to +105 C
MCF51JM128EVQH MCF51JM128 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM128VQH MCF51JM128 ColdFire Microcontroller 128 / 16 64 QFP –40 to +105 C
MCF51JM128EVLD MCF51JM128 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM128VLD MCF51JM128 ColdFire Microcontroller 128 / 16 44 LQFP –40 to +105 C
MCF51JM64EVLK MCF51JM64 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM64VLK MCF51JM64 ColdFire Microcontroller 64 / 16 80 LQFP –40 to +105 C
MCF51JM64EVLH MCF51JM64 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM64VLH MCF51JM64 ColdFire Microcontroller 6 4 / 16 64 LQFP –40 to +105 C
Description
Flash / SRAM
(KB)
128 / 16 80 LQFP –40 to +105 C
128 / 16 64 LQFP –40 to +105 C
128 / 16 64 QFP –40 to +105 C
128 / 16 44 LQFP –40 to +105 C
64 / 16 80 LQFP –40 to +105 C
64 / 16 64 LQFP –40 to +105 C
Package Temperature
MCF51JM64EVQH MCF51JM64 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM64VQH MCF51JM64 ColdFire Microcontroller 64 / 16 64 QFP –40 to +105 C
MCF51JM128 ColdFire Microcontroller, Rev. 4
64 / 16 64 QFP –40 to +105 C
Freescale Semiconductor8
MCF51JM128 Family Configurations
Table 3. Orderable Part Number Summary (continued)
MCF51JM64EVLD MCF51JM64 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM64VLD MCF51JM64 ColdFire Microcontroller 6 4 / 16 44 LQFP –40 to +105 C
MCF51JM32EVLK MCF51JM32 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM32VLK MCF51JM32 ColdFire Microcontroller 32 / 16 80 LQFP –40 to +105 C
MCF51JM32EVLH MCF51JM32 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM32VLH MCF51JM32 ColdFire Microcontroller 3 2 / 16 64 LQFP –40 to +105 C
MCF51JM32EVQH MCF51JM32 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM32VQH MCF51JM32 ColdFire Microcontroller 32 / 16 64 QFP –40 to +105 C
MCF51JM32EVLD MCF51JM32 ColdFire Microcontroller
with CAU and RNGA Enabled
MCF51JM32VLD MCF51JM32 ColdFire Microcontroller 3 2 / 16 44 LQFP –40 to +105 C
64 / 16 44 LQFP –40 to +105 C
32 / 16 80 LQFP –40 to +105 C
32 / 16 64 LQFP –40 to +105 C
32 / 16 64 QFP –40 to +105 C
32 / 16 44 LQFP –40 to +105 C
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor 9
MCF51JM128 Family Configurations
PTC4
IRQ / TPMCLK
RESET
PTF0 / TPM1CH2
PTF1 / TPM1CH3
PTF2 / TPM1CH4
PTF3 / TPM1CH5
PTF4 / TPM2CH0
PTC6 / RXCAN
PTF7 / TXCAN
PTF5 / TPM2CH1
PTF6
PTE0 / TXD1
PTE1 / RXD1
PTE2 / TPM1CH0
PTE3 / TPM1CH1
PTC7
PTH0 / SDA2
PTH1 / SCL2
PTH2 / RGPIO8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21222324252627282930313233343536373839
40
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80797877767574737271706968676665646362
61
PTH3 / RGPIO9
PTH4 / RGPIO10
PTE4 / MISO1
PTE5 / MOSI1
PTE6 / SPSCK1
PTE7 / S
S1
VDD
VSS
USBDN
USBDP
VUSB33
PTG0 / KBIP0
PTG1 / KBIP1
PTA0 / RGPIO0
PTA1 / RGPIO1
PTA2 / RGPIO2
PTA3 / RGPIO3
PTA4 / RGPIO4
PTA5 / RGPIO5
PTA6 / RGPIO6
PTJ3 / RGPIO14
PTJ2 / RGPIO13
PTJ1 / RGPIO12
PTJ0 / RGPIO11
PTD2 / KBIP2 / ACMPO
VSSA
VREFL
VREFH
VDDA
PTD1 / ADP9 / ACMP–
PTD0 / ADP8 / ACMP+
PTB7 / ADP7
PTB6 / ADP6
PTB5 / KBIP5 / ADP5
PTB4 / KBIP4 / ADP4
PTB3 /
SS2 /ADP3
PTB2 / SPSCK2 / ADP2
PTB1 / MOSI2 / ADP1
PTB0 / MISO2 / ADP0
PTA7 / RGPIO7
PTC5 / RXD2
PTC3 / TXD2
PTC2 / IRO
PTC1 / SDA1
PTC0 / SCL1
PTG7
PTG6
VDD
VSS
PTG5 / EXTAL
PTG4 / XTAL
BKGD/MS
PTG3 / KBIP7
PTG2 / KBIP6
PTD7
PTD6
PTD5
PTD4 / ADP11
PTD3 / KBIP3 / ADP10
PTJ4 / RGPIO15
1.5 Pinouts and Packaging
Figure 2 shows the pinout of the 80-pin LQFP.
MCF51JM128 ColdFire Microcontroller, Rev. 4
Figure 2. 80-pin LQFP
Freescale Semiconductor10
Figure 3 shows the pinout of the 64-pin LQFP and QFP.
PTC4
IRQ / TPMCLK
RESET
PTF0 / TPM1CH2
PTF1 / TPM1CH3
PTF2 / TPM1CH4
PTF3 / TPM1CH5
PTF4 / TPM2CH0
PTC6 / RXCAN
PTF7 / TXCAN
PTF5 / TPM2CH1
PTF6
PTE0 / TXD1
PTE1 / RXD1
PTE2 / TPM1CH0
PTE3 / TPM1CH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
171819202122232425262728293031
32
PTE4 / MISO1
PTE5 / MOSI1
PTE6 / SPSCK1
PTE7 / S
S1
VDD
VSS
USBDN
USBDP
VUSB33
PTG0 / KBIP0
PTG1 / KBIP1
PTA0 / RGPIO0
PTA1 / RGPIO1
PTA2 / RGPIO2
PTA3 / RGPIO3
PTA4 / RGPIO4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PTD2 / KBIP2 / ACMPO
VSSA
VREFL
VREFH
VDDA
PTD1 / ADP9 / ACMP–
PTD0 / ADP8 / ACMP+
PTB7 / ADP7
PTB6 / ADP6
PTB5 / KBIP5 / ADP5
PTB4 / KBIP4 / ADP4
PTB3 / S
S2 /ADP3
PTB2 / SPSCK2 / ADP2
PTB1 / MOSI2 / ADP1
PTB0 / MISO2 / ADP0
PTA5 / RGPIO5
646362616059585756555453525150
49
PTC5 / RXD2
PTC3 / TXD2
PTC2 / IRO
PTC1 / SDA1
PTC0 / SCL1
VSS
PTG5 / EXTAL
PTG4 / XTAL
BKGD/MS
PTG3 / KBIP7
PTG2 / KBIP6
PTD7
PTD6
PTD5
PTD4 / ADP11
PTD3 / KBIP3 / ADP10
MCF51JM128 Family Configurations
MCF51JM128 ColdFire Microcontroller, Rev. 4
Figure 3. 64-pin QFP and LQFP
Freescale Semiconductor 11
MCF51JM128 Family Configurations
1
2
3
4
5
6
7
8
9
10
11
1213141516171819202122
33
32
31
30
29
28
27
26
25
24
23
4443424140393837363534
PTC4
IRQ / TPMCLK
RESET
PTF0 / TPM1CH2
PTF1 / TPM1CH3
PTF4 / TPM2CH0
PTF5 / TPM2CH1
PTE0 / TXD1
PTE1 / RXD1
PTE2 / TPM1CH0
PTE3 / TPM1CH1
PTE4 / MISO1
PTE5 / MOSI1
PTE6 / SPSCK1
PTE7 / S
S1
VDD
VSS
USBDN
USBDP
VUSB33
PTG0 / KBIP0
PTG1 / KBIP1
PTD2 / KBIP2 / ACMPO
VSSA / VREFL
VDDA / VREFH
PTD1 / ADP9 / ACMP–
PTD0 / ADP8 / ACMP+
PTB5 / KBIP5 / ADP5
PTB4 / KBIP4 / ADP4
PTB3 / S
S2 /ADP3
PTB2 / SPSCK2 / ADP2
PTB1 / MOSI2 / ADP1
PTB0 / MISO2 / ADP0
PTC5 / RXD2
PTC3 / TXD2
PTC2 / IRO
PTC1 / SDA1
PTC0 / SCL1
VSS
PTG5 / EXTAL
PTG4 / XTAL
BKGD / MS
PTG3 / KBIP7
PTG2 / KBIP6
Figure 4 shows the pinout of the 44-pin LQFP.
Table 4 shows the package pin assignments.
Table 4. Pin Assignments by Package and Pin Sharing Priority
Pin Number <-- Lowest Priority --> Highest
80 64 44 Port Pin Alt 1 Alt 2
111 PTC4 —
222 — IRQ TPMCLK
3 3 3 — RESET —
4 4 4 PTF0 TPM1CH2 —
5 5 5 PTF1 TPM1CH3 —
6 6 — PTF2 TPM1CH4 —
7 7 — PTF3 TPM1CH5 —
8 8 6 PTF4 TPM2CH0 BUSCLK_OUT
9 9 — PTC6 RXCAN —
10 10 — PTF7 TXCAN —
11 11 7 PTF5 TPM2CH1 —
12 12 — PTF6 — —
13 13 8 PTE0 TXD1 —
14 14 9 PTE1 RXD1 —
15 15 10 PTE2 TPM1CH0 —
Figure 4. 44-pin LQFP
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor12
MCF51JM128 Family Configurations
Table 4. Pin Assignments by Package and Pin Sharing Priority (continued)
Pin Number <-- Lowest Priority --> Highest
80 64 44 Port Pin Alt 1 Alt 2
16 16 11 PTE3 TPM1CH1 —
17 — — PTC7 — —
18 — — PTH0 SDA2 —
19 — — PTH1 SCL2 —
20 — — PTH2 RGPIO8 —
21 — — PTH3 RGPIO9 —
22 — — PTH4 RGPIO10 —
23 17 12 PTE4 MISO1 —
24 18 13 PTE5 MOSI1 —
25 19 14 PTE6 SPSCK1 —
26 20 15 PTE7 SS1
27 21 16 — — VDD
28 22 17 — — VSS
29 23 18 — — USBDN
30 24 19 — — USBDP
31 25 20 — — VUSB33
32 26 21 PTG0 KBIP0 USB_ALT_CLK
33 27 22 PTG1 KBIP1 —
34 28 — PTA0 RGPIO0 USB_SESSVLD
35 29 — PTA1 RGPIO1 USB_SESSEND
36 30 — PTA2 RGPIO2 USB_VBUSVLD
37 31 — PTA3 RGPIO3 USB_PULLUP(D+)
38 32 — PTA4 RGPIO4 USB_DM_DOWN
39 33 — PTA5 RGPIO5 USB_DP_DO WN
40 — — PTA6 RGPIO6 USB_ID
41 — — PTA7 RGPIO7 —
42 34 23 PTB0 MISO2 ADP0
43 35 24 PTB1 MOSI2 ADP1
—
44 36 25 PTB2 SPSCK2 ADP2
45 37 26 PTB3 SS2
46 38 27 PTB4 KBIP4 ADP4
47 39 28 PTB5 KBIP5 ADP5
48 40 — PTB6 ADP6 —
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor 13
ADP3
MCF51JM128 Family Configurations
Table 4. Pin Assignments by Package and Pin Sharing Priority (continued)
Pin Number <-- Lowest Priority --> Highest
80 64 44 Port Pin Alt 1 Alt 2
49 41 — PTB7 ADP7 —
50 42 29 PTD0 ADP8 ACMP+
51 43 30 PTD1 ADP9 ACMP–
52 44 31 — — VDDA
53 45 — — VREFH
54 46 32 — — VREFL
55 47 — — VSSA
56 48 33 PTD2 KBIP2 ACMPO
57 — — PTJ0 RGPIO11 —
58 — — PTJ1 RGPIO12 —
59 — — PTJ2 RGPIO13 —
60 — — PTJ3 RGPIO14 —
61 — — PTJ4 RGPIO15 —
62 49 — PTD3 KBIP3 ADP10
63 50 — PTD4 ADP11 —
64 51 — PTD5 — —
65 52 — PTD6 — —
66 53 — PTD7 — —
67 54 34 PTG2 KBIP6 —
68 55 35 PTG3 KBIP7 —
69 56 36 — BKGD MS
70 57 37 PTG4 XTAL
71 58 38 PTG5 EXTAL
72 59 39 — — VSS
73 — — — — VDD
74 — — PTG6 — —
75 — — PTG7 — —
76 60 40 PTC0 SCL1 —
77 61 41 PTC1 SDA1 —
78 62 42 PTC2 IRO —
79 63 43 PTC3 TXD2 —
80 64 44 PTC5 RXD2 —
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor14
Preliminary Electrical Characteristics
2 Preliminary Electrical Characteristics
This section contains electrical specification tables and reference timing diagrams for the MCF51JM128 microcontroller,
including detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications.
The electrical specifications are preliminary and are from previous designs or design simulations. These specifications may not
be fully tested or guaranteed at this early stage of the product life cycle. These specifications will, however, be met for
production silicon. Finalized specifications will be published after complete characterization and device qualifications have
been completed.
NOTE
The parameters specified in this data sheet supersede any values found in the module
specifications.
2.1 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better
understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate:
Table 5. Parameter Classifications
P
Those parameters are guaranteed during production testing on each individual device.
Those parameters are achieved by the design characterization by measuring a
C
statistically relevant sample size across process variations.
Those parameters are achieved by design characterization on a small sample size from
T
typical devices under typical conditions unless otherwise noted. All values shown in the
typical column are within this category.
D
Those parameters are derived mainly from simulations.
NOTE
The classification is shown in the column labeled C in the parameter tables where
appropriate.
2.2 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the
limits specified in Table 6 may affect device reliability or cause permanent damage to the device. For functional operating
conditions, refer to the remaining tables in this section.
This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised
that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this
high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for
instance, V
or VDD).
SS
MCF51JM128 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor 15
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