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MC3PHAC
Data Sheet
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Freescale MC3PHAC Data Sheet

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Freescale Semiconductor
Data Sheet
MC3PHAC
Rev. 2, 7/2005
MC3PHAC Monolithic Intelligent Motor Controller

Overview

One of the unique aspects of this device is that although it is adaptable and configurable based on its environment, it does not require any software development. This makes the MC3PHAC a perfect fit for customer applications requiring ac motor control but with limited or no software resources available.
The device features are:
• Volts-per-Hertz speed control
• Digital signal processing (DSP) filtering to enhance speed stability
• 32-bit calculations for high-precision operation
• Internet enabled
• No user software development required for operation
• 6-output pulse-width modulator (PWM)
• 3-phase waveform generation
• 4-channel analog-to-digital converter (ADC)
• User configurable for standalone or hosted operation
• Dynamic bus ripple cancellation
• Selectable PWM polarity and frequency
• Selectable 50/60 Hz base frequency
• Phase-lock loop (PLL) based system oscillator
• Serial communications interface (SCI)
• Low-power supply voltage detection circuit
Included in the MC3PHAC are protective features consisting of dc bus voltage monitoring and a system fault input that will immediately disable the PWM module upon detection of a system fault.
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Overview
Some target applications for the MC3PHAC include:
• Low horsepower HVAC motors
• Home appliances
• Commercial laundry and dishwashers
• Process control
• Pumps and fans
AC IN
BUS VOLTAGE
START/STOP
FORWARD/REVERSE
SPEED
ACCELERATION
PWM FREQUENCY
FAULT
SERIAL INTERFACE
FEEDBACK
MC3PHAC
RESISTIVE BRAKE CONTROL
PWM’s
PASSIVE
INITIALIZATION
NETWORK
(OPTIONAL)
3-PHASE
AC MOTOR
TO GATE DRIVES
Figure 1. MC3PHAC-Based Motor Control System
As shown in Table 1, the MC3PHAC is offered in these packages:
• Plastic 28-pin dual in-line package (DIP)
• Plastic 28-pin small outline integrated circuit (SOIC)
• Plastic 32-pin quad flat pack (QFP)
Table 1. Ordering Information
Device
MC3PHACVP –40°C to +105°C Plastic 28-pin DIP
MC3PHACVDW –40°C to +105°C Plastic 28-pin SOIC
MC3PHACVFA –40°C to +105°C Plastic 32-pin QFP
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
2 Freescale Semiconductor
Operating
Temperature Range
Package
See Figure 2 and Figure 3 for the pin connections.
REF
DDA
SSA
1
2
3
4
5
6
7
8
9
10
11
12
V
RESET
V
V
OSC2
OSC1
PLLCAP
PWMPOL_BASEFREQ
PWM_U_TOP
PWM_U_BOT
PWM_V_TOP
PWM_V_BOT
28
27
26
25
24
23
22
21
20
19
18
17
DC_BUS
ACCEL
SPEED
MUX_IN
START
FWD
V
SS
V
DD
VBOOST_MODE
DT_FAULTOUT
RBRAKE
RETRY_TxD
Overview
PWM_W_TOP
PWM_W_BOT
Figure 2. Pin Connections for PDIP and SOIC
V
SSA
OSC2
OSC1
PLLCAP
PWMPOL_BASEFREQ
PWM_U_TOP
PWM_U_BOT
PWM_V_TOP
PWMFREQ_RxD
13
14
RESET
31
REF
V
VSSVSSVSSDC_BUS
30
29
DDA
V
32
1
2
3
4
5
6
7
8
9
10
11
12
FAULTIN
PWM_V_BOT
PWM_W_TOP
PWM_W_BOT
16
FAULTIN
15
ACCEL
28
27
26
25
24
SPEED
23
MUX_IN
22
START
21
FWD
20
V
SS
19
V
DD
18
VBOOST_MODE
17
13
14
15
SS
V
DT_FAULTOUT
16
RBRAKE
RETRY_TxD
PWMFREQ_RxD
Figure 3. Pin Connections for QFP
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor 3

Electrical Characteristics

Electrical Characteristics

Maximum Ratings

Characteristic
Supply voltage V
Input voltage V
Input high voltage V
Maximum current per pin excluding V
Storage temperature T
Maximum current out of V
Maximum current into V
1. Voltages referenced to V
SS
DD
SS
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum-rated voltages to this high-impedance circuit. For proper operation, it is recommended that V
and V
In
be constrained to the range VSS ≤ (VIn or V
Out
unused inputs are connected to an appropriate logic voltage level (for example, either V
(1)
DD
and V
SS
Symbol Value Unit
DD
In
Hi
–0.3 to +6.0 V
–0.3 to VDD +0.3 V
VDD + 0.3 V
I± 25mA
stg
IMV
SS
IMV
DD
) ≤ VDD. Reliability of operation is enhanced if
Out
–55 to +150 °C
100 mA
100 mA
or VDD).
SS

Functional Operating Range

Characteristic Symbol Value Unit
Operating temperature range
(see Ta ble 1 )
Operating voltage range V
T
A
DD
–40°C to +105°C °C
5.0 ± 10% V

Control Timing

Characteristic Symbol Value Unit
Oscillator frequency
1. Follow the crystal/resonator manufacturer’s recommendations, as the crystal/resonator parameters determine the external component values required for maximum stability and reliable starting. The load capacitance values used in the oscillator circuit design should include all stray capacitances.
(1)
F
osc
4.00 ± 1% MHz
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
4 Freescale Semiconductor
Electrical Characteristics

DC Electrical Characteristics

Characteristic
Output high voltage (I
= –2.0 mA)
Load
All I/O pins except RBRAKE
Output high voltage RBRAKE (I
Output low voltage (I
= 1.6 mA)
Load
All I/O pins except FAULTOUT and RETRY/TxD
Output low voltage (I
= 15 mA)
Load
FAULTOUT and RETRY/TxD
Input high voltage
All ports
Input low voltage
All ports
VDD supply current I
I/O ports high-impedance leakage current I
Input current I
Capacitance
Ports (as input or output)
V
low-voltage inhibit reset V
DD
V
low-voltage reset/recovery hysteresis V
DD
V
power-on reset re-arm voltage V
DD
V
power-on reset rise time ramp rate R
DD
Serial communications interface baud rate SCI
Voltage Boost
Dead time range
Retry time
(2)
(3)
(4)
Acceleration rate AC
Speed control SPEED 1 128 Hz
PWM Frequency PWM
High side power transistor drive pump-up time T
1. VDD = 5.0 Vdc ± 10%
2. Limited in standalone mode to 0 to 35%
3. Limited in standalone mode to 0.5 to 6.0 µs
4. Limited in standalone mode to 0 to ~53 seconds
(1)
RBRAKE
Symbol Min Max Unit
= –15.0 mA) V
DT
V
OHRB
V
V
C
V
RT
OH
OL
OL1
V
Hi
V
IL
DD
IL
In
Out
C
In
LV R1
LV H1
POR
POR
BD
Boost
Range
Time
Rate
FREQ
Pump
VDD –0.8 — V
VDD –1.0 — V
— 0.4 V
— 1.0 V
0.7 x V
V
SS
DD
V
DD
0.3 x V
DD
— 60 mA
— ± 5 µA — ± 1 µA
— —
12
8
3.80 4.3 V
50 150 mV
3.85 4.45 V
0.035 — V/ms
9504 9696 Bits/sec
0 100 %
0 31.875 µs
0 4.55
0.5 128 Hz/sec
5.291 21.164 kHz
99 101 ms
V
V
pF
Hours
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor 5

Pin Descriptions

Pin Descriptions
Table 2 is a pin-by-pin functional description of the MC3PHAC. The pin numbers in the table refer to the
28-pin packages (see Figure 2).
Table 2. MC3PHAC Pin Descriptions (Sheet 1 of 2)
Pin
Number
1V
Pin Name Pin Function
Reference voltage input for the on-chip ADC. For best signal-to-noise
REF
performance, this pin should be tied to V
(analog).
DDA
A logic 0 on this pin forces the MC3PHAC to its initial startup state. All
PWM outputs are placed in a high-impedance mode. Reset is a
2 RESET
bidirectional pin, allowing a reset of the entire system. It is driven low when an internal reset source is asserted (for example, loss of clock or low V
3V
4V
DDA
SSA
5OSC2
6OSC1
Provides power for the analog portions of the MC3PHAC, which include
the internal clock generation circuit (PLL) and the ADC
Returns power for the analog portions of the MC3PHAC, which include
the internal clock generation circuit (PLL) and the ADC
Oscillator output used as part of a crystal or ceramic resonator clock
circuit.
Oscillator input used as part of a crystal or ceramic resonator clock
circuit. Can also accept a signal from an external canned oscillator.
DD
(1)
).
A capacitor from this pin to ground affects the stability and reaction time
7PLLCAP
of the PLL clock circuit. Smaller values result in faster tracking of the reference frequency. Larger values result in better stability. A value of
0.1 µF is typical.
8 PWMPOL_BASEFREQ
Input which is sampled at specific moments during initialization to
determine the PWM polarity and the base frequency (50 or 60 Hz)
9 PWM_U_TOP PWM output signal for the top transistor driving motor phase U
10 PWM_U_BOT PWM output signal for the bottom transistor driving motor phase U
11 PWM_V_TOP PWM output signal for the top transistor driving motor phase V
12 PWM_V_BOT PWM output signal for the bottom transistor driving motor phase V
13 PWM_W_TOP PWM output signal for the top transistor driving motor phase W
14 PWM_W_BOT PWM output signal for the bottom transistor driving motor phase W
A logic high on this input will immediately disable the PWM outputs. A
15 FAULTIN
retry timeout interval will be initiated once this pin returns to a logic low state.
In standalone mode, this pin is an output that drives low to indicate the
16 PWMFREQ_RxD
parameter mux input pin is reading an analog voltage to specify the desired PWM frequency. In PC master software mode, this pin is an input which receives UART serial data.
(1)
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
6 Freescale Semiconductor
Table 2. MC3PHAC Pin Descriptions (Sheet 2 of 2)
Pin Descriptions
Pin
Number
Pin Name Pin Function
In standalone mode, this pin is an output that drives low to indicate the
17 RETRY_TxD
parameter mux input pin is reading an analog voltage to specify the time to wait after a fault before re-enabling the PWM outputs. In PC master software mode, this pin is an output that transmits UART serial data.
Output which is driven to a logic high whenever the voltage on the dc bus
18 RBRAKE
input pin exceeds a preset level, indicating a high bus voltage. This signal is intended to connect a resistor across the dc bus capacitor to prevent excess capacitor voltage.
In standalone mode, this pin is an output which drives low to indicate the
parameter mux input pin is reading an analog voltage to specify the
19 DT_FAULTOUT
dead-time between the on states of the top and bottom PWM signals for a given motor phase. In PC master software mode, this pin is an output which goes low whenever a fault condition occurs.
At startup, this input is sampled to determine whether to enter standalone
mode (logic high) or PC master software mode (logic low). In
20 VBOOST_MODE
standalone mode, this pin is also used as an output that drives low to indicate the parameter mux input pin is reading an analog voltage to specify the amount of voltage boost to apply to the motor.
21 V
22 V
DD
SS
23 FWD
24 START
+5-volt digital power supply to the MC3PHAC
Digital power supply ground return for the MC3PHAC
Input which is sampled to determine whether the motor should rotate in
the forward or reverse direction
Input which is sampled to determine whether the motor should be
running.
In standalone mode, during initialization this pin is an output that is used
25 MUX_IN
to determine PWM polarity and base frequency. Otherwise, it is an analog input used to read several voltage levels that specify MC3PHAC operating parameters.
In standalone mode, during initialization this pin is an output that is used
26 SPEED
to determine PWM polarity and base frequency. Otherwise, it is an analog input used to read a voltage level corresponding to the desired steady-state speed of the motor.
In standalone mode, during initialization this pin is an output that is used
27 ACCEL
to determine PWM polarity and base frequency. Otherwise, it is an analog input used to read a voltage level corresponding to the desired acceleration of the motor.
In standalone mode, during initialization this pin is an output that is used
28 DC_BUS
to determine PWM polarity and base frequency. Otherwise, it is an analog input used to read a voltage level proportional to the dc bus voltage.
1. Correct timing of the MC3PHAC is based on a 4.00 MHz crystal or ceramic resonator. Follow the crystal/resonator manufacturer’s recommendations, as the crystal/resonator parameters determine the external component values required for maximum stability and reliable starting. The load capacitance values used in the oscillator circuit design should include all stray capacitances.
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor 7

Introduction

Introduction
The device consists of:
• 6-output pulse-width modulator (PWM)
• 4-channel analog-to-digital converter (ADC)
• Phase-lock loop (PLL) based system oscillator
• Low-power supply voltage detection circuit
• Serial communications interface (SCI)
The serial communications interface is used in a mode, called PC master software mode, whereby control of the MC3PHAC is from a host or master personal computer executing PC master software or a microcontroller emulating PC master software commands. In either case, control via the internet is feasible.
Included in the MC3PHAC are protective features consisting of dc bus monitoring and a system fault input that will immediately disable the PWM module upon detection of a system fault.
Included motor control features include:
• Open loop volts/Hertz speed control
• Forward or reverse rotation
• Start/stop motion
• System fault input
• Low-speed voltage boost
• Internal power-on reset (POR)

Features

3-Phase Waveform Generation — The MC3PHAC generates six PWM signals which have been
modulated with variable voltage and variable frequency information in order to control a 3-phase ac motor. A third harmonic signal has been superimposed on top of the fundamental motor frequency to achieve full bus voltage utilization. This results in a 15 percent increase in maximum output amplitude compared to pure sine wave modulation.
The waveform is updated at a 5.3 kHz rate (except when the PWM frequency is 15.9 kHz), resulting in near continuous waveform quality. At 15.9 kHz, the waveform is updated at 4.0 kHz.
DSP Filtering — A 24-bit IIR digital filter is used on the SPEED input signal in standalone mode, resulting in enhanced speed stability in noisy environments. The sampling period of the filter is 3 ms (except when the PWM frequency is 15.9 kHz) and it mimics the response of a single pole analog filter having a pole at
0.4 Hz. At a PWM frequency of 15.9 kHz, the sampling period is 4 ms and the pole is located at 0.3 Hz.
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
8 Freescale Semiconductor
Features
High Precision Calculations — Up to 32-bit variable resolution is employed for precision control and
smooth performance. For example, the motor speed can be controlled with a resolution of 4 mHz.
Smooth Voltage Transitions — When the commanded speed of the motor passes through ±1 Hz, the voltage is gently applied or removed depending on the direction of the speed change. This eliminates any pops or surges that may occur, especially under conditions of high-voltage boost at low frequencies.
High-Side Bootstrapping — Many motor drive topologies (especially high-voltage drives) use optocouplers to supply the PWM signal to the high-side transistors. Often, the high-side transistor drive circuitry contains a charge pump circuit to create a floating power supply for each high-side transistor that is dependent on low-side PWMs to develop power. When the motor has been off for a period of time, the charge on the high-side power supply capacitor is depleted and must be replenished before proper PWM operation can resume.
To accommodate such topologies, the MC3PHAC will always provide 100 ms of 50 percent PWM drive to only the low-side transistors each time the motor is turned on. Since the top transistors remain off during this time, it has the effect of applying zero volts to the motor, and no motion occurs. After this period, motor waveform modulation begins, with PWM drive also being applied to the high-side transistors.
Fast Velocity Updating — During periods when the motor speed is changing, the rate at which the velocity is updated is critical to smooth operation. If these updates occur too infrequently, a ratcheting effect will be exhibited on the motor, which inhibits smooth torque performance. However, velocity profiling is a very calculation intensive operation to perform, which runs contrary to the previous requirement.
In the MC3PHAC, a velocity pipelining technique is employed which allows linear interpolation of the velocity values, resulting in a new velocity value every 189 µs (252 µs for 15.9 kHz PWMs). The net result is ultra smooth velocity transitions, where each velocity step is not perceivable by the motor.
Dynamic Bus Ripple Cancellation — The dc bus voltage is sensed by the MC3PHAC, and any deviations from a predetermined norm (3.5 V on the dc bus input pin) result in corrections to the PWM values to counteract the effect of the bus voltage changes on the motor current. The frequency of this calculation is sufficiently high to permit compensation for line frequency ripple, as well as slower bus voltage changes resulting from regeneration or brown out conditions. See Figure 4.
Selectable Base Frequency — Alternating current (ac) motors are designed to accept rated voltage at either 50 or 60 Hz, depending on what region of the world they were designed to be used. The MC3PHAC can accommodate both types of motors by allowing the voltage profile to reach maximum value at either 50 or 60 Hz. This parameter can be specified at initialization in standalone mode, or it can be changed at any time in PC master software mode.
Selectable PWM Polarity — The polarity of the PWM outputs may be specified such that a logic high on a PWM output can either be the asserted or negated state of the signal. In standalone mode, this parameter is specified at initialization and applies to all six PWM outputs. In PC master software mode, the polarity of the top PWM signals can be specified separately from the polarity of the bottom PWM signals.
This specification can be done at any time, but once it is done, the polarities are locked and cannot be changed until a reset occurs. Also, any commands from PC master software that would have the effect of enabling PWMs are prevented by the MC3PHAC until the polarity has been specified.
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor 9
Features
MOTOR PHASE CURRENT WAVEFORMS
COMPENSATED
UNCOMPENSATED
AC MAINS
REMOVES 60 Hz HUM
2
AND DECREASES I
MC3PHAC
R LOSSES
PWM1
PWM2
CORRECTED PWMs
PWM3
PWM4
Figure 4. Dynamic Bus Ripple Cancellation
PWM5
PWM6
In standalone mode, the base frequency and PWM polarity are specified at the same time during initialization by connecting either pin 25, 26, 27, or 28 exclusively to the PWMPOL_BASEFREQ input. During initialization, pins 25, 26, 27, and 28 are cycled one at a time to determine which one has been connected to the PWMPOL_BASEFREQ input.
Table 3 shows the selected PWM polarity and base frequency as a function of which pin connection is
made. Refer to the standalone mode schematic, Figure 8. Only one of these jumpers (JP1–JP4) can be connected at any one time.
NOTE
It is not necessary to break this connection once the initialization phase has been completed. The MC3PHAC will function properly while this connection is in place.
Table 3. PWM Polarity and Base Frequency Specification in Standalone Mode
Pin Connected to
PWMPOL_BASEFREQ Pin
MUX_IN (JP1) Logic low = on 50 Hz
SPEED (JP2) Logic high = on 50 Hz
ACCEL (JP3) Logic low = on 60 Hz
DC_BUS (JP4) Logic high = on 60 Hz
PWM Polarity Base Frequency
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
10 Freescale Semiconductor
Features
Selectable PWM Frequency — The MC3PHAC accommodates four discrete PWM frequencies and can
be changed dynamically while the motor is running. This resistor can be a potentiometer or a fixed resistor in the range shown in Table 4. In standalone mode, the PWM frequency is specified by applying a voltage to the MUX_IN pin while the PWMFREQ_RxD pin is being driven low. Table 4 shows the required voltage levels on the MUX_IN pin and the associated PWM frequency for each voltage range.
NOTE
The PWM frequencies are based on a 4.00 MHz frequency applied to the oscillator input.
Table 4. MUX_IN Resistance Ranges and Corresponding PWM Frequencies
Voltage Input PWM Frequency
0 to 1 V 5.291 kHz
1.5 to 2.25 V 10.582 kHz
2.75 to 3.5 V 15.873 kHz
4 to 5 V 21.164 kHz
Selectable PWM Dead Time — Besides being able to specify the PWM frequency, the blanking time interval between the on states of the complementary PWM pairs can also be specified. Refer to the graph in Figure 9 for the resistance value versus dead time. Figure 9 assumes a 6.8 kΩ standalone mode, this is done by
±5% pullup resistor. In
supplying a voltage to the MUX_IN pin while the DT_FAULTOUT pin is being driven low. In this way, dead time can be specified with a scaling factor of 2.075 µs per volt, with a minimum value of 0.5 µs. In PC master software mode, this value can be selected to be anywhere between 0 and 32 µs.
In both standalone and PC master software modes, the dead time value can be written only once. Further updates of this parameter are locked out until a reset condition occurs.
Speed Control — The synchronous motor frequency can be specified in real time to be any value from 1 Hz to 128 Hz by the voltage applied to the SPEED pin. The scaling factor is 25.6 Hz per volt. This parameter can also be controlled directly from PC master software in real time.
The SPEED pin is processed by a 24-bit digital filter to enhance the speed stability in noisy environments. This filter is only activated in standalone mode.
Acceleration Control — Motor acceleration can be specified in real time to be in the range from 0.5
Hz/second, ranging to 128 Hz/second, by the voltage applied to the ACCEL pin. The scaling factor is 25.6 Hz/second per volt. This parameter can also be controlled directly from PC master software in real time.
Voltage Profile Generation — The MC3PHAC controls the motor voltage in proportion to the specified frequency, as indicated in Figure 5.
An ac motor is designed to draw a specified amount of magnetizing current when supplied with rated voltage at the base frequency. As the frequency decreases, assuming no stator losses, the voltage must decrease in exact proportion to maintain the required magnetizing current. In reality, as the frequency decreases, the voltage drop in the series stator resistance increases in proportion to the voltage across the magnetizing inductance. This has the effect of further reducing the voltage across the magnetizing inductor, and consequently, the magnetizing current. A schematic representation of this effect is
MC3PHAC Monolithic Intelligent Motor Controller, Rev. 2
Freescale Semiconductor 11
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