Freescale M68332BCC User Guide
Freescale Semiconductor, Inc.
M68332BCC/D
REV 1
October 1993
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M68332BCC
BUSINESS CARD COMPUTER
USER’S MANUAL
© MOTOROLA, INC., 1990, 1993; All Rights Reserved
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Motorola reserves the right to make changes without further notice to any products herein to
improve reliability, function or design. Motorola does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Motorola products are not designed, intended, or
authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure
of the Motorola product could create a situation where personal injury or death may occur.
Should Buyer purchase or use Motorola products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and
reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part.
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CPU32Bug is a trademark of Motorola Inc.
White Knight is a trademark of FreeSoft Company.
MacTerminal, Apple, and Macintosh are trademarks of Apple Computer, Inc.
IBM-PC is a registered trademark of International Business Machines Corporation.
The computer program stored in the read only memory of the device contains material
copyrighted by Motorola Inc., first published in 1989, and may be used only under a license such
as the License For Computer programs (Article 14) contained in Motorola Terms and Conditions
of Sale, Rev. 1/79.
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TABLE OF CONTENTS
TABLE OF CONTENTS
CHAPTER 1 GENERAL INFORMATION
1.1 Introduction......................................................................................................................... 1-1
1.2 Features............................................................................................................................... 1-1
1.3 Specifications...................................................................................................................... 1-2
1.4 General Description............................................................................................................ 1-3
1.5 Equipment Required........................................................................................................... 1-4
CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION
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2.1 Introduction......................................................................................................................... 2-1
2.2 Unpacking Instructions....................................................................................................... 2-1
2.3 Hardware Preparation......................................................................................................... 2-1
2.3.1 VSTBY Select Header (J1) ...................................................................................... 2-5
2.3.2 RAM Chip Enable Select Header (J2)...................................................................... 2-6
2.3.3 EPROM Chip Select Header (J3)............................................................................. 2-7
2.3.4 TxD Select Header (J4)............................................................................................ 2-8
2.3.5 RxD Select Header (J5)............................................................................................ 2-9
2.3.6 Clock Input Select Header (J6)............................................................................... 2-10
2.4 Installation Instructions .................................................................................................... 2-12
2.4.1 Power Supply - BCC Interconnection.................................................................... 2-12
2.4.2 Terminal - BCC Interconnection............................................................................ 2-13
2.4.3 Target System - BCC Interconnection ................................................................... 2-15
CHAPTER 3 OPERATING INSTRUCTIONS
3.1 Introduction......................................................................................................................... 3-1
3.2 Limitations.......................................................................................................................... 3-1
3.2.1 Chip Select Usage .................................................................................................... 3-2
3.2.2 Other MCU Resources Used by CPU32Bug............................................................ 3-4
3.3 Operating Procedure........................................................................................................... 3-5
3.4 Monitor Description............................................................................................................ 3-6
3.4.1 Memory and Register Display and Modification Commands.................................. 3-7
3.4.2 Breakpoint Capabilities............................................................................................ 3-7
3.4.3 System Calls............................................................................................................. 3-8
3.4.4 Diagnostic Monitor................................................................................................. 3-10
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CHAPTER 3 OPERATING INSTRUCTIONS (continued)
3.5 Assembling/Disassembling Procedure ............................................................................. 3-12
3.6 Downloading Procedures.................................................................................................. 3-16
3.6.1 Apple Macintosh (with MacTerminal) to BCC...................................................... 3-17
3.6.2 Apple Macintosh (with White Knight) to BCC...................................................... 3-19
3.6.3 IBM-PC (with KERMIT) to BCC.......................................................................... 3-20
3.6.4 IBM-PC (with PROCOMM) to BCC..................................................................... 3-22
CHAPTER 4 FUNCTIONAL DESCRIPTION
4.1 Introduction......................................................................................................................... 4-1
4.2 BCC Description................................................................................................................. 4-1
4.2.1 MCU......................................................................................................................... 4-2
4.2.1.1 32-Bit Central Processor Unit ......................................................................... 4-3
4.2.1.2 Time Processor Unit........................................................................................ 4-3
4.2.1.3 Queued Serial Module..................................................................................... 4-3
4.2.1.4 Random Access Memory ................................................................................ 4-4
4.2.1.5 External Bus Interface..................................................................................... 4-4
4.2.1.6 Chip Selects..................................................................................................... 4-4
4.2.1.7 System Clock................................................................................................... 4-4
4.2.1.8 Test Module..................................................................................................... 4-5
4.2.2 User Memory............................................................................................................ 4-5
4.2.3 Terminal and Host Computer I/O Port..................................................................... 4-5
4.2.4 Background Mode Interface Port............................................................................. 4-5
CHAPTER 5 SUPPORT INFORMATION
5.1 Introduction......................................................................................................................... 5-1
5.2 Connector Signal Descriptions........................................................................................... 5-1
APPENDIX A S-RECORD INFORMATION
TABLE OF CONTENTS
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TABLE OF CONTENTS
LIST OF ILLUSTRATIONS
Figure Page
2-1 BCC Jumper Header and Connector Location Diagram .................................................... 2-2
2-2 BCC to DB-9 Cable Schematic Diagram ......................................................................... 2-13
2-3 BCC to DB-25 Cable Schematic Diagram ....................................................................... 2-14
2-4 Expansion Connectors Pin Assignments.......................................................................... 2-16
2-5 Target System Expansion Connector Installation Dimensions ........................................ 2-17
4-1 BCC Block Diagram........................................................................................................... 4-2
4-2 BCC Memory Map............................................................................................................. 4-6
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LIST OF TABLES
Table Page
1-1 BCC Specifications............................................................................................................. 1-2
1-2 External Equipment Requirements..................................................................................... 1-4
2-1 Jumper Header Types......................................................................................................... 2-3
2-2 Jumper Header Summary ................................................................................................... 2-3
3-1 BCC Rev. A Chip Selection Summary............................................................................... 3-2
3-2 BCC Rev. B Chip Selection Summary............................................................................... 3-3
3-3 BCC Rev. C Chip Selection Summary............................................................................... 3-3
3-4 CPU32Bug Exception Vectors........................................................................................... 3-4
5-1 P1 Expansion Connector Pin Assignments ........................................................................ 5-1
5-2 P2 Expansion Connector Pin Assignments ........................................................................ 5-4
5-3 J8 Background Mode Connector Pin Assignments............................................................ 5-7
5-4 J9 RS-232C Serial Communication Connector Pin Assignments...................................... 5-8
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TABLE OF CONTENTS
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GENERAL INFORMATION
CHAPTER 1
GENERAL INFORMATION
1.1 INTRODUCTION
This manual provides general information, hardware preparation, installation instructions,
functional description, and support information for the M68332BCC Business Card Computer
(hereafter referred as BCC). Appendix A contains BCC downloading S-record information.
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1.2 FEATURES
The BCC is a single-board computer complete with these features:
• MC68332 Microcontroller Unit (MCU)
• 64k x 16 bit, two erasable programmable read only memories (EPROMs).
Programmed into the BCC EPROMs is the M68CPU32BUG Debug Monitor. Refer to
the M68CPU32BUG Debug Monitor User's Manual, M68CPU32BUG/AD1.
• 32k x 16 bit, byte addressable random access memory (RAM)
• RS-232C compatible terminal/host computer input/output (I/O) port
• Background mode interface port
• EVS expansion connectors
• 2.25 x 3.875 in. (5.7 x 9.84 cm) PCB
The BCC can be used as a stand-alone evaluation module or can be connected directly to a target
system. The BCC is primarily intended to be used with a terminal or host computer. When using
a host computer, a user must have a terminal emulation package for BCC downloading
operations.
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1.3 SPECIFICATIONS
Table 1-1 lists the BCC specifications.
Table 1-1. BCC Specifications
CHARACTERISTICS SPECIFICATIONS
GENERAL INFORMATION
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Internal Clock
External Clock
Memory
32k x 16 RAM
64k x 16 EPROM
Terminal/Host I/O Port RS-232C compatible (with internal DC-DC converters for
Temperature
Operating
Storage
Relative humidity
Power Requirements
Power Supply
Battery Backup
Dimensions 2.25 x 3.875 in. (5.7 x 9.84 cm)
1. An optional high frequency clock source (as high as 16.77 MHz) may be used if MODCK
(P2, pin 28) is pulled to a logic low level. A hybrid oscillator is recommended as the
external clock.
32.768 kHz
25 kHz to 50 kHz
85ns (3 clock bus cycle access @
16.7 MHz)
200ns (5 clock bus cycle access @
16.7 MHz)
+/-10 volts, 10 mA)
+25° C
-40 to +85° C
0 to 90% (non-condensing)
+5 Vdc @ 200 milliamps (min.)
+3 Vdc @ 50 microamps (min.)
(1)
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GENERAL INFORMATION
1.4 GENERAL DESCRIPTION
Using the BCC, the user can design, debug, and evaluate MC68332 Microcontroller Unit (MCU)
based target systems. The BCC simplifies user evaluation of prototype hardware/software
products. The BCC requires a user-supplied power supply and an RS-232C compatible terminal
for functional operation.
The BCC can operate as a standalone single board computer, or as a well-defined core in larger
applications. Mounted on the BCC is a microcontroller, on-board memory, and a serial level
converter circuit.
Two 64-pin expansion connectors provide access to the MC68332 pins. Background mode
operation and RS-232C serial communication are available through the 64-pin expansion
connectors. Additional connectors also provide background mode operation and RS-232C serial
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communication. See Chapter 5 for interface connector pin assignments.
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The BCC is factory tested and shipped with factory installed jumpers. These jumpers allow the
user to customize the BCC functionality when special design considerations are required.
The M68CPU32BUG Debug Monitor (CPU32Bug) is programmed into the BCC EPROMs.
CPU32Bug is a software evaluation and debug tool which may be used to develop systems built
around the MCU. Using the debug monitor, the user interacts with the BCC through pre-defined
monitor commands which are entered at the terminal/host computer keyboard. These commands
perform functions such as modification of memory, modification of MCU internal registers,
program execution under various levels of control, and access to various I/O peripherals in the
MCU itself.
To program the BCC EPROMs you must remove the EPROMs and use an EPROM programmer.
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1.5 EQUIPMENT REQUIRED
Table 1-2 lists the external equipment requirements for BCC operation.
Table 1-2. External Equipment Requirements
EXTERNAL EQUIPMENT
GENERAL INFORMATION
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A terminal or host computer (RS-232C compatible) with a terminal emulation package
(PCKERMIT, PROCOMM, MacTerminal, White Knight, etc.)
RS-232C serial communication cable for the terminal or host computer
+5 Vdc at 200 mA power supply
1. Refer to Chapter 3 for details on downloading using a host computer with terminal emulation
package.
2. Refer to Chapter 2 for details.
(2)
(1)
(2)
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HARDWARE PREPARATION AND INSTALLATION
CHAPTER 2
HARDWARE PREPARATION AND INSTALLATION
2.1 INTRODUCTION
This chapter provides unpacking instructions, hardware preparation, and installation instructions
for the BCC prior to target system installation. This description ensures the BCC is properly
configured for target system operation.
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2.2 UNPACKING INSTRUCTIONS
Unpack the BCC from shipping carton. Refer to the packing list and verify that all items are
present. Save packing material for storing and shipping the BCC.
NOTE
If the product arrives damaged, save all packing material, and contact the
carrier’s agent.
2.3 HARDWARE PREPARATION
This portion of text describes the inspection and preparation of the BCC prior to installation and
ensures the proper configuration for target system operation. The BCC was factory tested and
shipped with factory-installed jumpers (Figure 2-1 shows jumper header and connector
locations). These jumper headers allow the user to customize BCC functionality. Table 2-1 is a
description of the BCC jumper header types, and Table 2-2 is a summary of the BCC jumper
headers.
CAUTIONS
Use caution when handling the BCC; the signals are not buffered so the BCC
is sensitive to static discharge.
Depending on the application, it may be necessary to cut wiring trace shorts
(cut-trace shorts) on the PCB. Be careful not to cut adjacent PCB wiring
traces.
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HARDWARE PREPARATION AND INSTALLATION
64-Pin Expansion Connector
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P1
Background Mode
Connector
Clock Input
Select
J4
J5
J7
J6
RS-232C Serial
Communication
J8
64-Pin Expansion Connector
Select
RxD
Select
TxD
P2
J1
J2
J3
VSTBY
Select
RAM Chip
Select
EPROM Chip
Select
Figure 2-1. BCC Jumper Header and Connector Location Diagram
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HARDWARE PREPARATION AND INSTALLATION
Table 2-1. Jumper Header Types
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Jumper Header
three-pin with jumper Three-pin jumper header with jumper and designated as JX (X =
two-pin with jumper Two-pin jumper header with jumper, designated as JX (X = the
1. J7 and J8 are designated as jumper headers but they are in fact connectors.
Type
(1)
Symbol Description
the jumper header number). To change the factory jumper header
configuration, move the jumper to the two desired pins.
jumper header number).
Table 2-2. Jumper Header Summary
Jumper
Header Type Description
J1
J2
J3
J4
(1)
(1)
(1)
(1)
2
1
3
2
1
3
2
1
2
1
Jumper between pins 1 and 2 (factory default); disables (grounds) the on-board
RAM (U1 & U3) voltage standby power (VSTBY) input pin. VSTBY maintains
the data in RAM if BCC power (+5Vdc) is turned off.
No jumper; enables the on-board RAM VSTBY function. The VSTBY voltage
must be supplied by the user.
Jumper between pins 1 and 2 (factory default); enables the on-board RAM
chips (U1 & U3).
Jumper between pins 2 and 3; disables the on-board RAM chips. This allows
the chip select to be used with off-board memory.
Jumper between pins 1 and 2 (factory default); enables the on-board EPROM at
U2.
Jumper between pins 2 and 3; disables the on-board EPROM at U2. This allows
the chip select to be used to boot from off-board memory.
Jumper between pins 1 and 2 (factory default); connects the on-board transmit
data serial communication drivers to the MC68332 MCU device.
No jumper; disconnects the on-board transmit data serial communication drivers
from the MC68332 MCU device. This allows connection of the MCU serial port
to off board logic.
1. These jumper headers are shorted by a trace on the solder side of the PCB (between the pins), as
shown in the schematics. Cut the trace when using the optional feature provided by the jumper.
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HARDWARE PREPARATION AND INSTALLATION
Table 2-1. Jumper Header Summary (continued)
Jumper
Header Type Description
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(1)
J5
(1)
J6
J7
J8
1. These jumper headers are shorted by a trace on the solder side of the PCB (between the pins), as
shown in the schematics. Cut the trace when using the optional feature provided by the jumper.
10
2
1
3
2
1
8
6
4
2
4
3
2
1
Jumper between pins 1 and 2 (factory default); connects the on-board receive
data serial communication drivers to the MC68332 MCU device.
No jumper; disconnects the on-board receive data serial communication drivers
from the MC68332 MCU device. This allows connection of the MCU serial port
to off board logic.
Jumper between pins 1 and 2; selects an external clock source for the
MC68332 MCU device.
Jumper between pins 2 and 3 (factory default); selects the on-board oscillator
as the MC68332 MCU device clock source.
9
10-pin background mode connector.
7
5
3
1
4-pin RS-232C serial connector.
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2.3.1 V
Use the two-pin jumper header J1 (shown below) to select a voltage standby (V
supply source. V
device. The BCC is shipped from the factory with V
cut-trace short. To power V
PCB and connect an external power supply between P1, pin 28 and any BCC ground pin. Refer
to the BCC schematic diagram for more detail on V
STBY
Select Header (J1)
STBY
provides battery backup to the RAM contained in the MC68332 MCU
STBY
64-Pin Expansion Connector
U5
V
STBY
MC68332 MCU
STBY
STBY
with an external supply, cut the trace on the bottom of the
STBY
P1
28
19
V
STBY
connected to ground (GND) via J1
signal wiring.
Fabricated Jumper
2
1
J1
GND
) power
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NOTE
If the cut-trace short on jumper header J1 is cut, a user-supplied fabricated
jumper must be installed on J1 to return the BCC to its default setting.
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2.3.2 RAM Chip Enable Select Header (J2)
Use the three-pin jumper header J2 (shown below) to enable/disable selection of the on-board
RAM. The BCC is shipped from the factory with the RAM chip select connected to GND via a
cut-trace short on the bottom of the BCC PCB between pins 1 and 2. A fabricated jumper is also
installed between pins 1 and 2. The cut-trace short or a fabricated jumper between pins 1 and 2
enables the BCC on-board RAM.
BR/CS0
BGACK/CS2
HARDWARE PREPARATION AND INSTALLATION
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BG/CS1
J2
+5V
GND
To disable the RAM from the BCC memory map, cut the trace on the solder side of the board on
J2, between pins 1 and 2, and move the fabricated jumper to pins 2 and 3. This jumper disables
selection of the on-board RAM by connecting chip enable to +5V. The chip selects are now free
for other uses. Refer to the BCC schematic diagram for more detail on RAM chip select signal
wiring.
3
2
1
Fabricated Jumper
27
22
20
U4
WE
OE
CS
MCM6206
CAUTION
27
22
20
WE
OE
CS
U3
MCM6206
Do not connect the jumper between pins 2 and 3 before removing the cut-trace
short between pins 1 and 2. Installing the jumper before the cut-trace short i s
removed connects +5Vdc to ground. If +5Vdc is shorted to ground the BCC or
power supply may be damaged.
NOTE
If the cut-trace short on jumper header J2 is cut , th e fabricated j ump er must be
reinstalled on J2, pins 1 and 2 to return the BCC to its default setting.
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2.3.3 EPROM Chip Select Header (J3)
When BCC power is applied or reset occurs, the MC68332 MCU device resets itself and
downloads the program in EPROM (U1 & U2). The EPROM contains the boot program. Use the
three-pin jumper header J3 (shown below) to disable the BCC on-board EPROM. The BCC is
shipped from the factory with the EPROM connected to the MCU bootstrap chip select pin
CSBOOT
(
fabricated jumper is also installed between pins 1 and 2. To boot from a program stored in
memory located in the target system, cut this trace, move the jumper to pins 2 and 3, and connect
CSBOOT
fabricated jumper to pins 2 and 3, removes U1 & U2 from the BCC memory map. Refer to the
BCC schematic diagram for more detail on
) via a cut-trace short on the bottom of the BCC PCB between pins 1 and 2. A
to the target system via P2, pin 25. Cutting the cut-trace short and moving the
HARDWARE PREPARATION AND INSTALLATION
CSBOOT
signal wiring.
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GND
112
+5V
3
2
1
J3
25
CSBOOT
20
22
64-Pin Expansion Connector
CAUTION
Fabricated Jumper
U5
CSB OOT
MC68 332 MCU
Do not connect the jumper between pins 2 and 3 before removing the cut-trace
short between pins 1 and 2. Installing the jumper before the cut-trace short i s
removed connects +5Vdc to (
the MCU may be damaged.
U2
20
CS
22
OE/VP P
27C512
P2
). If +5Vdc is shorted to (
CSBOOT
U1
CS
OE/VP P
27C512
)
NOTE
If the cut-trace short on jumper header J3 is cut , th e fabricated j ump er must be
reinstalled on J3 pins 1 and 2 to return the BCC to its default setting.
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2.3.4 TxD Select Header (J4)
Jumper header J4 allows the user to disconnect the transmit TxD serial data pin of the MC68332
MCU device (U5) from the RS-232C receiver/driver (U6) and use a target system
receiver/driver. The BCC is shipped from the factory with the receiver/driver connected to MCU
TxD (pin 52) via a cut-trace short on the bottom of the BCC PCB between J4, pins 1 and 2
(shown below). A fabricated jumper is also installed on pins 1 and 2. To disconnect the serial pin
of the MCU, cut this trace and remove the jumper.
HARDWARE PREPARATION AND INSTALLATION
64-Pin Expansion C onnector
P1
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U5
TxD
MC68332 MCU
TxD
Fabricated Jumper
J4
52
1
XMT 232
24
P2
64-Pin Expansion C onnector
NOTE
2
15
53
U6
DI1 TX1
MC145407
6
If the cut-trace short on jumper header J4 is cut , th e fabricated j ump er must be
reinstalled on J4 to return the BCC to its default setting.
Refer to the BCC schematic diagram for more detail on TxD signal wiring.
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2.3.5 RxD Select Header (J5)
Jumper header allows the user to disconnect the receive RxD serial data pin of the MC68332
MCU device (U5) from the RS-232C receiver/driver (U6) and use a target system
receiver/driver. The BCC is shipped from the factory with receiver/driver connected to MCU
RxD via a cut-trace short on the bottom of the BCC PCB between J5, pins 1 and 2 (shown
below). A fabricated jumper is also installed on pins 1 and 2. To disconnect the RxD pin of the
MCU, cut this trace and remove the jumper.
HARDWARE PREPARATION AND INSTALLATION
64-Pin Expansion Connector
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U5
RxD
MC68332 MCU
P1
RxD
Fabricated Jumper
J5
53
1
RCV 232
26
P2
64-Pin Expansion Connector
2
16
56
U6
DO1 RX1
MC145407
5
NOTE
If the cut-trace short on jumper header J5 is cut , th e fabricated j ump er must be
reinstalled on J5 to return the BCC to its default setting.
Refer to the BCC schematic diagram for more detail on RxD signal wiring.
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2.3.6 Clock Input Select Header (J6)
Use the three-pin jumper header J6 (shown below) to select the BCC on-board clock source or an
external clock source. The BCC on-board clock source is a 32 kHz crystal, which is frequency
multiplied by the MC68332 to a programmable operating frequency. The BCC is shipped with
the on-board crystal selected as the clock source. J6 has a cut-trace short on the bottom of the
BCC PCB between pins 2 and 3. A fabricated jumper is also supplied, but is not required when
the user uses the on-board clock source. Refer to the BCC schematic diagram for more detail on
EXTAL signal wiring.
HARDWARE PREPARATION AND INSTALLATION
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BCC
On-Board
Oscillator
Fabricated Jumper
64-Pin Expansion Connector
3
J6
2
1
P2
EXTAL
60
XTAL
62
EXTAL
MC68332 MCU
59
U5
M68332BCC/D 2-10 MOTOROLA
REV 1
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
An optional high frequency oscillator (0 to 16.77 MHz) may be used if MODCK (connector P2,
pin 28) is pulled to a logic low level. To use the target-system, external-source CMOS clock;
follow these steps:
a. Turn off power to the BCC.
b. Cut the printed circuit trace on the bottom of the BCC between pins 2 and 3.
c. Move the fabricated jumper between pins 2 and 3 to pins 1 and 2.
d. Supply an external oscillator to connector P2, pin 59 (EXTAL).
e. Ground connector P2, pin 28 (MODCK).
f. Apply power to the BCC, start the external oscillator, and drive connector P1, pin 57
(RESET), low.
HARDWARE PREPARATION AND INSTALLATION
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NOTES
If the cut-trace short on jumper header J6 is cut , th e fabricated j ump er must be
reinstalled on J6 pins 2 and 3 to return the BCC to its default setting.
Use a hybrid oscillator when driving the MCU from an external source.
Any change in the MC68332 MCU device clock speed causes a corresponding
change in the SCI baud rate. The operational speed of the MCU is determined
by the clock and the synthesizer control register value (SYNCR). The SCI
baud rate is then set based on this system clock frequency. If changes are
made to the MCU speed and the terminal baud rate is not changed
appropriately, terminal communication will fail. Refer to Appendix C of the
M68CPU32BUG Debug Monitor User’s Manual, M68CPU32BUG/AD1.
M68332BCC/D 2-11 MOTOROLA
REV 1
For More Information On This Product,
Go to: www.freescale.com
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