Freescale 56F8037 User Guide

56F8037

Evaluation Module User Manual

56F8000
16-bit Digital Signal Controllers

MC56F8037EVMUM
Rev. 0
09/2006

freescale.com

TABLE OF CONTENTS

Preface 1-vii

Chapter 1

Introduction

1.1 56F8037EVM Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.2 56F8037EVM Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.2.1 USB Power Connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.2.2 External +9.0V DC Power Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

1.2.3 External +3.3V DC Power Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

Chapter 2

Technical Summary

2.1 56F8037. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2 USB Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.3 Debug LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2.4 Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.5 External Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

2.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

2.7 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

2.7.1 USB Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

2.7.2 External +9V DC Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

2.7.3 Daughter Card Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

2.8 Daughter Card Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7

2.9 Test Points. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

Appendix A

56F8037EVM Schematics

Appendix B

56F8037EVM

Bill of Material

Table of Contents, Rev. 0

Freescale Semiconductor i
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56F8037EVM User Manual, Rev. 0

ii Freescale Semiconductor

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LIST OF TABLES

2-1 SCI RxD Signal Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2-2 SCI TxD Signal Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2-3 LED Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2-4 JTAG Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2-5 Power Source Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

2-6 Daughter Card Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7

List of Tables, Rev. 0

Freescale Semiconductor iii
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56F8037EVM User Manual, Rev. 0

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LIST OF FIGURES

1-1 Block Diagram of the 56F8037EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1-2 56F8037EVM Cabling for USB Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

1-3 56F8037EVM Cabling for External +9V Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

1-4 56F8037EVM Cabling for External +3.3V Power . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

2-1 Diagram of the Debug LED Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

2-2 Schematic Diagram of the User Interrupt Interface. . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

List of Figures, Rev. 0

Freescale Semiconductor v
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56F8037EVM User Manual, Rev. 0

vi Freescale Semiconductor

Preliminary

Preface

This manual describes the hardware on the 56F8037EVM in detail.

Audience

This document is intended for application developers who are creating software for
devices using the Freescale 56F8037 part or a member of the 56F8000 family that is
compatible with this part.

Organization

This manual is organized into two chapters and two appendices.

• Chapter 1, Introduction, provides an overview of the Evaluation Module and its
features.

• Chapter 2, Technical Summary, describes the 56F8037EVM hardware in detail.

• Appendix A, 56F8037EVM Schematics, contains the schematics of the
56F8037EVM.

• Appendix B, 56F8037EVM Bill of Material, provides a list of the materials used on
the 56F8037EVM.

Suggested Reading

More documentation on the 56F8037EVM and the MC56F8037EVM kit may be found at
URL:

www. freescale.com

Preface, Rev. 0

Freescale Semiconductor vii
Preliminary

Notation Conventions

This manual uses the following notational conventions:

Term or Value Symbol Examples Exceptions

Active High
Signals
(Logic One)

Active Low
Signals
(Logic Zero)

Hexadecimal
Values

Decimal Values No special symbol

Binary Values Begin with the letter

Numbers Considered positive

Blue Text Linkable on-line ...refer to Chapter 7, License

Bold Reference sources,

No special symbol
attached to the
signal name

Noted with an
overbar in text and
in most figures

Begin with a “$”
symbol

attached to the
number

“b” attached to the
number

unless specifically
noted as a negative
value

paths, emphasis

A0

CLKO

WE

OE

$0FF0

$80

10
34

b1010

b0011

5

-10

...see:

http://www.freescale.com/

In schematic drawings,
Active Low Signals may be
noted by a backslash: /WE

Voltage is often shown as
positive: +3.3V

56F8037EVM User Manual, Rev. 0

viii Freescale Semiconductor

Preliminary

Definitions, Acronyms, and Abbreviations

Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.

56F8037

Digital signal controller with motor control peripherals

A/D Analog-to-Digital; a method of converting Analog signals to Digital values

ADC Analog-to-Digital Converter; a peripheral on the 56F8037 part

D/A

DAC

EOnCE

Digital-to-Analog; a method of converting Digital values to Analog signals

Digital-to-Analog Converter; a peripheral on the 56F8037 part

Enhanced On-Chip Emulation; a debug bus and port which enables a designer
to create a low-cost hardware interface for a professional-quality debug
environment

EVM

Evaluation Module; a hardware platform which allows a customer to evaluate
the silicon and develop his application

GPIO

General Purpose Input and Output port on Freescale’s family of digital signal
controllers; does not share pin functionality with any other peripheral on the
chip and can only be set as an input, an output, or a level-sensitive interrupt
input

IC

JTAG

Integrated Circuit

Joint Test Action Group; a bus protocol/interface used for test and debug

LED

LQFP

OnCE

PCB

PWM

SCI

SPI

TM

Light Emitting Diode

Low-profile Quad Flat Package

On-Chip Emulation, a debug bus and port created to allow a means for low-cost
hardware to provide a professional-quality debug environment

Printed Circuit Board

Pulse Width Modulation

Serial Communications Interface; a peripheral on Freescale’s family of digital
signal controllers

Serial Peripheral Interface; a peripheral on Freescale’s family of digital signal
controllers

Preface, Rev. 0

Freescale Semiconductor ix
Preliminary

References

The following sources were referenced to produce this manual:

[1] DSP56800E Reference Manual, DSP56800ERM, Freescale Semiconductor, Inc.

[2] 56F802X and 56F803X Peripheral Reference Manual, MC56F80XXRM,

Freescale Semiconductor, Inc.

[3] 56F8037 Technical Data, MC56F8037, Freescale Semiconductor, Inc.

56F8037EVM User Manual, Rev. 0

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Chapter 1 Introduction

The 56F8037EVM is used to demonstrate the abilities of the 56F8037 digital signal controller
and to provide a hardware tool allowing the development of applications.

The 56F8037EVM is an evaluation module board that includes a 56F8037 part, USB interface,
user LEDs, user pushbutton switches and a daughter card connector. The daughter card
connector allows signal monitoring and expandability of user features.

The 56F8037EVM is designed for the following purposes:

• Allowing new users to become familiar with the features of the 56800E architecture. The
tools and examples provided with the 56F8037EVM facilitate evaluation of the feature set
and the benefits of the family.

• Serving as a platform for real-time software development. The tool suite enables the user
to develop and simulate routines, download the software to on-chip memory, run it, and
debug it using a debugger via the JTAG/Enhanced OnCE (EOnCE) port. The breakpoint
features of the EOnCE port enable the user to easily specify complex break conditions and
to execute user-developed software at full speed until the break conditions are satisfied.
The ability to examine and modify all user-accessible registers, memory and peripherals
through the EOnCE port greatly facilitates the task of the developer.

• Serving as a platform for hardware development. The hardware platform enables the user
to connect external hardware peripherals. The on-board peripherals can be disabled,
providing the user with the ability to reassign any and all of the processor's peripherals.
The EOnCE port's unobtrusive design means that all memory on the board and on the
processor is available to the user.

1.1 56F8037EVM Architecture

The 56F8037EVM facilitates the evaluation of various features present in the 56F8037 part. The
56F8037EVM can be used to develop real-time software and hardware products. The
56F8037EVM provides the features necessary for a user to write and debug software,

Introduction, Rev. 0

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Preliminary

demonstrate the functionality of that software and interface with the user's application-specific
device(s). The 56F8037EVM is flexible enough to allow a user to fully exploit the 56F8037's
features to optimize the performance of his product, as shown in

56F8037

Figure 1-1.

JTAG/EOnCE

SCI

SPI

Timer A

PWM

ADCA

ADCB

RESET

+3.3V & GND

+3.3VA & AGND

JTAG

Connector

SCI to USB

Bridge

Daughter Card

Connector

Debug LEDs

IRQ Pushbuttons

RESET Pushbutton

Power Supply

+3.3V &+3.3VA

USB

Typ e-B

Figure 1-1. Block Diagram of the 56F8037EVM

1.2 56F8037EVM Connections

There are several power connection arrangements supported by the 56F8037EVM. Power can be
provided to the 56F8037EVM by using a USB connector, P2, attached to a PC or USB hub.
Power can be provided to the 56F8037EVM by an external +9.0V DC power supply using the

2.1mm power jack, P1, or via the Daughter Card connector, P3. However, the debug interconnect
is always the same using the JTAG connector, J1.

1.2.1 USB Power Connection

An interconnection diagram is shown in Figure 1-2 for connecting the JTAG Debug and USB
between a PC and the 56F8037EVM.

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USB A/B Cable

56F8037EVM Connections

PC-compatible
Computer

USB A/B cable

USB-TAP

Connect cable

to USB port

Connect cable to USB port

56F8037EVM

J1

P2

Figure 1-2. 56F8037EVM Cabling for USB Power

Perform the following steps for USB power connection:

1. Connect the USB-TAP’s USB cable to a USB port on the host computer.

2. Connect the other end of the USB-TAP cable to the USB-TAP module. Connect the
ribbon cable from the USB-TAP module to J1 on the 56F8037EVM, shown in

Figure 1-2.

This provides the connection which allows the host computer to control the debug
functions on the 56F8037EVM board.

3. Connect the second USB cable to another USB port on the host computer or a USB hub.

4. Connect the other end of the second USB cable to the USB connector, P2, on the
56F8037EVM board, shown in

Figure 1-2. The green Power-ON LED, LED7, will

illuminate when power is correctly applied.

1.2.2 External +9.0V DC Power Connection

An interconnection diagram is shown in Figure 1-3 for connecting the PC and a user-supplied
external +9.0V DC power supply to the 56F8037EVM.

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Freescale Semiconductor 1-3
Preliminary

USB A/B Cable

PC-compatible
Computer

USB-TAP

Connect cable

to USB port

External

+9V

Power

56F8037EVM

J1

P1

with 2.1mm,
receptacle
connector

Figure 1-3. 56F8037EVM Cabling for External +9V Power

Perform the following steps for +9.0V DC power connection:

1. Connect the USB-TAP’s USB cable to a USB port on the host computer.

2. Connect the other end of the USB-TAP cable to the USB-TAP module. Connect the
ribbon cable from the USB-TAP module to J1 on the 56F8037EVM, shown in

Figure 1-3.

This provides the connection which allows the host computer to control the board.

3. Make sure that the external +9V DC, 450mA power supply is not plugged into any AC
power source.

4. Connect the 2.1mm output power plug from the external power supply into P1 on the
56F8037EVM, shown in

Figure 1-3.

5. Apply power to the external power supply. The green Power-ON LED, LED7, will
illuminate when po wer is correctly applied.

1.2.3 External +3.3V DC Power Connection

An interconnection diagram is shown in Figure 1-4 for connecting the PC and a user-supplied
Daughter Card providing +3.3V DC to the 56F8037EVM.

56F8037EVM User Manual, Rev. 0

1-4 Freescale Semiconductor

Preliminary

USB A/B Cable

56F8037EVM Connections

PC-compatible
Computer

USB-TAP

Daughter Card

56F8037EVM

J1

P3

Figure 1-4. 56F8037EVM Cabling for External +3.3V Power

Perform the following steps to provide +3.3V DC power from a Daughter Card:

1. Connect the USB-TAP’s USB cable to a USB port on the host computer.

2. Connect the other end of the USB-TAP cable to the USB-TAP module. Connect the
ribbon cable from the USB-TAP module to J1 on the 56F8037EVM, shown in
This provides the connection which allows the host computer to control the board.

3. Make sure the power supply on the Daughter Card is turned OFF.

Figure 1-4.

4. Connect the Daughter Card to P3 on the 56F8037EVM, shown in Figure 1-4.

5. Apply power to the Daughter Card. The green Power-ON LED, LED7, will illuminate
when power is correctly applied.

Introduction, Rev. 0

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56F8037EVM User Manual, Rev. 0

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Chapter 2 Technical Summary

The 56F8037EVM is designed as a versatile development card using the 56F8037 processor,
allowing the creation of real-time software and hardware products to support a new generation of
applications in servo and motor control, digital and wireless messaging, digital answering
machines, feature phones, modems, and digital cameras. The power of the 16-bit 56F8037
processor, combined with the on-board USB interface and daughter card connector, makes the
56F8037EVM ideal for developing and implementing many motor control algorithms, as well as
for learning the architecture and instruction set of the 56F8037 processor.

The main features of the 56F8037EVM, with board and schematic reference designators, include:

• 56F8037, a 16-bit +3.3V digital signal controller operating at 60MHz [U1]

• Joint Test Action Group (JTAG) port interface connector, for an external debug Host
Target Interface [J1]

• USB interface, for easy connection to a host processor [U2 and P2]

• Daughter Card connector, to allow the user to connect his own PWM, ADC, DAC, SCI,
SPI or GPIO-compatible peripheral to the digital signal controller [P3]

• On-board power regulation provided from an external +9V DC-supplied power input [P1]

• Light Emitting Diode (LED) power indicator [LED7]

• Six on-board real-time user debugging LEDs [LED1-6]

• Manual RESET pushbutton [S1]

• Manual interrupt #1 pushbutton [S2]

• Manual interrupt #2 pushbutton [S3]

Technical Summary, Rev. 0

Freescale Semiconductor 2-1
Preliminary

2.1 56F8037

The 56F8037EVM uses a Freescale 56F8037 part, designated as U1 on the board and in the
schematics. This part will operate at a maximum external bus speed of 60MHz. A full description
of the 56F8037, including functionality and user information, is provided in these documents:

• 56F8037 Technical Data Sheet, (MC56F8037): Electrical and timing specifications, pin
descriptions, device specific peripheral information and package descriptions

• 56F802X and 56F803X Peripheral Reference Manual, (MC56F80XXRM): Detailed
description of peripherals of the 56F802x and 56F803x devices

• DSP56800E Reference Manual, (DSP56800ERM): Detailed description of the 56800E
family architecture, 16-bit core processor, and the instruction set

Refer to these documents for detailed information about chip functionality and operation. They
can be found on this URL:

www.freescale.com

2.2 USB Serial Communications

The 56F8037EVM provides an RS-232 to USB bridge interface by the use of an USB bridge part,
Silicon Labs CP2102, designated as U2. Refer to the USB schematic details in

Appendix A. The

USB bridge handles all the USB 2.0 protocol interactions and transitions the SCI port’s +3.3V
signal levels to USB-compatible signal levels and connects to the host’s USB port via connector
P2. The SCI ports signals, GPIOB6 and GPIOB7, or GPIOC12 and GPIOC8, can be
disconnected from the USB bridge by pulling the jumpers at JG3, RxD, and JG4, TxD, on the
board. The jumper options available on JG3 and JG4 for the SCI port are shown in

Table 2-1 and

Table 2-2.

Table 2-1. SCI RxD Signal Options

JG3

Pin # Signal Description

1 GPIO Port B, Bit 6 RXD0

2 RxD From CP2102

3 GPIO Port C, Bit 12 RXD1

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Preliminary

Debug LEDs

.

Table 2-2. SCI TxD Signal Options

JG4

Pin # Signal Description

1 GPIO Port B, Bit 7 TXD0

2 TxD To CP2102

3 GPIO Port C, Bit 8 TXD1

2.3 Debug LEDs

Six on-board Light-Emitting Diodes, (LEDs), are provided to allow real-time debugging for user
programs. These LEDs will allow the programmer to monitor program execution without having
to stop the program during debugging; refer to
each LED.

Setting GPIOA0, GPIOA1, GPIOA2, GPIOA3, GPIOA4, or GPIOA5 to a Logic One value will
turn on the associated LED.

Figure 2-1. Table 2-3 describes the control of

56F8037

GPIOA0

GPIOA1

GPIOA2

GPIOA3

GPIOA4

GPIOA5

INVERTING BUFFER

+3.3V

RED LED

YELLOW LED

GREEN LED

RED LED

YELLOW LED

GREEN LED

Figure 2-1. Diagram of the Debug LED Interface

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Freescale Semiconductor 2-3
Preliminary

Table 2-3. LED Control

Controlled by

User LED Color Signal

LED1 RED GPIO Port A, Bit 0

LED2 YELLOW GPIO Port A, Bit 1

LED3 GREEN GPIO Port A, Bit 2

LED4 RED GPIO Port A, Bit 3

LED5 YELLOW GPIO Port A, Bit 4

LED6 GREEN GPIO Port A, Bit 5

2.4 Debug Support

A JTAG connector, J1, on the 56F8037EVM allows the connection of an external Host Target
Interface for downloading programs and working with the 56F8037’s registers. This connector is
used to communicate with an external Host Target Interface, which passes information and data
back and forth with a host processor running a debugger program.
for this connector.

Table 2-4 shows the pin-out

Table 2-4. JTAG Connector

J1

Pin # Signal Pin # Description

1 TDI 2 GND

3 TDO 4 GND

5 TCK 6 GND

7 N/C 8 KEY

9 RESET 10 TMS

11 +3.3V DC 12 N/C

13 N/C 14 N/C

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Power Supply

2.5 External Interrupts

Two on-board pushbutton switches are provided for external interrupt generation, as shown in

Figure 2-2. S2 allows the user to generate a hardware interrupt, IRQ #1, using GPIO Port B,

Bit 2. S3 allows the user to generate a hardware interrupt, IRQ #2, using GPIO Port B, Bit 3.
These two switches allow the user to generate interrupts for their user-specific programs.
Alternately, the user can use GPIO Port B, Bit
jumper at JP5, pins 1 and 2, and place the jumper between JP5 pins 2 and 3. Also, the user can
use GPIO Port

B, Bit 5, for IRQ #2. To accomplish this, remove the jumper at JP6, pins 1 and 2,

and place the jumper between JP6 pins 2 and 3.

+3.3V

S2

4, for IRQ #1. To accomplish this, remove the

56F8037

4.7K
1

3

JG5

GPIOB2

2

GPIOB4

+3.3V

S3

4.7K

1

3

JG6

GPIOB3

2

GPIOB5

Figure 2-2. Schematic Diagram of the User Interrupt Interface

2.6 Reset

Logic is provided on the 56F8037 to generate an internal Power-On RESET. Additional reset
logic is provided to support the RESET signal from the JTAG connector and the user RESET
pushbutton, S1; refer to the schematics in

Appendix A.

2.7 Power Supply

The 56F8037EVM supports the option of power being provided from three different sources.
Since only one power supply source can be active at one time, the selection of the active power
supply source is made by the jumper group formed by JG1 and JG2.
jumper options for selecting each power supply source. Jumpering JG2, pins 2 and 3, the default
selection, selects the USB power supply source. Jumpering JG2, pins 1 and 2, selects the external
power supply source. Jumpering JG1 to JG2, pin 2, uses the Daughter Card power source.

Table 2-5 depicts the

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Freescale Semiconductor 2-5
Preliminary

Table 2-5. Power Source Selector

JG1 JG2

Pin # Description Pin # Description

1 External Power Supply Source

1 Daughter Card Source 2 Power to 56F8037EVM

3 USB Power Supply Source

2.7.1 USB Power Source

The main power source for the 56F8037EVM is through the USB connector, P2. This +5.0V
USB bus input power goes to the USB bridge device which creates a regulated +3.3V output
voltage. The USB bus power input is restricted to 450mA maximum for a high power device.
However, the USB bridge regulator output is limited to 350mA. This +3.3V DC voltage
regulation is used by the 56F8037 processor, ADC, LEDs, JTAG interface and supporting logic;
refer to schematics in
Power-ON LED, referenced as LED7, will illuminate.

Appendix A. When power is applied to the 56F8037EVM board, the

2.7.2 External +9V DC Power Source

The optional external +9V DC power input to the 56F8037EVM is through the 2.1mm coax
power jack, P1. This input power passes through a reverse power-blocking diode to provide a DC
supply input for the +3.3V voltage regulator, U4, and the +5.0V voltage regulator, U5. A 450mA
external power supply is sufficient to power the 56F8037EVM. However, less than 300mA is
required by the 56F8037EVM board. The remaining current is available for custom control
applications when connected to the Daughter Card connector. The 56F8037EVM provides
+5.0V
processor, ADC, JTAG interface and supporting logic; refer to schematics in

DC regulation for the CAN transceiver and, +3.3V DC voltage regulation for the

Appendix A. When

power is applied to the 56F8037EVM board, the Power-ON LED, referenced as LED7, will
illuminate.

2.7.3 Daughter Card Power Source

The optional Daughter Card power input to the 56F8037EVM is through the Daughter Card
connector, P3. Regulated +3.3V voltage is provided on P3, pin 1. The Daughter Card power
supply ground reference is provided on P3, pin 3. At least 300mA should be provided to power
the 56F8037EVM board. This input +3.3V DC voltage will power the processor, ADC, DAC,
LEDs, JTAG interface and supporting logic; refer to schematics in
applied to the 56F8037EVM board, the Power-ON LED, referenced as LED7, will illumate.

Appendix A. When power is

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Daughter Card Connector

2.8 Daughter Card Connector

The 56F8037EVM contains a Daughter Card connector, P3, which contains the processor’s
peripheral port signals. The daughter card connector is used to connect a Daughter Card or a
user-specific Daughter Card to the processor’s peripheral port signals. The Daughter Card
connector is a 60-pin 0.1” pitch connector with signals for RESET, SPI, SCI, PWM, ADC, DAC
and GPIO ports.

Table 2-6 shows the Daughter Card connector’s signal-to-pin assignments.

Table 2-6. Daughter Card Connector Description

P3

Pin # Signal Pin # Signal

1 +3.3V 2 GPIOA10 / CINA2 / TB2

3 GND 4 GPIOA7 / RESET / V

5 GPIOB7 / TXD0 / SCL 6 GPIOD4 / EXTAL

7 GPIOB6 / RXD0 / SDA / CLKIN 8 GPIOD5 / XTAL / CLKIN

9 GPIOA0 / PWM0 10 GPIOC0 / ANA0 / CINA3

11 GPIOA1 / PWM1 12 GPIOC1 / ANA1

13 GPIOB4 / TA0 / CLKO / SS1 /

TB0 / SCR2

15 GPIOB5 / TA1 / FAULT3 / CLKIN 16 GPIOC3 / ANA3 / V

17 GPIOB3 / MOSI0 / T3 / PSRC1 18 GPIOC4 / ANB0 / CINB3

19 GPIOB2 / MISO0 / TA2 / PSRC0 20 GPIOC5 / ANB1

21 GPIOB0 / SCLK0 / SCL 22 GPIOC6 / ANB2 / V

23 GPIOB1 / SS0 / SDA 24 GPIOC7 / ANB3 / V

25 GPIOD0 / TDI 26 GPIOB1 / SS0 / SDA

27 GPIOD1 / TDO 28 GPIOB0 / SCLK0 / SCL

29 GPIOD2 / TCK 30 GPIOA2 / PWM2

31 GPIOD3 / TMS 32 GPIOA3 / PWM3

14 GPIOC2 / ANA2 / V

PP

REFH

REFL

REFH

REFL

33 GPIOA6 / FAULT0 / TA0 34 GPIOA4 / PWM4

35 GPIOA11 / CINB2 / TB3 36 GPIOA5 / PWM5

37 GPIOA12 / TB1 / SCLK1 / TA1 38 CINA1 / FAULT1 / TA2

39 GPIOA13 / TB2 / MISO1 / TA2 40 FAULT2 / TA3 / CINB1

Technical Summary, Rev. 0

Freescale Semiconductor 2-7
Preliminary

Table 2-6. Daughter Card Connector Description (Continued)

Pin # Signal Pin # Signal

41 GPIOA14 / TB3 / MOSI1 / TA3 42 N/C

43 GPIOB8 / SCL / CANTX 44 GPIOC8 / ANA4 / TXD1

45 GPIOB9 / SDA / CANRX 46 GPIOC9 / ANA5

47 GPIOB10 / COUTA / TB0 48 GPIOC10 / ANA6

49 GPIOB11 / COUTB / TB1 50 GPIOC11 / ANA7

51 GPIOB12 / CANTX 52 GPIOC12 / ANB4 / RXD1

53 GPIOB13 / CANRX 54 GPIOC13 / ANB5

55 N/C 56 GPIOC14 / ANB6

57 GPIOD6 / DAC0 58 GPIOC15 / ANB7

59 GPIOD7 / DAC1 60 GNDA

2.9 Test Points

P3

The 56F8037EVM board has two test points:

• +3.3V, TP1

• Digital Ground (GND), TP2

56F8037EVM User Manual, Rev. 0

2-8 Freescale Semiconductor

Preliminary

Appendix A 56F8037EVM Schematics

56F8037EVM Schematics, Rev. 0

Freescale Semiconductor Appendix A-1
Preliminary

1.0

Rev.

E

D

C

GPIOD5GPIOD4

1

2

DNP

JG10

XTALEXTAL

DNP

1M

R30

Y1

External Crystal Option

GPIOA0

GPIOA1

GPIOA2

5655474843

2

1

DNP

JG9

GPIOA3

GPIOA5

/RESET

GPIOA8

GPIOA10

GPIOA9

GPIOA6

GPIOA4

39

343136

GPIOA11

5356

GPIOA13

GPIOA12

374445

E

Place close to

VDDA and VSSA

on U1

C14

0.1uF

C19

22pF

DNP

DNP

8.00MHz

C18

22pF

DNP

GPIOA14

GPIOB0

GPIOB1

GPIOB2

24233

32

VDDA

C6

2.2uF

L1

Ferrite Bead

+

+3.3V

GPIOB3

GPIOB4

GPIOB5

GPIOB6

GPIOB7

GPIOB8

4138

3

54

C2

22uF

GPIOB9

GPIOB10

GPIOB11

GPIOB12

GPIOB13

GPIOC0

46

605730

241922

L2

GPIOC1

GPIOC2

GPIOC3

20

GNDA

Ferrite Bead

GND

GPIOC4

GPIOC5

GPIOC6

GPIOC7

GPIOC8

26

14

1058131121

C8

2.2uF

VCAP2VCAP1

C7

2.2uF

GPIOC9

GPIOC10

GPIOC11

23

Freescale Semiconductor

GPIOC12

GPIOC13

GPIOC14

GPIOC15

626112925

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MC56F8037 Processor

17Monday , Ma rch 27, 20 06

MCD Design

D

Des igne r: She et of

MC56F8037EVM.DSN

C

Document

Date:

Number

KEY

8

TDI

TDO

TCK

A

Size

B

246

135791113

JTAG Connector

A

Figure A-1. MC56F8037 Processor

GPIOC5/ANB1

GPIOA0/PWM0

GPIOA1/PWM1

GPIOA2/PWM2

GPIOA3/PWM3

RESET/GPIOA7/VPP

GPIOA10/CINA2/TB2

GPIOA11/CINB2/TB3

B

U1

VDD_IO1

7

A

+3.3V

GPI OA6/FAUL T0/TA0

GPIOA9/FAULT2/TA3/CINB1

GPIOA8/CINA1/FAULT1/TA2

GPIOA4/PWM4/FAULT1/TA2

GPIOA5/PWM5/FAULT2/TA3

VDD_IO2

41

C12

C11

0.1uF

0.1uF

+3.3V

4 4

GPIOB1/SS0/SDA

GPIOB0/SCLK0/SCL

GPIOA13/TB2/MISO1/TA2

GPIOA14/TB3/MOSI1/TA3

GPIOA12/TB1/SCLK1/TA1

VDD_IO3

50

C13

0.1uF

+

C1

22uF

+3.3V

GPIOB7/TXD0/SCL

GPIOB8/SCL/CANTX

GPIOB9/SDA/CANRX

GPIOB10/COUTA/TB0

GPIOB6/RXD0/SDA/CLKIN

GPIOB2/MISO0/TA2/PSRC0

GPIOB3/MOSI0/TA3/PSRC1

GPIOB5/TA1/FAULT3/CLKIN

GPIOB4/TA0/CLKO/SS1/TB0/PSCR2

TDI/GPIOD0

TDO/GPIOD1

TCK/G PIOD2

59642963535218

TDI

TCK

TDO

3 3

GPIOC1/ ANA1

GPIOB12/CANTX

GPIOB13/CANRX

GPIOC0/ANA0/CINA3

GPIOB11/COUTB/TB1

TMS/GP IOD3

GPIOD4/EXTAL

TMS

GPIOD4

GPIOC3/ANA3/VREFL

GPIOC2/ANA2/VREFH

VCAP1

VCAP2

GPIOD5/EXTAL/CLKIN

GPIOD6/DAC0

GPIOD7/DAC1

28

49

15

VCAP2

VCAP1

GPIOD5

GPIOD7

GPIOD6

GPIOC9/ ANA5

GPIOC14/ANB6

GPIOC15/ANB7

GPIOC13/ANB5

GPI OC11/ ANA7

GPI OC10/ ANA6

GPIOC8/ANA4/TXD1

GPIOC4/ANB0/CINB3

GPIOC7/ANB3/VREFL

VSSA

GNDA

2 2

GPIOC12/ANB4/RXD1

MC56F8037FGE

+3.3V

VSS_IO4

VSS_IO2

VSS_IO3

VSS_IO1

8

512740

16

GPIOC6/ANB2/VREFH

VDDA

17

VDDA

Title

R11

4.7K

TMS

101214

J1

/RESET

+3.3V

1 1

56F8037EVM User Manual, Rev. 0

Appendix A-2 Freescale Semiconductor

Preliminary

1.0

Rev.

E

E

27Monday, March 27, 2006

+3.3V

VCC

270

270

R1

PWMA0

D

LED1

PWMA1

LED2

RED LED

R3

PWMA2

LED3

YELLOW LED

270

R2

270

R4

PWMA3

LED4

GREEN LED

R5

PWMA4

LED5

RED LED

270

R6

270

PWMA5

LED6

YELLOW LED

GREEN LED

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MCD Design

D

Des igne r: She et of

74AC04

U3A

1 2

C

B

+3.3V

GPIOA0

GPIOB2

123

JG5

R8

4.7K

74AC04

U3B

3 4

GPIOA1

74AC04

U3C

5 6

GPIOA2

74AC04

U3F

13 12

GPIOA3

74AC04

U3E

11 10

GPIOA4

74AC04

U3D

9 8

GPIOA5

MC56F8037EVM.DSN

C

Freescale Semiconductor

Document

Date:

Number

GPIOB3

4.7K

GPIOB5

123

JG6

IRQ #2

Selector

/IRQ2

+3.3V

/RESET

R10

4.7K

GPIOB4

IRQ #1

Selector

/IRQ1

R9

+3.3V

Interrupt a nd Re set Switches & PWM LEDs

Title

A

Size

B

S2

IRQ #1

PUSHBUTTON

A

4 4

S3

IRQ #2

PUSHBUTTON

3 3

S1

RESET

PUSHBUTTON

2 2

1 1

Figure A-2. Interrupt and Reset Switches and PWM LEDs

A

56F8037EVM Schematics, Rev. 0

Freescale Semiconductor Appendix A-3
Preliminary

1.0

Rev.

E

E

37Tuesday, May 16, 2006

P2

VBUSD-D+

GND

Shield1

Shield2

CONNECTOR

456

USB TYPE-B

123

D3

31

31

D- D+

D2

DLP05LC

DLP05LC

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MCD Design

D

C

D+

D-

+5.0V

5

D-

U2

TXD

26

RXD

8287

4

D+

VBUS

REGIN

DTR

RI

RXD

DCD

DSR

2251

272423

TXD

Vusb

39

6

VDD

GNDRST

BYPASS

CP2102

SUSPEND

RTS

SUSPEND

CTS

11

12

/RST

R31

4.7K

C16

0.1uF

+5.0V

C9

2.2uF

Freescale Semiconductor

Vusb

C15

0.1uF

Document

USB Interface

Title

D

Des igne r: She et of

MC56F8037EVM.DSN

C

Date:

Number

A

Size

Figure A-3. USB Interface

123

B

A

JG3

RXD0

GPIOB6

4 4

RXD1

123

JG4

Selectors

SCI Port

TXD1

TXD0

GPIOB7

GPIOC12

GPIOC8

Vusb

B

RXD

TXD

DLP05LC

2

1

A

1 1

R32

4.7K

R33

4.7K

Vusb

3 3

2 2

3

56F8037EVM User Manual, Rev. 0

Appendix A-4 Freescale Semiconductor

Preliminary

1.0

Rev.

7Monday, March 27, 2006

E

E

4

12

246

8

10

J21357

9

CAN BUS

D

JG11

CONNECTOR

R29

CAN BUS

120 1/4W

TERMINATION

Austin, Texas 78735

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MCD Design

D

Des igne r: She et of

CANH

Vca n

C

R28

Vca n

B

1K

CAN_TX

CANL

567

VREF

RXD

4

2

GND

CANL

CANH

SLOPE

PCA82C250TD

8

CAN_RX

C17

0.1uF

Vca n

C10

2.2uF

Freescale Semiconductor

MC56F8037EVM.DSN

C

Document

Date:

Number

CAN Interface and Power Supplies

Title

A

Size

B

3

VCC

U6

TXD

1

123

JG7

GPIOB8

A

4 4

123

JG8

GPIOB9

GPIOB12

GPIOB13

3 3

2 2

1 1

Figure A-4. CAN Interface and Power Supplies

A

56F8037EVM Schematics, Rev. 0

Freescale Semiconductor Appendix A-5
Preliminary

1.0

Rev.

E

ANB4GPIOC0

ANB5

ANB6

7Monday, March 27, 2006

E

5

R24

100

C32

0.0022uF

GPIOC12

R25

100

C33

0.0022uF

GPIOC13

R26

100

C34

0.0022uF

GPIOC14

R27

100

C35

0.0022uF

GPIOC15

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MCD Design

D

ANB1

ANB2

ANB3 ANB7

D

Des igne r: She et of

R20

100

C28

0.0022uF

GPIOC4

C

ANA4 ANB0

R16

100

C24

0.0022uF

B

GPIOC8

R21

100

C29

0.0022uF

GPIOC5

ANA5

R17

100

C25

0.0022uF

GPIOC9

R22

100

C30

0.0022uF

GPIOC6

ANA6

R18

100

C26

0.0022uF

GPIOC10

R23

100

C31

0.0022uF

GPIOC7

MC56F8037EVM.DSN

C

Freescale Semiconductor

R19

100

C27

0.0022uF

GPIOC11

Document

Date:

Number

ADC C ha nn el A & B Input Filters

Title

A

Size

B

Figure A-5. ADC Channel A and B Input Filters

ANA0

R12

100

C20

A

0.0022uF

4 4

ANA1

R13

100

C21

0.0022uF

GPIOC1

ANA2

R14

100

C22

0.0022uF

GPIOC2

3 3

ANA3 ANA7

R15

100

C23

0.0022uF

GPIOC3

2 2

1 1

A

56F8037EVM User Manual, Rev. 0

Appendix A-6 Freescale Semiconductor

Preliminary

1.0

Rev.

7Monday , Ma rch 27, 20 06

E

E

6

Austin, Texas 78735

6501 William Cannon Drive West

Microcontroller Division

[phone] FAX: [phone]

D

D

Des igne r: She et of

/RESET

ANA0

ANA1

ANA2

ANB0

ANB1

ANB2

GPIOB1

GPIOB0

GPIOA2

GPIOA3

GPIOA4

MCD Design

PWM2

SCLK0/SCL

PWM3

GPIOD2

GPIOD1

GPIOD3

TDI

TCK

TDO

GPIOA5

GPIOA8

GPIOA9

PWM4

CINA1/FAULT1/TA2

PWM5

FAULT2/TA3/CINB1

FAULT0/TA0

CINB2/TB3

TB2/MISO1/TA2

TB1/SCLK1/TA1

TMS

GPIOA6

GPIOA13

GPIOA12

GPIOA11

ANA4

ANA5

ANA6

ANA7

GPIOC8/TXD1

GPIOC10

GPIOC9

GPIOC11

TB3/MOSI1/TA3

SDA/CANRX

COUTB/TB1

SCL/CANTX

COUTA/TB0

GPIOB9

GPIOB8

GPIOB11

GPIOB10

GPIOA14

ANB4

ANB5

ANB6

ANB7

GNDA

GPIOC12/RXD1

GPIOC14

GPIOC13

GPIOC15

51 52

53 54

55 56

57 58

59 60

CANRX

CANTX

DAC1

DAC0

GPIOD7

GPIOD6

GPIOB13

GPIOB12

GND GNDA

I/O SIGNAL SOCKET

(LOCATED ON BOTTOM OF BOARD)

Freescale Semiconductor

I/O Connector

Title

GNDA

MC56F8037EVM.DSN

C

Document

Date:

Number

A

Size

Figure A-6. I/O Connector

B

ANA3

GPIOA10

GPIOD4

GPIOD5

C

B

CINA2/TB2

EXTAL

GPIOC0/CINA3

GPIOC2/VREFH

GPIOA7/VPP

XTAL/CLKIN

GPIOC1

246

8

101214161820222426283032343638404244464850

P3

135791113151719212325272931333537394143454749

Vio

GND

TXD0/SCL

PWM0

TA0/CLKO/SS1/TB0/SCR2

RXD0/SDA/CLKIN

PWM1

GPIOA1

GPIOA0

GPIOB6

GPIOB7

ANB3

GPIOC4/CINB3

GPIOC6/VREFH

SS0/SDA

GPIOC3/VREFL

GPIOC5

GPIOC7/VREFL

MOSI0/TA3/PSRC1

SCLK0/SCL

GPIOD0

TA1/FALT3/CLKIN

MISO0/TA2/PSRC0

SS0/SDA

GPIOB1

GPIOB0

GPIOB2

GPIOB3

GPIOB5

GPIOB4

12

34

J3

DAC0

A

4 4

3 3

DAC1

GPIOD6

GPIOD7

2 2

1 1

A

56F8037EVM Schematics, Rev. 0

Freescale Semiconductor Appendix A-7
Preliminary

1.0

Rev.

7Monday , Ma rch 27, 20 06

E

E

7

LED7

R7

270

+3.3V

GREEN LED

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POWER GOOD LED

D

TP2

DNP

1

MCD Design

D

GROUND

Des igne r: She et of

TEST POINT

C3

22uF

6.3VDC

+

Vreg

C

B

9VDC INPUT

A

EXTERNAL POWER

41

VOUTGND

U4

+9V

D1

P1

LM1117MPX-3.3

VIN VO UT

3 2

C5

22uF

16VDC

+

FM4001

321

2.1mm

Power Jack

C4

22uF

6.3VDC

+

Vca n

41

VOUTGND

U5

LD1117S50CTR

VIN VO UT

3 2

+9V

TP1

1

+3.3V

TEST POINT

DNP

+3.3V

MC56F8037EVM.DSN

C

Freescale Semiconductor

Document

Date:

Number

POWER SUPPLY

Title

A

Size

Figure A-7. Power Supply

USB

3

JG1

1

I/O

2

+3.3V

1

JG2

Power Selector

REG

Vreg Vus b

Vio

B

3

21

4

LM1117

LD1117

A

4 4

3 3

2 2

1 1

56F8037EVM User Manual, Rev. 0

Appendix A-8 Freescale Semiconductor

Preliminary

Appendix B 56F8037EVM Bill of Material

Qty Description Ref. Designators Vendor Part #

1 MC56F8037 U1 Freescale, MC56F8037VFBE

1 SCI to USB Bridge U2 Silicon Lab, CP2102-GM

1 74AC04 U3 ON Semiconductor, MC74AC04DG

1 +3.3V Voltage Regulator U4 National Semiconductor, LM1117MPX-3.3/NOPB

1 +5.0V Voltage Regulator U5 STMicroelectronics, LD1117S50CTR

1 CAN Transceiver U6 Philips Semiconductor, PCA82C250TD

Integrated Circuits

Resistors

7 270 Ω, 0603 R1—R7 SMEC, RC73L2X271JTF

7 4.7 KΩ, 0603 R8-R11, R31-R33 SMEC, RC73L2X472JTF

16 100 Ω, 0603 R12—R27 SMEC, RC73L2X101JTF

1 1K Ω, 0603 R28 SMEC, RC73L2X102JTF

1 120 Ω, 1/4W R29 YAGEO, CFR-25JB-120R

0 1.0M Ω, 0603 R30 (Optional) SMEC, RC73L2X105JTF

Inductors

2 Ferrite Bead, 0603 L1—L2 SMEC, FCB0603-1000HNTF

LEDs

2 Red LED, 0805 LED1, LED4 Lite-ON, LTST-C171CKT

2 Yellow LED, 0805 LED2, LED5 Lite-ON, LTST-C171YKT

3 Green LED, 0805 LED3, LED6, LED7 Lite-ON, LTST-C171GKT

56F8037EVM Bill of Material, Rev. 0

Freescale Semiconductor Appendix B-1
Preliminary

Qty Description Ref. Designators Vendor Part #

Diode

1 1N4003, SMA D1 ON Semiconductor, MRA4003T3G

2 TVS, SOT-23 D2, D3 Diodes Electronics, DLP05LC-7-F

Capacitors

4 22µF, +6.3V DC, EIA-A C1—C4 SMEC, ESR900-22K6.3AF

1 22µF, +16V DC, EIA-B C5 SMEC, ESR600-22K16BF

5 2.2µF, 0805 C6—C10 SMEC, MCCB225M2NRTF

7 0.1µF, 0603 C11—C17 SMEC, MCCA104K1NRTF

2 22pF, 0603 C18 , C19 (Optional) SMEC, MCCA220K1NRTF

16 0.0022µF, 0603 C20—C35 SMEC, MCCA222K1NRTF

Test Points

0 +3.3V Test Point TP1 (Optional) KEYSTONE, 5000, RED

0 GND Test Point TP2 (Optional) KEYSTONE, 5001, BLACK

Connectors

1 2.1mm Power Jack P1 CUI, PJ-102A

1 USB Type-B Connector P2 MOLEX, 67068-8000

1 Daughter Card

Connector

1 1x1 Header JG1 SAMTEC, TSW-101-07-G-S

7 3x1 Header JG2—JG8 SAMTEC, TSW-103-07-G-S

2 2x1 Header JG9, JG10 (Optional) SAMTEC, TSW-102-07-G-S

1 2x1 Header JG11 SAMTEC, TSW-102-07-G-S

1 7x2 JTAG Header J1 SAMTEC, TSW-107-07-G-D

1 5x2 Header J2 SAMTEC, TSW-105-07-G-D

1 2x2 Header J3 SAMTEC, TSW-102-07-G-D

3 SPST Pushbutton S1—S3 OMRON,B3F-1022

P3 SAMTEC, SSM-130-L-DV-LC

Switches

56F8037EVM User Manual, Rev. 0

Appendix B-2 Freescale Semiconductor

Preliminary

Qty Description Ref. Designators Vendor Part #

Crystals

1 8.000MHz Crystal Y1 (Optional) CITIZEN CRYSTAL, HCM49-8.000MABJ-UT

Miscellaneous

2 Rubber Feet, 0.4” 3M, SJ-5007 (BLACK)

8 0.1” Shunt Jumpers SULLINS, SPC02SYAN

56F8037EVM Bill of Material, Rev. 0

Freescale Semiconductor Appendix B-3
Preliminary

56F8037EVM User Manual, Rev. 0

Appendix B-4 Freescale Semiconductor

Preliminary

INDEX

Numerics

450mA power supply 6
56F8000 Peripheral Reference Manual x, 2
56F8013 ix
56F8013 Technical Data x
56F8013 Technical Data Sheet 2

A

A/D ix
ADC ix
Analog-to-Digital

A/D ix

Analog-to-Digital Converter

ADC ix

D

Daughter Card Expansion

interface 1
Debugging 3
Demo Board ix
Demonstration Board

Demo Board ix
Digital Signal Controller

DSC ix
DSC ix
DSP56800E Reference Manual x, 2

E

Enhanced On-Chip Emulation

EOnCE ix
EOnCE ix

G

General Purpose Input and Output

GPIO ix
GPIO ix

J

Joint Test Action Group

JTAG ix
JTAG ix
JTAG/Enhanced OnCE (EOnCE) 1

L

LED ix
Light Emitting Diode

LED ix
Low-profile Quad Flat Package

LQFP ix
LQFP ix

O

On-board power regulation 1
OnCE ix
On-Chip Emulation

OnCE ix

P

PCB ix
peripheral port signals 7
Printed Circuit Board

PCB ix
Pulse Width Modulation

PWM ix
PWM ix

R

real-time debugging 3
RS-232

level converter 2

schematic diagram 2

S

I

IC ix
Integrated Circuit

IC ix

Index, Rev. 0

Freescale Semiconductor i
Preliminary

SCI ix
Serial Communications Interface

SCI ix
Serial Peripheral Interface

SPI ix
SPI ix

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This product incorporates SuperFlash® technology licensed from SST.

© Freescale Semiconductor, Inc. 2005. All rights reserved.

MC56F8037EVMUG
Rev. 0
09/2006