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Freescale Semiconductor
Advance Information
Enhanced Class B Serial
Transceiver
The 33990 is a serial transceiv er designed to provide bi- directional
half-duplex communication meeting the automotive SAE Standard J1850 Class
is designed to interface directly to on-board vehicle microcontrollers
and serves to transmit and receive data on a single-wire bus at data
rates of 10.4
The 33990 operates directly from a v ehicle's 12
functions in a true logic fashion as an I/O interface between the
microcontroller's 5.0
to 7.0
is short circuit current limited.
Features
• Designed for SAE J-1850 Class B Data Rates
• Full Operational Bus Dynamics Over a Supply Voltage of 9 .0 V
• Ambient Operating Temperature of -40°C to 125°C
• Interfaces Directly to Standard 5.0 V CMOS Microcontroller
• BUS Pin Protected Against Shorts to Battery and Ground
• Thermal Shutdown with Hysteresis
• Voltage Waveshaping of Bus Output Driver
• Internally Reverse Battery Protected
•40 V Max V
• Pb-Free Packaging Designated by Suffix Code EF
B Data Communication Network Interface spe cification. It
kbps using Variable Pulse Width Modulation (VPWM).
V battery system and
V CMOS logic level swings and the required 0 V
V waveshaped signal swings of the bus. The bus output driver
V
to 16
Capability
BAT
J-1850 SERIAL TRANSCEIVER
ORDERING INFORMATION
Device
MC33990D/DR2
MCZ33990EF/R2
Document Number: MC33990
Rev 3.0, 11/2006
33990
D SUFFIX
EF SUFFIX (PB-FREE)
98ASB42564B
8-PIN SOICN
Temperature
Range (T
-40°C to 125°C 8 SOICNN
)
A
Package
+VBAT
SLEEP
TX
RX
4X/LOOP
33990
BUS
LOAD
GND
MCU
V
BAT
Figure 1. 33990 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
Primary
Node
Secondary
Nodes
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INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
33990
VBAT
SLEEP
4.5 V
Reference
TX
RX
4X/LOOP
Note This device contains approximately 400 active transistors and 250 gates.
Digital Output
Driver
Figure 2. 33990 Simplified Internal Block Diagram
Voltage
Regulator
Waveshaping
Filter
4X Enable
Loopback
Bus
Driver
Thermal
Shutdown
Loss of Ground
Protection
BUS
LOAD
GND
33990
Analog Integrated Circuit Device Data
2 Freescale Semiconductor
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PIN CONNECTIONS
PIN CONNECTIONS
5
8
7
6
8
7
6
5
RX
TX
4X/LOOP
V
SLEEP
GND
LOAD
BUS
1
1
2
2
3
3
4
4
Figure 3. 33990 Pin Connections
Table 1. 33990 Pin Definitions
Pin Number Pin Name Definition
1 SLEEP
2 GND
3 LOAD
4 BUS
5 VBAT
6 4X/ LOOP
7 TX
8 RX
Enables the transceiver when Logic 1 and disables the transceiver when Logic 0.
Device ground pin.
Accommodates an external pull-down resist or to ground to provide loss of ground protection.
Waveshaped SAE Standard J-1850 Class B transmitter output and receiver input.
Provides device operating input power.
Tristate input mode control; Logic 0 = normal waveshaping, Logic 1 = waveshaping disabled for 4X
transmitting, high impedance = loopback mode.
Serial data input (DI) from the microcontroller to be transmitted onto Bus.
Bus received serial data output (DO) s ent to the microcontroller.
BAT
33990
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
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ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating Symbol Value Unit
VBAT DC Supply Voltage
Input I/O Pins
(2)
BUS and LOAD Outputs
ESD Voltage
Human Body Model
Machine Model
Storage Temperature
Operating Ambient Temperature
Operating Junction Temperature
Peak Package Reflow Temperature During Reflow
Thermal Resistance (Junction-to-Ambien t)
Notes
1. An external series diode must be used to provide reverse battery protection of the device.
2. SLEEP, TX, RX, and 4X / LOOP are normally connected to a microcontroller.
3. ESD1 testing is performed in accordance with the Huma n Body Model (C
4. ESD2 testing is performed in accordance with the Machine Model (C
5. Pin soldering temperature limit is for 1 0 seco nds maxi mum durat ion. No t desig ned for imm ersion solder ing. Exc eeding thes e limits may
cause malfunction or permanent damage to the device.
6. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review para m et rics.
(1)
(3)
(4)
(5), (6)
V
V
I/O(CPU)
V
V
ESD1
V
ESD2
T
T
PPRT
R
ZAP
= 200 pF, R
ZAP
BAT
BUS
STG
T
A
T
J
J-A
θ
= 100 pF, R
ZAP
ZAP
= 0 Ω).
-16 to 40 V
-0.3 to 7.0 V
-2.0 to 16 V
±2000
±200
-65 to 150 °C
-40 to 125 °C
-40 to 150 °C
Note 6.
180 °C / W
= 1500 Ω).
V
°C
33990
Analog Integrated Circuit Device Data
4 Freescale Semiconductor
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STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditio ns of 7.0 V ≤ V
Typical values reflect the parameter's approximate midpoint average value with V
are into the pin. All negative currents are out of the pin.
Characteristic Symbol Min Typ Max Unit
POWER CONSUMPTION
Operational Battery Current (RMS with Tx = 7.812 kHz Square Wave)
BUS Load = 1380 Ω to GND, 3.6 nF to GND
BUS Load = 257 Ω to GND, 20.2 nF to GND
Battery Bus Low Input Current
After SLEEP Toggle Low to High; Prior to Tx Toggling
After Tx Toggle High to Low
Sleep State Battery Current
V
= 0 V
SLEEP
BUS
BUS Input Receiver Threshold
Threshold High (Bus Increasing until Rx ≥ 3.0 V)
Threshold Low (Bus Decreasing until Rx ≤ 3.0 V)
Threshold in Sleep State (SLEEP = 0 V)
Hysteresis (V
BUS(IH)
BUS-Out Voltage (Tx = 5.0 V, 257 Ω ≤ R
8.2 V ≤ V
4.25 V ≤ V
BAT
BAT
≤ 16 V
≤ 8.2 V
Tx = 0 V
BUS Short Circuit Output Current
Tx = 5.0 V, -2.0 V ≤ V
BUS Leakage Current
-2.0 V ≤ V
0 V ≤ V
0 V ≤ V
≤ 0 V (≥ 2.0 ms after Tx Falls to 0 V)
BUS
≤ V
BUS
BAT
≤ 8.0 V
BUS
BUS Thermal Shutdown
Increase Temperature until V
BUS Thermal Shutdown Hysteresis
T
BUS (LIM)
- T
BUS (REEN)
LOAD Input Current with Loss of Ground
V
= -18 V (see Figure 4)
LOAD
BUS Input Current with Loss of Ground
V
= -18 V (see Figure 4)
BUS
Notes
7. Typical threshold value is the approximate actual occurring switch point value with V
8. Device characterized but not production tested for thermal shutdown.
9. Device characterized but not production tested for thermal shutdown hysteresis.
(7)
- V
BUS(IL)
≤ 4.8 V
BUS
(8)
(Tx = 5.0 V, I
BUS
, SLEEP = 0 V)
BUS(L)
= -0.1 mA)
BUS
≤ 2.5 V
(9)
to GND ≤ 1380 Ω)
≤ 16 V, -40°C ≤ T
BAT
A
I
BAT (OP1)
I
BAT (OP2)
I
BAT(BUS L1)
I
BAT(BUS L2)
I
BAT(SLEEP)
V
BUS(IH)
V
BUS(IL)
BUS
TH(SLEEP)
V
BUS(HYST)
V
BUS (OUT1)
V
BUS (OUT2)
V
BUS (OUT3)
I
BUS (SHORT)
I
BUS (LEAK1)
I
BUS (LEAK2)
I
BUS (LEAK3)
T
BUS (LIM)
T
BUS (LI MHYS)
I
LOAD (LOG)
I
BUS (LOG)
≤ 125°C, SLEEP = 5.0 V unless o therwise note d.
STATIC ELECTRICAL CHARACTERISTICS
= 13 V, TA = 25°C. All positive currents
BAT
ELECTRICAL CHARACTERISTICS
–
–
–
–
3.0
22.4
1.1
6.4
11.5
32
3.0
8.5
– 38.2 65
4.25
–
2.4
0.1
6.25
V
- 1.6
BAT
–
3.9
3.7
3.0
0.2
6.9
–
0.27
V
–
3.5
3.4
0.6
8.0
BAT
0.7
60 129 170
-0.5
-0.5
–
-0.055
0.5
0.25
0.5
1.0
0.5
150 170 190
10 12 15
-1.0 – 0.1
-1.0 – 0.1
= 13 V, TA = 25°C.
BAT
mA
mA
µA
V
V
mA
mA
°C
°C
mA
mA
33990
Analog Integrated Circuit Device Data
Freescale Semiconductor 5