Freescale 33981 B Service Manual

www.DataSheet4U.com

Freescale Semiconductor

Advance Information

Single High-Side Switch

Document Number: MC33981

Rev. 6.0, 5/2007

(4.0 mΩ), PWM clock up to 60kHz

The 33981 is a high-frequency, self-protected 4.0 mΩ R side switch used to replace electromechanical relays, fuses, and discrete devices in power management applications.

The 33981 can be controlled by Pulse-Width Modulation (PWM) with a frequency up to 60 kHz. It is designed for harsh environments, and it includes self-recovery features. The 33981 is suitable for loads with high in-rush current, as well as motors and all types of resistive and inductive loads.

The 33981 is packaged in a 12 x 12 non-leaded power-enhanced Power QFN package with exposed tabs.

Features

• Single 4.0 mΩ R

Maximum High-Side Switch

DS(ON)

• PWM Capability up to 60 kHz with Duty Cycle from 5% to 100%

• Very Low Standby Current

• Slew Rate Control with External Capacitor

• Overcurrent and Overtemperature Protection, Undervoltage

Shutdown and Fault Reporting

• Reverse Battery Protection

• Gate Drive Signal for External Low-Side N-Channel MOSFET with

Protection Features

• Output Current Monitoring

• Temperature Feedback

• Pb-Free Packaging Designated by Suffix Code PNA

DS(ON)

high-

33981B

HIGH-SIDE SWITCH

Bottom View

SCALE 1:1

PNA (Pb-Free Suffix)

98ARL10521D

16-PIN PQFN (12 X 12)

ORDERING INFORMATION

Device

MC33981BPNA/R2 - 40°C to 125°C

Temperature

Range (T

)

Package

16 PQFN

PWR

33981

MCU

I/O I/O I/O

I/O A/D A/D

CONF FS

INLS EN INHS TEMP CSNS

OCLS SR GND

VPWR

CBOOT

OUT

DLS

GLS

Figure 1. 33981 Simplified Application Diagram

* This document contains certain information on a new product. Specifications and information herein are subject to change without notice.

INTERNAL BLOCK DIAGRAM

TEMP

Temperature

Feedback

INTERNAL BLOCK DIAGRAM

Undervoltage

Detection

Bootstrap Supply

VPWR

CBOOT

INHS

INLS

CONF

5.0 V

CONF

DWN

Slew Rate Control

DWN

Cross-

Conduction

Logic

Current

Protection

Overtemperature

Detection

GND

Figure 2. 33981 Simplified Internal Block Diagram

Gate Driver

OUT Current

Recopy

5.0 V

CSNS

Low-Side

Gate Driver

and Protection

OCLS

OUT

GLS DLS

33981

Analog Integrated Circuit Device Data

2 Freescale Semiconductor

PIN CONNECTIONS

Package Transparent Top View

CBOOT

GLS

DLS

CONF

OCLS

INLS

INHS

TEMP

PIN CONNECTIONS

CSNS

98765

GND

VPWR

OUTOUT

1615

Figure 3. Pin Connections

Table 1. PIN DEFINITIONS

Descriptions of the pins listed in the table below can be found in the Functional Description section located on page 12.

Number

1 CSNS Reports Output Current Monitoring

2 TEMP Reports Temperature Feedback 3EN

4 INHS Input Serial Input High Side 5FS

6 INLS Input Serial Input Low Side 7 CONF Input Configuration Input 8 OCLS Input Low-Side Overload

9 DLS Input Drain Low Side

10 GLS Output Low-Side Gate

11 SR Input Slew Rate Control 12 CBOOT Input Bootstrap Capacitor 13 GND Ground Ground 14 VPWR Input Positive Power Supply

15, 16 OUT Output Output

Pin Name

Function

Input Enable

Reports Fault Status

Formal Name Definition

(Active High)

(Active Low)

This pin is used to generate a ground-referenced voltage for the microcontroller (MCU) to monitor output current.

This pin is used by the MCU to monitor board temperature. This pin is used to place the device in a low-current sleep mode.

This input pin is used to control the output of the device. This pin monitors fault conditions and is active LOW.

This pin is used to control an external low-side N-channel MOSFET. This input manages MOSFET N-channel cross-conduction. This pin sets the V

MOSFET. This pin is the drain of the external low-side N-channel MOSFET. This output pin drives the gate of the external low-side N-channel

MOSFET. This pin controls the output slew rate. This pin provides the high-pulse current to drive the device. This is the ground pin of the device. This pin is the source input of operational power for the device. These pins provide a protected high-side power output to the load

connected to the device.

protection level of the external low-side

33981

Analog Integrated Circuit Device Data Freescale Semiconductor 3

ELECTRICAL CHARACTERISTICS

MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

MAXIMUM RATINGS

Table 2. Maximum Ratings

All voltages are with respect to ground unless otherwise noted.

Rating Symbol Value Unit

ELECTRICAL RATINGS

Power Supply Voltage

Steady-State

Input/Output Pins Voltage

(1)

Output Voltage

Positive Negative

(2)

Continuous Output Current CSNS Input Clamp Current EN Input Clamp Current SR Voltage C

BOOT Voltage

OCLS Voltage Low-Side Gate Voltage Low-Side Drain Voltage ESD Voltage

(3)

Human Body Model (HBM) Charge Device Model (CDM)

Corner Pins (1, 12, 15, 16) All Other Pins (2-11, 13-14)

THERMAL RATINGS

Operating Temperature

Ambient

Junction Storage Temperature Thermal Resistance

(4)

Junction to Power Die Case

Junction to Ambient Peak Pin Reflow Temperature During Solder Mounting

(5)

Notes

1. Exceeding voltage limits on INHS, INLS, CONF, CSNS, FS

, TEMP, and EN pins may cause a malfunction or permanent damage to the

device.

2. Continuous high-side output rating as long as maximum junction temperature is not exceeded. Calculation of maximum output current using package thermal resistance is required.

3. ESD testing is performed in accordance with the Human Body Model (HBM) (C Model (CDM), Robotic (C

ZAP

= 4.0 pF).

4. Device mounted on a 2s2p test board per JEDEC JESD51-2.

5. pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device.

PWR

INHS, INLS,

CONF, CSNS, FS

TEMP, EN

OUT

CL(CSNS)

CL(

EN)

BOOT

OCLS

GLS

DLS

ESD

STG

SOLDER

= 100 pF, R

ZAP

-16 to 41

- 0.3 to 7.0 V

41.0

-5.0

40.0 A

15.0 mA

2.5 mA

- 0.3 to 54.0 V

- 5.0 to 7.0 V

- 0.3 to 15.0 V

- 5.0 to 41.0 V

± 2000

± 750 ± 500

- 40 to 125

- 40 to 150

- 55 to 150 °C

1.0

20.0 245 °C

= 1500 Ω) and the Charge Device

ZAP

°C

°C/W

33981

Analog Integrated Circuit Device Data

4 Freescale Semiconductor

STATIC ELECTRICAL CHARACTERISTICS

ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 3. Static Electrical Characteristics

Characteristics noted under conditions 6.0 V ≤ V

noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic Symbol Min Typ Max Unit

POWER INPUT (VPWR)

Battery Supply Voltage Range

Fully Operational Extended

PWR

INHS = 1 and OUT Open INLS = 0

PWR

INHS = INLS = 0, EN = 5.0 V, OUT Connected to GND

Sleep State Supply Current (V

PWR

Undervoltage Shutdown Undervoltage Hysteresis

POWER OUTPUT (IOUT, VPWR)

Output Drain-to-Source ON Resistance

PWR

Output Drain-to-Source ON Resistance (I

PWR

Output Source-to-Drain ON Resistance

PWR

Output Overcurrent Detection Level

9.0 V < V

Current Sense Ratio

9.0 V <

Current Sense Ratio (C

9.0 V < Output Current

5.0 A 15 A, 20 A and 30 A

Current Sense Voltage Clamp

CSNS

Notes

6. OUT can be commanded fully on, PWM is available at room. Low Side Gate driver is available. Protections and Diagnosis are not

7. Source-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity V

(6)

Supply Current

< 14 V, EN = 0 V, OUT Connected to GND)

= 25°C

= 125°C

= 20 A, TA = 25°C)

OUT

= 6.0 V = 9.0 V = 13.0 V

= 20 A, TA = 150°C)

OUT

= 6.0 V = 9.0 V = 13.0 V

= -20 A, TA = 25°C)

OUT

= - 12 V

< 16 V

PWR

< 16 V, CSNS < 4.5 V

PWR

) Accuracy

< 16 V, CSNS < 4.5 V

PWR

= 15 mA

available. Min/max parameters are not guaranteed.

≤ 27 V, -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values

PWR

PWR(ON)

6.0

4.5

– –

27.0

– 10.0 12.0

PWR(SBY)

– 10.0 12.0

PWR(SLEEP)

– –

PWR(UV)

PWR(UVHYS)

DS(ON)25

2.0 4.0 4.5 V

0.05 0.15 0.3 V

– – –

DS(ON)150

– – –

(7)

SD(ON)

– –

– – –

5.0

50.0

6.0

5.0

4.0

10.2

8.5

6.8

––8.0

OCH

75 100 125

– 1/20000 –

SR_ACC

CL(CSNS)

-20

-15

– –

20 15

4.5 6.0 7.0

PWR

µA

mΩ

–

33981

Analog Integrated Circuit Device Data Freescale Semiconductor 5

ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 3. Static Electrical Characteristics (continued)

Characteristics noted under conditions 6.0 V ≤ V

≤ 27 V, -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values

PWR

noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic Symbol Min Typ Max Unit

POWER OUTPUT (VPWR) (continued)

Overtemperature Shutdown Overtemperature Shutdown Hysteresis

(8)

LOW SIDE GATE DRIVER (VPWR, VGLS, VOCLS)

Low-Side Gate Voltage

= 6.0 V

PWR

= 9.0 V

PWR

= 13 V

PWR

= 27 V

PWR

Low-Side Gate Sinked Current

GLS

= 2 V, V

PWR

= 13 V

Low-Side Gate Sourced Current

GLS

= 2 V, V

PWR

= 13 V

Low-Side Overload Detection Level versus Low-Side Drain Voltage

- V

OCLS

DLS

, (V

OCLS

≤ 4.0 ς)

CONTROL INTERFACE (CONF, INHS, INLS, EN, OCLS)

Input Logic High Voltage (CONF, INHS, INLS) Input Logic Low Voltage (CONF, INHS, INLS) Input Logic Voltage Hysteresis (CONF, INHS, INLS) Input Logic Active Pulldown Current (INHS, INLS) Enable Pull-down Resistor (EN Enable Voltage Threshold (EN Input Clamp Voltage (EN

< 2.5 mA

Input Forward Voltage (EN Input Active Pullup Current (OCLS

)

) Input Active Pullup Current (CONF) FS

Tri-State Capacitance

Low-State Output Voltage

= -1.6 mA

(8)

Temperature Feedback

= 25°C for V

Temperature Feedback Derating

PWR

= 14 V

(8)

Notes

8. Parameter is guaranteed by process monitoring but is not production tested.

SDHYS

GLS

GLSNEG

GLSPOS

DS_LS

INHYS

DWN

CLEN

F(EN)

OCLS p

CONF

FSL

TFEED

FEED

160 175 190 °C

5.0 – 20 °C

5.0

8.0

12.0

5.4

8.4

12.4

6.0

9.0

13.0

– 100 –

-50 – +50

3.3 – – V – – 1.0 V

100 600 1200 mV

5.0 10 20 µA

100 200 400 kΩ

2.5 V

7.0 – 14

-2.0–-0.3V 50 100 200 µA

5.0 10 20 µA – – 20 pF

–0.20.4

3.35 3.45 3.55

-8.5 -8.9 -9.3 mV/°C

33981

Analog Integrated Circuit Device Data

6 Freescale Semiconductor

DYNAMIC ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 4. Dynamic Electrical Characteristics

Characteristics noted under conditions 6.0 V ≤ V

noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.

Characteristic Symbol Min Typ Max Unit

CONTROL INTERFACE AND POWER OUTPUT TIMING (CBOOT, VPWR)

Charge Blanking Time (CBOOT) Output Rising Slew Rate

= 13 V, from 10% to 90% of V

PWR

= 5.0 Ω

Output Falling Slew Rate

= 13 V, from 90% to 10% of V

PWR

= 5.0 Ω

Output Turn-ON Delay Time

= 13 V, SR Capacitor = 4.7 nF

PWR

Output Turn-OFF Delay Time

= 13 V, SR Capacitor = 4.7 nF

PWR

Input Switching Frequency Output PWM ratio @ 60kHz Time to Reset Fault Diagnosis

(over load on high side or external low side) Output Over Current Detection Time

Notes

9. The MC33981 can work down (~100Hz). The fault management reset can not be guaranteed with PWM frequency lower than 5kHz (INHS=0 during 200us typ)

10. Values for CBOOT=100nF. Refer to the paragraph entitled Sleep Mode on page 13. Parameter is guaranteed by design and not production tested.

11. Turn-ON delay time measured from rising edge of INHS that turns the output ON to V

12. Turn-OFF delay time measured from falling edge of INHS that turns the output OFF to V

13. The ratio is measured at V

(10)

SR Capacitor = 4.7 nF,

OUT,

SR Capacitor = 4.7 nF,

OUT,

(11)

(12)

(9)

(13)

= 50% V

out

without SR capacitor. The device is capable of 100% duty cycle.

PWR

≤ 27 V, -40°C ≤ TA ≤ 125°C unless otherwise noted. Typical values

PWR

10 25 50 µs

8.0 16 35

DLYON

200 400 700

DLYOFF

500 1000 1500

PWM

RSTDIAG

– 20 60 kHz

5.0 95 %

100 200 400

OCH

1.0 10 20 µs

= 0.5 V with RL= 5.0 Ω resistive load.

OUT

= V

OUT

-0.5 V with RL= 5.0 Ω resistive load.

PWR

V/µs

µs

33981

Analog Integrated Circuit Device Data Freescale Semiconductor 7

TIMING DIAGRAMS

STATIC ELECTRICAL CHARACTERISTICS

INHS

5.0 V

0.0 V Vout

TIMING DIAGRAMS

PWR

90% Vout

- 0.5 V

0.5 V

Vout

10% Vout

After

DLY(OFF)

DLY(ON)

Figure 4. Time Delays Functional Diagrams

PWM

50%V

PWR

5.0 V

CONF

INHS

INLS

OUT

GLS

Figure 5. Normal Mode, Cross-Conduction Management

33981

Analog Integrated Circuit Device Data

8 Freescale Semiconductor

After

STATIC ELECTRICAL CHARACTERISTICS

TIMING DIAGRAMS

CONF

INHS

INLS

OUT

GLS

High Side ON

High Side OFF

Figure 6. Normal Mode, Independent High Side a nd Low Side

0.0 V

33981

Analog Integrated Circuit Device Data Freescale Semiconductor 9

ELECTRICAL PERFORMANCE CURVES

STATIC ELECTRICAL CHARACTERISTICS

ELECTRICAL PERFORMANCE CURVES

7.0

6.0

)

5.0

Ω

4.0

3.0

DS(ON)

2.0

RdsON (mOh m)

1.0

0.0

-50 0 50 100 150 200

Temperature (°C)

Figure 7. Typical R

vs. Temperature at V

DS(ON)

10.0

9.0

8.0

7.0

(µA)

6.0

5.0

4.0

3.0

PWR(SLEEP)

Ipwr(sleep)(µA)

2.0

1.0

0.0

4.5 6.0 9.0 12.0 12.5 13.0 14.0 17.0 21.0

Vpwr(V)

PWR

Figure 8. Typical Sleep State Supply Current vs. V

1600

1400

1200

1000

(V)

PWR

= 13 V

at 150°C

800

600

Vout Rise Time (ns)

400

200

0 2.0

4.0

6.0 8.0

SR Capacitor (nF)

Figure 9. V

33981

10 Freescale Semiconductor

Rise Time vs. SR Capacitor From 10% to 90% of V

OUT

at 25°C and V

OUT

Analog Integrated Circuit Device Data

PWR

= 13 V

Vout Fall Time (ns)

1600

1400

1200

1000

800

600

400

200

0 2.0

ELECTRICAL PERFORMANCE CURVES

STATIC ELECTRICAL CHARACTERISTICS

ELECTRICAL PERFORMANCE CURVES

4.0 6.0

SR Capacitor (nF)

8.0

Figure 10. V

Fall Time vs. SR Capacitor From 10% to 90% of V

OUT

at 25°C and V

OUT

PWR

= 13 V

33981

Analog Integrated Circuit Device Data Freescale Semiconductor 11

FUNCTIONAL DESCRIPTION

INTRODUCTION

FUNCTIONAL DESCRIPTION

INTRODUCTION

The 33981 is a high-frequency self-protected silicon

4.0 mΩ R electromechanical relays, fuses, and discrete devices in power management applications. The 33981 can be controlled by pulse-width modulation (PWM) with a frequency up to 60 kHz. It is designed for harsh environments, and it includes self-recovery features.

high-side switch used to replace

DS(ON)

FUNCTIONAL PIN DESCRIPTIONS

OUTPUT CURRENT MONITORING (CSNS)

This pin is used to output a current proportional to the highside OUT current and is used externally to generate a ground-referenced voltage for the microcontroller (MCU) to monitor OUT current.

TEMPERATURE FEEDBACK (TEMP)

This pin reports an analog value proportional to the temperature of the GND flag (pin 13). It is used by the MCU to monitor board temperature.

ENABLE [ACTIVE HIGH] (EN)

This is an input used to place the device in a low current sleep mode. This pin has an active passive internal pulldown.

INPUT HIGH SIDE (INHS)

The input pin is used to directly control the OUT. This input has an active internal pulldown current source and requires CMOS logic levels.

FAULT STATUS (FS)

This pin is an open drain-configured output requiring an external pullup resistor to V When a device fault condition is detected, this pin is active LOW.

(5.0 V) for fault reporting.

INPUT LOW SIDE (INLS)

This input pin is used to directly control an external lowside N-channel MOSFET and has an active internal pulldown current source and requires CMOS logic levels. It can be controlled independently of the INHS depending of CONF pin.

CONFIGURATION INPUT (CONF)

This input pin is used to manage the cross-conduction between the internal high-side N-channel MOSFET and the external low-side N-channel MOSFET. The pin has an active internal pullup current source. When CONF is at 0 V, the two

The 33981 is suitable for loads with high inrush current, as well as motors and all types of resistive and inductive loads. A dedicated parallel input is available for an external low-side control with protection features and cross-conduction management.

MOSFETs are controlled independently. When CONF is at

5.0 V, the two MOSFETs cannot be on at the same time.

LOW-SIDE OVERLOAD (OCLS)

This pin sets the VDS protection level of the external lowside MOSFET. This pin has an active internal pullup current source. It must be connected to an external resistor.

DRAIN LOW SIDE (DLS)

This pin is the drain of the external low-side N-channel MOSFET. Its monitoring allows protection features: low side short protection and V

short protection.

PWR

LOW-SIDE GATE (GLS)

This pin is an output used to drive the gate of the external low-side N-channel MOSFET.

SLEW RATE CONTROL (SR)

A capacitor connected between this pin and ground is used to control the output slew rate.

BOOTSTRAP CAPACITOR (CBOOT)

A capacitor connected between this pin and OUT is used to switch the OUT in PWM mode.

GROUND (GND)

This pin is the ground for the logic and analog circuitry of the device.

POSITIVE POWER SUPPLY (VPWR)

This pin connects to the positive power supply and is the source input of operational power for the device. The V pin is a backside surface mount tab of the package.

PWR

OUTPUT (OUT)

Protected high-side power output to the load. Output pins must be connected in parallel for operation.

33981

Analog Integrated Circuit Device Data

12 Freescale Semiconductor

+ 25 hidden pages

Freescale 33981 B Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Figure 1. 33981 Simplified Application Diagram

INTERNAL BLOCK DIAGRAM

Figure 2. 33981 Simplified Internal Block Diagram

PIN CONNECTIONS

Figure 3. Pin Connections

Table 1. PIN DEFINITIONS

ELECTRICAL CHARACTERISTICS

Table 2. Maximum Ratings

Table 3. Static Electrical Characteristics

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 4. Dynamic Electrical Characteristics

TIMING DIAGRAMS

Figure 4. Time Delays Functional Diagrams

Figure 5. Normal Mode, Cross-Conduction Management

Figure 6. Normal Mode, Independent High Side a nd Low Side

ELECTRICAL PERFORMANCE CURVES

ELECTRICAL PERFORMANCE CURVES

FUNCTIONAL DESCRIPTION