Freescale 17531A Technical Data

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Freescale Semiconductor

Technical Data

700 mA Dual H-Bridge Motor

Document order number: MPC17531A

Rev 2.0, 09/2005

Driver with 3.0 V Compatible
Logic I/O

The 17531A is a monolithic dual H-Bridge power IC ideal for
portable electronic applications containing bipolar step motors and/or
brush DC-motors (e.g., cameras and disk drive head positioners).

The 17531A operates from 2.0 V to 8.6 V using the internal charge
pump, with independent control of each H-Bridge via parallel MCU
interface. The device features built-in shoot-through current
protection and an undervoltage shutdown function.

The 17531A has four operating modes: Forward, Reverse, Brake,
and Tri-Stated (High Impedance). The 17531A has a low total
R

power dissipation owing to its low output resistance and high output
slew rates. The H-Bridge outputs can be independently pulse width
modulated (PWM’ed) at up to 200
control.

Features

of 1.2 Ω (max @ 25°C).

DS(ON)

The 17531A efficiently drives many types of micromotors with low

kHz for speed/torque and current

• Low Total RDS(ON) 0.8 W (Typ), 1.2 Ω (Max) @ 25°C

• Output Current 0.7 A (DC)

• Shoot-Through Current Protection Circuit

• PWM Control Input Frequency up to 200 kHz

• Built-In Charge Pump Circuit

• Low Power Consumption

• Undervoltage Detection and Shutdown Circuit

• Power Save Mode with Current Draw ≤ 2.0 µA

• Pb-Free Packaging Designated by Suffix Codes EV and EP

17531A

DUAL H-BRIDGE

VMFP SUFFIX

EV SUFFIX (PB-FREE)

98ASA10616D

20-TERMINAL VMFP

ORDERING INFORMATION

Device

MPC17531AEV/EL

MPC17531AEP/R2 24 QFN

Temperature

Range (T

-20°C to 65°C

QFN SUFFIX

EP SUFFIX (PB-FREE)

98ARL10577D

24-TERMINAL QFN

)

A

Package

20 VMFP

3.0 V 5.0 V

17531A

VDD
C1L
C1H

MCU

C2L
C2H

CRES

IN1A
IN1B
IN2A

OUT1A

OUT1B

OUT2A

OUT2B

IN2B
PSAVE

GND

Figure 1. 17531A Simplified Application Diagram

* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.

© Freescale Semiconductor, Inc., 2005. All rights reserved.

VM

Bipolar

N

Step

S

Motor

INTERNAL BLOCK DIAGRAM

CRES

C2H

C1H

C1L

C2L

VDD

INTERNAL BLOCK DIAGRAM

Charge

Pump

Low-

Voltage

Shutdown

VM1

IN1A

IN1B

PSAVE

IN2A

IN2B

LGND

VDD

Control

Logic

Figure 2. 17531A Simplified Internal Block Diagram

Level Shifter

Predriver

OUT1A

H-Bridge

OUT1B

PGND1

VM2

OUT2A

H-Bridge

OUT2B

PGND2

17531A

Analog Integrated Circuit Device Data

2 Freescale Semiconductor

TERMINAL CONNECTIONS

TERMINAL CONNECTIONS

VDD

IN1A

IN1B

PSAVE

OUT2A

PGND1

OUT1A

VM1

CRES

C2H

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

LGND

IN2A

IN2B

VM2

OUT2B

PGND2

OUT1B

C2L

C1L

C1H

Figure 3. 17531A, 20-Terminal VMFP Connections

Table 1. 17531A, 20-Terminal VMFP Definitions

A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 10.

Terminal

Number

1 VDD Logic Supply

2 IN1A Logic Input Control 1A

3 IN1B Logic Input Control 1B

4 PSAVE Power Save

5

6 PGND1 Power Ground 1

7 OUT1A H-Bridge Output 1A

8 VM1 Motor Drive Power Supply 1

9

10 C2H Charge Pump 2H

11 C1H Charge Pump 1H

12 C1L Charge Pump 1L

13 C2L Charge Pump 2L

14 OUT1B H-Bridge Output 1B

15 PGND2 Power Ground 2

16 OUT2B H-Bridge Output 2B

17 VM2 Motor Drive Power Supply 2

18 IN2B Logic Input Control 2B

19 IN2A Logic Input Control 2A

20 LGND Logic Ground

Terminal

Name

Formal Name Definition

OUT2A H-Bridge Output 2A

CRES

Predriver Power Supply

Control circuit power supply terminal.

Logic input control of OUT1A (refer to Table 6, Truth Table, page 9).

Logic input control of OUT1B (refer to Table 6, Truth Table, page 9).

Logic input controlling power save mode.

Output A of H-Bridge channel 2.

High-current power ground 1.

Output A of H-Bridge channel 1.

Positive power source connection for H-Bridge 1 (Motor Drive Power Supply).

Internal triple charge pump output as predriver power supply.

Charge pump bucket capacitor 2 (positive pole).

Charge pump bucket capacitor 1 (positive pole).

Charge pump bucket capacitor 1 (negative pole).

Charge pump bucket capacitor 2 (negative pole).

Output B of H-Bridge channel 1.

High-current power ground 2.

Output B of H-Bridge channel 2.

Positive power source connection for H-Bridge 2 (Motor Drive Power Supply).

Logic input control of OUT2B (refer to Table 6, Truth Table, page 9).

Logic input control of OUT2A (refer to Table 6, Truth Table, page 9).

Low-current logic signal ground.

17531A

Analog Integrated Circuit Device Data
Freescale Semiconductor 3

TERMINAL CONNECTIONS

Transparent Top View of Package

NC

PSAVE

OUT2A

PGND1

OUT1A

NC

LGND

IN1B

1

2

3

4

5

6

789101112

VDD

IN1A

MPC17530EP

IN2A

IN2B

192021222324

18

17

16

15

14

13

VM2

NC

OUT2B

PGND2

OUT1B

C2L

NC

VM1

C2H

CRES

C1L

C1H

Figure 4. 17531A, 24-Terminal QFN Connections

Table 2. 17531A, 24-Terminal QFN Definitions

A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 10.

Terminal

Number

1 VDD Logic Supply

2 IN1A Logic Input Control 1A

3 IN1B Logic Input Control 1B

4 PSAVE Power Save

5

6 PGND1 Power Ground 1

7 OUT1A H-Bridge Output 1A

8 VM1 Motor Drive Power Supply 1

9

10 C2H Charge Pump 2H

11 C1H Charge Pump 1H

12 C1L Charge Pump 1L

13 C2L Charge Pump 2L

14 OUT1B H-Bridge Output 1B

15 PGND2 Power Ground 2

16 OUT2B H-Bridge Output 2B

17 VM2 Motor Drive Power Supply 2

18 IN2B Logic Input Control 2B

19 IN2A Logic Input Control 2A

20 LGND Logic Ground

Terminal

Name

Formal Name Definition

OUT2A H-Bridge Output 2A

CRES

Predriver Power Supply

Control circuit power supply terminal.

Logic input control of OUT1A (refer to Table 6, Truth Table, page 9).

Logic input control of OUT1B (refer to Table 6, Truth Table, page 9).

Logic input controlling power save mode.

Output A of H-Bridge channel 2.

High-current power ground 1.

Output A of H-Bridge channel 1.

Positive power source connection for H-Bridge 1 (Motor Drive Power Supply).

Internal triple charge pump output as predriver power supply.

Charge pump bucket capacitor 2 (positive pole).

Charge pump bucket capacitor 1 (positive pole).

Charge pump bucket capacitor 1 (negative pole).

Charge pump bucket capacitor 2 (negative pole).

Output B of H-Bridge channel 1.

High-current power ground 2.

Output B of H-Bridge channel 2.

Positive power source connection for H-Bridge 2 (Motor Drive Power Supply).

Logic input control of OUT2B (refer to Table 6, Truth Table, page 9).

Logic input control of OUT2A (refer to Table 6, Truth Table, page 9).

Low-current logic signal ground.

17531A

Analog Integrated Circuit Device Data

4 Freescale Semiconductor

MAXIMUM RATINGS

MAXIMUM RATINGS

Table 3. Maximum Ratings

All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or

permanent damage to the device.

Ratings Symbol Value Unit

Motor Supply Voltage V

Charge Pump Output Voltage

V

Logic Supply Voltage

Signal Input Voltage

Driver Output Current

Continuous

Peak

(1)

I

ESD Voltage

Human Body Model

Machine Model

(3)

(2)

V

V

Operating Junction Temperature

Operating Ambient Temperature

Storage Temperature Range

Thermal Resistance

Power Dissipation

(4)

(5)

T

R

WMFP

QFN

Terminal Soldering Temperature

(6)

T

SOLDER

M

C

RES

V

DD

V

IN

I

O

OPK

ESD1

ESD2

T

T

A

STG

θ

P

D

J

JA

-0.5 to 11.0 V

-0.5 to 14.0 V

-0.5 to 5.0 V

-0.5 to V

+ 0.5 V

DD

0.7

1.4

±1200

± 150

-20 to 150 °C

-20 to 65 °C

-65 to 150 °C

50 °C/W

1.0

2.5

260 °C

A

V

W

Notes

1. TA = 25°C. Pulse width = 10 ms at 200 ms intervals.

2. ESD1 testing is performed in accordance with the Human Body Model (C

3. ESD2 testing is performed in accordance with the Machine Model (C

ZAP

= 100 pF, R

ZAP

= 200 pF, R

ZAP

= 1500 Ω).

ZAP

= 0 Ω).

4. For QFN only, mounted on 37 x 50 Cu area (1.6 mm FR-4 PCB).

5. TA = 25°C.

6. Terminal soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits
may cause malfunction or permanent damage to the device.

17531A

Analog Integrated Circuit Device Data
Freescale Semiconductor 5

STATIC ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics

Characteristics noted under conditions TA = 25°C, VDD = 3.0 V, VM = 5.0 V, GND = 0 V unless otherwise noted. Typical values

noted reflect the approximate parameter means at T

Characteristic Symbol Min Typ Max Unit

POWER INPUT

Motor Supply Voltage (Using Internal Charge Pump)

V

Motor Supply Voltage (

Gate Drive Voltage

- Motor Supply Voltage (

Logic Supply Voltage

Driver Quiescent Supply Current

No Signal Input

Power Save Mode

Logic Quiescent Supply Current

No Signal Input

(10)

Power Save Mode

Operating Power Supply Current

Logic Supply Current

Charge Pump Circuit Supply Current

Low V

Detection Voltage

DD

Driver Output ON Resistance

GATE DRIVE

Gate Drive Voltage

(12)

No Current Load

Gate Drive Ability (Internally Supplied)

I

C

= -1.0 mA

RES

Recommended External Capacitance (C1L – C1H, C2L – C2H, C

Notes

7. Gate drive voltage VC

8. No internal charge pump used. VC

9. R

10.

11.

12. At f

is not guaranteed if VC

DS(ON)

I

Q

includes the current to pre-driver circuit.

VDD

I

VDD includes the current to predriver circuit at f

= 20 kHz.

IN

13. Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. VC

applied from an external source. 2 x V

14. IO = 0.7 A source + sink.

Applied Externally)

CRES

V

CRES

(11)

(12)

(13)

(14)

is applied from an external source. 2 x VDD + VM must be < VC

RES

is applied from an external source.

RES

- VM < 5.0 V. Also, function is not guaranteed if VC

RES

+ VM must be < VC

DD

= 25°C under nominal conditions unless otherwise noted.

A

(7)

(8)

Applied Externally)

(9)

V

M-CP

V

M-NCP

V

CRES - V M

V

DD

I

QM

I

QM-PSAVE

I

QVDD

I

QVDD-

2.0 5.0 8.6 V

––10V

5.0 6.0 – V

2.7 3.0 3.6 V

–

–

–

–

PSAVE

= 100 kHz.

IN

RES

– GND)

RES

I

VDD

I

CRES

V

DDDET

R

DS(ON)

V

CRES

V

CRESload

C

max (13.5 V).

CP

–

–

1.0 1.6 2.5 V

– 0.8 1.2 Ohms

12 13 13.5

8.5 9.2 –

0.01 0.1 1.0 µF

max (13.5 V).

RES

- VM < 3.0 V.

RES

–

–

–

–

–

–

100

1.0

1.0

1.0

3.0

0.7

RES

µA

mA

mA

V

V

is

17531A

Analog Integrated Circuit Device Data

6 Freescale Semiconductor