Page 1
5
4
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Foxconn MCP61M07
2
1
D D
Fab :A
nVIDIA MCP61 Chipset for AMD AM3 CPU
(12/04/2010)
PAGE PAGECONTENT CONTENT
1
2
3
C C
4
5
6
7
8
9
10
11
12
13
B B
14
15
16
17
18
19
20
21
22
A A
23
24
01. COVER
02. BLOCK DIAGRAM
03. RESET MAP
04. CLOCK DISTRIBUTION
05. PCI DEVICE / VID TABLE
06. AM3-1 Hyper Transport
07. AM3-2 DDRII -1
08. AM3-2 DDRII -2
09. AM3-3 MISC
10. AM3-4 Power
11. DDRIII SDRAM DIMM1-2
12. DDRIII Terminator
13. MCP61_HT
14. MCP61_PCI-E_RGM_VGA
15. MCP61_POWER
16. MCP61_PCI
17. MCP61_SATA_IDE
18. MCP61_HDA_USB
19. PCI_E X16 Slot
20. PCI SLOT 1 2 3
21. SIO IT8728F
22. IDE / Floppy / PS2
23. PLT / COM
24. FAN / HARDWARE MONITOR /VID
25. USB CONNECTORS
25
26. LAN
26
27. PWR CONN / FNT PNL / VBAT
27
28. ACPI VREG
28
29. MCP61 CORE POWER
29
30. VRM
30
31. LAN CONN
31
32. AUDIO ALC662
32
33. Power Map
33
34. Modify List
34
35. Optional Part
35
LEADTEK RESEARCH INC. ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS.
THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE.
COPYRIGHT 2002 LEADTEK RESEARCH INC. .
5
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FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Cover
Cover
Cover
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
1 35Wednesday, December 08, 2010
1 35Wednesday, December 08, 2010
1 35Wednesday, December 08, 2010
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Page 2
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www.vinafix.vn
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MCP61M07 Block Diagram
POWER
SUPPLY
CONNECTOR
2*12 = 24 pin
2*2 = 4 pin (12V)
C C
PCI Express X16
PCI Express X1
VREG -> RT8855 => 3 +1 phase
60 Amp
PCI EXPRESS Lane * 16
PCI EXPRESS Lane * 1
SOCKET AM3
HT 16X16 2GT/S
NFORCE
MCP61
DDRIII Memory CH:A
DDRIII Memory CH:B
PCI V2.3 / 33MHZ
64-BIT 1600/1333/1066MHZ
PCI SLOT 1
PCI SLOT 2
DDRIII SDRAM CONN 1
DDRIII SDRAM CONN 2
PCI_RESET0*
S I/OPWRBTN#
CPU_VLD
HT_VLD
SB ACPIPS_ON#
SLP_S5*
SLP_S3*
VRM_EN
VRM
PWM_GD
SWPANSWHJ
PS_OUT#
PWRGD_PS
ATX POWER
692 Ball BGA
HDA
SIO
ITE IT8728F/CX
INTEGRATED SATA
LPC BUS V1.0 / 33MHZ
4MB FLASH
X8 USB ( V2.0 EHCI / V1.1 OHCI )
RGMII/MII
B B
PS2/KB CONN
PARALLEL CONN
SERIAL CONN (COM1)
SATA-II CONN * 4
Azalia / ALC662 (5.1 Audio)
BACK PANEL CONN => 4 Port
USB2 PORTS 0,7
USB2 PORTS 1,6
10/100Mb (Giga-Bit )LAN PHY
FRONT PANEL Header * 2 => 4 Port
USB2 PORTS 2,4
USB2 PORTS 3,5
RTL8201EL/RTL8211CL
A A
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
2 35Wednesday, December 08, 2010
2 35Wednesday, December 08, 2010
2 35Wednesday, December 08, 2010
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Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Page 3
5
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1
RESET MAP
D D
Socket AM3
CPU RST*
CPU PWRGD
MCP61
AUDIO_PHY
RESET*
PSON#
HT_CPU_PWRGD
HT_CPU_RST*
PCIRST_SLOT1*
PCIRST_SLOT2*
PCIRST_SLOT3*
PCIRST_IDE*
LPCRST_FLASH*
LPCRST_SIO*
ATX
Power
Supply
PWRGD_PS
PWRGD_PS
PWR_OK
(46)
MCP61
PWRGDPWROK
SEC IDE
TIGER ONE
ALL_PWR_OK
HT_VLD
(1)
HT_VLD
ALL_PWROK
PWM_GD
(8)
VRM_EN
(9)
PWM_GD
VRM_EN
CPU
PWROK
PGOOD
(35)
ENLL
(37)
PCI SLOT 1PCI SLOT 2VT6307PRI IDEFLASHSIO
VRM
PE_RESET*
PEX X16
PEX X1
PWR CONN
C C
B B
PS ON
PWR GOOD
PWRGD SB
CIRCUIT
PWR SWTCH
PWRBTN*
SLP_S3*
POWER_GOOD
PWRGD_SB
PWR BUTTON
SLP S3*
PWRGD
PWRGD_SB
GPIO_AUX*
LAN_PHY
RESET*
HT CPU PWRGD
HT CPU RST*
PCI RST0*
PCI RST1*
PCI RST2*
PCI RST3*
LPC_RST*
AC_RESET*
POWER ON SCHEME
MCP61
SLP_S3#
PWBTN#
SLP_S5#
PWRBTN#
Power button input
PANSWHJ
PWRON#
(72)
PANSWH#
IT8728F
PSIN
(71)
PSON#
TIGER ONE
PS_ON_IN#
(6)(75) (76)
PS_ON_OUT#
(7)
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Reset Map
Reset Map
Reset Map
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
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Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
AC
AC
AC
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3 35Wednesday, December 08, 2010
3 35Wednesday, December 08, 2010
3 35Wednesday, December 08, 2010
Page 4
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D D
HT_CPU_TXCLK0
HT_CPU_TXCLK0*
HT_CPU_RXCLK0
HT_CPU_RXCLK0*
HT_CPU_TXCLK1
HT_CPU_TXCLK1*
HT_CPU_RXCLK1
HT_CPU_RXCLK1*
CPUCLK_IN*
CPUCLK_IN
AM3 CPU
MEMCLK_L[0,5,7]
MEMCLK_H[0,5,7]
MEMCLK_L[2,3]
MEMCLK_H[2,3]
MEMCLK_L[1,4,6]
MEMCLK_H[1,4,6]
NC
CHANNEL A1 0-63
CHANNEL B1 0~63
DIMM 0
DIMM 1
MCP61
CLKOUT_200MHZ
CLKOUT_200MHZ*
HT_CPU_RXCLK1*
HT_CPU_RXCLK1
HT_CPU_TXCLK1*
C C
32.768 KHZ
B B
25 MHZ
HT_CPU_TXCLK1
HT_CPU_RXCLK0*
HT_CPU_RXCLK0
HT_CPU_TXCLK0*
HT_CPU_TXCLK0
RTC_XTAL
XTAL_IN
XTAL_OUT
PE0_REFCLK
PE0_REFCLK*
PE1_REFCLK
PE1_REFCLK*
PE2_REFCLK
PE2_REFCLK*
LPC_CLK0
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK_FB
LPC_CLK1
AC_BITCLK
BUF_25MHZ
BUF_SIO
SUSCLK
14MHZ OR 24MHZ
SIO
AZALIA
CODEC
PEX X16
PEX X1
FLASH
LPC
HEADER
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
LAN
PHY
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
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Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
4 35Wednesday, December 08, 2010
4 35Wednesday, December 08, 2010
4 35Wednesday, December 08, 2010
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D D
VID [4..0]
0X00000
0X00001
0X00010
0X00011
0X00100
0X00101
0X00110
0X00111
0X01000
0X01001
0X01010
0X01011
0X01100
0X01101
0X01110
C C
B B
0X01111
CPU VID TABLE
VDD
1.550V
1.525V
1.500V
1.475V
1.450V
1.425V
1.400V
1.375V
1.350V
1.325V
1.300V
1.275V
1.250V
1.225V
1.200V
1.175V 0X11111
SMBUS ADDRESS MAP
DEVICE
DIMM 0 0
DIMM 1 0
DIMM 2
DIMM 3
SIO
PCI SLOT 1
PCI SLOT 2
1394
DDC BUS
DDC BUS
SMBUS #
VID [4..0]
0X10000
0X10001
0X10010
0X10011
0X10100
0X10101
0X10110
0X10111
0X11000
0X11001
0X11010
0X11011
0X11100
0X11101
0X11110
VDD
1.150V
1.125V
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V
0.800V
OFF
ADDRESS
1010 000 = 0X50
1010 001 = 0X51
0
1010 010 = 0X52
0
1010 011 = 0X53
1
0101 101 = 0X2D
ARP
1
ARP
1
1
ARP
A
?
B
?
BACK PANEL
SLOT
VT6308
PCI 1
PCI DEVICE MAP
DEVICE
MCP 61
MAC /MAC
PCI-PCI BRIDGE
SATA1 X8 0
SATA0 0 X8 0
IDE X6
MODEM CODEC 0
AUDIO CODEC X4 0
USB 2.0 X2
USB 1.1 0 X2 0
SHAPE TRIM
LDT 0 X0 0
SMBUS2
LEGACY SLAVE
LPC
LOGICAL PCI BUS
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
PCI BUS# DEVICE# IDSEL PIN PCI SLOT PCI SLOT
PCI INTERRUPT/IDSEL MAP
P_INTZ*
DEVICE#
0X01-0X0F
22
P_INTW*
23
P_INTX* P_INTW*
24
FUNCTION
XA
X9
X4
X1
X1
?
X1
?
0
0
1
1
2
1
?
0
?
01
01PCI 2
0X06
0X08
PCI BUS#
MCP51 LOGICAL
PCI BUS 0
0
00
0
0
0
0
0
0
0
0
1
DEVICE ID
0X56/57
0X005C
0X0055
0X0054
0X0053
0X0058
0X0059
0X005B
0X005A
0X005F
0X005E
0X0052
0X00D3
0X0050/51
?
P_INTX*
P_INTY*
----
INTC*INTB*INTA*
P_INTY*
P_INTZ*
PCI SLOTPCI SLOT
INTD*
SOT23
1
SOT23-6
6
12
REQ/GNT
1/1
2/2P_INTZ*
3/301 0X09
SOT23-5/SC70
SOT89-5
3
2
45
3
21
SOT223
45
3
4
321
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Device / VID Table
PCI Device / VID Table
PCI Device / VID Table
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
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Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
5 35Saturday, December 04, 2010
5 35Saturday, December 04, 2010
5 35Saturday, December 04, 2010
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HyperTransport
U206A
D D
C C
CPU HyperTransport and Debug
A1
AM3
Top View
AL1
U206IU206I
5
MTG1
6
MTG1
7
MTG1
8
MTG1
9
MTG1
10
MTG1
11
MTG1
12
MTG1
1
EMI
2
EMI
13
MTG2
14
MTG2
15
MTG2
16
MTG2
17
MTG2
18
MTG2
19
MTG2
20
MTG2
A31
AL31
21
MTG3
22
MTG3
23
MTG3
24
MTG3
25
MTG3
26
MTG3
27
MTG3
28
MTG3
3
EMI
4
EMI
29
MTG4
30
MTG4
31
MTG4
32
MTG4
33
MTG4
34
MTG4
35
MTG4
36
MTG4
+1.2V_HT
HT_RC_CPU_CAD_H[15..0]13
HT_RC_CPU_CAD_L[15..0]13
HT_RC_CPU_CLK_H113
HT_RC_CPU_CLK_L113
HT_RC_CPU_CLK_H013
HT_RC_CPU_CLK_L013
R150 49.9 +/-1%
R150 49.9 +/-1%
*
*
R149 49.9 +/-1%
R149 49.9 +/-1%
*
*
HT_RC_CPU_CTL_H013
HT_RC_CPU_CTL_L013
HT_CPU_CTLIN_H1
HT_CPU_CTLIN_L1
HT_RC_CPU_CAD_H15
HT_RC_CPU_CAD_L15
HT_RC_CPU_CAD_H14
HT_RC_CPU_CAD_L14
HT_RC_CPU_CAD_H13
HT_RC_CPU_CAD_L13
HT_RC_CPU_CAD_H12
HT_RC_CPU_CAD_L12
HT_RC_CPU_CAD_H11
HT_RC_CPU_CAD_L11
HT_RC_CPU_CAD_H10
HT_RC_CPU_CAD_L10
HT_RC_CPU_CAD_H9
HT_RC_CPU_CAD_L9
HT_RC_CPU_CAD_H8
HT_RC_CPU_CAD_L8
HT_RC_CPU_CAD_H7
HT_RC_CPU_CAD_L7
HT_RC_CPU_CAD_H6
HT_RC_CPU_CAD_L6
HT_RC_CPU_CAD_H5
HT_RC_CPU_CAD_L5
HT_RC_CPU_CAD_H4
HT_RC_CPU_CAD_L4
HT_RC_CPU_CAD_H3
HT_RC_CPU_CAD_L3
HT_RC_CPU_CAD_H2
HT_RC_CPU_CAD_L2
HT_RC_CPU_CAD_H1
HT_RC_CPU_CAD_L1
HT_RC_CPU_CAD_H0
HT_RC_CPU_CAD_L0
U206A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
PZ94121-3126-01F
PZ94121-3126-01F
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
HT LINK
HT LINK
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CPU_CTLOUT_H1
HT_CPU_CTLOUT_L1
HT_CPU_RC_CAD_H15
HT_CPU_RC_CAD_L15
HT_CPU_RC_CAD_H14
HT_CPU_RC_CAD_L14
HT_CPU_RC_CAD_H13
HT_CPU_RC_CAD_L13
HT_CPU_RC_CAD_H12
HT_CPU_RC_CAD_L12
HT_CPU_RC_CAD_H11
HT_CPU_RC_CAD_L11
HT_CPU_RC_CAD_H10
HT_CPU_RC_CAD_L10
HT_CPU_RC_CAD_H9
HT_CPU_RC_CAD_L9
HT_CPU_RC_CAD_H8
HT_CPU_RC_CAD_L8
HT_CPU_RC_CAD_H7
HT_CPU_RC_CAD_L7
HT_CPU_RC_CAD_H6
HT_CPU_RC_CAD_L6
HT_CPU_RC_CAD_H5
HT_CPU_RC_CAD_L5
HT_CPU_RC_CAD_H4
HT_CPU_RC_CAD_L4
HT_CPU_RC_CAD_H3
HT_CPU_RC_CAD_L3
HT_CPU_RC_CAD_H2
HT_CPU_RC_CAD_L2
HT_CPU_RC_CAD_H1
HT_CPU_RC_CAD_L1
HT_CPU_RC_CAD_H0
HT_CPU_RC_CAD_L0
HT_CPU_RC_CLK_H1 13
HT_CPU_RC_CLK_L1 13
HT_CPU_RC_CLK_H0 13
HT_CPU_RC_CLK_L0 13
1
TP15TP15
1
TP13TP13
HT_CPU_RC_CTL_H0 13
HT_CPU_RC_CTL_L0 13
HT_CPU_RC_CAD_H[15..0] 13
HT_CPU_RC_CAD_L[15..0] 13
CPUHS1
CPUHS1
HEATSINK_SOCKET_940_M2
HEATSINK_SOCKET_940_M2
B B
CPU_DBREQ#8
CPU_DBRDY8
CPU_TCK8
CPU_TMS8
CPU_TDI8
CPU_TRST#8
CPU_TDO8
1D5V_STR
HDT Connector
Use buffered reset
HDT1
HDT1
C11C2
C33C4
C55C6
C77C8
C99C10
C1111C12
C1313C14
C1515C16
C1717C18
C1919C20
C2121C22
C2323C24
X
X
C26
Header_2X13_K25
Header_2X13_K25
Dummy
Dummy
2
4
6
8
10
12
14
16
18
20
22
24
26
R413 0
R413 0
Dummy
Dummy
1D5V_STR
+3.3V
R384
R384
*
*
4.7K
Dummy
4.7K
Dummy
+/-5%
+/-5%
*
*
+/-5%
+/-5%
Dummy
Dummy
Q52
Q52
Dummy
Dummy
D S
R383 0
R383 0
Dummy
Dummy
*
*
G
*
*
R387
R387
0
0
+/-5%
+/-5%
FDV301N
FDV301N
+/-5%
+/-5%
CPU_HT_RESET_L 8,13
HDT Header
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
AM3 HyperTransport
AM3 HyperTransport
AM3 HyperTransport
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
6 35Saturday, December 04, 2010
6 35Saturday, December 04, 2010
6 35Saturday, December 04, 2010
1
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DDR3 Memory Interface A DDR3 Memory Interface B
CPU Memory
U206B
U206B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
AE19
MA_CLK_L6
U27
MA_CLK_H5
U26
MA_CLK_L5
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
AC25
AA24
AE28
AC28
AD27
AA25
AE27
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AH29
V27
W27
W26
W25
U24
V24
G19
H19
G20
G21
E20
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
D29
C29
C25
D25
E19
F19
F15
G15
AJ25
B29
E24
E18
H15
MA_CLK_H4
MA_CLK_L4
MA_CLK_H3
MA_CLK_L3
MA_CLK_H2
MA_CLK_L2
MA_CLK_H1
MA_CLK_L1
MA_CLK_H0
MA_CLK_L0
MA0_CS_L1
MA0_CS_L0
MA0_ODT1
MA0_ODT0
MA1_CS_L1
MA1_CS_L0
MA1_ODT1
MA1_ODT0
MA_RESET_L
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK2
MA_BANK1
MA_BANK0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MEM CHA
MEM CHA
PZ94121-3126-01F
PZ94121-3126-01F
MA1 & MA_CKE1
CPU
D D
C C
B B
MEM_MA0_CLK0_P10
MEM_MA0_CLK0_N10
MEM_MA0_CLK1_P10
MEM_MA0_CLK1_N10
MEM_MA0_CS_L110
MEM_MA0_CS_L010
MEM_MA0_ODT110
MEM_MA0_ODT010
MEM_MA_RESET#10 MEM_MB_RESET#11
MEM_MA_CAS#10
MEM_MA_WE#10
MEM_MA_RAS#10
MEM_MA_BANK[2..0]10 MEM_MB_BANK[2..0]11
MEM_MA_CKE010
MEM_MA_ADD[15..0]10 MEM_MB_ADD[15..0]11
MEM_MA_DQS7_P10
MEM_MA_DQS7_N10
MEM_MA_DQS6_P10
MEM_MA_DQS6_N10
MEM_MA_DQS5_P10
MEM_MA_DQS5_N10
MEM_MA_DQS4_P10
MEM_MA_DQS4_N10
MEM_MA_DQS3_P10
MEM_MA_DQS3_N10
MEM_MA_DQS2_P10
MEM_MA_DQS2_N10
MEM_MA_DQS1_P10
MEM_MA_DQS1_N10
MEM_MA_DQS0_P10
MEM_MA_DQS0_N10
MEM_MA_DM[7..0]10 MEM_MB_DM[7..0]11
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MA0 & MA_CKE0
CPU
A A
TO DIMMA0
A0
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
TO DIMMA1
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
W30
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
R672
R672
*
*
1K +/-5%
1K +/-5%
A1
MEM_MA_DATA[63..0] 10 MEM_MB_DATA[63..0] 11
MEM CHA
MEM_MB0_CLK0_P11
MEM_MB0_CLK0_N11
MEM_MB0_CLK1_P11
MEM_MB0_CLK1_N11
CPU
MEM_MB0_CS_L111
MEM_MB0_CS_L011
MEM_MB0_ODT111
TO DIMMA0 & DIMMA1
MEM CHB
CPU
TO DIMMB0 & DIMMB1
MEM_MA_DQS8_P 10
MEM_MA_DQS8_N 10
MEM_MA_DM8 10
MEM_MA_CHECK[7..0] 10
MEM_MA_EVENT_L 10
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
MEMORY CLOCK TRANSLATION
DIMM
DDR3 Memory Signal
DIMM A0
DIMM A1
DIMM B0
DIMM B1
MEM_MA0_CLK1
MEM_MA0_CLK0 MA_CLK4
MEM_MA1_CLK1 MA_CLK5
MEM_MA1_CLK0 MA_CLK3
MEM_MB0_CLK1 MB_CLK2
MEM_MB0_CLK0 MB_CLK4
MEM_MB1_CLK1 MB_CLK5
MEM_MB1_CLK0 MB_CLK3
A0 A1
B0 B1
CPU Signal
MA_CLK2
MEM_MB0_ODT011
MEM_MB_CAS#11
MEM_MB_WE#11
MEM_MB_RAS#11
MEM_MB_CKE111MEM_MA_CKE110
MEM_MB_CKE011
MEM_MB_DQS7_P11
MEM_MB_DQS7_N11
MEM_MB_DQS6_P11
MEM_MB_DQS6_N11
MEM_MB_DQS5_P11
MEM_MB_DQS5_N11
MEM_MB_DQS4_P11
MEM_MB_DQS4_N11
MEM_MB_DQS3_P11
MEM_MB_DQS3_N11
MEM_MB_DQS2_P11
MEM_MB_DQS2_N11
MEM_MB_DQS1_P11
MEM_MB_DQS1_N11
MEM_MB_DQS0_P11
MEM_MB_DQS0_N11
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MB0 & MB_CKE0
CPU
TO DIMMB0
B0
AJ19
AK19
AL19
AL18
W29
W28
W31
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
M31
M29
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
U206C
U206C
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
PZ94121-3126-01F
PZ94121-3126-01F
AH13
MB_DATA63
AL13
MB_DATA62
AL15
MB_DATA61
AJ15
MB_DATA60
AF13
MB_DATA59
AG13
MB_DATA58
AL14
MB_DATA57
AK15
MB_DATA56
AL16
MB_DATA55
AL17
MB_DATA54
AK21
MB_DATA53
AL21
MB_DATA52
AH15
MB_DATA51
AJ16
MB_DATA50
AH19
MB_DATA49
AL20
MB_DATA48
AJ22
MB_DATA47
AL22
MB_DATA46
AL24
MB_DATA45
AK25
MB_DATA44
AJ21
MB_DATA43
AH21
MB_DATA42
AH23
MB_DATA41
AJ24
MB_DATA40
AL27
MB_DATA39
AK27
MB_DATA38
AH31
MB_DATA37
AG30
MB_DATA36
AL25
MB_DATA35
AL26
MB_DATA34
AJ30
MB_DATA33
AJ31
MB_DATA32
E31
MB_DATA31
E30
MB_DATA30
B27
MB_DATA29
A27
MB_DATA28
F29
MB_DATA27
F31
MB_DATA26
A29
MB_DATA25
A28
MB_DATA24
A25
MB_DATA23
A24
MB_DATA22
C22
MB_DATA21
D21
MB_DATA20
A26
MB_DATA19
B25
MB_DATA18
B23
MB_DATA17
A22
MB_DATA16
B21
MB_DATA15
A20
MB_DATA14
C16
MB_DATA13
D15
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
V29
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM CHB
MEM CHB
MB1 & MB_CKE1
CPU
TO DIMMB1
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
R677
R677
*
*
1K +/-5%
1K +/-5%
MEM_MB_DQS8_P 11
MEM_MB_DQS8_N 11
MEM_MB_DM8 11
MEM_MB_CHECK[7..0] 11
EVENT pins are for future AM3r2EVENT pins are for future AM3r2
MEM_MB_EVENT_L 11
1D5V_STR1D5V_STR
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
AM3- 2 DDR -1
AM3- 2 DDR -1
AM3- 2 DDR -1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
7 35Saturday, December 04, 2010
7 35Saturday, December 04, 2010
7 35Saturday, December 04, 2010
1
AC
AC
AC
Page 8
5
4
3
2
1
2D5V_VDDA CPU_VDDA_RUN
Layout: Keep trace to resistors
CPU_ALL_PWROK13
CPU_LDTSTOP_L13
D D
CPU_HT_RESET_L6,13
Less than 600mil to CPU
C509 3.9nF
CPU_CLKIN_H13
Less than 1250mil to CPU
CPU_CLKIN_L13
C C
*
*
R404 300 +/-5%*R404 300 +/-5%*R410 300 +/-5%*R410 300 +/-5%
R420 300 +/-5%*R420 300 +/-5%
C509 3.9nF
+/-10%
+/-10%
*
*
C510 3.9nF
C510 3.9nF
+/-10%
+/-10%
*
*
*
*
R409 300 +/-5%*R409 300 +/-5%
*
*
*
*
*
*
Dummy
Dummy
Dummy
Dummy
R416 300 +/-5%
R416 300 +/-5%
R415 300 +/-5%
R415 300 +/-5%
R397 300 +/-5%*R397 300 +/-5%
R400 300 +/-5%*R400 300 +/-5%
R399 300 +/-5%*R399 300 +/-5%
R402
R402
*
*
169 Ohm
169 Ohm
+/-1%
+/-1%
CPU_DBREQ#6
CPU_VDD_FB_H30
CPU_VDD_FB_L30
CPU_TEST20
CPU_TEST22
CPU_TEST24 CPU_M_ZN
CPU_TEST12
CPU_TEST18_PLLTEST1
CPU_TEST19_PLLTEST0
CPU_TEST21_SCANEN
CPU_TEST15_BP1
CPU_TEST14_BP0
less than 1" from CPU pins.
R421
R421
*
*
300
300
+/-5%
+/-5%
CPU_SIC18
CPU_SID18
CPU_TDI6
CPU_TRST#6
CPU_TCK6
CPU_TMS6
Layout: Keep trace to resistors
less than 1" from CPU pins.
R423
R423
*
*
300
300
+/-5%
+/-5%
R426
R426
R425
R425
*
*
*
*
1K
1K
300
300
+/-5%
+/-5%
+/-5%
+/-5%
R544
R544
0 +/-5%
0 +/-5%
Dummy
Dummy
*
*
CPU_M_VREF_SUS
TP29TP29
TP30TP30
*
*
R401
R401
300
300
+/-5%
+/-5%
SA0_AM3
R405
R405
*
*
300
300
+/-5%
+/-5%
1D5V_STR
*
*
R408
R408
R406
R406
*
*
*
*
511 Ohm
511 Ohm
39.2
39.2
+/-1%
+/-1%
+/-1%
+/-1%
CPU_TEST25_H_BYPASSCLK_H
R403
R403
R411
R411
*
*
*
*
39.2
39.2
511 Ohm
511 Ohm
+/-1%
+/-1%
+/-1%
+/-1%
*
*
R393
R393
300
300
+/-5%
+/-5%
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_PWRGD
LDT_STOP#
CPU_HT_RESET_L
CPU_SIC
CPU_SID
CPU_ALERT#
CPU_TDI
CPU_TRST#
CPU_TCK
CPU_TMS
CPU_DBREQ#
CPU_VDD_FB_H
CPU_VDD_FB_L
CPU_M_ZP
CPU_TEST25_H_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12
C536
C536
22uF
22uF
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%
CPU_VDDA_RUN
FB29
FB29
FB 30Ohm
FB 30Ohm
TP14TP14
21
C513
C513
*
*
*
*
4.7uF
4.7uF
Pin naming for VID pins indicate
"Serial VID"/"Parallel VID" connections.
U206D
U206D
C10
VDDA_1
D10
VDDA_2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AK4
SA0
AL4
ALERT_L
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
F3
M_VDDIO_PWRGD
E12
VDDR_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AH7
TEST3
AJ6
TEST2
C18
RSVD1
C20
RSVD2
F2
RSVD3
G24
RSVD4
G25
RSVD5
INT. MISC.
INT. MISC.
H25
RSVD6
L25
RSVD7
L26
RSVD8
C508
C508
0.22uF
0.22uF
MISC.
MISC.
C537
C537
3.3nF
3.3nF
*
*
+/-10%
+/-10%
THERMTRIP_L
CPU Control and Miscellaneous
Layout: Keep CPU_HTREF0
less than 1.5" from in length.
CORE_TYPE
SVC/VID3
SVD/VID2
PVIEN/VID1
THERMDC
THERMDA
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
G5
D2
VID5
D1
VID4
C1
E3
E2
E1
VID0
AG9
AG8
AK7
AL7
AK10
TDO
B6
AK11
AL11
G4
G3
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
CPU_CORE_TYPE
CPU_VID5
CPU_VID4
CPU_SVC
CPU_SVD
CPU_PVEN
CPU_VID0
CPU_THERMDC
CPU_THERMDA
CPU_THERMTRIP#
CPU_PROCHOT#
CPU_TDO
CPU_DBRDY
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
TP1TP1
CPU_HTREF1
CPU_HTREF0
CPU_TEST29_H_FBCLKOUT_H
CPU_TEST29_L_FBCLKOUT_L
CPU_TEST24
CPU_TEST22
CPU_TEST21_SCANEN
CPU_TEST20
CPU_TEST27
CPU_TEST26_BURNIN_L
CPU_TEST10_ANALOGOUT
CPU_TEST8_DIG_T
+1.2V_HT
R412
R412
*
*
44.2Ohm
44.2Ohm
+/-1%
+/-1%
R395
R395
*
*
44.2Ohm
44.2Ohm
+/-1%
+/-1%
TP7TP7
TP8TP8
1D5V_STR
R414
R414
*
*
*
*
300
300
300
+/-5%
+/-5%
R422
R422
CPU_TDO 6
300
+/-5%
+/-5%
R428
R428
CPU_STR_FB_H 29
CPU_STR_FB_L 29
R389
R389
80.6
80.6
+/-1%
+/-1%
1K
1K
+/-5%
+/-5%
CPU_THERMDC 24
CPU_THERMDA 24
Layout: Keep CPU_HTREF0
less than 1.5" from in length.
*
*
CPU_CORE_TYPE 30
CPU_VID5 30
CPU_VID4 30
CPU_SVC 30
CPU_SVD 30
CPU_PVEN 30
CPU_VID0 30
CPU_THERMTRIP* 13
+/-5%
+/-5%
R407 0
R407 0
*
*
CPU_DBRDY 6
CPU_VDDNB_FB_H 30
CPU_VDDNB_FB_L 30
Layout: Route as 80 ohms diff impedance.
Keep trace to resistor < 1" from CPU pins.
CPU_PROCHOT_L_1.8 13
+/-5%
+/-5%
R424
CPU_TEST27
CPU_TEST26_BURNIN_L
R424
1D5V_STR
*
*
300
300
+/-5%
+/-5%
R398
R398
*
*
300
300
PZ94121-3126-01F
B B
1D5V_STR
R390
R390
*
*
1K
1K
Dummy
Dummy
+/-5%
+/-5%
CPU_ALERT#
PZ94121-3126-01F
CPU_M_VREF_SUS
1D5V_STR
CPU_M_VREF_SUS
R391
A A
5
4
R391
*
*
15
15
+/-1%
+/-1%
C512
*
*
C511
C511
0.1uF
0.1uF
C512
1nF
1nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
Layout: Place within 500
mils of the CPU socket.
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
AM3- 3 MISC
AM3- 3 MISC
AM3- 3 MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
8 35Saturday, December 04, 2010
8 35Saturday, December 04, 2010
8 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
R394
R394
*
*
15
15
+/-1%
+/-1%
3
Page 9
5
4
3
2
1
VCCP_CPU
U206E
U206E
B3
VDD_1
C2
VDD_2
C4
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
D D
C C
B B
F5
F7
G6
G8
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
L14
L16
L18
L20
L22
M2
M3
M7
M9
M11
M13
M15
M17
M19
M21
M23
N8
N10
N12
N14
N16
N18
N20
N22
P7
P9
P11
P13
P15
P17
P19
P21
P23
R4
R5
R8
R10
R12
R14
R16
R18
R20
R22
T2
T3
T7
T9
T11
T13
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
PZ94121-3126-01F
PZ94121-3126-01F
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
J5
POWER/GND1
POWER/GND1
VSS_51
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
Bottom Side Decoupling
1D5V_STR
*
*
*
*
*
*
10uF
10uF
C772
C772
C766
C766
+/-10%
+/-10%
VCCP_CPU
*
*
*
C750
Dummy*C750
Dummy
22uF
22uF
A A
VCCP_CPU
*
*
VCCP_NB
*
*
C731
C731
C738
C738
10uF
10uF
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
c0805h14
c0805h14
*
*
22uF
22uF
C742
C742
*
*
10uF
10uF
C770
C770
+/-10%
+/-10%
*
*
C757
C757
Dummy
Dummy
22uF
22uF
C728
C728
10uF
10uF
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
c0805h14
c0805h14
*
*
22uF
22uF
5
*
10uF
10uF
C764
C764
+/-10%
+/-10%
C758
C758
*
*
22uF
22uF
C725
C725
10uF
10uF
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
c0805h14
c0805h14
C723
C723
10nF
10nF
*
*
*
10uF
10uF
C765
C765
+/-10%
+/-10%
C760
C760
*
*
*
*
C759
C759
Dummy
Dummy
22uF
22uF
22uF
22uF
VCCP_CPU VCCP_NBVCCP_CPU
C730
C730
10nF
10nF
*
*
10nF
10nF
C771
C771
C737
C737
C749
C749
*
*
22uF
22uF
22uF
22uF
C762 2.2uF
C762 2.2uF
*
*
C768 2.2uF
C768 2.2uF
*
*
VCCP_CPU
*
*
10nF
10nF
C769
C769
*
*
Dummy
Dummy
*
*
C741
C741
1D5V_STR
C753
C753
22uF
22uF
0.22uF
0.22uF
4.7uF
4.7uF
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE10
AE12
AF11
T15
T17
T19
T21
T23
U10
U12
U14
U16
U18
U20
U22
V11
V13
V15
V17
V19
V21
V23
W4
W5
W8
W10
W12
W14
W16
W18
W20
W22
Y11
Y13
Y15
Y17
Y19
Y21
Y23
AA8
AB7
AB9
AC4
AC5
AC8
AD2
AD3
AD7
AD9
AF7
AF9
AG4
AG5
AG7
AH2
AH3
C767
C767
C739
C739
U8
V9
Y2
Y3
Y7
Y9
*
*
*
*
Dummy
Dummy
*
*
EMC
U206F
U206F
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
VDD_117
VDD_118
VDD_119
VDD_120
VDD_121
VDD_122
VDD_123
VDD_124
VDD_125
VDD_126
VDD_127
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
VDD_135
VDD_136
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
VDD_145
VDD_146
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
VDD_155
VDD_156
VDD_157
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
VDD_163
VDD_164
VDD_165
VDD_166
VDD_167
VDD_168
VDD_169
VDD_170
PZ94121-3126-01F
PZ94121-3126-01F
C763
C763
180pF
180pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
0.22uF
0.22uF
C736
C736
C752
C752
*
*
Dummy
Dummy
22uF
22uF
*
*
C740
C740
4.7uF
4.7uF
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
POWER/GND2
POWER/GND2
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
C754
C754
C751
C751
*
*
0.22uF
0.22uF
22uF
22uF
22uF
22uF
C748
C748
10nF
10nF
*
*
*
*
10nF
10nF
C761
C761
4.7uF
4.7uF
C743 2.2uF
C743 2.2uF
*
*
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W7
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
Y14
Y16
Y18
Y20
Y22
AA4
AA5
AA7
AA9
C726
C726
0.22uF
0.22uF
C727
C727
180pF
180pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
4
VCCP_NB
Processor Power and Ground
U206G
U206G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
B2
NP/RSVD
H20
NP/VSS1
AE7
NP/VSS2
PZ94121-3126-01F
PZ94121-3126-01F
VCCP_NB VDDR_R
VCCP_NB
C546
C546
C541
C541
10uF
10uF
10uF
10uF
*
*
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
c0805h14
c0805h14
c0805h14
c0805h14
+1.2V_HT
*
*
*
*
C539
C539
C605
C605
4.7uF
4.7uF
4.7uF
4.7uF
VLDT_HT3_RUN
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
POWER/GND3
POWER/GND3
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
C553
C553
*
*
C548
C548
4.7uF
4.7uF
0.22uF
0.22uF
C585
C585
C576
C576
0.22uF
0.22uF
0.22uF
0.22uF
C587
C587
0.22uF
0.22uF
180pF
180pF
C586
C586
+1.2V_HT
U206H
U206H
VDDR_L
1D5V_STR
C545
C545
10uF
10uF
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
c0805h14
c0805h14
*
*
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
AJ1
AJ2
AJ3
AJ4
A12
B12
C12
D12
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
C540
C540
4.7uF
4.7uF
VLDT_A_1
VLDT_A_2
VLDT_A_3
VLDT_A_4
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
PZ94121-3126-01F
PZ94121-3126-01F
C570
C570
*
*
C542
C542
4.7uF
4.7uF
POWER/GND4
POWER/GND4
C575
C575
C551
C551
0.22uF
0.22uF
0.22uF
0.22uF
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
VDDR_R
10nF
10nF
C550
C550
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
*
*
0.22uF
0.22uF
VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
C661
C661
4.7uF
4.7uF
H1
H2
H5
H6
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
VLDT_HT3_RUN_B
VDDR_R
+1.2V_HT
CP18
CP18
12
X_COPPER
X_COPPER
CP19
CP19
12
X_COPPER
X_COPPER
Layout: Place as close as
possible to CPU socket.
*
*
C594
C594
4.7uF
4.7uF
CPU
1D5V_STR
A1
AM3
Top View
AL1
VDDR_L
180pF
180pF
C581
C581
*
*
Dummy
Dummy
C544
C544
4.7uF
4.7uF
A31
AL31
*
*
C547
C547
4.7uF
4.7uF
1D5V_STR
1D5V_STR
Layout: Place across each
VDDIO-GND plane split.
C543
C543
10uF
10uF
C592
C592
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
10nF
10nF
C549
C549
c0805h14
c0805h14
C593
C593
2.2uF
2.2uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C600
C600
2.2uF
2.2uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
*
C658
C658
4.7uF
4.7uF
0.22uF
0.22uF
C598
C598
2.2uF
2.2uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
180pF
180pF
C591
C591
C538
C538
2.2uF
2.2uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
180pF
180pF
C556
C556
DIMMs
VTT_DDR
VTT_DDR
*
*
*
*
*
*
C657
C657
4.7uF
4.7uF
Layout: Place behind the DIMMs,
evenly spaced on VTT fill.
C660
C660
4.7uF
4.7uF
C837
C837
4.7uF
4.7uF
*
*
C838
C838
4.7uF
4.7uF
VTT_DDR
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
AM3- 4 Power
AM3- 4 Power
AM3- 4 Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
AC
AC
AC
of
of
of
9 35Friday, December 03, 2010
9 35Friday, December 03, 2010
9 35Friday, December 03, 2010
Page 10
5
DIMM1
DIMM1
198
FREE4
1D5V_STR
VDD_SPD
187
FREE3
49
FREE2
48
FREE1
240
VTT
120
VTT
239
VSS
235
VSS
232
VSS
229
VSS
226
VSS
223
VSS
220
VSS
217
VSS
214
VSS
211
VSS
208
VSS
205
VSS
202
VSS
199
VSS
166
VSS
163
VSS
160
VSS
157
VSS
154
VSS
151
VSS
148
VSS
145
VSS
142
VSS
139
VSS
136
VSS
133
VSS
130
VSS
127
VSS
124
VSS
121
VSS
119
VSS
116
VSS
113
VSS
110
VSS
107
VSS
104
VSS
101
VSS
98
VSS
95
VSS
92
VSS
89
VSS
86
VSS
83
VSS
80
VSS
47
VSS
44
VSS
41
VSS
38
VSS
35
VSS
32
VSS
29
VSS
26
VSS
23
VSS
20
VSS
17
VSS
14
VSS
11
VSS
8
VSS
5
VSS
2
VSS
197
VDDQ
194
VDDQ
191
VDDQ
189
VDDQ
186
VDDQ
183
VDDQ
182
VDDQ
179
VDDQ
176
VDDQ
173
VDDQ
170
VDDQ
78
VDD
75
VDD
72
VDD
69
VDD
66
VDD
65
VDD
62
VDD
60
VDD
57
VDD
54
VDD
51
VDD
236
VDDSPD
67
VREFCA
1
VREFDQ
118
SCL
238
SDA
237
SA1
117
SA0
52
BA2
190
BA1
71
BA0
169
CKE1
50
CKE0
76
S1*
193
S0*
64
CK1/NU*
63
CK1/NU
185
CK0*
184
CK0
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
168
RESET*
74
CAS*
192
RAS*
73
WE*
DDR III
DDR III
MEM_MA_EVENT_L7
VTT_DDR
D D
MEM_VREFDQ_SUS
1D5V_STR MEM_VREFDQ_SUS
R674
R674
*
*
15
15
+/-1%
+/-1%
R673
R673
*
*
15
15
+/-1%
+/-1%
C832
C832
0.1uF
0.1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Dummy
Dummy
C836
C836
C830
C830
1nF
1nF
*
*
*
*
0.1uF
0.1uF
50V, X7R, +/-10%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
50V, X7R, +/-10%
Layout: Place within 500
mils of the DIMMB1 socket.
MEM_VREFCA_SUS
C C
1D5V_STR MEM_VREFCA_SUS
C834
*
*
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Layout: Place within 500
mils of the DIMMB1 socket.
R445 0 +/-5%
R445 0 +/-5%
*
*
MEM_MA_BANK[2..0]7
C834
0.1uF
0.1uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Dummy
Dummy
C835
C835
1nF
1nF
C833
C833
*
*
0.1uF
0.1uF
50V, X7R, +/-10%
50V, X7R, +/-10%
VDD_SPD
MEM_MA_ADD[15..0]
5
VDD_SPD 11
SMB_MEM_SCL11,18
SMB_MEM_SDA11,18
MEM_MA_BANK[2..0]
MEM_MA_CKE17
MEM_MA_CKE07
MEM_MA0_CS_L17
MEM_MA0_CS_L07
MEM_MA0_CLK1_N7
MEM_MA0_CLK1_P7
MEM_MA0_CLK0_N7
MEM_MA0_CLK0_P7
MEM_MA_RESET#7
MEM_MA_CAS#7
MEM_MA_RAS#7
MEM_MA_WE#7
MEM_VREFCA_SUS
MEM_VREFDQ_SUS
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
R676
R676
*
*
15
15
+/-1%
+/-1%
R675
R675
*
*
15
15
+/-1%
+/-1%
+3.3V
B B
MEM_MA_ADD[15..0]7
A A
4
79
RSVD
77
ODT1
195
ODT0
68
NC/PAR_IN
53
NC/ERR_OUT
167
NC/TEST4
39
CB<0>
40
CB<1>
45
CB<2>
46
CB<3>
158
CB<4>
159
CB<5>
164
CB<6>
165
CB<7>
7
DQS<0>
6
DQS*<0>
16
DQS<1>
15
DQS*<1>
25
DQS<2>
24
DQS*<2>
34
DQS<3>
33
DQS*<3>
85
DQS<4>
84
DQS*<4>
94
DQS<5>
93
DQS*<5>
103
DQS<6>
102
DQS*<6>
112
DQS<7>
111
DQS*<7>
43
DQS<8>
42
DQS*<8>
125
DM0/DQS9
126
DQS9*
134
DM1/DQS10
135
DQS10*
143
DM2/DQS11
144
DQS11*
152
DM3/DQS12
153
DQS12*
203
DM4/DQS13
204
DQS13*
212
DM5/DQS14
213
DQS14*
221
DM6/DQS15
222
DQS15*
230
DM7/DQS16
231
NC/DQS16*
161
DM8/DQS17
162
DQS17*
3
DQ<0>
4
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
DDRIII
DDRIII
MEM_MA_CHECK0
MEM_MA_CHECK1
MEM_MA_CHECK2
MEM_MA_CHECK3
MEM_MA_CHECK4
MEM_MA_CHECK5
MEM_MA_CHECK6
MEM_MA_CHECK7
MEM_MA_DQS0_P 7
MEM_MA_DQS0_N 7
MEM_MA_DQS1_P 7
MEM_MA_DQS1_N 7
MEM_MA_DQS2_P 7
MEM_MA_DQS2_N 7
MEM_MA_DQS3_P 7
MEM_MA_DQS3_N 7
MEM_MA_DQS4_P 7
MEM_MA_DQS4_N 7
MEM_MA_DQS5_P 7
MEM_MA_DQS5_N 7
MEM_MA_DQS6_P 7
MEM_MA_DQS6_N 7
MEM_MA_DQS7_P 7
MEM_MA_DQS7_N 7
MEM_MA_DQS8_P 7
MEM_MA_DQS8_N 7
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA0_ODT1 7
MEM_MA0_ODT0 7
MEM_MA_CHECK[7..0] 7
MEM_MA_DM[7..0]
MEM_MA_DM8 7
MEM_MA_DATA[63..0]
MEM_MA_DM[7..0] 7
MEM_MA_DATA[63..0] 7
3
2
1
SMBus Addressing
Device
DIMMA0
DIMMB0
DIMMA1
DIMMB1
Title
Title
Title
DDR SDRAM DIMM 1
DDR SDRAM DIMM 1
DDR SDRAM DIMM 1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
SMBus 0
8-bit Address (hex)
A0
A2
A4
A6
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
10 35Saturday, December 04, 2010
10 35Saturday, December 04, 2010
10 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 11
5
MEM_MB_EVENT_L7
VTT_DDR
D D
C C
1D5V_STR
MEM_MB_ADD[15..0]
5
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
SMB_MEM_SCL10,18
SMB_MEM_SDA10,18
MEM_MB_BANK[2..0]
MEM_MB_CKE17
MEM_MB_CKE07
MEM_MB0_CS_L17
MEM_MB0_CS_L07
MEM_MB0_CLK1_N7
MEM_MB0_CLK1_P7
MEM_MB0_CLK0_N7
MEM_MB0_CLK0_P7
MEM_MB_RESET#7
MEM_MB_CAS#7
MEM_MB_RAS#7
MEM_MB_WE#7
VDD_SPD
MEM_VREFCA_SUS
MEM_VREFDQ_SUS
+3.3V
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
B B
MEM_MB_BANK[2..0]7
MEM_MB_ADD[15..0]7
A A
VDD_SPD10
VDD_SPD
DIMM2
DIMM2
198
FREE4
187
FREE3
49
FREE2
48
FREE1
240
VTT
120
VTT
239
VSS
235
VSS
232
VSS
229
VSS
226
VSS
223
VSS
220
VSS
217
VSS
214
VSS
211
VSS
208
VSS
205
VSS
202
VSS
199
VSS
166
VSS
163
VSS
160
VSS
157
VSS
154
VSS
151
VSS
148
VSS
145
VSS
142
VSS
139
VSS
136
VSS
133
VSS
130
VSS
127
VSS
124
VSS
121
VSS
119
VSS
116
VSS
113
VSS
110
VSS
107
VSS
104
VSS
101
VSS
98
VSS
95
VSS
92
VSS
89
VSS
86
VSS
83
VSS
80
VSS
47
VSS
44
VSS
41
VSS
38
VSS
35
VSS
32
VSS
29
VSS
26
VSS
23
VSS
20
VSS
17
VSS
14
VSS
11
VSS
8
VSS
5
VSS
2
VSS
197
VDDQ
194
VDDQ
191
VDDQ
189
VDDQ
186
VDDQ
183
VDDQ
182
VDDQ
179
VDDQ
176
VDDQ
173
VDDQ
170
VDDQ
78
VDD
75
VDD
72
VDD
69
VDD
66
VDD
65
VDD
62
VDD
60
VDD
57
VDD
54
VDD
51
VDD
236
VDDSPD
67
VREFCA
1
VREFDQ
118
SCL
238
SDA
237
SA1
117
SA0
52
BA2
190
BA1
71
BA0
169
CKE1
50
CKE0
76
S1*
193
S0*
64
CK1/NU*
63
CK1/NU
185
CK0*
184
CK0
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10/AP
55
A11
174
A12
196
A13
172
A14
171
A15
168
RESET*
74
CAS*
192
RAS*
73
WE*
DDR III
DDR III
4
79
RSVD
77
ODT1
195
ODT0
68
NC/PAR_IN
53
NC/ERR_OUT
167
NC/TEST4
39
CB<0>
40
CB<1>
45
CB<2>
46
CB<3>
158
CB<4>
159
CB<5>
164
CB<6>
165
CB<7>
7
DQS<0>
6
DQS*<0>
16
DQS<1>
15
DQS*<1>
25
DQS<2>
24
DQS*<2>
34
DQS<3>
33
DQS*<3>
85
DQS<4>
84
DQS*<4>
94
DQS<5>
93
DQS*<5>
103
DQS<6>
102
DQS*<6>
112
DQS<7>
111
DQS*<7>
43
DQS<8>
42
DQS*<8>
125
DM0/DQS9
126
DQS9*
134
DM1/DQS10
135
DQS10*
143
DM2/DQS11
144
DQS11*
152
DM3/DQS12
153
DQS12*
203
DM4/DQS13
204
DQS13*
212
DM5/DQS14
213
DQS14*
221
DM6/DQS15
222
DQS15*
230
DM7/DQS16
231
NC/DQS16*
161
DM8/DQS17
162
DQS17*
3
DQ<0>
4
DQ<1>
DQ<2>
DQ<3>
DQ<4>
DQ<5>
DQ<6>
DQ<7>
DQ<8>
DQ<9>
DQ<10>
DQ<11>
DQ<12>
DQ<13>
DQ<14>
DQ<15>
DQ<16>
DQ<17>
DQ<18>
DQ<19>
DQ<20>
DQ<21>
DQ<22>
DQ<23>
DQ<24>
DQ<25>
DQ<26>
DQ<27>
DQ<28>
DQ<29>
DQ<30>
DQ<31>
DQ<32>
DQ<33>
DQ<34>
DQ<35>
DQ<36>
DQ<37>
DQ<38>
DQ<39>
DQ<40>
DQ<41>
DQ<42>
DQ<43>
DQ<44>
DQ<45>
DQ<46>
DQ<47>
DQ<48>
DQ<49>
DQ<50>
DQ<51>
DQ<52>
DQ<53>
DQ<54>
DQ<55>
DQ<56>
DQ<57>
DQ<58>
DQ<59>
DQ<60>
DQ<61>
DQ<62>
DQ<63>
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
DDRIII
DDRIII
4
MEM_MB_CHECK0
MEM_MB_CHECK1
MEM_MB_CHECK2
MEM_MB_CHECK3
MEM_MB_CHECK4
MEM_MB_CHECK5
MEM_MB_CHECK6
MEM_MB_CHECK7
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB0_ODT1 7
MEM_MB0_ODT0 7
MEM_MB_CHECK[7..0] 7
MEM_MB_DQS0_P 7
MEM_MB_DQS0_N 7
MEM_MB_DQS1_P 7
MEM_MB_DQS1_N 7
MEM_MB_DQS2_P 7
MEM_MB_DQS2_N 7
MEM_MB_DQS3_P 7
MEM_MB_DQS3_N 7
MEM_MB_DQS4_P 7
MEM_MB_DQS4_N 7
MEM_MB_DQS5_P 7
MEM_MB_DQS5_N 7
MEM_MB_DQS6_P 7
MEM_MB_DQS6_N 7
MEM_MB_DQS7_P 7
MEM_MB_DQS7_N 7
MEM_MB_DQS8_P 7
MEM_MB_DQS8_N 7
MEM_MB_DM8 7
MEM_MB_DATA[63..0]
MEM_MB_DM[7..0]
MEM_MB_DATA[63..0] 7
3
MEM_MB_DM[7..0] 7
3
2
Title
Title
Title
DDR SDRAM DIMM 2
DDR SDRAM DIMM 2
DDR SDRAM DIMM 2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
1
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
11 35Saturday, December 04, 2010
11 35Saturday, December 04, 2010
11 35Saturday, December 04, 2010
AC
AC
AC
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of
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Page 12
5
D D
C601 10nF
C601 10nF
C608 0.1uF
C608 0.1uF
C618 0.1uF
C618 0.1uF
C619 0.1uF
EMI decoupling cap, place evenly around 1D8V_STR
C C
C619 0.1uF
C609 1uF
C609 1uF
C604 1uF
C604 1uF
C612 1uF
C612 1uF
C613 1uF
C613 1uF
C616 1uF
C616 1uF
C614 1uF
C614 1uF
C615 1uF
C615 1uF
C617 1uF
C617 1uF
4
*
*
12
1D5V_STR VTT_DDR
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
C610 1uF
C610 1uF
C611 1uF
C611 1uF
3
*
*
*
*
2
1
B B
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
DDR III terminator
DDR III terminator
DDR III terminator
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
12 35Saturday, December 04, 2010
12 35Saturday, December 04, 2010
12 35Saturday, December 04, 2010
AC
AC
AC
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Page 13
5
D D
HT_CPU_RC_CAD_H[15..0]6
HT_CPU_RC_CAD_L[15..0]6
C C
HT_CPU_RC_CLK_H06
HT_CPU_RC_CLK_L06
HT_CPU_RC_CLK_H16
HT_CPU_RC_CLK_L16
HT_CPU_RC_CTL_H06
HT_CPU_RC_CTL_L06
+1.2V_HT
*
*
R322
R322
150
150
+/-1%
+/-1%
+3.3V
L15
L15
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
B B
CPU_PROCHOT_L_1.88
*
*
CPU_THERMTRIP*8
+3.3_PLL_CPU
C366
C366
+80/-20%
+80/-20%
4.7uF
4.7uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
*
*
R323
R323
150
150
+/-1%
+/-1%
C521
C521
0.1uF
0.1uF
HT_CPU_RC_CAD_H0
HT_CPU_RC_CAD_H1
HT_CPU_RC_CAD_H2
HT_CPU_RC_CAD_H3
HT_CPU_RC_CAD_H4
HT_CPU_RC_CAD_H5
HT_CPU_RC_CAD_H6
HT_CPU_RC_CAD_H7
HT_CPU_RC_CAD_H8
HT_CPU_RC_CAD_H9
HT_CPU_RC_CAD_H10
HT_CPU_RC_CAD_H11
HT_CPU_RC_CAD_H12
HT_CPU_RC_CAD_H13
HT_CPU_RC_CAD_H14
HT_CPU_RC_CAD_H15
HT_CPU_RC_CAD_L0
HT_CPU_RC_CAD_L1
HT_CPU_RC_CAD_L2
HT_CPU_RC_CAD_L3
HT_CPU_RC_CAD_L4
HT_CPU_RC_CAD_L5
HT_CPU_RC_CAD_L6
HT_CPU_RC_CAD_L7
HT_CPU_RC_CAD_L8
HT_CPU_RC_CAD_L9
HT_CPU_RC_CAD_L10
HT_CPU_RC_CAD_L11
HT_CPU_RC_CAD_L12
HT_CPU_RC_CAD_L13
HT_CPU_RC_CAD_L14
HT_CPU_RC_CAD_L15
HTCPUCAL_1P2V
HTCPUCAL_GND
CPU_THERMTRIP*
+1.2V
70mA
12mA
*
*
4
HTCPU_DWN0
HTCPU_DWN1
HTCPU_DWN2
HTCPU_DWN3
HTCPU_DWN4
HTCPU_DWN5
HTCPU_DWN6
HTCPU_DWN7
HTCPU_DWN8
HTCPU_DWN9
HTCPU_DWN10
HTCPU_DWN11
HTCPU_DWN12
HTCPU_DWN13
HTCPU_DWN14
HTCPU_DWN15
C519
C519
+80/-20%
+80/-20%
4.7uF
4.7uF
AG12
AG13
AK13
AB10
AD10
AF10
AC12
AB11
AB13
AF14
AE14
AH10
AH12
AH13
AH14
AC10
AE10
AG10
AD12
AC11
AB12
AG14
AD14
AH11
AE12
AF12
AH15
AB14
AC14
AC15
AB15
AG8
AG9
AK9
AJ10
AJ14
AH8
AH9
AJ9
AJ13
AJ11
AJ15
AB9
AB8
AD8
AE8
U15H
U15H
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL0_P
HT_MCP_RXCTL0_N
RESERVED
RESERVED
HT_MCP_COMP_VDD
HT_MCP_COMP_GND
PROCHOT*/GPIO20
THERMTRIP*/GPIO58
+1.2V_PLL_CPU_HT
+3.3V_PLL_CPU
?
?
SEC 1 OF 8
SEC 1 OF 8
MCP61
MCP61
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL0_P
HT_MCP_TXCTL0_N
RESERVED
RESERVED
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RST*
HT_MCP_PWRGD
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CPU_SBVREF
CLKOUT_25MHZ
CLK200_TERM_GND
3
AH23
HT_RC_CPU_CAD_H0
AH22
HT_RC_CPU_CAD_H1
AJ21
HT_RC_CPU_CAD_H2
AH21
HT_RC_CPU_CAD_H3
AH19
HT_RC_CPU_CAD_H4
AH18
HT_RC_CPU_CAD_H5
AJ17
HT_RC_CPU_CAD_H6
AH17
HT_RC_CPU_CAD_H7
AF22
HT_RC_CPU_CAD_H8
AB20
HT_RC_CPU_CAD_H9
AC20
HT_RC_CPU_CAD_H10
AE20
HT_RC_CPU_CAD_H11
AD18
HT_RC_CPU_CAD_H12
AF18
HT_RC_CPU_CAD_H13
AB17
HT_RC_CPU_CAD_H14
AC16
HT_RC_CPU_CAD_H15
AJ23
HT_RC_CPU_CAD_L0
AJ22
HT_RC_CPU_CAD_L1
AK21
HT_RC_CPU_CAD_L2
AG21
HT_RC_CPU_CAD_L3
AJ19
HT_RC_CPU_CAD_L4
AJ18
HT_RC_CPU_CAD_L5
AK17
HT_RC_CPU_CAD_L6
AG17
HT_RC_CPU_CAD_L7
AG22
HT_RC_CPU_CAD_L8
AB19
HT_RC_CPU_CAD_L9
AD20
HT_RC_CPU_CAD_L10
AF20
HT_RC_CPU_CAD_L11
AE18
HT_RC_CPU_CAD_L12
AG18
HT_RC_CPU_CAD_L13
AB16
HT_RC_CPU_CAD_L14
AD16
HT_RC_CPU_CAD_L15
AH20
AG20
AC18
AB18
AH16
AG16
AE16
AF16
AH25
AH24
AG23
AG24
AK25
AJ25
+1.2V
AF24
AK26
AJ26
C272
C272
100nF
100nF
*
*
+80%~-20%
+80%~-20%
HTCPU_REQ*
5MIL TRACE
TP_CLKOUT25MHZ
HT_RC_CPU_CLK_H0 6
HT_RC_CPU_CLK_L0 6
HT_RC_CPU_CLK_H1 6
HT_RC_CPU_CLK_L1 6
HT_RC_CPU_CTL_H0 6
HT_RC_CPU_CTL_L0 6
CPU_LDTSTOP_L 8
CPU_HT_RESET_L 6,8
CPU_ALL_PWROK 8
CPU_CLKIN_H 8
CPU_CLKIN_L 8
R197
R197
*
*
2.37K Ohm
2.37K Ohm
+/-1%
+/-1%
HT_RC_CPU_CAD_H[15..0] 6
HT_RC_CPU_CAD_L[15..0] 6
*
*
+3.3V
R200
R200
*
*
10K
10K
+/-5%
+/-5%
C278
C278
+80/-20%
+80/-20%
4.7uF
4.7uF
2
1
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_HT
MCP61_HT
MCP61_HT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
13 35Saturday, December 04, 2010
13 35Saturday, December 04, 2010
13 35Saturday, December 04, 2010
AC
AC
AC
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of
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Page 14
5
U15A
U15A
?
H23
H25
K22
K24
K26
M22
M23
M26
P22
P26
P25
T23
T26
U23
V24
V27
H24
H26
K23
K25
K27
L22
M24
M25
P23
P27
P24
T24
T25
V23
V25
V26
B22
AF27
UNNAMED_19_MCP61_I99_PE0PRSNTX1
AF28
AE26
AF29
W22
Y22
U22
V22
?
PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P
PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N
PE_WAKE*/GPIO21
PE0_PRSNTX1*/SDVO_SCL
PE0_PRSNTX4*/SDVO_SDA
PE0_PRSNTX8*
PE0_PRSNTX16*
+1.2V_PLL_PE_SS
+1.2V_PLL_PE_SS
+1.2V_PLL_PE
+1.2V_PLL_PE
?
?
SEC 2 OF 8
SEC 2 OF 8
+1.2V
C255
C255
100nF
100nF
*
*
+80/-20%
+80/-20%
L19
L19
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
+80/-20%
+80/-20%
PE0_IN[15..0]
PE0_IN*[15..0]
*
*
1P2V_PLLPE
*
*
+80%~-20%
+80%~-20%
C265
C265
4.7uF
4.7uF
C517
C517
4.7uF
4.7uF
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
UNNAMED_19_MCP61_I99_PE0PRSNTX4
30mA
160mA
*
*
PE0_IN0
PE0_IN1
PE0_IN2
PE0_IN3
PE0_IN4
PE0_IN5
PE0_IN6
PE0_IN7
PE0_IN8
PE0_IN9
PE0_IN10
PE0_IN11
PE0_IN12
PE0_IN13
PE0_IN14
PE0_IN15
PE0_IN*0
PE0_IN*1
PE0_IN*2
PE0_IN*3
PE0_IN*4
PE0_IN*5
PE0_IN*6
PE0_IN*7
PE0_IN*8
PE0_IN*9
PE0_IN*10
PE0_IN*11
PE0_IN*12
PE0_IN*13
PE0_IN*14
PE0_IN*15
C259
C259
100nF
100nF
PE0_IN[15..0]19
D D
PE0_IN*[15..0]19
PE_WAKE*19
PE0_PRSNTX1*19
PE0_PRSNTX4*19
PE0_PRSNTX8*19
PE0_PRSNTX16*19
C C
B B
A A
+80%~-20%
+80%~-20%
+1.2V
4
MCP61
MCP61
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE_A_TSTCLK_N
PE_A_TSTCLK_P
PE_RESET*
PE_CLK_COMP
+3.3V_PLL_PE_SS
+3.3V_PLL_PE_SS
R240 0 +/-5% @8211
R240 0 +/-5% @8211
*
*
R332 0 +/-5% @8211
R332 0 +/-5% @8211
*
*
R333 0 +/-5% @8211
R333 0 +/-5% @8211
*
*
G29
H27
J27
J30
K29
L29
M27
N27
N30
P29
R29
T27
U27
U30
V29
W29
G28
H28
J28
J29
K28
L28
M28
N28
N29
P28
R28
T28
U28
U29
V28
W28
Y24
Y23
AC24
PECLK_TEST
AC25
PECLK_TEST*
AH29
PE_RESET*
AJ30
PE_COMP
R22
T22
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
ENREG/RXER_N
COL_N
CRS_N
PE0_OUT0
0
PE0_OUT1
1
PE0_OUT2
2
PE0_OUT3
3
PE0_OUT4
4
PE0_OUT5
5
PE0_OUT6
6
PE0_OUT7
7
PE0_OUT8
8
PE0_OUT9
9
PE0_OUT10
10
PE0_OUT11
11
PE0_OUT12
12
PE0_OUT13
13
PE0_OUT14
14
PE0_OUT15
15
PE0_OUT*0
0
PE0_OUT*1
1
PE0_OUT*2
2
PE0_OUT*3
3
PE0_OUT*4
4
PE0_OUT*5
5
PE0_OUT*6
6
PE0_OUT*7
7
PE0_OUT*8
8
PE0_OUT*9
9
PE0_OUT*10
10
PE0_OUT*11
11
PE0_OUT*12
12
PE0_OUT*13
13
PE0_OUT*14
14
PE0_OUT*15
15
PE0_REFCLK
PE0_REFCLK*
30mA
C514
C514
0.1uF
0.1uF
+80/-20%
+80/-20%
+3.3V_DUAL
PE0_OUT[15..0]
PE0_OUT*[15..0]
PE0_REFCLK 19
PE0_REFCLK* 19
R320 100
R320 100
*
*
+/-5%
+/-5%
Dummy
Dummy
PE_RESET* 19,26
R209 2.37K Ohm
R209 2.37K Ohm
+/-1%
+/-1%
L20
L20
1 2
*
*
C518
C518
40 Ohm@100MHz
40 Ohm@100MHz
4.7uF
4.7uF
*
*
L16 40 Ohm@100MHz
L16 40 Ohm@100MHz
1 2
*
*
*
*
+80/-20%
+80/-20%
DAC_RED31
DAC_GREEN31
DAC_BLUE31
PLACE NEAR MCP61
+3.3V
PE0_OUT[15..0] 19
PE0_OUT*[15..0] 19
+3.3V
C370
C370
C381
C381
100nF
100nF
4.7uF
4.7uF
*
*
+80%~-20%
+80%~-20%
DAC_RED
DAC_GREEN
DAC_BLUE
R202
R202
150
150
+/-5%
+/-5%
L14 40 Ohm@100MHz
L14 40 Ohm@100MHz
1 2
*
*
+80/-20%
+80/-20%
PE1_PRSNT*19
R208
R208
RX_D026
RX_D126
RX_D226
RX_D326
RX_CLK26
RX_DV26
ENREG/RXER_N26
+3.3V_PLL_MAC_DUAL
1
1
1
R203
R203
R207
R207
150
150
150
150
+/-5%
+/-5%
+/-5%
+/-5%
2
2
2
C280
C280
4.7uF
4.7uF
*
*
*
*
+80%~-20%
+80%~-20%
3
PE1_IN19
PE1_IN*19
Dummy
Dummy
*
*
100
100
+/-5%
+/-5%
RX_D0
RX_D1
RX_D2
RX_D3
RX_CLK
RX_DV
COL_N26
CRS_N26
TP28TP28
+3.3V_DUAL
R201 49.9 +/-1%R201 49.9 +/-1%
R204 49.9 +/-1%R204 49.9 +/-1%
DAC_HSYNC31
DAC_VSYNC31
R199
R199
124
124
+/-1%
+/-1%
C284
C284
100nF
100nF
PE_B_TSTCLK_P
PE_B_TSTCLK_N
1
GMII_INTR*
DAC_HSYNC
DAC_VSYNC
DACRSET
C274
C274
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
3P3V_DAC
Y28
Y27
AB29
AB28
AK29
AG28
AG30
AC27
AC26
AD27
AD28
AE30
AE29
AJ29
AG29
AH30
D26
E26
B26
B27
A26
C26
D24
E24
F23
G24
M9
B23
MII_COMP_3P3V
C23
MII_COMP_GND
D30
D29
C30
B30
C29
B29
A29
100mA
F28
U15B
U15B
?
?
PE1_RX_P
PE1_RX_N
PE2_RX_P
PE2_RX_N
PEA_CLKREQ*/GPIO51
PE1_PRSNT*
PE2_PRSNT*
PE_B_TSTCLK_P
PE_B_TSTCLK_N
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RGMII_RXD0/MII_RXD0
RGMII_RXD1/MII_RXD1
RGMII_RXD2/MII_RXD2
RGMII_RXD3/MII_RXD3
RGMII_RXC/MII_RXCLK
RGMII_RXCTL/MII_RXDV
MII_RXER/GPIO36
MII_COL/GPIO13/MI2C_DATA
MII_CRS/GPIO14/MI2C_CLK
RGMII/MII_INTR*/GPIO35
6mA
+3.3V_PLL_MAC_DUAL
MII_COMP_3P3V
MII_COMP_GND
DAC_RED
DAC_GREEN
DAC_BLUE
DAC_HSYNC
DAC_VSYNC
DAC_RSET
DAC_VREF
+3.3V_DAC
?
?
BYPASS CAPS
+5V_DUAL
C436
C436
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
+80%~-20%
+80%~-20%
C430
C430
100nF
100nF
MCP61
MCP61
SEC 3 OF 8
SEC 3 OF 8
2
PE1_REFCLK_P
PE1_REFCLK_N
PE2_REFCLK_P
PE2_REFCLK_N
RGMII_TXD0/MII_TXD0
RGMII_TXD1/MII_TXD1
RGMII_TXD2/MII_TXD2
RGMII_TXD3/MII_TXD3
RGMII_TXC/MII_TXCLK
RGMII_TXCTL/MII_TXEN
RGMII/MII_MDC
RGMII/MII_MDIO
RGMII/MII_PWRDWN*/GPIO37
MII_RESET*/GPIO12
DDC_CLK/GPIO17
DDC_DATA/GPIO19
PE1_TX_P
PE1_TX_N
PE2_TX_P
PE2_TX_N
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
BUF_25MHZ
MII_VREF
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
XTALIN
XTALOUT
XTALIN_RTC
XTALOUT_RTC
AA28
AA27
AA30
AA29
Y26
Y25
AB23
AA23
AC29
AC28
AE27
AE28
AB24
AB25
AB27
AB26
A28
B28
D28
E27
D27
E28
R392 0
R392 0
B25
A25
F24
C24
C25
C27
MII_VREF
B6
DDC_CLK
A6
DDC_DATA
MCP61_TCK
M7
M5
M6
M8
TP_MCP61_TRST*
L9
XTALIN
K7
XTALOUT
K8
K6
XTALIN_RTC
K5
XTALOUT_RTC
RN26
RN26
*
*
1
2
3
4
5
6
7 8
*
*
+/-5%
+/-5%
MDC
MDIO
R219
R219
33
33
*
*
+/-5%
+/-5%
Dummy
Dummy
X3 XTAL-32.768kHzX3 XTAL-32.768kHz
C438
C438
18pF
18pF
*
*
+/-5%
+/-5%
modify 9/13
X3_1
X3_1
Crystal Retainer
Crystal Retainer
PE1_OUT 19
PE1_OUT* 19
PE1_REFCLK 19
PE1_REFCLK* 19
TXD0
0 Ohm
0 Ohm
TXD1
+/-5%
+/-5%
TXD2
TXD3
BUF_25MHZ 26
RGMII_RESETJ 26
DDC_CLK 31
DDC_DATA 31
12
3
4
*
*
*
*
*
*
C439
C439
R270
R270
10K
10K
+/-5%
+/-5%
R277
R277
10K
10K
+/-5%
+/-5%
18pF
18pF
+/-5%
+/-5%
1
TX_D0 26
TX_D1 26
TX_D2 26
TX_D3 26
TX_CLK 26
TX_EN 26
MDC 26
MDIO 26
MII_VREF
X2
X2
1 2
C442
C442
27pF
27pF
*
*
+/-5%
+/-5%
modify 9/19
Dummy
Dummy
+3.3V_DUAL
R171
R171
*
*
1.47K Ohm
1.47K Ohm
+/-1%
+/-1%
R326
R326
*
*
1.47K Ohm
1.47K Ohm
+/-1%
+/-1%
XTAL-25MHz
XTAL-25MHz
*
*
+3.3V
*
*
C440
C440
27pF
27pF
+/-5%
+/-5%
C365
C365
100nF
100nF
+80%~-20%
+80%~-20%
Dummy
Dummy
*
*
C374
C374
100nF
100nF
+80%~-20%
+80%~-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_PCI-E_VGA
MCP61_PCI-E_VGA
MCP61_PCI-E_VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
14 35Friday, December 03, 2010
14 35Friday, December 03, 2010
14 35Friday, December 03, 2010
AC
AC
AC
of
of
Page 15
5
U15F
U15F
?
+1.2V
7.008A
AK27
AH27
AJ27
AG26
AG25
AE22
AE23
D D
AB21
AC21
389mA
AB22
AE24
AD22
AA22
AC22
827mA
+3.3V
C C
P15
AK14
M15
U15G
U15G
MCP61
MCP61
GND
GND
GND
?
+1.2V
+1.2V
+1.2V
+1.2V
+1.2V
U18
+1.2V
+1.2V
+1.2V
V19
+1.2V
V18
+1.2V
U19
+1.2V
W19
+1.2V
W18
+1.2V
V15
+1.2V
U16
+1.2V
T14
+1.2V
W14
+1.2V
+1.2V
+1.2V
U14
+1.2V
T18
+1.2V
U15
+1.2V
R15
+1.2V
V17
+1.2V
V16
+1.2V
R17
+1.2V
T16
+1.2V
U17
+1.2V
R19
+1.2V
+1.2V_PED
+1.2V_PED
+1.2V_PED
+1.2V_PED
+1.2V_PED
H15
+3.3V
J15
+3.3V
AC6
+3.3V
AC5
+3.3V
?
?
M13
M14
P14
N14
N12
AC8
N19
?
?
GND
GND
GND
GND
GND
GND
GNDW6GND
SEC 7 OF 8
SEC 7 OF 8
D23
P12
GND
GNDN9GNDR9GNDU1GND
MCP61
MCP61
+1.2V_SP_D
+1.2V_SP_D
+1.2V_SP_D
+1.2V_SP_D
+1.2V_SP_A
+1.2V_SP_A
+1.2V_SP_A
+1.2V_SP_A
+1.2V_SP_A
+1.2V_DUAL
+1.2V_DUAL
+3.3V_DUAL
+3.3V_DUAL
+3.3V_USB_DUAL
+3.3V_USB_DUAL
J21
F30
AB3
A30
AK30
GNDF7GNDN8GND
GNDK9GND
GND
GNDH7GND
GND
+1.2V_HT
W15
+1.2V_HT
W16
+1.2V_HT
W17
+1.2V_HT
AK28
+1.2V_PEA
AJ28
+1.2V_PEA
AH28
+1.2V_PEA
AG27
+1.2V_PEA
AF26
+1.2V_PEA
AE25
+1.2V_PEA
AD24
+1.2V_PEA
AC23
+1.2V_PEA
V13
W13
V14
W12
W9
W8
V8
V9
U9
F26
F27
L4
J22
L3
L2
PLACE CAPS CLOSE TO 3.3V_USB_DUAL
ISSUES IN THE PAST
R25
U25
W25
AA25
AD26
H21
K30
P30
V30
AB30
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDK1GND
700mA
1.837A
97mA
320mA
+1.2V_DUAL
286mA
+3.3V_DUAL
200mA
350mA
N13
W27
J25
L25
GND
GND
GND
GND
R27
GND
+1.2V
W23
L27
GND
GND
+1.2V
L13
L13
2 1
L22
L22
40 Ohm@100MHz
40 Ohm@100MHz
*
*
1 2
AG7
AE9
GND
GNDJ9GNDU8GND
FB 30Ohm
FB 30Ohm
P18
F25
GND
GND
modify 8/20
1P2V_PEA
1P2V_SP_A
AK5
F29
F19
F21
GND
GND
GND
GND
4
3
2
1
MCP61 DECOUPLING
+1.2V
C520
C520
C301
C301
C303
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
+1.2V
C288
C288
C277
C277
10uF
10uF
10uF
10uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C276
C276
C262
C262
10uF
10uF
10uF
10uF
*
*
*
*
Dummy
Dummy
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C525
C525
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C371
C371
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C303
100nF
100nF
+80%~-20%
+80%~-20%
C282
C282
C297
*
*
C251
C251
1uF
1uF
*
*
C267
C267
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C339
C339
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C300
C300
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C297
10uF
10uF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C302
C302
C298
C298
100nF
100nF
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
+1.2V_HT
Reserved
Reserved
*
*
C368
C368
C364
C364
100nF
100nF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
C253
C253
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C281
C281
C254
C254
10uF
10uF
10uF
10uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C373
C373
C516
C516
0.1uF
0.1uF
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C336
C336
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
C257
C257
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C287
C287
10uF
10uF
*
*
*
*
Dummy
Dummy
MODIFY 8/21 MODIFY 8/21
+3.3V
C418
C418
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C286
C286
10uF
10uF
*
*
C372
C372
100nF
100nF
+80%~-20%
+80%~-20%
*
*
+1.2V_DUAL
C264
C264
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C258
C258
C268
C268
10uF
10uF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
10uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C270
C270
C263
C263
10uF
10uF
10uF
10uF
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1P2V_PEA
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
C523
*
C523
+80/-20%
+80/-20%
4.7uF
4.7uF
C380
C380
100nF
100nF
*
*
+80%~-20%
+80%~-20%
10uF
*
*
C250
C250
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C269
C269
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C379
C379
100nF
100nF
*
*
+80%~-20%
+80%~-20%
MODIFY 8/21
*
*
Dummy
Dummy
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1P2V_SP_A
+3.3V_DUAL
C515
C515
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
AB4
AJ7
E29
AC17
AC19
H11
A27
AG4
AF1
AK10
AC13
T19
C28
AC4
GND
GND
GND
GND
GNDD1GND
GND
GNDR8GND
GND
GND
GND
GND
GND
GND
GNDW4GNDV3GNDR4GND
SEC 8 OF 8
SEC 8 OF 8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA1GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDU6GNDR6GNDN6GNDL6GNDJ6GND
GND
GND
GNDC4GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDF9GND
GND
GND
GND
GND
GND
GND
GND
GNDU2GND
GND
GND
GNDD7GND
GND
GND
GND
B B
J13
T15
P19
A A
P13
H19
AE11
N25
AB7
G26
G27
AC9
H13
D19
H17
D25
AA9
AE13
AE15
AE17
AE19
AE21
AH26
5
E30
D11
AA8
D15
AF30
AK18
AK22
AG15
AG19
J17
F11
F13
F15
F17
J23
P16
N18
R23
R13
N22
AK1
M18
M19
J11
L23
T17
T13
P17
R16
R18
N15
M17
4
T12
R12
R14
N23
N17
N16
M16
AC7
AG11
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_POWER
MCP61_POWER
MCP61_POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
15 35Saturday, December 04, 2010
15 35Saturday, December 04, 2010
15 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 16
5
D D
PCI_AD[31..0]20
C C
PCI_C/BE*[3..0]20
PCI_FRAME*20
PCI_DEVSEL*20
RN2833
RN2833
+/-5%
PCIRST_SLOT1*20
PCIRST_SLOT2*20
B B
LAN_RST26
LPCRST_SIO*21
LPCRST_TPM*22
PCIRST_SLOT1*
PCIRST_SLOT2*
LPCRST_SIO*
LPCRST_TPM*
+/-5%
*
*
1
3
5
7 8
R325
R325
R382 33
R382 33
PCI_C/BE*[3..0]
PCI_FRAME*
PCI_IRDY*20
PCI_TRDY*20
PCI_STOP*20
PCI_PERR*20
PCI_SERR*20
PCI_PME*20
*
*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PAR20
PCI_PERR*
PCI_SERR*
PCI_PME*
2
4
6
33
33
*
*
PCI_AD[31..0]
PCI_C/BE*0
PCI_C/BE*1
PCI_C/BE*2
PCI_C/BE*3
PCI_RESET1*
PCI_RESET2*
LPC_RESET*
4
PCI_AD0
0
PCI_AD1
1
PCI_AD2
2
PCI_AD3
3
PCI_AD4
4
PCI_AD5
5
PCI_AD6
6
PCI_AD7
7
PCI_AD8
8
PCI_AD9
9
PCI_AD10
10
PCI_AD11
11
PCI_AD12
12
PCI_AD13
13
PCI_AD14
14
PCI_AD15
15
PCI_AD16
16
PCI_AD17
17
PCI_AD18
18
PCI_AD19
19
PCI_AD20
20
PCI_AD21
21
PCI_AD22
22
PCI_AD23
23
PCI_AD24
24
PCI_AD25
25
PCI_AD26
26
PCI_AD27
27
PCI_AD28
28
PCI_AD29
29
PCI_AD30
30
PCI_AD31
31
D14
PCI_AD0
E14
PCI_AD1
A13
PCI_AD2
C14
PCI_AD3
A14
PCI_AD4
B14
PCI_AD5
C15
PCI_AD6
J16
PCI_AD7
G16
PCI_AD8
F16
PCI_AD9
E16
PCI_AD10
B15
PCI_AD11
D16
PCI_AD12
C16
PCI_AD13
D17
PCI_AD14
C17
PCI_AD15
J19
PCI_AD16
J20
PCI_AD17
H20
PCI_AD18
G20
PCI_AD19
F20
PCI_AD20
E20
PCI_AD21
B18
PCI_AD22
C19
PCI_AD23
D20
PCI_AD24
C20
PCI_AD25
D21
PCI_AD26
C21
PCI_AD27
B21
PCI_AD28
H22
PCI_AD29
G22
PCI_AD30
F22
PCI_AD31
H16
PCI_CBE0*
B17
PCI_CBE1*
A18
PCI_CBE2*
B19
PCI_CBE3*
C18
PCI_FRAME*
A17
PCI_IRDY*
D18
PCI_TRDY*
F18
PCI_STOP*
E18
PCI_DEVSEL*
J18
PCI_PAR
G18
PCI_PERR*/GPIO43/RS232_DCD*
H18
PCI_SERR*
E22
PCI_PME*/GPIO30
C13
PCI_RESET0*
G14
PCI_RESET1*
B11
PCI_RESET2*
F12
PCI_RESET3*
D9
LPC_RESET*
U15C
U15C
?
?
?
?
SEC 4 OF 8
SEC 4 OF 8
MCP61
MCP61
PCI_REQ0*
PCI_REQ2*/GPIO40/RS232_DSR*
PCI_REQ3*/GPIO38/RS232_CTS*
PCI_GNT2*/GPIO41/RS232_DTR*
PCI_GNT3*/GPIO39/RS232_RTS*
PCI_GNT4*/GPIO53/RS232_SOUT*
LPC_PWRDWN*/GPIO54/EXT_NMI*
PCI_REQ1*
PCI_REQ4*/GPIO52/RS232_SIN*
PCI_GNT0*
PCI_GNT1*
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME*
LPC_DRQ0*/GPIO50
LPC_DRQ1*/GPIO15/FANRPM1
LPC_SERIRQ
LPC_CLK0
LPC_CLK1
G12
A10
C11
H14
D13
A9
C10
B10
J14
C12
C22
D22
A22
A21
B13
F14
D12
E12
H12
J12
G10
F10
D10
E10
C8
H10
C9
B9
J10
E8
D8
3
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_CLK0
PCI_CLK2
PCI_CLK4
PCI_CLKIN
RN27
RN27
*
*
1
3
5
7 8
22 Ohm
22 Ohm
+/-5%
+/-5%
LPCPWRDWN*
LPCFRAME*
LPC_SERIRQ
LPC_CLK0
LPC_CLK1
2
4
6
1
C363
C363
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
PCI_REQ*0 20
PCI_REQ*1 20
PCI_REQ*2 20
PCI_REQ*3 20
PCI_REQ*4 20
PCI_GNT*2 20
PCI_GNT*3 20
PCI_INTW* 20
PCI_INTX* 20
PCI_INTY* 20
PCI_INTZ* 20
TP35TP35
R22622
R22622
*
*
+/-5%
+/-5%
LPC_DRQ1*
C507
C507
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
C359
C359
22pF
22pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
LPC_AD0 21,22
LPC_AD1 21,22
LPC_AD2 21,22
LPC_AD3 21,22
1
R230
R230
33
33
*
*
+/-5%
+/-5%
R381
R381
33
33
*
*
+/-5%
+/-5%
Dummy
Dummy
TP32TP32
PCI_CLKSIO
+3.3V
TPM_CLK
R228
R228
8.2K
8.2K
*
*
+/-5%
+/-5%
Dummy
Dummy
LPC_DRQ0*
R221
R221
22
22
*
*
+/-5%
+/-5%
LPC_DRQ0* 21,22
LPC_SERIRQ 21,22
PCI_CLKSIO 21
TPM_CLK 22
PCI_CLK2
PCI_CLK0
2
*
*
Dummy
Dummy
C555
C555
C554
C554
22pF
22pF
22pF
22pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
*
*
R225
R225
8.2K
8.2K
*
*
+/-5%
+/-5%
00 = LPC BIOS
01 = PCI BIOS
10 = SPI BIOS*
11 = RESERVED
RN51
RN51
1
2
3
4
5
6
7 8
22 Ohm
22 Ohm
+/-5%
+/-5%
LPC_FRAME* 21,22
STRAP
HDA_SDOUT
LPC_FRAME
DEFAULT*
PCI_CLKSLOT1
PCI_CLKSLOT2
PCI_CLKSLOT1 20
PCI_CLKSLOT2 20
1
near SB
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_PCI
MCP61_PCI
MCP61_PCI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
16 35Saturday, December 04, 2010
16 35Saturday, December 04, 2010
16 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 17
5
U15_1
U15_1
1
1
D D
2
Heatsink_NB
Heatsink_NB
C C
2
modify 8/16
SATA_1
SATA_1
CONN-SATA
CONN-SATA
SATA_2
SATA_2
CONN-SATA
CONN-SATA
SATA_3
SATA_3
CONN-SATA
CONN-SATA
SATA_4
SATA_4
CONN-SATA
CONN-SATA
8
9
8
9
8
9
8
9
PLACE CAPS AT CONN
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
4
*
*
SP_TX0P
C455
C455
SP_TX0M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX0M SP_RX0M_C
C477
C477
SP_RX0P SP_RX0P_C
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX1P
C472
C472
SP_TX1M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX1M
C481
C481
SP_RX1P
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX2P
C456
C456
SP_TX2M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX2M SP_RX2M_C
C473
C473
SP_RX2P SP_RX2P_C
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
PLACE CAPS AT CONN
*
*
SP_TX3P
C478
C478
SP_TX3M
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
*
*
SP_RX3M
C482
C482
SP_RX3P
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C467
C467
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C479
C479
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C474
C474
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C483
C483
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C468
C468
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C475
C475
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C480
C480
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
C484
C484
10nF 25V, X7R, +/-10%
10nF 25V, X7R, +/-10%
SP_TX0P_C
*
*
SP_TX0M_C
*
*
SP_TX1P_C
*
*
SP_TX1M_C
SP_RX1M_C
*
*
SP_RX1P_C
SP_TX2P_C
*
*
SP_TX2M_C
*
*
SP_TX3P_C
*
*
SP_TX3M_C
SP_RX3M_C
*
*
SP_RX3P_C
AA4
AA3
AA2
AA1
AB1
AB2
V2
V1
W3
W2
Y8
Y7
Y5
Y6
Y4
Y3
U15D
U15D
?
?
SATA_A0_TX_P
SATA_A0_TX_N
SATA_A0_RX_N
SATA_A0_RX_P
SATA_A1_TX_P
SATA_A1_TX_N
SATA_A1_RX_N
SATA_A1_RX_P
SATA_B0_TX_P
SATA_B0_TX_N
SATA_B0_RX_N
SATA_B0_RX_P
SATA_B1_TX_P
SATA_B1_TX_N
SATA_B1_RX_N
SATA_B1_RX_P
3
SEC 5 OF 8
SEC 5 OF 8
MCP61
MCP61
CABLE_DET_P/GPIO63
IDE_DATA_P0
IDE_DATA_P1
IDE_DATA_P2
IDE_DATA_P3
IDE_DATA_P4
IDE_DATA_P5
IDE_DATA_P6
IDE_DATA_P7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15
IDE_ADDR_P0
IDE_ADDR_P1
IDE_ADDR_P2
IDE_CS1_P*
IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P*
IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_RDY_P
IDE_COMP_3P3
IDE_COMP_GND
AJ3
AJ2
AH3
AH1
AG2
AF2
AF4
AE6
AE5
AF5
AF3
AG1
AG3
AH2
AJ1
AK2
AG6
AJ5
AH6
AK6
AJ6
AG5
AH4
AH5
AK3
AJ4
AK4
AF6
AD5
AD6
R317
R317
10K
10K
+/-5%
+/-5%
IDE_INTR_P
IDE_DREQ_P
IDE_IORDY_P
CBLE_DET_P
IDE_COMP_3P3V
IDE_COMP_GND
*
*
+3.3V
+/-1%
+/-1%
R271 121 Ohm
R271 121 Ohm
R258 121 Ohm
R258 121 Ohm
+/-1%
+/-1%
2
IDE_INTR_P
R313 10K
R313 10K
*
*
+/-5%
+/-5%
*
*
R311
R311
IDE_DREQ_P
CBLE_DET_P
*
*
R312
R312
4.7K
4.7K
+/-5%
+/-5%
+3.3V
*
*
*
*
R315 15K
R315 15K
*
*
+/-5%
+/-5%
+/-5%
+/-5%
5.6K
5.6K
1
AC3
RESERVED
AC2
RESERVED
AD4
RESERVED
AD3
RESERVED
80mA
+1.2V
*
*
AE4
AE3
AE1
AE2
Y9
7.5mA
U13
U12
V12
M12
C256
C256
100nF
100nF
+80%~-20%
+80%~-20%
RESERVED
RESERVED
RESERVED
RESERVED
+1.2V_PLL_SP_VDD
+1.2V_PLL_SP_SS
+3.3V_PLL_SP_SS
+3.3V_PLL_LEG
+3.3V_PLL_DISP
?
?
+1.2V
L23
L23
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
B B
A A
+3.3V
L21
L21
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
5
+3.3_PLL
*
*
C522
C522
+80/-20%
+80/-20%
4.7uF
4.7uF
*
*
C261
C261
100nF
100nF
+80%~-20%
+80%~-20%
+1.2V_PLL_SP_VDD
C524
C524
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
4
73mA
SATA_LED*/GPIO57
SATA_TSTCLK_P
SATA_TSTCLK_N
3
SATA_TERMP
A5
AA6
AB6
AB5
SATA_TSTCLK_P
SATA_TSTCLK_N
SATA_TERMP
SATA_HDLED* 27
R324
R324
100
100
+/-5%
+/-5%
Dummy
Dummy
R257
R257
*
*
2.49K
2.49K
+/-1%
+/-1%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP61_SATA_IDE
MCP61_SATA_IDE
MCP61_SATA_IDE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
17 35Saturday, December 04, 2010
17 35Saturday, December 04, 2010
17 35Saturday, December 04, 2010
AC
AC
AC
of
of
Page 18
5
STRAP
HDA_SDOUT
LPC_FRAME
DEFAULT*
00 = LPC BIOS
* = DEFAULT
SPDIF0
(SIO CLK)
1 = *24MHZ
R347
R347
10K
10K
*
*
+/-5%
+/-5%
@8211
@8211
AC_RST*
AC_SYNC
R238
R238
10K
10K
+/-5%
+/-5%
@8201
@8201
CLR_CMOS(2-3)
CLR_CMOS(2-3)
CLR_CMOS
CLR_CMOS
Header_1X3
Header_1X3
Jumper_2P_Blu
Jumper_2P_Blu
0 = 14.318MHZ
SPDIF0
+3.3V
R250
R250
10K
10K
+/-5%
+/-5%
R236 22 +/-5%
R236 22 +/-5%
R239 22 +/-5%
R239 22 +/-5%
3
3
2
2
1
1
5
D D
AC_RST*32
AC_SYNC32
+3.3V_DUAL
GPIO2_CHIPSET
*
*
R334
R334
+/-5%
+/-5%
10K
10K
R335
R335
10K
10K
+/-5%
+/-5%
+3.3V_DUAL
*
*
*
*
Dummy
Dummy
AC_RST*
1 = *RGMII
0 = MII
C C
B B
A A
01 = PCI BIOS
10 = SPI BIOS*
11 = RESERVED
AC_BITCLK32
AC_SDOUT32
AC_SDIN_032
C66
C66
*
*
22pF
22pF
Dummy
Dummy
*
*
*
*
+3.3V_DUAL
C75
C75
*
*
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
Dummy
Dummy
GPIO PIN: Board ID Select.
SPI CLK Frequency Select
GPIO_9/SPI_DO (MSB)
GPIO_11/SPI_CLK (LSB)
00 = 500 kHz
01 = 1.8 MHz
10 = 2.5 MHz
11 = 25 MHz
VBAT
R133
R133
*
*
51KOhm
51KOhm
+/-5%
+/-5%
R134
R134
*
*
0
0
+/-5%
+/-5%
+3.3V
R246
R246
*
*
10K
10K
+/-5%
+/-5%
R71 22
R71 22
AC_SDOUT
*
*
Dummy
Dummy
R251 10K Dummy
R251 10K Dummy
modify 8/20
*
*
R245
R245
10K
Dummy
10K
Dummy
*
*
+/-5%
+/-5%
RTC_RST*
MEM_VLD29
HTVLD28
HT_EN28
*
*
+/-5%
+/-5%
R241
R241
22
22
*
*
+/-5%
+/-5%
C73
C73
R331
R331
*
*
22pF
22pF
10K
10K
+/-5%
+/-5%
Dummy
Dummy
R256
R256
*
*
10K
10K
Dummy
Dummy
R244
R244
*
*
10K
10K
+/-5%
+/-5%
SPI_CLK
Dummy
Dummy
5/5. Max length: 10 inches.
R234
R234
*
*
10K
10K
+/-5%
+/-5%
Dummy
Dummy
Dummy
Dummy
CLEAR CMOS CONTROL
CLEAR CMOS1-2
2-3* NORMAL
*DEFAULT
PULL BATT TO CLR TIME
VRM_EN30
R231 1K
R231 1K
SPI_WP21
BIOS_WP:programed by BIOS
VBAT
R269
R269
1M
1M
*
*
+/-5%
+/-5%
TP33TP33
*
*
Dummy
Dummy
SPI_DI
SPI_DO
SPI_CS
R249
R249
*
*
10K
10K
+/-5%
+/-5%
+3.3V_DUAL
*
*
+/-5%
+/-5%
INTRUDER*
PKG_TEST
4
U15E
U15E
?
?
TP_GP_REFCLK
1
B7
GP_REFCLK
B4
HDA_BCLK
A3
AC_OUT
TP41TP41
C369
C369
10pF
10pF
R242
R242
*
*
10K
10K
50V, NPO, +/-5%
50V, NPO, +/-5%
+/-5%
+/-5%
GPIO2_CHIPSET
R248
R248
*
*
*
*
10K
10K
+/-5%
+/-5%
+3.3V_DUAL +3.3V_DUAL
SPI_CS
SPI_DI
SPI_WP
Dummy
Dummy
R237
R237
10K
10K
+/-5%
+/-5%
R198
R198
*
*
4.7K
4.7K
+/-5%
+/-5%
4
A2
B1
1
B2
C3
B3
F2
F1
F6
J8
G3
G5
G6
D3
D4
E4
E3
D5
E5
K4
J3
H3
J4
J1
J2
L8
F8
1
3
4
HDA_SDATA_OUT0/GPIO45
HDA_SDATA_IN0/GPIO22
HDA_SDATA_IN1/GPIO23/MGPIO0
RESERVED
HDA_RESET*
HDA_SYNC/GPIO44
GPIO_1
GPIO_2/NMI*
GPIO_3/SMI*
GPIO_4/SCI_INTR*
GPIO_5/INIT*
GPIO_6/FERR*/SYS_FERR*
GPIO_7/NFERR*/SYS_PERR*
GPIO_8/SPI_DI
GPIO_9/SPI_DO
GPIO_10/SPI_CS
GPIO_11/SPI_CLK
RESERVED
RESERVED
RTC_RST*
MEM_VLD
MCPVDD/HT_VLD
MCPVDD/HT_EN
CPU_VLD
CPUVDD_EN
PKG_TEST
TEST_MODE_EN
?
?
SPI_SOCKET
SPI_SOCKET
CS
DO2HOLD
WP
GND
Socket
Socket
8
VCC
7
6
CLK
5
DIO
SEC 6 OF 8
SEC 6 OF 8
C279
C279
100nF
100nF
*
*
+80%~-20%
+80%~-20%
SPI_CLK
SPI_DO
SPI_SOCKET_1
SPI_SOCKET_1
SPI ROM
SPI ROM
W25X80VDAIZ
W25X80VDAIZ
MCP61
MCP61
USB_OC3*/GPIO28/MGPIO1
SMB_DATA1/MSMB_DATA
R192
R192
*
*
1K
1K
+/-5%
+/-5%
USB0_P
USB0_N
USB1_P
USB1_N
USB2_P
USB2_N
USB3_P
USB3_N
USB4_P
USB4_N
USB5_P
USB5_N
USB6_P
USB6_N
USB7_P
USB7_N
USB8_P
USB8_N
USB9_P
USB9_N
USB_OC0*/GPIO25
USB_OC1*/GPIO26
USB_OC2*/GPIO27
USB_OC4*/GPIO29
USB_RBIAS_GND
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
A20GATE/GPIO55
INTRUDER*
EXT_SMI*/GPIO32
RI*/GPIO33
PWRBTN*
SIO_PME*/GPIO31
KBRDRSTIN*/GPIO56
SMB_CLK0
SMB_DATA0
SMB_CLK1/MSMB_CLK
+3.3V_VBAT
BUF_SIO_CLK
SUS_CLK/GPIO34
THERM*/GPIO59
RSTBTN*
SLP_S5*
SLP_S3*
PWRGD_SB
PS_PWRGD
FANRPM0/GPIO60
FANCTL0/GPIO61
FANCTL1/GPIO62
THERM_SIC/GPIO48
THERM_SID/GPIO49
3
3
SPKR
M3
M4
N3
N4
N1
N2
P1
P2
R2
R3
P3
P4
T3
T4
U3
U4
T6
T5
T8
T7
P7
P8
P9
P5
P6
T9
H9
AE7
V5
V4
V7
V6
F5
K2
F3
H4
C7
G4
F4
A4
C2
C1
D2
E2
K3
B5
E1
C6
H5
H8
G8
H6
G2
E6
D6
C5
AH7
AF8
USB_0+
USB_0-
USB_1+
USB_1-
USB_2+
USB_2-
USB_3+
USB_3-
USB_4+
USB_4-
USB_5+
USB_5-
USB_6+
USB_6-
USB_7+
USB_7-
USB_8+
USB_8-
USB_9+
USB_9-
USB_RBIAS_GND
INTRUDER*
EXTSMI*
RIJ_PU
SPEAKER
PWRBTN#
IO_PME*
SMB_MEM_SCL
SMB_MEM_SDA
SMB_SCL
SMB_SDA
VBAT
TPM_LPCPD#
CPU_THERM*
SLP_S5*
SLP_S3*
PWRGD_SB
PWRGD_SB
VBAT_SIO
BAT1_1
BAT1_1
LITHIUM BATT
LITHIUM BATT
CR2032
CR2032
Battery
Battery
USB_0+ 25
USB_0- 25
USB_1+ 25
USB_1- 25
USB_2+ 25
USB_2- 25
USB_3+ 25
USB_3- 25
USB_4+ 25
USB_4- 25
USB_5+ 25
USB_5- 25
USB_6+ 25
USB_6- 25
USB_7+ 25
USB_7- 25
USB_OC0*
USB_OC1*
USB_OC2*
USB_OC3*
USB_OC4*
A20GATE 21
R255 4.7K
R255 4.7K
EXTSMI* 21
SPEAKER 27
PWRBTN# 21
IO_PME* 21
SIO_KBRST* 21
TPM_LPCPD# 22VRM_GD30
FP_RESET* 27
SLP_S5* 21,29
SLP_S3* 21
PWRGD_SB 21,28
CPU_SIC 8
CPU_SID 8
R243
R243
100K
100K
*
*
+/-5%
+/-5%
C A
USB_OC0* 25
USB_OC1* 25
USB_OC2* 25
USB_OC3* 25
R262
R262
1.24K
1.24K
*
*
+/-1%
+/-1%
Dummy
Dummy
*
*
+/-5%
+/-5%
NV suggest
D22
D22
BATT_PWR_R
BATT_PWR_R
SD103AW
SD103AW
R148
R148
*
*
1K
1K
+/-1%
+/-1%
BATT_PWR
BAT
BAT
- +
Battery Holder
Battery Holder
+3.3V_DUAL
C367
C367
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
+3.3V_DUAL
Dummy
Dummy
1
2
+3.3V_DUAL
*
*
Q15
Q15
BAT54C
BAT54C
RN41
RN41
135
*
*
2.7K
2.7K
+/-5%
+/-5%
R233
R233
22
22
+/-5%
+/-5%
16V, X7R, +/-10%
16V, X7R, +/-10%
R260
R260
0
0
+/-5%
+/-5%
*
*
3
2
+3.3V
642
7 8
SMB_SCL 19,20,22
SMB_SDA 19,20,22
BUF_SIO_CLKBUF_SIO_CLK_R
C422
C422
0.1uF
0.1uF
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
2
RN49
RN49
USB_0+
*
*
USB_0USB_5+
USB_5-
RN50
RN50
USB_2+
*
*
USB_2USB_1+
USB_1-
RN29
RN29
USB_4+
*
*
USB_4USB_3+
USB_3-
RN46
RN46
USB_7+
*
*
USB_7USB_6+
USB_6-
RN30
RN30
USB_8-
*
*
USB_8+
USB_9+
USB_9-
15K
15K
+/-5%
+/-5%
VBAT
BUF_SIO_CLK 21
C423
C423
R232 4.7K
R232 4.7K
4.7uF
4.7uF
*
*
PWRGD_PS 27,30
C161
C161
C159
C159
0.1uF
0.1uF
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
1
2
3
4
5
6
7 8
1
2
3
4
5
6
7 8
1
2
3
4
5
6
7 8
1
2
3
4
5
6
7 8
1
2
3
4
5
6
7 8
CPU_THERM* 21
+/-5%
+/-5%
*
*
VBAT
*
*
1
15K
15K
+/-5%
+/-5%
15K
15K
+/-5%
+/-5%
15K
15K
+/-5%
+/-5%
15K
15K
+/-5%
+/-5%
USB_OC4*
+3.3V
*
*
+3.3V_DUAL
*
*
C432
C432
C426
C426
0.1uF
0.1uF
0.1uF
0.1uF
*
*
For EMI
R263
R263
10K
10K
+/-5%
+/-5%
C408
C408
C434
C434
0.1uF
0.1uF
0.1uF
0.1uF
*
*
*
*
Near Memory
+3.3V_DUAL
D21
D21
BAV99
BAV99
+3.3V
RI1
RI123
VBAT
C166
C166
4.7uF
4.7uF
D20
D20
21
21
BAV99
BAV99
3
3
SMB_MEM_SCL 10,11
SMB_MEM_SDA 10,11
+3.3V_DUAL
R367
R367
*
*
8.2K
8.2K
+/-5%
+/-5%
RIJ_PU
DS
Q54
Dummy Q54
Dummy
2N7002
2N7002
R369 10K +/-5%
R369 10K +/-5%
Dummy
Dummy
Title
Title
Title
MCP61_HDA_USB
MCP61_HDA_USB
MCP61_HDA_USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
G
R385
R385
*
*
10K
10K
+/-5%
+/-5%
Dummy
Dummy
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
18 35Friday, December 03, 2010
18 35Friday, December 03, 2010
18 35Friday, December 03, 2010
of
of
AC
AC
AC
Page 19
5
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
SMB_SCL
SMB_SDA
PE_TRST*
PETP2
PETN2
PETP3
PETN3
PETP4
PETN4
PETP5
PETN5
PETP6
PETN6
PETP7
PETN7
PETP8
PETN8
PETP9
PETN9
PETP10
PETN10
PETP11
PETN11
PETP12
PETN12
PETP13
PETN13
PETP14
PETN14
PETP15
PETN15
PETP0
PETN0
PETP1
PETN1
SMB_SCL18,20,22
PE_WAKE*
PE0_OUT0
0
PE0_OUT*0
PE0_OUT1
1
PE0_OUT*1
PE0_OUT2
2
C160 0.1uF
C160 0.1uF
C162 0.1uF
C162 0.1uF
PE0_OUT3
3
C169 0.1uF
C169 0.1uF
C171 0.1uF
C171 0.1uF
PE0_OUT4
4
C174 0.1uF
C174 0.1uF
C177 0.1uF
C177 0.1uF
PE0_OUT5
5
C181 0.1uF
C181 0.1uF
C183 0.1uF
C183 0.1uF
PE0_OUT6
6
C187 0.1uF
C187 0.1uF
C189 0.1uF
C189 0.1uF
PE0_OUT7
7
C193 0.1uF
C193 0.1uF
C194 0.1uF
C194 0.1uF
PE0_OUT8
8
C210 0.1uF
C210 0.1uF
C216 0.1uF
C216 0.1uF
PE0_OUT9
9
C219 0.1uF
C219 0.1uF
C221 0.1uF
C221 0.1uF
PE0_OUT10
10
C223 0.1uF
C223 0.1uF
C225 0.1uF
C225 0.1uF
PE0_OUT11
11
C229 0.1uF
C229 0.1uF
C231 0.1uF
C231 0.1uF
PE0_OUT12
12
C232 0.1uF
C232 0.1uF
C235 0.1uF
C235 0.1uF
PE0_OUT13
13
C237 0.1uF
C237 0.1uF
C239 0.1uF
C239 0.1uF
PE0_OUT14
14
C242 0.1uF
C242 0.1uF
C241 0.1uF
C241 0.1uF
PE0_OUT15
15
C244 0.1uF
C244 0.1uF
C243 0.1uF
C243 0.1uF
SMB_SDA18,20,22
C140 0.1uF
C140 0.1uF
C144 0.1uF
C144 0.1uF
C149 0.1uF
C149 0.1uF
C150 0.1uF
C150 0.1uF
+3.3V
D D
PE0_OUT[15..0]14
PE0_OUT*[15..0]14
PE0_PRSNTX1*14
PE0_PRSNTX4*14
C C
PE0_PRSNTX8*14
B B
PE0_OUT[15..0]
PE0_OUT*[15..0]
PE0_PRSNTX16*14
+3.3V_DUAL
PE_WAKE*14
0
1
PE0_OUT*2
2
PE0_OUT*3
3
PE0_OUT*4
4
PE0_OUT*5
5
PE0_OUT*6
6
PE0_OUT*7
7
PE0_OUT*8
8
PE0_OUT*9
9
PE0_OUT*10
10
PE0_OUT*11
11
PE0_OUT*12
12
PE0_OUT*13
13
PE0_OUT*14
14
PE0_OUT*15
15
+12V
4
PCI-E1_16X
PCI-E1_16X
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
<PATH>
<PATH>
+12V
+12V
+12V
GND
SMCLK
SMDAT
GND
+3.3V
TRST*
+3.3V_AUX
WAKE*
RSVD
GND
PETP0
PETN0
GND
PRSNT2*
GND
PETP1
PETN1
GND
GND
PETP2
PETN2
GND
GND
PETP3
PETN3
GND
RSVD
PRSNT2*
GND
PETP4
PETN4
GND
GND
PETP5
PETN5
GND
GND
PETP6
PETN6
GND
GND
PETP7
PETN7
GND
PRSNT2*
GND
PETP8
PETN8
GND
GND
PETP9
PETN9
GND
GND
PETP10
PETN10
GND
GND
PETP11
PETN11
GND
GND
PETP12
PETN12
GND
GND
PETP13
PETN13
GND
GND
PETP14
PETN14
GND
GND
PETP15
PETN15
GND
PRSNT2*
RSVD
<PART_NAME>
<PART_NAME>
X1 CONNECTOR
X1 CONNECTOR
X4 CONNECTOR
X4 CONNECTOR
X8 CONNECTOR
X8 CONNECTOR
X16 CONNECTOR
X16 CONNECTOR
PRSNT1*
PERST*
REFCLK+
REFCLK-
PERP0
PERN0
RSVD
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
RSVD
RSVD
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
RSVD
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
+12V
+12V
GND
+3.3V
+3.3V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TCK
TDO
TMS
+12V
A1
A2
A3
A4
A5
A6
TDI
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
PE0_IN1
A21
A22
A23
A24
PE0_IN2
A25
A26
A27
A28
PE0_IN3
A29
A30
A31
A32
A33
A34
PE0_IN4
A35
A36
A37
A38
PE0_IN5
A39
A40
A41
A42
PE0_IN6
A43
A44
A45
A46
PE0_IN7
A47
A48
A49
A50
A51
PE0_IN8
A52
A53
A54
A55
PE0_IN9
A56
A57
A58
A59
PE0_IN10
A60
A61
A62
A63
PE0_IN11
A64
A65
A66
A67
PE0_IN12
A68
A69
A70
A71
PE0_IN13
A72
A73
A74
A75
PE0_IN14
A76
A77
A78
A79
PE0_IN15
A80
A81
A82
PE_TCK
PE_TDI
PE_TMS
PE0_IN0
PE0_IN*0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
+3.3V
0
PE0_IN*11
0
PE0_IN*1
PE0_IN*2
PE0_IN*3
PE0_IN*4
PE0_IN*5
PE0_IN*6
PE0_IN*7
PE0_IN*8
PE0_IN*9
PE0_IN*10
PE0_IN*12
PE0_IN*13
PE0_IN*14
PE0_IN*15
3
PE_RESET*
PE0_REFCLK_V
PE0_REFCLK*_V
PE0_IN[15..0]
PE0_IN*[15..0]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PE_TRST*
PE0_REFCLK 14
PE0_REFCLK* 14
RN19
RN19
10K Ohm
10K Ohm
+/-5%
+/-5%
*
*
1
2
3
4
5
6
7 8
PE_RESET* 14,26
PE0_IN[15..0] 14
PE0_IN*[15..0] 14
PE1_OUT14
PE1_OUT*14
PE1_PRSNT*14
+3.3V
SMB_SCL
SMB_SDA
C139 0.1uF
C139 0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
C142 0.1uF
C142 0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
PE_WAKE*
+3.3V+3.3V_DUAL +12V
PE_TRST_1
PE1_PETP0
PE1_PETN0
2
+12V
PCI-E1_1X
PCI-E1_1X
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
12V
12V
RSVD
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
RSVD_B12
GND
HSOP0
HSON0
GND
PRSNT2#
GND
Slot-PCIE-1X
Slot-PCIE-1X
PE_TMS_1
PE_TRST_1
PE_TDI_1
PE_TCK_1
KEY
KEY
*
*
RN18
RN18
10K Ohm
10K Ohm
+/-5%
+/-5%
1
3
5
7 8
2
4
6
PRSNT1#
JTAG2
JTAG3
JTAG4
JTAG5
PWRGD
REFCLK+
REFCLK-
HSIP0
HSIN0
A1
A2
12V
A3
12V
A4
GND
A5
PE_TCK_1
A6
PE_TDI_1
A7
A8
PE_TMS_1
A9
3.3V
A10
3.3V
A11
PE_RESET*
A12
GND
A13
A14
A15
GND
A16
A17
A18
GND
+3.3V
1
PE1_REFCLK 14
PE1_REFCLK* 14
PE1_IN 14
PE1_IN* 14
+3.3V
PLACE CAPS NEAR PEX CONNECTORS
+12V
C97
*
*
C126
C126
100nF
100nF
+80%~-20%
+80%~-20%
*
*
Dummy
Dummy
*
*
C154
C154
100nF
100nF
+80%~-20%
+80%~-20%
C97
100nF
100nF
+80%~-20%
+80%~-20%
C103
C103
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
+3.3V
C212
C212
100nF
100nF
*
*
+80%~-20%
A A
5
+80%~-20%
*
*
Dummy
Dummy
C178
C178
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C155
C155
100nF
100nF
+80%~-20%
+80%~-20%
*
*
Dummy
Dummy
*
*
C101
C101
100nF
100nF
+80%~-20%
+80%~-20%
C123
C123
100nF
100nF
+80%~-20%
+80%~-20%
4
*
*
C106
C106
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C195
C195
100nF
100nF
+80%~-20%
+80%~-20%
*
*
*
*
C186
C186
4.7uF
4.7uF
+80/-20%
+80/-20%
modify 8/18
C114
C114
C102
C102
1uF
1uF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C170
C170
1uF
1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
modify 8/18
*
*
C125
C125
+80/-20%
+80/-20%
4.7uF
4.7uF
+3.3V_DUAL
*
*
modify 8/16
3
EC29
EC29
470uF
470uF
16V, +/-20%
16V, +/-20%
*
*
C127
C127
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C116
C116
100nF
100nF
+80%~-20%
+80%~-20%
*
*
C421
C421
100nF
100nF
+80%~-20%
+80%~-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Express Slot x16 & X1
PCI Express Slot x16 & X1
PCI Express Slot x16 & X1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
19 35Saturday, December 04, 2010
19 35Saturday, December 04, 2010
19 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 20
5
4
3
2
1
SLOT 2
PCI2
PCI2
I135
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IDSEL23
I135
PCI124
PCI124
V2.2
AD0
AD0
AD2
AD2
AD3
AD3
AD4
AD4
AD5
AD5
AD6
AD6
AD7
AD7
AD8
AD8
AD9
AD9
AD10
AD10
AD11
AD11
AD12
AD12
AD13
AD13
AD14
AD14
AD15
AD15
AD16
AD16
AD17
AD17
AD18
AD18
AD19
AD19
AD20
AD20
AD21
AD21
AD22
AD22
AD23
AD23
AD24
AD24
AD25
AD25
AD26
AD26
AD27
AD27
AD28
AD28
AD29
AD29
AD30
AD30
AD31
AD31
IDSEL
IDSEL
CBE0*
CBE0*
CBE1*
CBE1*
CBE2*
CBE2*
CBE3*
CBE3*
INTA*
INTA*
INTB*
INTB*
INTC*
INTC*
INTD*
INTD*
REQ*
REQ*
GNT*
GNT*
PME*
PME*
FRAME*
FRAME*
STOP*
STOP*
IRDY*
IRDY*
DEVSEL*
DEVSEL*
LOCK*
LOCK*
PERR*
PERR*
SERR*
SERR*
PAR
PAR
SBO*
SBO*
RESET*
RESET*
SDONE
SDONE
REQ64*
REQ64*
ACK64*
ACK64*
CLOCK
CLOCK
KEY<A50>
KEY<A50>
KEY<A51>
KEY<A51>
KEY<B50>
KEY<B50>
KEY<B51>
KEY<B51>
5V 32BIT
5V 32BIT
V2.2
PCI_AD0
0
A58
PCI_AD1
1
B58
PCI_AD2
2
A57
PCI_AD3
3
B56
PCI_AD4
4
A55
PCI_AD5
5
B55
PCI_AD6
6
A54
PCI_AD7
7
B53
PCI_AD8
8
B52
PCI_AD9
9
A49
PCI_AD10
B48
PCI_AD11
A47
PCI_AD12
B47
PCI_AD13
A46
PCI_AD14
B45
PCI_AD15
A44
PCI_AD16
A32
PCI_AD17
B32
PCI_AD18
A31
PCI_AD19
B30
PCI_AD20
A29
PCI_AD21
B29
A28
PCI_AD23
B27
PCI_AD24
A25
PCI_AD25
B24
PCI_AD26
A23
B23
PCI_AD28
A22
PCI_AD29
B21
PCI_AD30
A20
PCI_AD31
B20
A26
PCI_C/BE*0
0
A52
PCI_C/BE*1
1
B44
PCI_C/BE*2
2
B33
PCI_C/BE*3
3
B26
A6
B7
A7
B8
B18
A17
A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40
A60
B60
B16
PCI_AD[31..0]16
D D
PCI_AD2316
PCI_C/BE*[3..0]16
C C
PCIRST_SLOT1*16
PCI_AD[31..0]
R147
R147
300
300
*
*
+/-5%
+/-5%
PCI_C/BE*[3..0]
PCI_INTW*16
PCI_INTX*16
PCI_INTY*16
PCI_INTZ*16
PCI_REQ*216
PCI_GNT*216
PCI_PME*16
PCI_FRAME*16
PCI_TRDY*16
PCI_STOP*16
PCI_IRDY*16
PCI_DEVSEL*16
PCI_PERR*16
PCI_SERR*16
PCI_PAR16
SMB_SDA18,19,22
SMB_SCL18,19,22
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_REQ*2
PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCIRST_SLOT1*
SMB_SCL
PCI_REQ64A*
PCI_ACK64*
PCI_CLKSLOT1
3.3VAUX
3.3VAUX
PRSNT1*
PRSNT1*
PRSNT2*
PRSNT2*
RSVD1
RSVD1
RSVD2
RSVD2
RSVD3
RSVD3
RSVD5
RSVD5
TRST*
TRST*
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_DUAL
A14
B4
TDOAD1
TDOAD1
B9
B11
A9
B10
A11
B14
B2
TCK
TCK
A1
A3
TMS
TMS
A4
TDI
TDI
+12V
-12V
A2
+12V
+12V
B1
-12V
-12V
B5
+5V
+5V
B6
+5V
+5V
A5
+5V
+5V
A8
+5V
+5V
A10
+5V
+5V
B61
+5V
+5V
A16
+5V
+5V
B62
+5V
+5V
A59
+5V
+5V
B59
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
GND
GND
GNDTRDY*
GNDTRDY*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V
A61
B19
A62
A21
A27
A33
A39
A45
B43
B41
B36
B31
+3.3V +3.3V
B25
B54
A53
A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57
PCI_AD[31..0]
PCI_AD24
PCI_C/BE*[3..0]
PCI_REQ*316
PCI_GNT*316
PCIRST_SLOT2*16
PCI_CLKSLOT216PCI_CLKSLOT116
R144
R144
300
300
*
*
+/-5%
+/-5%
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_INTW*
PCI_REQ*3
PCI_GNT*3PCI_GNT*2
PCI_PME*
PCI_FRAME*
PCI_TRDY*
PCI_STOP*
PCI_IRDY*
PCI_DEVSEL*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
PCI_PAR
SMB_SDA
PCIRST_SLOT2*
SMB_SCL
PCI_REQ64B*
PCI_ACK64*
PCI_CLKSLOT2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IDSEL24
PCI_AD0
0
A58
PCI_AD1
1
B58
PCI_AD2
2
A57
PCI_AD3
3
B56
PCI_AD4
4
A55
PCI_AD5
5
B55
PCI_AD6
6
A54
PCI_AD7
7
B53
PCI_AD8
8
B52
PCI_AD9
9
A49
PCI_AD10
B48
PCI_AD11
A47
PCI_AD12
B47
PCI_AD13
A46
PCI_AD14
B45
PCI_AD15
A44
PCI_AD16
A32
PCI_AD17
B32
PCI_AD18
A31
PCI_AD19
B30
PCI_AD20
A29
PCI_AD21
B29
PCI_AD22PCI_AD22
A28
PCI_AD23
B27
PCI_AD24
A25
PCI_AD25
B24
PCI_AD26
A23
PCI_AD27PCI_AD27
B23
PCI_AD28
A22
PCI_AD29
B21
PCI_AD30
A20
PCI_AD31
B20
A26
PCI_C/BE*0
0
A52
PCI_C/BE*1
1
B44
PCI_C/BE*2
2
B33
PCI_C/BE*3
3
B26
A6
B7
A7
B8
B18
A17
A19
A34
A36
A38
B35
B37
B39
B40
B42
A43
A41
A15
A40
A60
B60
B16
PCI1
PCI1
I136
I136
AD0
AD0
AD2
AD2
AD3
AD3
AD4
AD4
AD5
AD5
AD6
AD6
AD7
AD7
AD8
AD8
AD9
AD9
AD10
AD10
AD11
AD11
AD12
AD12
AD13
AD13
AD14
AD14
AD15
AD15
AD16
AD16
AD17
AD17
AD18
AD18
AD19
AD19
AD20
AD20
AD21
AD21
AD22
AD22
AD23
AD23
AD24
AD24
AD25
AD25
AD26
AD26
AD27
AD27
AD28
AD28
AD29
AD29
AD30
AD30
AD31
AD31
IDSEL
IDSEL
CBE0*
CBE0*
CBE1*
CBE1*
CBE2*
CBE2*
CBE3*
CBE3*
INTA*
INTA*
INTB*
INTB*
INTC*
INTC*
INTD*
INTD*
REQ*
REQ*
GNT*
GNT*
PME*
PME*
FRAME*
FRAME*
STOP*
STOP*
IRDY*
IRDY*
DEVSEL*
DEVSEL*
LOCK*
LOCK*
PERR*
PERR*
SERR*
SERR*
PAR
PAR
SBO*
SBO*
RESET*
RESET*
SDONE
SDONE
REQ64*
REQ64*
ACK64*
ACK64*
CLOCK
CLOCK
KEY<A50>
KEY<A50>
KEY<A51>
KEY<A51>
KEY<B50>
KEY<B50>
KEY<B51>
KEY<B51>
SLOT 1
IDSEL24IDSEL23
PCI124
PCI124
V2.2
V2.2
5V 32BIT
5V 32BIT
3.3VAUX
3.3VAUX
PRSNT1*
PRSNT1*
PRSNT2*
PRSNT2*
RSVD1
RSVD1
RSVD2
RSVD2
RSVD3
RSVD3
RSVD5
RSVD5
TRST*
TRST*
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V_DUAL
A14
B4
TDOAD1
TDOAD1
B9
B11
A9
B10
A11
B14
B2
TCK
TCK
A1
A3
TMS
TMS
A4
TDI
TDI
+12V
-12V
A2
+12V
+12V
B1
-12V
-12V
B5
+5V
+5V
B6
+5V
+5V
A5
+5V
+5V
A8
+5V
+5V
A10
+5V
+5V
B61
+5V
+5V
A16
+5V
+5V
B62
+5V
+5V
A59
+5V
+5V
B59
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
GND
GND
GNDTRDY*
GNDTRDY*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
+5V
A61
B19
A62
A21
A27
A33
A39
A45
B43
B41
B36
B31
B25
B54
A53
A12
A13
A18
A24
A30
A35
A37
A42
A48
A56
B3
B12
B13
B15
B17
B22
B28
B34
B38
B46
B49
B57
PCI1 IDSEL= A23 , PCI_REQ#=2 , Routin=W/X/Y/Z PCI2 IDSEL= A24 , PCI_REQ#=3 , Routin=X/Y/Z/W
B B
+3.3V
PCI_REQ64A*
R184 8.2K +/-5%
R184 8.2K +/-5%
*
PCI_ACK64*
PCI_REQ64B*
PCI_REQ*416
PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_DEVSEL*
PCI_STOP*
PCI_LOCK*
PCI_PERR*
PCI_SERR*
A A
PCI_SERR*16
PCI_DEVSEL*16
PCI_IRDY*16
PCI_PERR*16
PCI_TRDY*16
PCI_STOP*16 PCI_PME*16
*
R183 8.2K +/-5%
R183 8.2K +/-5%
*
*
R182 8.2K +/-5%
R182 8.2K +/-5%
*
*
R181 8.2K +/-5%
R181 8.2K +/-5%
*
*
RN23
RN23
*
*
1
3
5
7 8
8.2K
8.2K
+/-5%
+/-5%
RN25
RN25
*
*
1
3
5
7 8
8.2K
8.2K
+/-5%
+/-5%
PCI_SERR*
PCI_DEVSEL*
PCI_IRDY*
PCI_PERR*
PCI_TRDY*
PCI_STOP*
5
2
4
6
2
4
6
PCI_INTZ*16
PCI_INTX*16
PCI_INTY*16
PCI_INTW*16
Dummy
Dummy
modify 8/16
place between PCIE 1X
+3.3V
RN21
RN21
*
PCI_REQ*116
PCI_REQ*316
PCI_REQ*016
PCI_REQ*216
PCI_INTZ*
PCI_INTX*
PCI_INTY*
PCI_INTW*
16V, +/-20%
16V, +/-20%
EC24
EC24
470uF
470uF
*
*
16V, +/-20%
16V, +/-20%
PCI_PME*
*
1
2
3
4
5
6
7 8
8.2K
8.2K
+/-5%
+/-5%
RN17
RN17
*
*
1
2
3
4
5
6
7 8
8.2K
8.2K
+/-5%
+/-5%
+12V
470uF
470uF
EC26
EC26
*
*
Dummy
Dummy
*
*
Dummy
Dummy
4
+5V
EC28
EC28
1000uF
1000uF
*
*
+/-20%
+/-20%
EC42
EC42
1000uF
1000uF
*
*
+/-20%
+/-20%
R38
R38
8.2K
8.2K
+/-5%
+/-5%
+3.3V_DUAL
C180
C180
+3.3V +5V
EC39
EC39
1000uF
1000uF
*
*
+/-20%
+/-20%
C192
C192
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C245
C245
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C213
C213
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+3.3V
EC38
EC38
*
*
470uF
470uF
16V, +/-20%
16V, +/-20%
C230
C230
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C214
C214
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C172
C172
100nF
100nF
*
*
+80%~-20%
+80%~-20%
1uF
1uF
*
*
Dummy
Dummy
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C236
C236
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C238
C238
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C383
C383
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C60
C60
100nF
100nF
*
*
+80%~-20%
+80%~-20%
PCI SLOT DECOUPLING
+5V
C360
C360
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C104
C104
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C285
C285
100nF
100nF
*
*
+80%~-20%
+80%~-20%
3
*
*
Dummy
Dummy
C165
C165
100nF
100nF
+80%~-20%
+80%~-20%
FOR EMI
+5V
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PCI Slot 12
PCI Slot 12
PCI Slot 12
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
20 35Saturday, December 04, 2010
20 35Saturday, December 04, 2010
20 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 21
Power On Strapping Options
Flashseg1_ENJP1
JP2
SerFlh_SO_SEL
JP3 --
CHIP_SEL
D D
JP4
BUF_SEL
FAN_CTL_SEL
JP5
VID_ISEL
JP6
R155 680
R155 680
R154 680
R154 680
R70 680
R70 680
R152 680
R152 680
R88 10K
R88 10K
R103 10K
R103 10K
C C
B B
A A
Dummy
Dummy
*
*
Dummy
Dummy
*
*
Dummy
Dummy
*
*
Dummy
Dummy
*
*
Dummy
Dummy
*
*
Dummy
Dummy
*
*
5
Disabled.
1
Flash I/F Address Segment 1 (FFFE_0000h~FFFF_FFFFh,
0
000F_0000h~000F_FFFFh) is enabled
1
FLH_SO1 is selected as the Serial Flash I/F SO pin.
0
FLH_SO2 is selected as the Serial Flash I/F SO pin.
DescriptionSymbol value
Chip selection in configuration.
The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, PCIRST4# and
1
PCIRST5# are open-drain.
0
The output buffers are push-pull.
1 The default value of EC Index 15h / 16h / 17h is 00h
0
The default value of EC Index 15h / 16h / 17h is 40h
1
The threshold voltage of VID is 2.0 / 0.8V
0 The threshold voltage of VID is 0.8 / 0.4V
DTR1J
R77 2.2KOhm +/-1%
R77 2.2KOhm +/-1%
*
*
R153 2.2KOhm +/-1%
R153 2.2KOhm +/-1%
*
*
R151 10K +/-5%
R151 10K +/-5%
*
*
R76 2.2KOhm +/-1%
R76 2.2KOhm +/-1%
*
*
R69 2.2KOhm +/-1%
R69 2.2KOhm +/-1%
*
*
CPU_THERM*18
R457 10K +/-5%
R457 10K +/-5%
*
*
R460 10K +/-5%
R460 10K +/-5%
*
*
R461 10K +/-5%
R461 10K +/-5%
*
*
5
R89 0
R89 0
*
*
+/-5%
+/-5%
LPC_DRQ0*
LPC_SERIRQ
IO_PME*
DCD1J23
CTS1J23
DTR1J23
RTS1J23
DSR1J23
RXD123
CPU_THERM_R
LPCRST_SIO*16
LPC_DRQ0*16,22
LPC_SERIRQ16,22
LPC_FRAME*16,22
PCI_CLKSIO16
BUF_SIO_CLK18
+3.3V
+3.3V_DUAL
TXD1
A20GATE
JP6
RTS1J
VIDO3
+5V
C353
C353
*
*
0.1uF
0.1uF
Dummy
Dummy
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
placed near pin4,35
DCD1J
SUS_LED27
SIO_KBRST*18
SIO_BEEP27
RI1J
CTS1J
DTR1J
RTS1J
DSR1J
TXD1
RXD1
GPIO_WP
JP6
VIDO3
EXTSMI*
LRESETJ
LPC_DRQ0*
LPC_SERIRQ
LPC_FRAME*
LAD0
LAD1
LAD2
LAD3
PCI_CLKSIO
BUF_SIO_CLK
IO_PME*
A20GATE18
KDAT22
KCLK22
MDAT22
MCLK22
RI1J23
TXD123
EXTSMI*18
LPC_AD016,22
LPC_AD116,22
LPC_AD216,22
LPC_AD316,22
IO_PME*18
4
C355
C355
*
*
0.1uF
0.1uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
127
DCD1#/GP33
128
RI1#/GP32
1
CTS1#/GP31
126
DTR1#/JP4
122
RTS1#/JP2
123
DSR1#/GP45
124
SOUT1/JP3
125
SIN1/GP41
26
DCD2#/GP21
28
RI2#/GP17
27
CTS2#/GP20
29
DTR2#
23
FAN_TAC5/RTS2#/GP24
22
FAN_TAC4/DSR2#/GP25
21
SOUT2/GP26
20
SIN2/GP27
48
GP50
25
GP22
24
CPU_PG/GP23
121
VCORE_EN/PCH_C0/FAN_CTL4
2
FAN_CTL5/CIRRX2/GP16
3
PCIRSTIN#/CIRTX2/GP15
31
PCH_C1/GP14
6
GP63
5
GP64
120
VLDT_EN/PCH_D0/GP65
119
GP66
118
GP67
51
DENSEL#
63
INDEX#
52
MTRA#
55
PECI/AMDTSI_C/DRVB#
54
DRVA#
53
SST/AMDTSI_D/PCH_D/MTRB#
57
SMBC_R2/DIR#
58
SMBC_M2/STEP#
56
WDATA#
60
SMBD_M2/WGATE#
62
TRK0#
64
WPT#
61
RDATA#
59
SMBD_R2/HDSEL#
65
DSKCHG#
37
LRESET#
38
LDRQ#
39
SERIRQ
40
LFRAME#
41
LAD0
42
LAD1
43
LAD2
44
LAD3
47
PCICLK
49
CLKIN
73
PME#/GP54
45
KRST#/GP62
46
GA20
80
KDAT/GP61
81
KCLK/GP60
82
MDAT/GP57
83
MCLK/GP56
4
3
+3.3V
3D3V_SB
C354
C354
*
*
0.1uF
0.1uF
3VSB43VSB
35
SPI
SPI
L10
L10
*
*
*
*
C335
C335
1uF
1uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
Serial Port 1/2
Serial Port 1/2
IT8728F/CX
IT8728F/CX
LPC I/FKB/MS
LPC I/FKB/MS
GNDD15GNDD50GNDD74GNDD
117
CP3
CP3
80 Ohm@100MHz
80 Ohm@100MHz
*
*
C130
C130
10uF
10uF
99
AVCC3
Parallel Port
Parallel Port
MISC.
MISC.
Floppy I/F
Floppy I/F
GNDA
86
L6
L6
2 1
FB 100 Ohm+/-25%
FB 100 Ohm+/-25%
Dummy
Dummy
1 2
dummy
dummy
Control
Control
RSMRST#/CIRRX1/GP55
3D3V_SB
C87
C87
100nF
100nF
*
*
+80%~-20%
+80%~-20%
67
U210
U210
3VSB
PD1/GP71
PD0/GP70
ERR#
ACK#/GP83
BUSY/GP82
PE/GP81
SLCT/GP80
PWRGD3
SUSC#/GP53
PSON#/GP42
SUSB#
CIRTX1
SYS_3VSB
GP47
COPEN#
PWRGD1
VLDT_12/VIN4
VREF
TMPIN1
TMPIN2
TMPIN3
TSD-
FAN_CTL1
FAN_TAC1
ATXPG/GP30
PWRGD2
5VAUX_SW
5VSB_CTRL#
VBAT
VCORE
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
78
77
76
75
72
71
30
85
66
70
68
79
84
34
33
32
98
97
96
95
94
93
VIN5
92
VIN6
91
90
89
88
87
12
11
10
9
8
7
19
18
17
16
14
13
69
36
BUSSO2/PD7/GP77
BUSSO1/PD6/GP76
BUSSO0/PD5/GP75
BUSSI2/PD4/GP74
BUSSI1/PD3/GP73
BUSSI0/PD2/GP72
SMBC_M1/STB#/GP87
SMBC_R1/AFD#/GP86
SMBD_M1/INIT#/GP85
SMBD_R1/SLIN#/GP84
Power-on
Power-on
PANSWH#/GP43
PWRON#GP44/JP8
3VSBSW#/GP40
PCIRST3#/GP10
PCIRST2#/GP11
PCIRST1#/GP12
VIN0/VCORE(1.1V)
VIN1/VDIMM_STR(1.5V)
VIN2(+12V_SEN)
VIN3/(+5V_SEN)
Hardware Monitoring
Hardware Monitoring
FAN_CTL3/GP36
FAN_TAC3/GP37
FAN_CTL2/GP51
FAN_TAC2/GP52
RSTCONIN/GP34
RSTCONOUT/GP35
Power button input
HMGND
C89
C89
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STBJ
AFDJ
ERRJ
INITJ
SLINJ
ACKJ
BUSY
PE
SLCT
PWRGD3
PWRBTN#
CIRTX
RSMRST
R35 0 +/-5%
R35 0 +/-5%
R67 100 +/-5%
R67 100 +/-5%
R73 100 +/-5%
R73 100 +/-5%
COPENJ
CIRRX
PWRGD1
VIN0
VIN1
VIN2
VIN3
VIN4
VREF
TMPIN2
FAN_CTL3
FAN_TAC3
FAN_CTL1
FAN_TAC1
PWRGD2
5VSB_SW
3D3V_SB_CTL
VBAT
C396
C396
22nF
22nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
3
PD[0..7]
R370 10K
R370 10K
*
*
*
*
*
*
3D3V_SB_CTL 28
C92
C92
1uF
1uF
*
*
10V, X7R, +/-10%
10V, X7R, +/-10%
Near IO
PD[0..7] 23
STBJ 23
AFDJ 23
ERRJ 23
INITJ 23
SLINJ 23
ACKJ 23
BUSY 23
PE 23
SLCT 23
SLP_S5* 18,29
PS_ON# 27
SLP_S3* 18
*
*
PWRGD_SB 18,28
SW_SIOJ 28
PWRGD1 27
VIN0 24
VIN1 24
VIN2 24
VIN3 24
VIN4 24
TMPIN1 24
TMPIN2 24
TSD- 24
FAN_CTL3 24
FAN_TAC3 24
FAN_CTL1 24
FAN_TAC1 24
ATX_PWRGD 27,28
VBAT_SIO
+3.3V
+3.3V_DUAL
PWRBTN# 18
Near CPU
C108
C108
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
HMGND
R74 33
R74 33
Near SIO (U22)
C99
C99
100nF
100nF
*
*
+80%~-20%
+80%~-20%
VREF 24
2
R91
R91
4.7K
4.7K
+/-5%
+/-5%
Dummy
Dummy
GPIO_WP
*
*
2
+3.3V_DUAL
*
*
3D3V_SB
R210
R210
*
*
10K
10K
+/-5%
+/-5%
Dummy
Dummy
R336
R336
+-5%
+-5%
B
1K
1K
SPI_WP
Q25
Q25
MMBT3904-7-F
MMBT3904-7-F
E C
Dummy
Dummy
Power Bottom in
PANSWHJ 27
1
SPI_WP 18
+3.3V_DUAL
RSMRST
R163 4.7K +/-5%
R163 4.7K +/-5%
*
PWRBTN#
SLP_S5*
SLP_S3*
*
R87 4.7K +/-5%
R87 4.7K +/-5%
*
*
R229 4.7K +/-5%
R229 4.7K +/-5%
*
*
R227 4.7K +/-5%
R227 4.7K +/-5%
*
*
RN16
PWRGD1
PWRGD2
PWRGD3
5VSB_SW
+5V
Header_2X5_K3K10
Header_2X5_K3K10
VBAT
R79
R79
10M
10M
+/-5%
+/-5%
COPENJ
Title
Title
Title
SIO IT8728F
SIO IT8728F
SIO IT8728F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
RN16
*
*
1
3
5
7 8
2.2K +/-5%
2.2K +/-5%
IR/CIR
IR/CIR
2
1
4
X
X
5
6
8
7
9
X
X
INTR1
INTR1
2
1
Header_1X2
Header_1X2
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
2
4
6
+5V_STBY
CIRRX
1
CIRTX
+3.3V +3.3V_DUAL
3D3V_SB
*
*
R83
R83
2.2KOhm
2.2KOhm
+/-1%
+/-1%
of
of
of
21 35Monday, December 06, 2010
21 35Monday, December 06, 2010
21 35Monday, December 06, 2010
AC
AC
AC
Page 22
5
D D
C C
+3.3V
R434
R434
*
*
10K
10K
+/-1%
+/-1%
Dummy
Dummy
TPM_LPCPD#18
Dummy
Dummy
4
TPM_CLK16
LPC_FRAME*16,21
LPCRST_TPM*16
LPC_AD316,21
LPC_AD016,21
*
*
R1670
R1670
+/-5%
+/-5%
+3.3V_DUAL
R354 0 +/-5%
R354 0 +/-5%
TPM Connector
R380 33
Dummy
R380 33
Dummy
*
*
+/-5%
+/-5%
R378 100 Ohm
Dummy
R378 100 Ohm
Dummy
*
*
+/-1%
+/-1%
R419 0
Dummy
R419 0
Dummy
*
*
+/-5%
+/-5%
LPCPD#
+3.3V
1
R355
R355
22K
Dummy
22K
Dummy
+/-5%
+/-5%
2
Dummy
Dummy
*
*
LPCPD#
+3.3V
TPM
TPM
Dummy
Dummy
1
LCLK
3
LFRAMEn
5
LRESETn
7
LAD3
9
VDD
11
LAD0
13
NC_1
15
NC_2
17
GND
19
LPCPDn
Header_2X10_4 (TPM)
Header_2X10_4 (TPM)
NC_3
LAD2
LAD1
NC_4
SERIRQ
CLKRUNin
NC_5
3
2
GND
KEY
KEY
6
R379 0
R379 0
*
*
R137 0
R137 0
*
*
+/-5%
+/-5%
*
*
+5V
LPC_AD2 16,21
LPC_AD1 16,21
Dummy
Dummy
LPC_SERIRQ 16,21
LPC_DRQ0* 16,21
+/-5% Dummy
+/-5% Dummy
8
10
12
GND
14
16
18
20
R427 0
Dummy
R427 0
Dummy
+/-5%
+/-5%
+3.3V
R435
R435
*
*
10K
10K
+/-1%
+/-1%
Dummy
Dummy
SMB_SDA 18,19,20SMB_SCL18,19,20
2
MH4
MH4
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH6
MH6
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH2
MH2
1
2
(NPTH)
(NPTH)
3
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
1
MH3
MH3
1
5
2
6
(NPTH)
(NPTH)
3
7
MH
MH
4
8
9
MH40x80_8
MH40x80_8
dummy
dummy
MH5
5
6
7
MH
MH
5
6
7
MH
MH
5
6
7
MH
MH
A
MH5
1
2
(NPTH)
(NPTH)
3
4
9
MH40x80_8
MH40x80_8
dummy
dummy
MH1
MH1
1
5
2
6
(NPTH)
(NPTH)
3
7
MH
MH
4
8
9
A A
MH40x80_8
MH40x80_8
dummy
dummy
5
6
7
MH
MH
8
+5V_DUAL
F1
B B
A A
F1
*
*
Fuse 1.5A
Fuse 1.5A
RN12
RN12
642
135
7 8
*
*
2.7K
SIO_KBDATA
KDAT21
SIO_KBCLOCK
KCLK21
SIO_MSDATA
MDAT21
SIO_MSCLOCK
MCLK21
5
2.7K
+/-5%
+/-5%
R172 0
R172 0
*
*
R173 0
R173 0
*
*
R174 0
R174 0
*
*
R175 0
R175 0
*
*
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
4
KEYBRD_PWR2
*
*
C28
C28
100nF
100nF
*
*
+80%~-20%
+80%~-20%
SIO_KBDATA_FB
SIO_KBCLOCK_FB
SIO_MSDATA_FB
SIO_MSCLOCK_FB
CN3
CN3
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
PS2 KB / MS
KB/MS
KB/MS
KEYBOARD (PURPLE)
KEYBOARD (PURPLE)
1
DATA
DATA
2
NC
NC
3
4
5
6
7
8
9
10
11
12
I55
I55
PS2
PS2
4653
4653
GND
GND
PWR
PWR
CLK
CLK
NC
NC
13
SHLD
14
SHLD
15
SHLD
SHLD
SHLD
16
MOUSE (GREEN)
MOUSE (GREEN)
17
DATA
DATA
12
12
NC
NC
10
10
GND
GND
PWR
PWR
CLK
CLK
NC
NC
3
21
21
11
11
9
9
8
7
8
7
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PS2/TPM
PS2/TPM
PS2/TPM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
22 35Saturday, December 04, 2010
22 35Saturday, December 04, 2010
22 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 23
5
D D
C C
4
PD[0..7]21
SIO_LPT_STROBE*
STBJ21
SIO_LPT_ALF*
AFDJ21
SIO_LPT_ERR*
ERRJ21
SIO_LPT_INIT*
INITJ21
SIO_LPT_SLCTIN*
SLINJ21
RN3
ACKJ21
BUSY21
PE21
SLCT21
SIO_LPT_ACK*
SIO_LPT_BUSY
SIO_LPT_PE
SIO_LPT_SLCT
RN3
*
*
1
2
3
4
5
6
7 8
22
22
+/-5%
+/-5%
3
RN5
RN14
RN14
2.2K
2.2K
+/-5%
+/-5%
135
*
*
642
7 8
RN5
*
*
1
3
5
7 8
22
22
+/-5%
+/-5%
RN8
RN8
7 8
5
3
*
*
1
22
22
+/-5%
+/-5%
R50
R50
*
*
2.2K
2.2K
+/-5%
+/-5%
SIO_LPT_ERR
PRN_VDD
2
4
6
6
4
2
PRN_VDD
RN4
RN4
642
*
*
135
7 8
2.2K
2.2K
+/-5%
+/-5%
SIO_LPT_ALF* SIO_LPT_ALF_R*
SIO_LPT_STROBE* SIO_LPT_STROBE_R*
SIO_LPT_INIT* SIO_LPT_INIT_R*
SIO_LPT_SLCTIN* SIO_LPT_SLCTIN_R*
0
PD3
1
PD2
2
PD1
3
PD0
RN6
4
5
6
7
RN6
PD4
*
*
1
3
5
7 8
22
22
+/-5%
+/-5%
2
4
6
PD5
PD6
PD7
R48
R48
22
22
*
*
+/-5%
+/-5%
2
SIO_LPT_PD0_R
SIO_LPT_PD1_R
SIO_LPT_PD2_R
SIO_LPT_PD3_R
SIO_LPT_PD4_R
SIO_LPT_PD5_R
SIO_LPT_PD6_R
SIO_LPT_PD7_R
SIO_LPT_STROBE_R*
SIO_LPT_ALF_R*
SIO_LPT_INIT_R*
SIO_LPT_SLCTIN_R*
1
+5V
D12
D12
LS4148-F
LS4148-F
PRN_VDD
RN13
RN13
642
*
*
135
7 8
2.2K
2.2K
+/-5%
+/-5%
3
*
*
*
*
RN7
RN7
2.2K
2.2K
+/-5%
+/-5%
2
C A
642
*
*
135
7 8
Ver2 fix
0
1
*
*
*
*
PARALLEL PORT
PRT
PRT
1
14
2
15
3
16
4
17
5
18
6
19
7
28
20
27
8
26
21
9
22
10
23
11
24
12
25
13
CONN - PrinterPort
CONN - PrinterPort
C34
C34
*
*
220pF
220pF
CN5 220pF
CN5 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
+12V
D7
LS4148-FD7LS4148-F
C95
B B
DCD1J21
DSR1J21
RXD121
RTS1J21
TXD121
CTS1J21
DTR1J21
RI1J21
A A
5
+5V
*
*
C A
+12V_COM
C67
C67
100nF
100nF
+80%~-20%
+80%~-20%
*
*
19
18
17
16
15
14
13
12
20
C95
100nF
100nF
+80%~-20%
+80%~-20%
VDD+
1
RY1*
RY2*
RY3*
DA1
DA2
RY4*
DA3
RY5*
VCC
I76
I76
U7
U7
GD75232
GD75232
VDD-
-12V
CA
LS4148-F
LS4148-F
D13
D13
C36
C36
100nF
100nF
+80%~-20%
+80%~-20%
*
10
-12V_COM
RA1
2
RA2
3
RA3
4
DY1*
5
DY2*
6
RA4
7
DY3*
8
RA5
9
GND
11
*
1
3
5
7 8
50V, NPO, +/-10%
50V, NPO, +/-10%
RI1 18
4
R176 0 +/-5%
R176 0 +/-5%
*
*
R177 0 +/-5%
R177 0 +/-5%
*
*
R178 0 +/-5%
R178 0 +/-5%
*
*
R179 0 +/-5%
R179 0 +/-5%
*
*
*
*
RN53 0 +/-5%
RN53 0 +/-5%
CN2
CN2
220pF
220pF
DCD1
DSR1
RXD1*
RTS1
2
TXD1*
4
CTS1
6
DTR1
RI1
CN1
CN1
220pF
220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
*
*
*
*
SERIAL PORT
COM1
COM1
11
1
6
2
7
3
8
4
9
5
10
CONN-COM PORT
CONN-COM PORT
3
CN7 220pF
CN7 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
2
50V, NPO, +/-10%
50V, NPO, +/-10%
CN6220pF
CN6220pF
CN4 220pF
CN4 220pF
50V, NPO, +/-10%
50V, NPO, +/-10%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Parallel / Gamr Port
Parallel / Gamr Port
Parallel / Gamr Port
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
23 35Saturday, December 04, 2010
23 35Saturday, December 04, 2010
23 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 24
5
4
3
2
1
*
*
R104
R104
7.87K
7.87K
+/-1%
+/-1%
R107
R107
*
*
10K
10K
+/-1%
+/-1%
C118
C118
100nF
100nF
*
*
+80%~-20%
+80%~-20%
CP5 dummyCP5 dummy
12
CP6 dummyCP6 dummy
12
+12V+5V
*
*
R101
R101
33KOhm
33KOhm
+/-1%
+/-1%
*
*
C117
C117
100nF
100nF
*
*
+80%~-20%
+80%~-20%
CPU_THERMDA 8
CPU_THERMDC 8
R105
R105
10K
10K
+/-1%
+/-1%
New FAN Header Definition
C358
C358
4.7uF
4.7uF
*
*
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Dummy
Dummy
pin1. GND
pin2. +12V
pin3. Sense
pin4. Control
+12V
CA
LS4148-F
LS4148-F
D17
D17
C340
C340
C299
C299
100nF
100nF
470pF
470pF
*
*
+80%~-20%
+80%~-20%
50V, X7R, +/-10%
50V, X7R, +/-10%
+12V
C341
C341
100nF
100nF
*
*
*
R216
R216
27KOhm
27KOhm
+/-5%
+/-5%
*
+80%~-20%
+80%~-20%
FAN_TAC1 21
1
R213
R213
22K
22K
+/-5%
+/-5%
2
R218
R218
4.7K
4.7K
*
*
+/-5%
+/-5%
CPU FAN
+5V
R206
R206
*
*
4.7K
4.7K
+/-5%
+/-5%
R214
R214
100
FAN_CTL121
100
+/-5%
+/-5%
Header_1X4 FAN4P
Header_1X4 FAN4P
CMD
TACH
+12V
GND
CPU_FAN
CPU_FAN
4
3
CPUFAN-P3
2
CPUFAN-P2
1
SYSTEM
4
3
SYSFAN-P3
2
SYSFAN-P2
1
FAN
*
*
Dummy
Dummy
C131
C131
4.7uF
4.7uF
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
+12V
CA
LS4148-F
LS4148-F
D15
D15
C141
C141
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
+12V
C98
C98
100nF
100nF
*
*
+80%~-20%
R115
R115
4.7K
4.7K
*
*
+/-5%
+/-5%
R118
R118
27KOhm
27KOhm
*
*
+/-5%
+/-5%
+80%~-20%
FAN_TAC3 21
1
R120
R120
22K
22K
+/-5%
+/-5%
2
+5V
R122
R122
*
*
4.7K
4.7K
+/-5%
+/-5%
R125
R125
100
FAN_CTL321
100
+/-5%
+/-5%
Header_1X4 FAN4P
Header_1X4 FAN4P
CMD
TACH
+12V
GND
SYS_FAN
SYS_FAN
VCCP_CPU +3.3V1D5V_STR
R117
R117
*
*
10K
10K
*
*
+/-1%
*
*
+/-1%
C128
C128
100nF
100nF
+80%~-20%
+80%~-20%
*
*
Voltage Monitor
VIN021
D D
VIN121
VIN221
VIN321
VIN421
R106
R106
R108
R108
*
*
10K
10K
10K
10K
+/-1%
+/-1%
+/-1%
+/-1%
*
*
HMGND HMGND HMGND
C124
C124
C120
C120
100nF
100nF
100nF
100nF
*
*
+80%~-20%
+80%~-20%
+80%~-20%
+80%~-20%
HMGND
R111
R111
10K
10K
+/-1%
+/-1%
Thermal Controller
C C
B B
VREF21
VREF21
TMPIN221
C107
C107
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
C109
C109
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
HMGND
*
*
HMGND
R100
R100
*
*
30K
30K
+/-1%
+/-1%
Dummy
Dummy
C113
TMPIN121
TSD-21
C113
2.2nF
2.2nF
*
*
50V. X7R, +/-10%
50V. X7R, +/-10%
R95
R95
*
*
10K
10K
+/-1%
+/-1%
*
*
RT1
RT1
T
T
10KOhm
10KOhm
+/-1%
+/-1%
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Hardware Monitor / Over Volt
Hardware Monitor / Over Volt
Need to check GPIO default
value at power-on .
5
4
3
2
Hardware Monitor / Over Volt
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
24 35Saturday, December 04, 2010
24 35Saturday, December 04, 2010
24 35Saturday, December 04, 2010
AC
AC
AC
of
of
of
Page 25
5
BACK PANEL LAN/USB -> Near Connector
+/-5%
+/-5%
0
0
1
D D
USB_6+18
USB_6-18
USB_1+18
USB_1-18
USB_6USB_1+
USB_1-
4
6
2
USB_6+
RN15
RN15
USB_6_FB+
USB_6_FBUSB_1_FB+
USB_1_FB-
USB_6_FB+ 26
USB_6_FB- 26
USB_1_FB+ 26
USB_1_FB- 26
*
*
3
5
78
4
3
2
1
Connect to rear LAN/USB port
PLACE NEAR CONN
+5V_DUAL
C C
B B
A A
modify 9/14
USB_2+18
USB_2-18
USB_4+18
USB_4-18
+5V_DUAL
*
*
f_usb1
F3
F3
*
*
Fuse 2.6A
Fuse 2.6A
F4
F4
Fuse 2.6A
Fuse 2.6A
USBPWR_FNTPNL
USB_2+
USB_2USB_4+
USB_4-
REAR_PWR
1000uF
1000uF
USB_0+18
USB_0-18
USB_7+18
USB_7-18
FRONT PANEL USB
EC48
EC48
C386
C386
1000uF
1000uF
100nF
100nF
*
*
*
*
+80%~-20%
+80%~-20%
USB_FP_4USB_FP_4+
+/-5%
+/-5%
0
0
2
4
6
RN47
RN47
5
*
*
+/-20%
+/-20%
F_USB1
F_USB1
1 2
3 4
5 6
7 8
Header_2X5_K9
Header_2X5_K9
modify 9/13
1
3
5
78
X
X
REAR_PWR 26
PLACE NEAR CONN
EC18
EC18
C32
C32
100nF
100nF
*
*
*
*
EMI CAPS
R274
R274
5.1KOhm
5.1KOhm
+/-1%
+/-1%
R275
R275
*
*
10K
10K
+/-5%
+/-5%
USB_FP_2USB_FP_2+
10
USB_FP_2+
USB_FP_2USB_FP_4+
USB_FP_4-
2
4
6
+/-5%
+/-5%
0
0
RN1
RN1
*
*
C21
C21
100pF
100pF
50V, NPO, +/-5%
50V, NPO, +/-5%
1
*
*
3
5
78
USB_OC1*
USB_OC2*
USB_OC1* 18
USB_OC2* 18
USB_FP_4-
USB_FP_2-
modify 9/13
R39
R39
5.1KOhm
5.1KOhm
+/-1%
+/-1%
USB_0_FB+
USB_7_FB+
1
2
R40
R40
*
*
10K
10K
+/-5%
+/-5%
U18
U18
I/O1
REF1
I/O23I/O3
IP4220CZ6
IP4220CZ6
PWR SHOULD BE 75MIL MIN
USB_OC0*
USB_OC3*
U2
U2
1
I/O1
2
REF1
I/O23I/O3
IP4220CZ6
IP4220CZ6
USB_0_FB+
USB_0_FB-
USB_7_FB+
USB_7_FB-
6
I/O4
5
USBPWR_FNTPNL
REF2
4
Dummy
Dummy
4
USB_OC0* 18
USB_OC3* 18
I/O4
REF2
USB_FP_4+
USB_FP_2+
6
5
4
Dummy
Dummy
USB_0_FB-
REAR_PWR
USB_7_FB-
REAR_PWR
REAR_PWR
8
7
6
5
4
3
2
1
C29
C29
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
11
10
USB
USB
BOTTOM TOP
BOTTOM TOP
CONN-USBx2
CONN-USBx2
9
12
3
C25
C25
12
10nF
10nF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
USB_3-18
USB_3+18
USB_5-18
USB_5+18
f_usb2
USB_FP_5-
USB_FP_3-
USBPWR_FNTPNL
1
2
USB_3-
USB_3+
USB_5-
USB_5+
USB_FP_5+
U19
U19
I/O1
REF1
REF2
I/O23I/O3
IP4220CZ6
IP4220CZ6
I/O4
Dummy
Dummy
6
5
4
+/-5%
+/-5%
0
0
2
4
6
RN48
RN48
2
F_USB2
F_USB2
1 2
3 4
5 6
7 8
10
X
X
Header_2X5_K9
Header_2X5_K9
USB_FP_5+
USBPWR_FNTPNL
USB_FP_3+
1
*
*
3
5
78
USB_FP_3-USB_FP_5USB_FP_3+
USB_FP_3USB_FP_3+
USB_FP_5USB_FP_5+
modify 9/13
modify 9/13
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
USB Connector
USB Connector
USB Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
25 35Saturday, December 04, 2010
25 35Saturday, December 04, 2010
25 35Saturday, December 04, 2010
of
of
AC
AC
AC
Page 26
5
BUF_25MHZ14
D D
C C
TX_EN14
TX_D014
TX_D114
TX_D214
TX_D314
MDIO14
MDC14
Place filter network close to RX_CLK.
Reserved for EMI
RXCLK
R698 22 +/-5%
R698 22 +/-5%
*
*
C663
C663
15pF
15pF
*
*
+/-5%
+/-5%
TXCLK
C664
C664
R699 33+/-5%
R699 33+/-5%
*
B B
+3.3V_DUAL
A A
C41
C41
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
R763
R763
150
150
+/-5%
+/-5%
Dummy
Dummy
LAN_LED
C40
C40
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
15pF
15pF
+/-5%
+/-5%
LED2
LED1
C42
C42
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
+3.3V_DUAL
*
R756
R756
150
150
+/-5%
+/-5%
C39
C39
470pF
470pF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
X1
X1
1 2
XTAL-25MHz
XTAL-25MHz
C662
C662
Dummy
Dummy
27pF
27pF
*
*
+/-5%
+/-5%
Dummy
Dummy
RTL8201EL:C31( NC )
RTL8211CL:C31( NC ),C33(NC)
16V, X7R, +/-10%
16V, X7R, +/-10%
MDIO
MDC
+3.3V_DUAL
R455
R455
*
*
0
0
+/-5%
+/-5%
Dummy
Dummy
C44
C44
470pF
470pF
*
*
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
5
XTAL1
XTAL2
C665
C665
27pF
27pF
*
*
+/-5%
+/-5%
Dummy
Dummy
2.49K +/-1%
2.49K +/-1%
*
*
R692
R692
C31
C31
*
*
*
*
C33
C33
10uF
10uF
Dummy
Dummy
0.1uF
0.1uF
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
1
MDI0+
2
MDI0-
3
PHY_AVDD12
4
MDI1+
5
MDI1-
6
PHY_AVDD33
7
8
MDI2+
9
MDI2-
10
PHY_AVDD12
11
MDI3+
12
MDI3-
RX_CLK 14
TX_CLK 14
+3.3V_DUAL +3.3V_DUAL
R758
R758
150
150
+/-5%
+/-5%
MDI0+
MDI0-
C81
C81
C80
C80
MDI1+
1uF
1uF
100nF
100nF
*
*
MDI1MDI2+
MDI2MDI3+
MDI3-
C560
C560
100nF
100nF
Dummy
Dummy
MDI[0]+
MDI[0]FB10
MDI[1]+
MDI[1]AVDD33
GND
MDI[2]+
MDI[2]AVDD12
MDI[3]+
MDI[3]-
R759
+/-5%
+/-5%
*
*
150
150
SPEED LED
PHY_AVDD33
RSET
RSET
VDDREG
REGOUT
47
46
45
48
GND
RSET
VDDREG
REGOUT/PWOUT12A
RTL8211CL
RTL8211CL
RTL8201EL
RTL8201EL
RXCTL/RXDV/RMII13RXD014DVDD3315RXD1/TXDLY16RXD2/AN017RXD3/AN118RXC19GND20DVDD3321TXC22TXD023TXD1
RX_CTL/RMII
RXD0
VDD33/VDD25
RXD1/TXDLY
22
21
9
10
11
12
13
14
15
16
17
18
20
19
R75
R75
0
0
*
*
+/-5%
+/-5%
#NIC_USB1#NIC_USB2
#NIC_USB1#NIC_USB2
LINK 10M
LINK 100M
LINK 1000M
PHY_VDD33
XTAL1
XTAL2
VDDREG
ENREG/RXER/FXEN
AVDD12/PWOUT12D
41
39
42
43
44
40
AVDD33
VDDREG
CKXTAL1
CKXTAL2
AVDD12/PWOUT12D
RXCLK
VDD33/VDD25
RXD2/AN0
TXCLK
RXD3/AN1
RX_CTL/RMII
RXD0
RXD1/TXDLY
RXD2/AN0
RXD3/AN1
LAN_LED LED0
LED1 LED1/PHYAD1
VDD12/CRS_RPTR
LED2_RXDLY_COL
ENREG/RXER/FXEN
RTL8211CL:R701( NC ),R702(NC),R703(NC)
GRN_LEDYLW_LED
GRN_LEDYLW_LED
CONN-USBx2_RJ45
CONN-USBx2_RJ45
LED1 LED2
1 N/A(pull up)
0
4
Note 2: The Trace length from C670, C694 to
8211CL Pin 44,45 must be within 1 cm. The
trace width from PHY_AVDD33 to Pin 44,45
should>40mils
Note:RTL8201EL:Pin40 is Output
RTL8211CL:Pin40 is Input
LED2_RXDLY_COL
U3
U3
37
38
DVDD33
36
GND1
MDIO
TXD3
TXD2
VDD12/CRS_RPTR
35
LED1/PHYAD1
34
LED0
33
32
31
MDIO
30
MDC
MDC
29
PHYRSTB
28
PHY_VDD12
27
TX_EN
26
TX_D3
25
TX_D2
V12/CRS_RPTR
LED1/PHYAD1
ENREG/RXER/FXEN
LED0/PHYAD0
LED2RXDLY/COLMII/SNIB
TXCTL/TXEN
CLK125
PHYRSTB
DVDD12
PHY_VDD33
24
TX_D0
TX_D1
R693 0 +/-5%
R693 0 +/-5%
*
*
R694 0 +/-5%
R694 0 +/-5%
*
*
R695 0 +/-5%
R695 0 +/-5%
*
*
R696 0 +/-5%
R696 0 +/-5%
*
*
R700 0 +/-5%
R700 0 +/-5%
*
*
R707
+/-5%
R707
+/-5%
*
*
510 Ohm
510 Ohm
R706
+/-5%
R706
+/-5%
*
*
510 Ohm
510 Ohm
R701 0 +/-5% @8201
R701 0 +/-5% @8201
*
*
R702 0 +/-5% @8201
R702 0 +/-5% @8201
*
*
R705
+/-5% @8211
R705
+/-5% @8211
*
*
510 Ohm
510 Ohm
R703 0 +/-5% @8201
R703 0 +/-5% @8201
*
*
NIC_USB
NIC_USB
27
28
29
USB-1
USB-2
USB-1
USB-2
30
1
OFF
@8021:Yellow
@8211:GREEN
Yellow
4
5
2
6
3
7
4
8
23
24
25
26
RJ45-MJ2
RJ45-MJ2
N/A(pull up)
01
VDDREG
C670
C670
22uF
22uF
*
*
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%
Dummy
Dummy
RTL8201EL:C670(NC),C694(NC),R741( NC )
PHY_VDD33
R23
R23
*
*
4.7K
Dummy
4.7K
Dummy
+/-5%
+/-5%
R32 0 +/-5%
R32 0 +/-5%
*
*
Dummy
CRS_N 14
COL_N 14
ENREG/RXER_N 14
REAR_PWR 25
USB_6_FB- 25
USB_1_FB- 25
USB_6_FB+ 25
USB_1_FB+ 25
NIC_USB2
NIC_USB2
@8211
@8211
Dummy
MDIO
R24
R24
*
*
4.7K
4.7K
+/-5%
+/-5%
RTL8201EL:R32( NC ),R23(NC)
Pull high(R23): Enable repeater mode
RTL8211CL:R24( NC ),R23(NC)
R749 1.5KOhm +/-1%
R749 1.5KOhm +/-1%
*
*
RTL8201EL: R749 ( 1.5K )
RTL8211CL: R749 ( 1.5K )
RX_DV 14
RX_D0 14
RX_D1 14
RX_D2 14
RX_D3 14
LED2
REALUSB_PWR
USB_6_FBUSB_1_FB-
USB_6_FB+
USB_1_FB+
NIC_USB1
NIC_USB1
@8201
@8201
PHY_AVDD33
R741 0 +/-5%
R741 0 +/-5%
*
*
C495
C495
Dummy
Dummy
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
PHY_VDD12
+3.3V_DUAL
+3.3V_DUAL
R102
R102
0
0
+/-5%
+/-5%
C487
C487
22uF
22uF
*
*
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%
3
RTL8201EL: Pull High for RMII mode
Pull Low for MII mode
R168 4.7K+/-5%
R168 4.7K+/-5%
*
*
RMII Signals:
REF_CLK - Pin 22
CRS_DV - Pin 13
RXD[1:0] - Pin 16, 14
TX_EN - Pin 27
TXD[1:0] - Pin 24, 23
RX_ER - Pin 39
RX_CTL/RMII
PHY_VDD33
+/-5%
+/-5%
4.7K
4.7K
*
*
R704
PERSTB
R704
*
*
L7
L7
*
*
4.7uH
4.7uH
R27 0
R27 0
C699
C699
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
Dummy
Dummy
*
*
+/-5%
+/-5%
R62
R62
0
0
*
*
+/-5%
+/-5%
R747 0 +/-5%
R747 0 +/-5%
*
*
dummy
dummy
C486
C486
22uF
22uF
*
*
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%
Dummy
Dummy
LAN_RST 16
PE_RESET* 14,19
PHYRSTB
For wake on LAN function, please mount R704 C699
and remove R747
Note 1: The Trace length between L7 and 8211CL's Pin
48 must be within 0.5 cm. C486 and C489 to L7 must be
within 0.5cm.
REGOUT
RTL8201EL : C486,C489,L7 ( NC )
RTL8211CL: C486 close to 4.7uH
R28 4.7K
R28 4.7K
*
*
+/-5%
+/-5%
Dummy
Dummy
PHY_VDD33
C494
C494
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
C412
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
C411
C411
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
C412
PHY_AVDD33
C415
*
*
6
5
4
Dummy
Dummy
C415
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
USB_6_FB+
REAR_PWR
USB_1_FB+
USB_6_FB-
USB_1_FB-
3
16V, X7R, +/-10%
16V, X7R, +/-10%
U10
U10
1
I/O1
2
REF1
I/O23I/O3
IP4220CZ6
IP4220CZ6
REF2
0.1uF
0.1uF
I/O4
C416
C416
R90
R90
*
*
4.7K
4.7K
+/-5%
+/-5%
Dummy
Dummy
C489
C489
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
GND
C406
C406
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
2
PHY_VDD33
RGMII_RESETJ 14
RTL8201EL: C490,C491,R458 NC )
R459 0 +/-5%
R459 0 +/-5%
Reserve for EMI
MDI2+
MDI2-
MDI3+
MDI3-
MDI0+ MDI0+
MDI0-
MDI1+
MDI1-
2
Connect ENSWREG/RXER to PHY_VDD33
to enable Switching regulator or
connect ENSWREG/RXER to GND to
disable Switching regulator.
ENREG/RXER/FXEN
RTL8201EL :R96(NC),R78(4.7K )
Pull Low(R78):UTP mode
Pull High(R96):Fiber mode
RTL8211CL:R96(0 ohm),R78(NC)
AVDD12/PWOUT12D
*
*
Dummy
Dummy
RTL8201EL:R748( NC )
RTL8211CL:R456( NC ),C79(NC)
R458 0 +/-5%
R458 0 +/-5%
*
*
Dummy
Dummy
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
Dummy
Dummy
VDD33/VDD25
C557
C557
*
*
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
R161 4.7K+/-5%
R161 4.7K+/-5%
*
*
R157 4.7K +/-5%
R157 4.7K +/-5%
*
*
R160 4.7K +/-5%
R160 4.7K +/-5%
*
*
R162 4.7K +/-5%Dummy
R162 4.7K +/-5%Dummy
*
*
R164 4.7K +/-5%Dummy
R164 4.7K +/-5%Dummy
*
*
R166 4.7K +/-5%Dummy
R166 4.7K +/-5%Dummy
*
*
GND
RTL8211CL:
R170,R220: Config for all capability
R157,R159: PHY Address=01
R161,R166: Without TX/RX Delay
U21
U21
1
8
1
2
2
7
3
3
6
445
SLVU2.8-4.TBT
SLVU2.8-4.TBT
Dummy
Dummy
U20
U20
1
8
1
2
2
7
3
3
6
445
SLVU2.8-4.TBT
SLVU2.8-4.TBT
Dummy
Dummy
C698
C698
0.1uF
0.1uF
C79
C79
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
10uF
10uF
+/-10%
+/-10%
C490
C490
0.1uF
0.1uF
*
*
Dummy
Dummy
C493
C493
0.1uF
0.1uF
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
C559
C559
C558
C558
1uF
1uF
1uF
1uF
*
*
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
RTL8201EL:R171(NC)
RTL8211CL: R156 for 3.3V RGMII
R171 for 2.5V RGMII
LED_1000/PHYAD1
LAN_LED
8
MDI2+
7
MDI2-
6
MDI3+
5
MDI3-
8
7
MDI0-
6
MDI1+
5
MDI1-
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
R96 0 +/-5%
R96 0 +/-5%
R78
R78
*
*
4.7K
4.7K
+/-5%
+/-5%
R456 0 +/-5%
R456 0 +/-5%
R748 0 +/-5%
R748 0 +/-5%
*
*
Dummy
Dummy
PHY_AVDD12
C447
C447
C491
C491
1uF
1uF
*
*
0.1uF
0.1uF
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
Dummy
*
*
Dummy
Dummy
R156 0+/-5%
R156 0+/-5%
LED_100J
LAN
LAN
LAN
C492
C492
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
PHY_VDD12
*
*
*
*
R165 4.7K +/-5%Dummy
R165 4.7K +/-5%Dummy
Dummy
Dummy
RXD2/AN0
RXD3/AN1
RXD1/TXDLY
1
PHY_VDD33
*
*
dummy
dummy
PHY_VDD12
*
*
PHY_AVDD12
C488
C488
1uF
1uF
6.3V,X5R,+/-10%
6.3V,X5R,+/-10%
Dummy
Dummy
PHY_VDD33
PHY_VDD33
4.7K +/-5%Dummy
4.7K +/-5%Dummy
R261 4.7K +/-5%Dummy
R261 4.7K +/-5%DummyR759
*
*
R158
R158
*
*
R159 4.7K+/-5%
R159 4.7K+/-5%
*
*
R170 4.7K +/-5%Dummy
R170 4.7K +/-5%Dummy
*
*
R220 4.7K +/-5%Dummy
R220 4.7K +/-5%Dummy
*
*
*
*
RTL8201EL:
R161:MII Interface
R261:SNI Interface
R157,R159: PHY Address=01
FOXCONN PCEG
FOXCONN PCEG
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
26 35Wednesday, December 08, 2010
26 35Wednesday, December 08, 2010
26 35Wednesday, December 08, 2010
AC
AC
AC
of
of
of
Page 27
5
4
3
2
1
+3.3V1
+3.3V2
GND1
+5V1
GND2
+5V2
GND3
PWR0K
+12V_1
+12V_2
+3.3V4
4
+3.3V
1
2
3
4
5
6
7
8
9
10
11
12
Q14
Q14
MMBT3904-7-F
MMBT3904-7-F
E C
*
*
+3.3V+3.3V-12V +5V+5V +12V +5V_STBY
SLED
GPIO_YLW_HDR_R
PANSWHJ 21
C294
C294
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
R123
R123
2.2K
2.2K
+/-5%
+/-5%
50V, X7R, +/-10%
50V, X7R, +/-10%
+5V
B
+5V +3.3V
R296
R296
*
*
10K
10K
+/-5%
+/-5%
C460
C460
C461
C461
100nF
100nF
100nF
100nF
*
*
*
*
+5V
*
*
R139
R139
*
*
100
100
+/-5%
+/-5%
Dummy
Dummy
Q13
Q13
MMBT3904-7-F
MMBT3904-7-F
E C
+80%~-20%
+80%~-20%
SUS_LED21
R189
R189
+-5%
+-5%
C271
C271
470pF
470pF
Dummy
Dummy
+80%~-20%
+80%~-20%
+3.3V_DUAL
R439
R439
*
*
4.7K
4.7K
+/-5%
+/-5%
330
330
*
*
RN22
RN22
*
*
1
3
5
7 8
100 Ohm
100 Ohm
+/-5%
+/-5%
*
C252
C252
470pF
470pF
50V, X7R, +/-10%
50V, X7R, +/-10%
Dummy
Dummy
2
4
6
ATX_PWRGD 21,28
E C
+3.3V
B
R4401K*R4401K
+5V
*
*
Q24
Q24
MMBT3904-7-F
MMBT3904-7-F
B
R279
R279
*
*
10K
10K
+/-5%
+/-5%
GPIO_YLW_HDR_R
Q31
Q31
MMBT3904-7-F
MMBT3904-7-F
E C
BUZ
BUZ
+
Dummy
Dummy
BUZZER
BUZZER
-
Buzzer
Buzzer
+5V
SPEAK
C152
C152
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
(Single Color)
SPEAKER
SPEAKER
1
1
3
3
4
4
Header_1X4_K2
Header_1X4_K2
R284
R284
*
*
10K
10K
+/-5%
+/-5%
PWRGD_PS
C448
C448
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
PWRGD121
S0 S3/S4/S5
ON OFF PWRLED
PWRGD_PS 18,30
R289
R289
0
0
*
*
+/-5%
+/-5%
Dummy
Dummy
PWRGD_PS
+5V_STBY
1
R300
R300
22K
22K
+/-5%
+/-5%
Dummy
Dummy
+3.3V_DUAL
*
*
*
*
*
*
R211
R211
10K
10K
+/-5%
+/-5%
C295
C295
100nF
100nF
+80%~-20%
+80%~-20%
SPEAKER18
2
C453
C453
100nF
100nF
+80%~-20%
+80%~-20%
+5V
*
*
*
*
Dummy
Dummy
+-5%
+-5%
R186
R186
10K
10K
+/-5%
+/-5%
SATA_HDLED*
C249
C249
470pF
470pF
50V, X7R, +/-10%
50V, X7R, +/-10%
+5V +3.3V
R188 330
R188 330
FP_RESET*_FP
SIO_BEEP21
SPEAKER
R187
R187
330
330
+-5%
+-5%
FP_1
SATA_HDLED*
Dummy
Dummy
*
*
C462
C462
100nF
100nF
+80%~-20%
+80%~-20%
*
*
FP_RESET*18
C457
C457
100nF
100nF
*
*
+80%~-20%
+80%~-20%
PS_ON#21
SATA_HDLED*17
R217
R217
33
33
*
*
+/-5%
+/-5%
-12V
D D
C C
+5V +3.3V +12V
C376
C376
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C458
C458
100nF
100nF
*
B B
*
+80%~-20%
+80%~-20%
C463
C463
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C459
C459
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
*
*
*
*
EC56
EC56
1000uF
1000uF
+/-20%
+/-20%
C224
C224
100nF
100nF
+80%~-20%
+80%~-20%
C227
C227
100nF
100nF
+80%~-20%
+80%~-20%
EC25 470uF
EC25 470uF
16V, +/-20%
16V, +/-20%
Dummy
Dummy
PWR1
PWR1
Header_2x12
Header_2x12
13
+3.3V3
14
-12V
15
GND4
16
PSON
17
GND5
18
GND6
19
GND7
20
RSVD
21
+5V_AUX
+5V3
22
+5V4
23
+5V5
24
GND8
FP1
FP1
1 2
3
596
7 8
X
X
Header_2X5_K10
Header_2X5_K10
R130
R130
B
2.2K
2.2K
*
*
+/-5%
+/-5%
R13210K
R13210K
*
*
+/-5%
+/-5%
R12710K
R12710K
*
*
+/-5%
+/-5%
A A
J2
J2
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
1
J4
J4
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
5
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
J3
J3
1
2
Header_1X2
Header_1X2
T1
T1
dummy
dummy
J1
J1
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
PWR Connector / Front Panel
PWR Connector / Front Panel
PWR Connector / Front Panel
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
27 35Friday, December 03, 2010
27 35Friday, December 03, 2010
27 35Friday, December 03, 2010
AC
AC
AC
of
of
Page 28
5
4
3
2
1
C444
C444
100nF
100nF
+80%~-20%
+80%~-20%
R293
R293
*
*
15K
15K
+/-5%
+/-5%
Dummy
Dummy
DS
Q49
Q49
2N7002
2N7002
Dummy
Dummy
+5V_STBY
C466
C466
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
Dummy
Dummy
+3.3V_DUAL
C121
C121
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
FD3
FD3
FD4
FD4
Optics
Optics
Optics
Optics
dummy
dummy
dummy
dummy
C266
C266
0.1uF
0.1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Dummy
Dummy
C465
C465
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
C12
C12
100nF
100nF
*
*
+80%~-20%
+80%~-20%
FD5
FD5
Optics
Optics
dummy
dummy
PWRGD_SB 18,21
FD6
FD6
Optics
Optics
dummy
dummy
EC55
EC55
1000uF
1000uF
*
*
+/-20%
+/-20%
C122
C122
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
FD8
FD8
Optics
Optics
dummy
dummy
+5V
C375
C375
100nF
100nF
*
+12V
5V_DUAL
D D
R481 0
R481 0
*
*
+/-5%
+/-5%
Dummy
Dummy
D30
D30
ATX_PWRGD21,27
SW_SIOJ21
SW_SIOJ ATXPWRGD
S0 H
HS4,S5
S3 L
+5V_STBY 3D3V_SB
C C
U25
U25
3
Vin
2
Vout
1
ADJ
AZ1084D-ADJTRE1
AZ1084D-ADJTRE1
1
2
BAT54C
BAT54C
(Dummy D30,stuff
+5V_DUAL
R481 change to dual power)
H
H
(+5V supply)
L
L
H
(+5V_STBY supply)
L
C622 1uF +/-10%
C622 1uF +/-10%
*
*
R433
R433
*
*
301
301
*
*
+/-1%
+/-1%
R437
R437
*
*
499
499
+/-1%
+/-1%
EC27
EC27
470uF
470uF
3
6.3V, +/-20%
6.3V, +/-20%
R447 1K
R447 1K
R729
R729
*
*
120KOhm
120KOhm
+/-5%
+/-5%
C387
C387
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
*
*
C389
C389
*
*
1uF
1uF
c0603h9
c0603h9
10V, X5R, +/-10%
10V, X5R, +/-10%
dummy
dummy
3D3V_SB
C329
C329
1uF
1uF
*
*
10V, X5R, +/-10%
10V, X5R, +/-10%
G
3D3V_SB
DS
*
*
R212
R212
2.2K
2.2K
S3_GATE
Q51
Q51
2N7002
2N7002
*
*
3D3V_SB_CTL21
*
*
R442
R442
2.2K
2.2K
DS
G
C388
C388
1uF
1uF
c0603h9
c0603h9
10V, X5R, +/-10%
10V, X5R, +/-10%
dummy
dummy
Q55
Q55
2N7002
2N7002
3D3V_SB
R446
R446
*
*
47K
47K
R823
R823
*
*
10K
10K
+/-1%
+/-1%
R438 1K
R438 1K
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
*
*
G
c0603h9
c0603h9
+5V_STBY
*
*
DS
C304
C304
1uF
1uF
R441
R441
2.2K
2.2K
*
*
5V_S3_N
Q86
Q86
2N7002
2N7002
5V_S3_P
G
+5V_STBY
*
*
DS
R304
R304
2.2K
2.2K
G
Q85
Q85
2N7002
2N7002
G
+5V_STBY
+5V
For memory
AOD452AL
AOD452AL
Q27
Q27
D S
5V_S3_N 5V_S3_N
DS
AP3310H
AP3310H
Q47
Q47
G
D S
+3.3V_DUAL
*
*
R757
R757
2.2K
2.2K
3D3V_P
DS
Q50
Q50
G
2N7002
2N7002
For Rear USB
AOD452AL
AOD452AL
Q28
Q28
3D3V_SB
G
Q56
Q56
AP3310H
AP3310H
D S
C215
C215
0.1uF
0.1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
G
+3.3V_DUAL
*
*
EC12
EC12
100uF
100uF
D S
AOD452AL
AOD452AL
Q65
Q65
For Front USB
+5V_DUAL
+5V_DUAL
+3.3V_DUAL
*
PWRGD_SB
R295 27KOhm
R295 27KOhm
*
*
+/-5%Dummy
+/-5%Dummy
+80%~-20%
+80%~-20%
*
*
C226
C226
4.7uF
4.7uF
+/-10%
+/-10%
Dummy
Dummy
G
+5V_STBY
*
*
Dummy
Dummy
DS
R297
R297
8.2K
8.2K
+/-5%
+/-5%
Q48
Q48
2N7002
2N7002
Dummy
Dummy
+5V_DUAL
*
*
FD1
FD1
Optics
Optics
dummy
dummy
C450
C450
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
G
+3.3V_DUAL
+1.2V_DUAL
+1.2V_DUAL
U14
U14
4
B B
A A
AZ1117BH-1.2TRE1
AZ1117BH-1.2TRE1
HTVLD18
+3.3V_DUAL
C330
C330
1uF
1uF
*
*
10V, X5R, +/-10%
10V, X5R, +/-10%
+5V
*
*
R45
R45
2.2K
2.2K
APL5930KAI-TRL
APL5930KAI-TRL
5
+1.2V_DUAL
U9
U9
7
POK
8
EN
9
EP
*
*
C331
C331
1uF
1uF
10V, X5R, +/-10%
10V, X5R, +/-10%
C403
C403
1uF
1uF
*
*
c0603h9
c0603h9
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
6
5
VIN
VCNTL
4
VOUT1
3
VOUT2
2
FB
GND
1
1D5V_STR
C338
C338
4.7uF
4.7uF
+80/-20%
+80/-20%
*
*
*
*
R443
R443
12KOhm
12KOhm
+/-1%
+/-1%
R479
R479
24K
24K
+/-1%
+/-1%
*
*
*
*
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
C260
C260
4.7uF
4.7uF
3
Vin
2
Vout
4
1
GND
VLDT_EN
HT_EN18
VLDT
+1.2V_HT
6.3V,X5R,+/-20%
6.3V,X5R,+/-20%
C306
C306
22uF
22uF
*
*
4
+3.3V
R824
R824
*
*
10K
10K
+/-1%
+/-1%
R448 1K
R448 1K
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C305
C305
1uF
1uF
c0603h9
c0603h9
Dummy
Dummy
+5V_STBY
*
*
R450
R450
2.2K
2.2K
DS
Q87
Q87
G
2N7002
*
*
2N7002
VLDT_EN
DS
Q57
Q57
G
2N7002
2N7002
+3.3V
C283
C283
4.7uF
4.7uF
*
*
U17
U17
+80/-20%
+80/-20%
1
VIN
VOUT
2
GND
ADJ
3
EN
ATX_PWRGD
3
AME8824AEEYZ
AME8824AEEYZ
PG
Vout=Vref(1+R1/R2), AME8824 Vref=1.2v,2%
6
5
4
R59
R59
*
*
2.21KOhm
2.21KOhm
+/-1%
+/-1%
R46
R46
*
*
2KOhm
2KOhm
+/-1%
+/-1%
2
C275
C275
C291
C291
10uF
10uF
10uF
10uF
*
*
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
Dummy
Dummy
2D5V_VDDA
C290
C290
22uF
22uF
C289
C289
100nF
100nF
*
*
+80%~-20%
+80%~-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
ACPI
ACPI
ACPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
28 35Friday, December 03, 2010
28 35Friday, December 03, 2010
28 35Friday, December 03, 2010
ACustom
ACustom
ACustom
of
of
of
Page 29
5
Q46
Q46
1
2
BAT54C
BAT54C
DS
Q58
Q58
G
2N7002
2N7002
Q53
Q53
2N7002
2N7002
VOUT= 0.8V(1+R432/R431)
ROCPSET= (40uA*R10-0.4V)/Q8 RdsON
NC3
NC2
VCNTL
NC1
PADDLE
9
EC54
EC54
1000uF
1000uF
*
*
+/-20%
+/-20%
G
+12V
+5V_STBY
+5V_STBY
R521
R521
*
*
1K
1K
+/-5%
+/-5%
DS
U16
U16
1
VIN
2
GND
3
REFEN
4
VOUT
RT9173DPSP
RT9173DPSP
DDRIII 1D5V Voltage
D D
R272
R272
2.2K +/-5%
2.2K +/-5%
*
C433
C433
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
*
1D5V_STR
C137
C137
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C427
C427
100nF
100nF
*
*
+80%~-20%
+80%~-20%
*
*
C322
C322
2.2uF
2.2uF
+/-10%
+/-10%
Dummy
Dummy
C425
C425
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
SLP_S5*18,21
C C
R290
R290
*
*
1K
1K
+/-1%
+/-1%
R285
R285
*
*
1K
1K
+/-1%
+/-1%
3
R253 10 +/-5%
R253 10 +/-5%
R430
R430
12.7KOhm
12.7KOhm
+/-1%
+/-1%
Rocset
R431
R431
*
*
806
806
+/-1%
+/-1%
R418 220+/-5% dummy
R418 220+/-5% dummy
+3.3V_DUAL
8
7
6
5
4
*
*
U23
U23
7
COMP/OCSET
6
FB
APW7120KE-TRL
APW7120KE-TRL
R432 715 +/-1%
R432 715 +/-1%
*
*
*
*
C431
C431
22uF
22uF
*
*
Dummy
Dummy
EC51
EC51
1000uF
1000uF
*
*
+/-20%
+/-20%
Dummy
Dummy
C391
C391
0.1uF
0.1uF
*
*
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
5
VCC
GND
3
C429
C429
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
*
*
Dummy
Dummy
D28
D28
CA
SD103AW
SD103AW
1
BOOT
2
UGATE
8
PHASE
4
LGATE
C399 10nF25V, X7R, +/-10%
C399 10nF25V, X7R, +/-10%
*
*
Dummy
Dummy
CPU_STR_FB_H8
CPU_STR_FB_L8
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
C385
C385
+80/-20%
+80/-20%
4.7uF
4.7uF
R417 0+/-5%
R417 0+/-5%
*
*
CPU_STR_FB_H
CPU_STR_FB_L
C390
C390
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
R254 0 +/-5%R254 0 +/-5%
VTT_DDR
C405
C405
1uF
1uF
*
*
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
3
VDDIO_PHASE
*
*
CP7
CP7
12
dummy
dummy
R606 0 +/-5%
R606 0 +/-5%
*
*
dummy
dummy
G
VDDIO_PHASE
G
+5V_DUAL
*
*
1uH@1KHz
1uH@1KHz
DS
DS
L17
L17
Q23
Q23
AOD452AL
AOD452AL
Q26
Q26
AOD472AL
AOD472AL
*
*
C441
C441
4.7uF
4.7uF
+80/-20%
+80/-20%
*
*
6.3V, +/-20%
6.3V, +/-20%
EC49
EC49
470uF
470uF
C446
C446
4.7uF
4.7uF
*
*
+80/-20%
+80/-20%
R303
R303
*
*
2.2
2.2
+/-5%
+/-5%
C469
C469
4.7nF
4.7nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
1D5V_STR
2
C435
C435
100nF
100nF
*
*
+80%~-20%
+80%~-20%
L18 2.5uH@100KHz
L18 2.5uH@100KHz
*
*
C333
C333
100nF
100nF
*
*
+80%~-20%
+80%~-20%
R697 10 +/-5%
R697 10 +/-5%
*
*
R396 8.2K +/-1%
R396 8.2K +/-1%
*
*
1
1D5V_STR
EC52
EC52
1000uF
1000uF
*
*
+/-20%
+/-20%
1
R449
R449
*
*
15K
15K
+/-1%
+/-1%
2
C443
C443
2.2uF
2.2uF
+/-10%
+/-10%
+/-5%
+/-5%
R388
R388
EC50
EC50
EC53
EC53
EC47
1000uF
1000uF
+/-20%
+/-20%
+3.3V_DUAL
*
*
DS
*
*
Q44
Q44
2N7002
2N7002
EC47
1000uF
1000uF
+/-20%
+/-20%
MEM_VLD 18
1000uF
1000uF
*
*
*
*
+/-20%
+/-20%
Dummy
Dummy
+/-5%
+/-5%
+5V_STBY
4.7K
4.7K
R386
R386
4.7K
4.7K
*
*
G
B
Q45
Q45
MMBT3904-7-F
MMBT3904-7-F
E C
B B
+5V_STBY
+3.3V
*
*
R454
R454
2.2K
2.2K
Dummy
Dummy
A A
5
Dummy
Dummy
B
R429
R429
*
*
1K
1K
+/-5%
+/-5%
Q20
Q20
MMBT3904-7-F
MMBT3904-7-F
Dummy
Dummy
E C
G
12V_VRM
DS
Q84
Q84
2N7002
2N7002
Dummy
Dummy
R292 10 +/-5%
R292 10 +/-5%
1D2V CORE Voltage
*
*
*
*
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
R282
R282
12.7KOhm
12.7KOhm
+/-1%
+/-1%
R436
R436
2KOhm
2KOhm
+/-1%
+/-1%
4
D29 1N4148WD29 1N4148W
A C
*
*
C401
C401
0.1uF
0.1uF
5
U24
U24
VCC
7
COMP/OCSET
6
FB
GND
3
APW7120KE-TRL
APW7120KE-TRL
R287 1K +/-1%
R287 1K +/-1%
*
*
R259 220 +/-5%dummy
R259 220 +/-5%dummy
*
*
Vout=0.8*(1+R287/R436)
BOOT
UGATE
PHASE
LGATE
1
2
8
4
R281 0+/-5%
R281 0+/-5%
C410 10nF 25V, X7R, +/-10%
C410 10nF 25V, X7R, +/-10%
*
*
Dummy
Dummy
*
*
C400
25V, X7R, +/-10%
C400
25V, X7R, +/-10%
NB_VCORE_PHASE
*
*
0.1uF
0.1uF
R294 0 +/-5%R294 0 +/-5%
NB_VCORE_PHASE
3
+12V
*
*
L11
L11
1uH@1KHz
1uH@1KHz
C153
C153
1uF
1uF
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
DS
Q17
Q17
G
AOD452AL
AOD452AL
DS
Q16
Q16
G
AOD472AL
AOD472AL
EC37
EC37
330uF
330uF
*
*
16V, +/-20%
16V, +/-20%
L12 2.5uH@100KHz
L12 2.5uH@100KHz
*
*
R169
R169
*
*
2.2
2.2
+/-5%
+/-5%
C198
C198
4.7nF
4.7nF
*
*
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
C151
C151
+80/-20%
+80/-20%
4.7uF
4.7uF
*
*
EC43
EC43
1000uF
1000uF
+/-20%
+/-20%
2
+1.2V
EC41
EC41
1000uF
1000uF
*
*
+/-20%
+/-20%
Dummy
Dummy
EC44
EC44
1000uF
1000uF
*
*
+/-20%
+/-20%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
MCP CORE +1.2V
MCP CORE +1.2V
MCP CORE +1.2V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
AC
AC
AC
of
of
of
29 35Wednesday, December 08, 2010
29 35Wednesday, December 08, 2010
29 35Wednesday, December 08, 2010
Page 30
5
4
3
2
1
+/-5%
+/-5%
+/-5%
+/-5%
C111
C111
4.7uF
4.7uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
*
*
G
R93
R93
*
*
10K
10K
+/-5%
+/-5%
G
*
*
R98
R98
2.2
2.2
+/-5%
+/-5%
C129
C129
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
BISP_NB
BV_NB
VIN
DS
DS
G
R99
R99
10K
10K
+/-5%
+/-5%
G
R85 2.2
R85 2.2
Q41
Q41
AOD452
AOD452
Q40
Q40
G
AOD472
AOD472
VIN
DS
Q43
Q43
AOD452
AOD452
DS
Q42
Q42
G
AOD472
AOD472
+/-5%
+/-5%
L32 600nH@100KHz
L32 600nH@100KHz
*
*
6.2k Ohm
6.2k Ohm
*
*
+/-1%
+/-1%
R356
R356
C136
C136
4.7uF
4.7uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
DS
Q30
Q30
AOD472
AOD472
*
*
*
*
DS
G
R84
R84
*
*
10K
10K
+/-5%
+/-5%
G
C158
C158
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
R97
R97
2.2
2.2
+/-5%
+/-5%
C143
C143
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
BISP1
BVcore1
C93
C93
4.7uF
4.7uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
R374
R374
Q36
Q36
2.2
2.2
+/-5%
+/-5%
AOD472
AOD472
C208
C208
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
BISP2
BVcore2
VIN
DS
Q38
Q38
AOD452
AOD452
DS
Q37
Q37
G
AOD472
AOD472
*
*
12
CP14
CP14
dummy
dummy
*
*
12
*
*
DS
L31 600nH@100KHz
L31 600nH@100KHz
*
*
C145
C145
6.2k Ohm
6.2k Ohm
+/-1%
+/-1%
R129
R129
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
L29 600nH@100KHz
L29 600nH@100KHz
*
*
CP12
CP12
dummy
dummy
6.2k Ohm
6.2k Ohm
*
*
+/-1%
+/-1%
R375
R375
C132
C132
4.7uF
4.7uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
R94
R94
Q39
Q39
2.2
2.2
+/-5%
+/-5%
AOD472
AOD472
C112
C112
*
*
1nF
1nF
50V, X7R, +/-10%
50V, X7R, +/-10%
BISP3
BVcore3
12
*
*
C220
C220
*
*
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
12
CP15
CP15
dummy
dummy
12
CP13
CP13
dummy
dummy
L30 600nH@100KHz
L30 600nH@100KHz
*
*
CP11
CP11
dummy
dummy
6.2k Ohm
6.2k Ohm
*
*
+/-1%
+/-1%
R113
R113
VCCP_NB
12
CP10
CP10
dummy
dummy
C133
C133
*
*
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
VCCP_CPU
VCCP_CPU
EC32
EC32
EC33
*
*
EC59
EC59
820uF
820uF
+/-20%
+/-20%
820uF
820uF
+/-20%
+/-20%
*
*
EC33
EC31
EC31
820uF
820uF
820uF
820uF
*
*
*
*
+/-20%Dummy
+/-20%Dummy
+/-20%
+/-20%
EC60
EC60
820uF
820uF
+/-20%Dummy
+/-20%Dummy
EC30
EC30
EC34
EC34
820uF
820uF
820uF
820uF
*
*
*
*
+/-20%
+/-20%
+/-20%
+/-20%
VCCP_NB
*
*
R364
R364
BBoot1
2.2 +/-5%
2.2 +/-5%
*
*
C202
2.2 +/-5%
2.2 +/-5%
*
*
R376
R376
C205
C205
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
BPhase3
R92 2.2
R92 2.2
C202
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
*
*
C207
C207
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
BLG3
+/-5%
+/-5%
*
*
C222
C222
150pF
150pF
R138
R138
1 2
50V, NPO, +/-5%
50V, NPO, +/-5%
0
0
*
*
+/-5%
+/-5%
*
FBRTN
PWROK
*
9
4
R110
R110
1nF
1nF
68KOhm
68KOhm
+/-5%
+/-5%
R145
R145
0
0
*
*
+/-5%
+/-5%
R141
R141
*
*
845 Ohm
845 Ohm
+/-1%
+/-1%
ADJ
R135
R135
10K
10K
*
*
+/-1%
+/-1%
C209
C209
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
12
31
11
FB
COMP
12VCC
GND
GND
RT8855
RT8855
COMP_NB6FB_NB5FBRTN_NB
IMAX_NB
13
680 Ohm
680 Ohm
C164
C164
150pF
150pF
1 2
50V, NPO, +/-5%
50V, NPO, +/-5%
*
*
R360
R360
10K
10K
C163
C163
*
*
+/-1%
+/-1%
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
*
C148
C148
10nF
10nF
*
*
25V, X7R, +/-10%
25V, X7R, +/-10%
*
*
D26
D26
LS4148-F
LS4148-F
C A
BUG1
Bphase1
BBoot1
34
33
35
UG[1]
BOOT[1]
CSN_NB8CSP_NB
7
40
R146
R146
*
*
R3650
R3650
*
*
+/-1%
+/-1%
BISP_NB
BV_NB
+/-5%
+/-5%
1.5nF
1.5nF
50V, X7R, +/-10%
50V, X7R, +/-10%
C156
C156
*
*
1.5nF
1.5nF
Dummy
R140
R140
20K
20K
+/-5%
+/-5%
*
*
R276
R276
54.9K
54.9K
+/-1%
+/-1%
50V, X7R, +/-10%
50V, X7R, +/-10%
C157
C157
Dummy
Dummy
*
*
1.5nF
1.5nF
50V, X7R, +/-10%
50V, X7R, +/-10%
24
5VCC
10
OFS
2
RT
14
IMAX
46
VID[5]
45
VID[4]
44
VID[3]/SVC
43
VID[2]/SVD
42
VID[1]/PVI
41
VID[0]/VFIXEN
47
PGOOD
48
EN
50V, X7R, +/-10%*C134
50V, X7R, +/-10%
Dummy
49
3
GND
1
C134
*
*
D D
CPU_VDD_FB_L8
12V_VRM
R348
R348
10.7KOhm
10.7KOhm
+/-1%
VRM_EN18
C C
CPU_VDDNB_FB_L8
B B
R349 330
R349 330
*
CPU_CORE_TYPE8
PWRGD_PS18,27
*
+/-5%
+/-5%
CPU_VID58
CPU_VID48
CPU_SVC8
CPU_SVD8
CPU_PVEN8
CPU_VID08
VRM_GD18
R338
R338
*
*
0+/-5%
0+/-5%
C185
C185
0.1uF
0.1uF
Dummy
Dummy
R344
R344
*
*
330
330
+/-5%
+/-5%
Dummy
Dummy
R337
R337
*
*
100
100
+/-5%
+/-5%
+/-1%
R346
R346
*
*
2.74KOhm
2.74KOhm
+/-1%
+/-1%
1D5V_STR
R343
R343
*
*
*
*
330
330
+/-5%
+/-5%
Dummy
Dummy
+5V
*
*
R340
R340
1K
1K
+/-5%
+/-5%
R357
R357
10K
10K
+/-5%
+/-5%
Dummy
Dummy
R353
R353
*
*
0+/-5%
0+/-5%
R352
R352
*
*
100
100
+/-5%
+/-5%
A5VCC
*
*
C138
C138
*
+3.3V
R342
R342
R345
R345
R341
R341
*
*
*
*
*
*
*
*
330
330
330
330
1K
1K
+/-5%
+/-5%
+/-5%
+/-5%
Dummy
Dummy
+/-5%
+/-5%
Dummy
Dummy
50V, X7R, +/-10%*C135
50V, X7R, +/-10%
R339
R339
10K
10K
+/-5%
+/-5%
+/-10%
+/-10%
*
1uF
1uF
R136
R136
Dummy
Dummy
*
*
390KOhm+/-1%
390KOhm+/-1%
*
C135
R109
R109
1nF
1nF
49.9K
49.9K
+/-1%
+/-1%
r0402h4
r0402h4
Input LC circuit
12V_VRM
L28
L28
*
1
PWR2
PWR2
Header_2X2
A A
Header_2X2
3
2
4
C110
C110
0.1uF
0.1uF
*
*
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
*
1.2uH@100KHz
1.2uH@100KHz
EC21
EC21
EC20
EC20
1000uF
1000uF
*
*
*
*
+/-20%
+/-20%
1000uF
1000uF
+/-20%
+/-20%
EC22
EC22
1000uF
1000uF
*
*
+/-20%
+/-20%
1.5nF
1.5nF
50V, X7R, +/-10%
50V, X7R, +/-10%
C206
C206
1uF
1uF
*
*
BLG1
32
LG[1]
PHASE[1]
AM2+
AM2+
12VCC_NB
36
BBoot_NB
12V_VRM
C167
C167
*
*
Dummy
Dummy
C146
C146
Dummy
Dummy
*
*
*
*
2.2 +/-5%
2.2 +/-5%
D27
D27
LS4148-F
LS4148-F
C A
BUG2
BBoot2
28
27
UG[2]
BOOT[2]
PHASE_NB
UG_NB37BOOT_NB
38
Bphase_NB
BUG_NB
2.2
2.2
*
*
+/-5%
+/-5%
R358
R358
*
*
1K +/-1%
1K +/-1%
75 +/-1%
75 +/-1%
Dummy
Dummy
R142
R142
*
*
1K +/-1%
1K +/-1%
Dummy
Dummy
75 +/-1%
75 +/-1%
R363
R363
*
*
Bphase2
29
PHASE[2]
LG[2]
PWM3
PWM4
ISP[1]
ISN[1]
ISP[2]
ISN[2]
ISP[3]
ISN[3]
ISP[4]
ISN[4]
LG_NB
39
BLG_NB
R361
R361
R359
R359
*
*
VIN
EC23
EC23
1000uF
1000uF
*
*
+/-20%
+/-20%
R377
R377
*
*
C147
C147
1uF
1uF
30
26
25
16
15
18
17
20
19
22
21
23
PS
CA
D16
D16
LS4148-F
LS4148-F
0.1uF
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%
*
*
2.2+/-5%
2.2+/-5%
*
*
C204
C204
R143
R143
12V_VRM
BLG2
R112 0
R112 0
*
*
+/-5%
+/-5%
R128
R128
*
*
R119 820
R119 820
*
*
R116
R116
*
*
R121 620 Ohm
R121 620 Ohm
*
*
R114
R114
*
*
R124 620 Ohm
R124 620 Ohm
*
*
R278
R278
*
*
1K +/-5%
1K +/-5%
0+/-5%
0+/-5%
+/-1%
+/-1%
0+/-5%
0+/-5%
+/-5%
+/-5%
0+/-5%
0+/-5%
+/-5%
+/-5%
VCCP_NB
BVcore1
BVcore3
*
*
BISP1
BISP2
BVcore2
BISP3
R350
R350
100
100
+/-5%
+/-5%
VCCP_CPU
+3.3V
R131
R131
*
*
CPU_VDD_FB_H 8
0+/-5%
0+/-5%
R126
R126
*
*
100
100
+/-5%
+/-5%
A5VCC
12V_VRM
CA
D25
D25
LS4148-F
LS4148-F
R368
R368
2.2 +/-5%
2.2 +/-5%
*
*
C203
C203
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
R362
R362
BBoot_NB
2.2 +/-5%
2.2 +/-5%
BUG_NB
BPhase_NB
BLG_NB
R351
R351
*
*
CPU_VDDNB_FB_H 8
0+/-5%
0+/-5%
U22
U22
RT9619APS
RT9619APS
1
4
2
3
R366
R366
2.2 +/-5%
2.2 +/-5%
BOOT
VCC
PWM
NC
*
*
BBoot3
UGATE
PHASE
LGATE
PGND
C184
C184
0.1uF
0.1uF
25V, X7R, +/-10%
25V, X7R, +/-10%
BUG1
Bphase1
BLG1
BBoot2
BUG2
Bphase2
BLG2
8
7
5
6
R86 2.2
R86 2.2
R373 2.2
R373 2.2
BUG3
VIN
DS
Q33
Q33
G
AOD452
AOD452
R371
R371
*
*
10K
10K
+/-5%
+/-5%
DS
Q32
Q32
G
AOD472
AOD472
R372
R372
10K
10K
+/-5%
+/-5%
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
VRM
VRM
VRM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
ACustom
ACustom
ACustom
30 35Saturday, December 04, 2010
of
30 35Saturday, December 04, 2010
of
30 35Saturday, December 04, 2010
Page 31
1
A A
2
3
4
5
6
7
8
+5V +3.3V
21
D9
C26
C26
BAV99D9BAV99
10uF
10uF
*
*
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
B B
C C
DAC_RED14
DAC_GREEN14
DAC_BLUE14
DDC_DATA14
DAC_HSYNC14
DAC_VSYNC14
DDC_DATA
DDC_CLK
DDC_CLK14
DAC_HSYNC
DAC_VSYNC
+5V
*
*
5
3
5
3
C57
C57
100nF
100nF
+80%~-20%
+80%~-20%
1
U6
U6
V
V
42
G
G
NC7SZ125M5X
NC7SZ125M5X
1
U8
U8
V
V
42
G
G
NC7SZ125M5X
NC7SZ125M5X
R63
R63
22
22
*
*
+/-5%
+/-5%
R65
R65
22
22
*
*
+/-5%
+/-5%
50V, NPO, +/-5%
50V, NPO, +/-5%
21
D10
D10
BAV99
BAV99
3
3
1
1
C55
C55
C58
C58
10pF
10pF
10pF
10pF
*
*
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
2
R9
R9
150
150
+/-5%
+/-5%
1
R10
R10
R11
R11
150
150
150
150
C9
C9
C10
+/-5%
+/-5%
+/-5%
+/-5%
2
2
3.3pF
3.3pF
*
*
*
*
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
C10
3.3pF
3.3pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
D2
C179
C179
BAV99D2BAV99
100nF
100nF
*
*
+80%~-20%
+80%~-20%
FB1 68nH@100MHz
FB1 68nH@100MHz
*
*
FB3 68nH@100MHz
FB3 68nH@100MHz
*
*
FB4 68nH@100MHz
FB4 68nH@100MHz
*
*
1 2
L2 27nH@100MHz
L2 27nH@100MHz
*
*
1 2
L3 27nH@100MHz
L3 27nH@100MHz
*
*
C11
C11
3.3pF
3.3pF
*
*
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF
Place near VGA-Connector <0.5"
+5V
*
*
F2
F2
FUSE_1.1A
FUSE_1.1A
C35
C35
100nF
100nF
*
*
+80%~-20%
+80%~-20%
VGA
VGA
VGA
VGA
SCL
SCL
5VCLK
VSYNC
HSYNC
5VSDA
15
GND
GND
10
VSYNC
VSYNC
14
NC
NC
9
HSYNC
HSYNC
13
GND
GND
8
SDA
SDA
12
GND
GND
7
ID1
ID1
11
GND
GND
6
21
D1
BAV99D4BAV99
C3
C3
10pF
10pF
50V, NPO, +/-5%
50V, NPO, +/-5%
5
4
3
2
LGREEN
1
D4
3
C2
C2
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
LBLUE
LRED
21
3
C1
C1
10pF
10pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
21
BAV99D1BAV99
3
*
*
GND
GND
ID0
ID0
B
B
G
G
R
R
CONN-VGA
CONN-VGA
16
17
+5V +5V +5V +5V
21
21
BAV99D5BAV99
D5
D11
D11
BAV99
BAV99
3
3
R51
R51
33
33
*
*
R52
R52
+/-5%
+/-5%
33
33
*
*
+/-5%
+/-5%
R42
R42
*
*
2.2K
2.2K
+/-5%
+/-5%
*
*
*
*
C37
C37
470pF
470pF
Dummy
Dummy
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
*
*
R43
R43
2.2K
2.2K
+/-5%
+/-5%
C38
C38
470pF
470pF
Dummy
Dummy
LRED
LGREEN
LBLUE
5VSDA
5VCLK
HSYNC
VSYNC
D D
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
VGA
VGA
VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
31 35Saturday, December 04, 2010
31 35Saturday, December 04, 2010
31 35Saturday, December 04, 2010
8
AC
AC
AC
of
of
of
Page 32
Standby Mode:
For Power ON/OFF POP Noise
+5VA
*
*
EC16
EC16
100uF
100uF
+/-20%
+/-20%
Sense_A
+3.3V
AC_BITCLK18
AC_SDIN_018
AC_SDOUT18
AC_RST*18
AC_SYNC18
+5V_STBY
D3
SD103AWD3SD103AW
C A
L4
L4
1 2
*
*
40 Ohm@100MHz
40 Ohm@100MHz
*
*
*
*
*
*
R64
R64
5.1KOhm
5.1KOhm
+/-1%
+/-1%
R53
R53
10K
10K
+/-1%
+/-1%
R61
R61
20K
20K
+/-1%
+/-1%
*
*
C552
C552
10pF
10pF
C74
C74
+80/-20%
+80/-20%
4.7uF
4.7uF
C30
C30
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C76
C76
100nF
100nF
*
*
+80%~-20%
+80%~-20%
C69
C69
100nF
100nF
*
*
+80%~-20%
+80%~-20%
Dummy
Dummy
R72 22
R72 22
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
FRONT-JD
LINE1-JD
MIC1-JD
U4 H78L05AAU4 H78L05AA
1
+/-5%
+/-5%
Sense_A
LINE2-L
LINE2-R
MIC2-L
MIC2-R
CD_L
CD_GND
CD_R
MIC1-L
MIC1-R
LINE1-L
LINE1-R
OUT
*
*
Dummy
Dummy
+12V
D8
LS4148-FD8LS4148-F
C A
R60
R60
*
*
10
10
+/-5%
C59
C59
100nF
100nF
*
*
*
*
Dummy
Dummy
Dummy
Dummy
U37
U37
3
GPIO1/DMIC-DATA
2
GPIO0/DMIC-CLK/SPDIFO-2
11
RESET#
6
BCLK
10
SYNC
8
SDATA-IN
5
SDATA_OUT
12
PCBEEP
13
Sense A
14
LINE2-L (Port-E-L)
15
LINE2-R (Port-E-R)
16
MIC2-L (Port-F-L)
17
MIC2-R (Port-F-R)
18
CD-L
19
CD-GND
20
CD-R
21
MIC1-L (Port-B-L)
22
MIC1-R (Port-B-R)
23
LINE1-L (Port-C-L)
24
LINE1-R (Port-C-R)
47
SPDIFI/EAPD
48
SPDIFO
+/-5%
EC19
EC19
100uF
100uF
16V, +/-20%
16V, +/-20%
1
DVDD
ALC662-GR
ALC662-GR
+5VA
C27
C27
C20
C20
100nF
100nF
*
*
100nF
100nF
+80%~-20%
+80%~-20%
*
*
+80%~-20%
PIN37-VREFO
AGPIO
Sense B
JDREF
LFE (Port-G-R)
SIDE-L (Port-H-L)
MIC1-VREFO-L
VREF
LINE1-VREFO
MIC2-VREFO
LINE2-VREFO
MIC1-VREFO-R
ALC662-GR
ALC662-GR
+80%~-20%
35
FRONT-L
36
FRONT-RBCLK
37
33
34
Sense_B
39
40
41
43
44
45
46
28
MIC1-VREFO-L
27
29
30
MIC2-VREFO
31
LINE2-VREFO
32
MIC1-VREFO-R
close to Codec as possible
MIC2-JD
LINE2-JD
*
*
R41
R41
20K
20K
+/-1%
+/-1%
C16 10uF +/-10%
C16 10uF +/-10%
*
*
C22 0.1uF
C22 0.1uF
*
*
VC R520 4.99K
*
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
R33
R33
20K
20K
+/-1%
+/-1%
R26
R26
39.2K
39.2K
+/-1%
+/-1%
Sense_B
9
25
38
AVDD1
AVDD2
DVDD-IO
FRONT-L (Port-D)
FRONT-R (Port-D)
SURR-L (Port-A-L)
SURR-R (Port-A-R)
CENTER (Port-G-L)
SIDE-R (port-H-R)
DVSS
DVSS
AVSS1
AVSS2
4
7
26
42
3
IN
GND
2
+80%~-20%
+80%~-20%
C77
C77
100nF
100nF
+80%~-20%
+80%~-20%
Detect
MIC2-L
MIC2-R
LINE2-L
MIC2-VREFO
LINE2-VREFO
FRONT-R
FRONT-L
MIC1-R
C70 10uF +/-10%
C70 10uF +/-10%
MIC1-L
C54 10uF +/-10%
C54 10uF +/-10%
Close to Chip
C52 10uF +/-10%
C52 10uF +/-10%
*
*
C53 10uF +/-10%
C53 10uF +/-10%
*
*
EC17 100uF +/-20%
EC17 100uF +/-20%
*
*
EC14 100uF +/-20%
EC14 100uF +/-20%
*
*
D14
D14
3
BAT54A
BAT54A
D6
D6
3
Dummy
Dummy
BAT54A
BAT54A
EC4 100uF +/-20%
EC4 100uF +/-20%
*
*
EC10 100uF +/-20%
EC10 100uF +/-20%
*
*
Close to Chip
*
*
*
*
2
R18 2.2K +/-5%
R18 2.2K +/-5%
*
*
1
R8 2.2K +/-5%
R8 2.2K +/-5%
*
*
2
R14 2.2K +/-5%
R14 2.2K +/-5%
*
*
1
R12 2.2K +/-5%
R12 2.2K +/-5%
*
*
R3
R3
75
75
*
*
+/-5%
+/-5%
R21
R21
75
75
*
*
+/-5%
+/-5%
R17
R17
75
75
*
*
+/-5%
+/-5%
R47
R47
75
75
*
*
+/-5%
+/-5%
Dummy
Dummy
Dummy
Dummy
MIC1-VREFO-R
MIC1-VREFO-L
*
*
1
R20
R20
22K
22K
+/-5%
+/-5%
2
R4 75 +/-5%
R4 75 +/-5%
R5 75 +/-5%
R5 75 +/-5%
R6 75 +/-5%
R6 75 +/-5%
R7 75 +/-5%
R7 75 +/-5%
1
R15
R15
22K
22K
+/-5%
+/-5%
2
R29
R29
2.2K
2.2K
+/-5%
+/-5%
FRONT AUDIO HEADER
Place near AUDIO header
*
*
*
*
*
*
*
*
1
R19
R19
22K
22K
+/-5%
+/-5%
2
*
*
R30
R30
2.2K
2.2K
+/-5%
+/-5%
1
R49
R49
22K
22K
+/-5%
+/-5%
2
*
*
RN11
RN11
135
78
22K
22K
+/-5%
+/-5%
642
FB15 FB 600 Ohm
FB15 FB 600 Ohm
*
*
FB11 FB 600 Ohm
FB11 FB 600 Ohm
*
*
C46
C46
100pF
100pF
50V, NPO, +/-5%
50V, NPO, +/-5%
FB14 FB 600 Ohm
FB14 FB 600 Ohm
*
*
FB13 FB 600 Ohm
FB13 FB 600 Ohm
*
*
C48
C48
100pF
100pF
50V, NPO, +/-5%
50V, NPO, +/-5%
*
*
*
*
*
*
MIC1_R5
C49
C49
100pF
100pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
F_AUDIO
F_AUDIO
1 2
3
5106
7
9
LINE_OUT_R5
LINE_OUT_L2
C50
C50
100pF
100pF
50V, NPO, +/-5%
50V, NPO, +/-5%
MIC1_L2
X
X
Header_2X5_8
Header_2X5_8
+3.3V
R66
R66
100K
100K
*
*
+/-5%
+/-5%
4
MIC2-JDLINE2-R
LINE2-JD
Detect
Digital
For EMI
CD_L
CD_GND
CD_R
1 2
CP1 COPPER
CP1 COPPER
CP2 dummyCP2 dummy
CP4 COPPER
CP4 COPPER
dummy
dummy
1 2
1 2
dummy
dummy
C78 100nF +80%~-20%
C78 100nF +80%~-20%
Dummy
Dummy
*
*
C86
C86
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C88
C88
*
*
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
C90
C90
*
*
1uF
1uF
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
*
*
Close to Chip
modify 9/13
CD-IN
PLACE near to connector
R80
R80
1K
1K
*
*
+/-5%
+/-5%
R81
R81
1K
1K
*
*
+/-5%
+/-5%
R82
R82
1K
1K
*
*
+/-5%
+/-5%
C361
C361
C362
C362
R223
R223
*
*
*
*
3.3nF
3.3nF
3.3nF
3.3nF
100K
100K
+/-10%
+/-10%
+/-10%
+/-10%
+/-5%
+/-5%
Dummy
Dummy
Dummy
Dummy
*
*
Dummy
Dummy
*
*
Dummy
Dummy
R224
R224
100K
100K
+/-5%
+/-5%
C24
C24
100nF
100nF
+80%~-20%
+80%~-20%
*
*
Dummy
Dummy
CD_IN
CD_IN
1
2
3
4
Header_1X4
Header_1X4
12
CP8
CP8
COPPER
COPPER
dummy
dummy
LINE1-R
LINE1-L
C377 10uF +/-10%
C377 10uF +/-10%
*
*
C71 10uF +/-10%
C71 10uF +/-10%
*
*
Close to Chip
LINE1_L2
LINE1-JD
LINE1_R5
LINE_OUT_L2
FRONT-JD
LINE_OUT_R5
MIC1_L2
MIC1-JD
MIC1_R5
*
*
*
*
32
33
34
35
22
23
24
25
2
3
4
5
1
R13
R13
75
75
+/-5%
+/-5%
R16
R16
75
75
+/-5%
+/-5%
AUDIO
AUDIO
CONN-JACK
CONN-JACK
1
R22
R22
22K
22K
+/-5%
+/-5%
2
Light Blue
INSULATOR
INSULATOR
36
Lime
37
38
39
Pink
C51
C51
100pF
100pF
*
*
50V, NPO, +/-5%
50V, NPO, +/-5%
LINE1_R5
LINE1_L2
FB16 FB 600 Ohm
FB16 FB 600 Ohm
*
*
FB12 FB 600 Ohm
FB12 FB 600 Ohm
*
1
R34
R34
22K
22K
+/-5%
+/-5%
2
*
50V, NPO, +/-5%
50V, NPO, +/-5%
C47
C47
100pF
100pF
*
*
Audio Jack
LINE IN
C
(UAJ)
LINE OUT
B
(UAJ)
MIC IN
A
(UAJ)
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
FOXCONN PCEG
ALC662
ALC662
ALC662
MCP61M07
MCP61M07
MCP61M07
AC
AC
32 35Friday, December 03, 2010
32 35Friday, December 03, 2010
32 35Friday, December 03, 2010
AC
Page 33
5
4
3
2
1
D D
+12V
3-Phase
Switcher
Tiger One
+2.5V_VDDA
+12V
ATX PowerSupply
+5V
C C
SLP_S3#
SLP_S5#
MOS FET
Controller
Tiger One
PROCESSOR
Vccp (CPU Vcore)
Voltage=0.8375-1.6V
Icc(Max)=89A
3-Phase Swithing
CPU PLL
Imax=105mA(S0/S1)
+5V_SB
+5v_DUAL
USB 8 Pprts
+5v_DUAL=500mA(S0/S1)
+5v_DUAL=500mA(S3)
+5v_DUAL=500mA(S4/S5)
PS/2
+5v DUAL=300mA(S0/S1)
+5v_DUAL=300mA(S3)
+5v_DUAL=300mA(S4/S5)
SWITCHER
Q30
+5V_STBY to 3.3SB
Icc(Max)=1.5A
+5V_SB
MOS FET
Integrated
Switcher
+3.3V
+1.8V_SUS
+0.9V_SUS
Switch
+3.3V
B B
DDR2
Imax=14A(S0/S1)
Imax=300mA(S3)
I DDR_Vtt=1.2A
(S0/S1)
(S3)
I DDR_Vtt=50mA
Q32
+1.2V_CORE
Total I=10A
1.2V_DUAL
Total 250mA
MCP61
+1.2V (Core Power)
+1.2V_PEA
+1.2V_PED
+1.2V_SP_A
+1.2V_SP_D
+1.2V_PLL_SP_SS
+1.2V_PLL_SP_VDD
+1.2V_PLL_PE
+1.2V_PLL_PE_SS
+1.2V_PLL_CPU_HT
+3.3V
+1.2V_DUAL
MCP61
+5V
VBAT
RTC Battery
MCP61
+3.3V
+3.3V_DAC
VCC5
+5VSB
+12V
+3.3VSB
+3.3V
+12V
+3.3VSB
+3.3V
+5V
+3.3V
+12V
+3.3VSB
+1.5V
Super I/O
5V Icc(Max)=50mA
5VSB Icc(Max)=50mA(S0)
5VSB Icc(Max)=38mA(S3)
PCI Express
X16 Slot(1)
+12V=5.5 A
3.3VSB
Icc(Max)=0.375A(Wake)
Icc(Max)=0.02A(NoWake)
+3.3V=3A
PCI Express
X1 Slot(1)
+12V=0.5 A
3.3VSB
Icc(Max)=0.375A(Wake)
Icc(Max)=0.02A(NoWake)
+3.3V=3A
PCI Per Slot (2)
+5V Icc(Max)=5A
-12V Icc(Max)=0.1A
+3.3V Icc(Max)=6A
+12V Icc(Max)=0.5A
+3.3VSB
Icc(Max)=0.375A(wake)
Icc(Max)=0.02A(NoWake)
RTL8100C/8110SC
-12V
1.8V
MCP61
Linear
+1.2VHT
HT Link
1.2VHT=1A(S0,S1)
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Power Map
Power Map
Power Map
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
33 35Saturday, December 04, 2010
33 35Saturday, December 04, 2010
33 35Saturday, December 04, 2010
AC
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AC
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Page 34
5
6/18 ： 1,USB: 0 ohm R change to 0 ohm RN, 4pin Bead change to 8pin
Bead; 2, BIOS,LPC change to SPI . 3, LAN change to AC131 + PCI
LAN :RTL8100C/8110SC,
6/20 : 1,LAN_CLK
，
R623，R624 16.9 ohm 改為15 ohm ； 3，USB Fuse 2.6A 替代2個1.5A
2
；4，
F_Audio 75 ohm /22k ohm
6/21 : 1，LAN 49.9 ohm
2，R388
D D
去掉，
，
Dummy C332,C301,C310,C300,C320,C290,C347.
3
6/22 : 1,
3， ADD C2136 0.1uF to GMII_RXCLK, R57 change to 330K;
6/29: 1, Add 75 ohm damping resistance for Audio ; 2,F_Audio
detect pin connect to sense_B pin of CODEC; 3, ADD prtection Diode
to COM port .
走南橋，
Dummy
外部晶振
, Remove AC131 PHY LAN；
電阻閤並成排阻
部分有串接
電阻閤並成排阻
10ohm
SIO
去掉
R355，R829，R830，R832； 2， dummy C572
電阻；
49.9 ohm
；
4
3
2
1
；
7/2 : 1,remove L99,L100,L102; Change heatsink with foxconn log; 2, Remove RN122 .
7/3: 1, ADD C 956( 4.7uF/805) to 3.3v_Dual ; 2, dummy EC83 (5V_SB);
3, Remove C412, C352,C354;
7/5: 1, change C374,C378 to 0.1uF/0603; 2, dummy
C157,C244,C267,C193,C286,C645,C199,C247,C312,C315,C325,C327,C328; 3,
Remove C385,C386,C407,C865,C387,C866;
7/7: 1, Change D6,D7,D8,D17,D20,D23,D47 footprint to so80h16; 2, change
RN45,RN46 from 8p4r0603 to 8p4r0402 ; 3, add EC106 100uF to
+1.2V_dual, dummy EC105 ; 4, Q129,Q131 change to AP15N03GH;
7/9: 1, GPIO PIN: Board ID Select. add R363,R364,R365; Default add R363;
C C
2, Remove C808,C809,C810,C811,C821,C89,C806,C807,C156,C268,C970,
C52,C74,C49,C976,C61,C83,C73,C76,C72,EC66 ; 3, add EC50, dummy EC14;
7/11 : 1, add EC107 to aduio 12 V power, C733 change to 10uF, add L28 to audio power DVDD ;
2, ADD EC60 to 3.3V_DUAL for LAN Power ,default dumy ; 3, add R368, R371 to modify the SPI
clock; 4, Remove C7,C8,C11,R517,R530,R536 ( Audio ).
8/16 : 1 .L12/L20 change to 1uH/1kHz
2 .EC39/38 change to 680uF
3 . add R501/502 for CD-IN
4 .PCI SLOT IDSEL
5 .add EC103 (1.2V OUTPUT)
6 .EC35/37 change to 470uF
7 . add EC104/105
8 .C392/396 change to 22p
B B
9 .Retention Module for CPU change HH P/N
10 .PEA POWER del copper,FB
11 .R83 dummy,and add thermal trip to SIO through level shift
12 .C238 change to 220pF
13 .R163 change to 680R
14 .SATA2,SATA3 change each other
15 .Del R77/72/133
16 .R262 change to 1.1k
17 .C495 change to 10uF and reserved
18 .C496 reserved
9/12 : 1 .USB_OC add R550/R51/R552/R553 for 3.3V
2 .Exchange usb3/4;
A A
2 .change C385/C391/C392/C396 from 0603 to 0402
9/19 : 1 .change c392/c396 22pf to 24pf
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
Modify list
Modify list
Modify list
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
34 35Saturday, December 04, 2010
34 35Saturday, December 04, 2010
34 35Saturday, December 04, 2010
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D D
C C
4
3
2
1
B B
A A
FOXCONN PCEG
FOXCONN PCEG
Title
Title
Title
CHANGE LIST
CHANGE LIST
CHANGE LIST
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FOXCONN PCEG
MCP61M07
MCP61M07
MCP61M07
1
35 35Saturday, December 04, 2010
35 35Saturday, December 04, 2010
35 35Saturday, December 04, 2010
AC
AC
AC
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