Force Computers SPARC/CPU-5TE Installation Manual

FORCE COMPUTERS Inc./GmbH

All Rights Reserved

This document shall not be duplicated, nor its contents used

for any purpose, unless express permission has been granted.

Copyright by FORCE COMPUTERS

SPARC/CPU-5TE

Installation Guide

P/N 203739 Edition 5.0

February 1999

NOTE

The information in this document has been carefully checked and is believed to be entirely reliable. FORCE COMPUTERS makes no warranty of any kind with

regard to the material in this document, and assumes no responsibility for any errors which may appear in this document. F

ORCE COMPUTERS reserves the right

to make changes without notice to this, or any of its products, to improve reliability, performance, or design.

F

ORCE COMPUTERS assumes no responsibility for the use of any circuitry other than circuitry which is part of a product of FORCE COMPUTERS Inc./GmbH.

F

ORCE COMPUTERS does not convey to the purchaser of the product described herein any license under the patent rights of F ORCE COMPUTERS Inc./GmbH nor

the rights of others. All product names as mentioned herein are the trademarks or registered trademarks of their respective companies.

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FORCE COMPUTERS Page i

CPU-5TE Installation Guide Table of Contents

Table of Contents

Getting Started

1.1 Caution............................................................................................................................................ 1

1.2 Location Diagram of the SPARC CPU-5TE Board........................................................................ 1

1.3 Before Powering Up ....................................................................................................................... 4

1.3.1 Default Switch Settings ................................................................................................... 4

1.3.2 Memory Module MEM-5................................................................................................ 8

1.4 Powering Up................................................................................................................................... 9

1.4.1 VME Slot-1 Device ......................................................................................................... 9

1.4.2 VMEbus SYSRESET ...................................................................................................... 9

1.4.2.1 SYSRESET Input........................................................................................... 9

1.4.2.2 SYSRESET Output......................................................................................... 9

1.4.3 Serial Ports....................................................................................................................... 9

1.4.4 RESET and ABORT Key Enable.................................................................................. 10

1.4.5 Front Panel SCSI#1 Termination .................................................................................. 10

1.4.6 P2 SCSI Termination..................................................................................................... 10

1.4.7 Boot Flash EPROM Write Protection ........................................................................... 11

1.4.8 User Flash EPROM Write Protection............................................................................ 11

1.4.9 Reserved Switches......................................................................................................... 11

1.4.10 Floppy Interface or SCSI#2 Availability on P2............................................................. 12

1.4.11 Network Interface Selection (NIS) for Ethernet............................................................ 13

1.4.12 Parallel Port ................................................................................................................... 13

1.5 OpenBoot Firmware ..................................................................................................................... 14

1.5.1 Boot the System............................................................................................................. 14

1.5.2 NVRAM Boot Parameters............................................................................................. 17

1.5.3 Diagnostics .................................................................................................................... 18

1.5.4 Display System Information.......................................................................................... 21

1.5.5 Reset the System............................................................................................................ 22

1.5.6 OpenBoot Help.............................................................................................................. 22

1.6 Front Panel....................................................................................................................................24

1.6.1 Features of the Front Panel............................................................................................ 25

1.8 SPARC CPU-5TE Connectors...................................................................................................... 26

1.8.1 Twisted Pair Ethernet Connector Pinout ....................................................................... 27

1.8.2 Serial Port A and B Connector Pinout........................................................................... 28

1.8.3 Keyboard/Mouse Connector Pinout .............................................................................. 30

Table of Contents CPU-5TE Installation Guide

Page ii FORCE COMPUTERS

1.8.4 VME P2 Connector Pinout............................................................................................ 31

1.8.5 The IOBP-10 Connectors .............................................................................................. 32

1.8.5.1 Jumper Setting for IOBP-10......................................................................... 32

1.9 IOBP-DS.......................................................................................................................................37

1.9.1 Jumper Setting for IOBP-DS......................................................................................... 37

1.9.2 IOBP-DS P2 Connector Pinout ..................................................................................... 38

1.10 How to Determine the Ethernet Address and Host ID.................................................................. 43

1.11 History of the Manual................................................................................................................... 44

FORCE COMPUTERS Page iii

CPU-5TE Installation Guide Table of Contents

List of Figures

Figure 1. Diagram of the CPU-5TE (Top View) ............................................................................... 2

Figure 2. Diagram of the CPU-5TE (Bottom View) ......................................................................... 3

Figure 3. SCSI Termination ............................................................................................................ 10

Figure 4. Floppy or SCSI #2 Availability on P2 ............................................................................. 12

Figure 5. Diagram of the Front Panel .............................................................................................. 24

Figure 6. Twisted Pair Ethernet ....................................................................................................... 27

Figure 7. Serial Ports A and B Connector Pinout ............................................................................ 29

Figure 8. Keyboard/Mouse Connector ............................................................................................ 30

Figure 9. The IOBP-10 .................................................................................................................... 32

Figure 10. The IOBP-DS ................................................................................................................... 37

Table of Contents CPU-5TE Installation Guide

Page iv FORCE COMPUTERS

List of Tables

Table 1. Default Switch Settings...................................................................................................... 4

Table 2. Device Alias Definitions.................................................................................................. 16

Table 3. Setting Configuration Parameters.................................................................................... 17

Table 4. Diagnostic Routines......................................................................................................... 18

Table 5. Commands to Display System Information..................................................................... 21

Table 6. SPARC CPU-5TE Connectors......................................................................................... 26

Table 7. Twisted Pair Ethernet Connector Pinout.......................................................................... 27

Table 8. Serial Port A and B Connector Pinout............................................................................. 28

Table 9. Keyboard/Mouse Connector Pinout................................................................................. 30

Table 10. VME P2 Connector Pinout .............................................................................................. 31

Table 11. IOBP-10 P1 Pinout........................................................................................................... 33

Table 12. IOBP-10 P2 Pinout (SCSI #1) ......................................................................................... 34

Table 13. IOBP-10 P3 Pinout (Floppy)............................................................................................ 35

Table 14. IOBP-10 P5 Pinout (Serial).............................................................................................. 36

Table 15. IOBP-10 Pinout (Ethernet)............................................................................................... 36

Table 16. IOBP-DS J1 Pinout (SCSI #1)......................................................................................... 39

Table 17. IOBP-DS J2 Pinout (SCSI #2)......................................................................................... 40

Table 18. IOBP-DS J3 Pinout (Ethernet #1 - AUI) ......................................................................... 41

Table 19. IOBP-DS J4 Pinout (Serial A and B)............................................................................... 42

Table 20. IOBP-DS J5 Pinout (Keyboard/Mouse)........................................................................... 42

Table 21. History of Manual............................................................................................................ 44

FORCE COMPUTERS Page 1

SPARC/CPU-5TE Installation Guide

1. Getting Started

This Installation Guide provides guidelines for powering up the SPARC/CPU-5TE board. The
Installation Guide, which you have in your hand now, appears both as Section 2 of the SPARC
CPU-5TE Technical Reference Manual and as a stand-alone Installation Guide. The SPARC
CPU-5TE Technical Reference Manual is also available from FORCE COMPUTERS. The
SPARC/CPU-5TE Technical Reference Manual provides a comprehensive hardware and

software guide to your board and is intended for those persons who require complete
information.

1.1 Caution

Please read this Installation Guide before installing the board. Take a moment to examine the
Table of Contents to see how this documentation is structured. This will be of value to you
when looking for specific information in the future.

CAUTION: Do not plug or remove board under power.

1.2 Location Diagram of the SPARC CPU-5TE Board

A location diagram showing the important components on the CPU-5TE (top view) appears on
the following page. On the page next to it, there is a location diagram of the CPU-5TE (bottom
view) showing the position of five of the on-board switches.

Installation Guide SPARC/CPU-5TE

Page 2 FORCE COMPUTERS

FIGURE 1. Diagram of the CPU-5TE (Top View)

Reset

Abort

Rotary

Status LEDs
User LEDs

Keyboard
and
Mouse

Serial Port

A and B

SCSI #1

Twisted
Pair
Ethernet 2

Micro

S4-VME

"SLAVIO"

"MACIO"

NCR89C100

"MACIO"

NCR89C100

NCR89C105

RTC/NVRAM

LCA

B2 B3 B1

Ethernet 1

SBus Slot #2 at P4

SBus Slot #1 at P3

SW11

SW10

SPARC-II

SW4

SW6

Boot Flash

J 124

J 125

SW 7

B10 B9 B8

B2, B3, B1
and
B 10, B9, B8
are the sockets for
SCSI #2/Floppy
Switch Matrix

Twisted

Pair

Memory

Lower
(#1)

Upper
(#2)

Memory Module #2

Memory Module #1

7-Segment
Display

#2

#1

FORCE COMPUTERS Page 3

SPARC/CPU-5TE Installation Guide

FIGURE 2. Diagram of the CPU-5TE (Bottom View)

SW8

SW12

SW5
SW13

SW9

Installation Guide SPARC/CPU-5TE

Page 4 FORCE COMPUTERS

1.3 Before Powering Up

Before powering up, please make sure that the default switch settings are all set according to
the table below. Check these switch settings before powering up the SPARC CPU-5TE
because the board is configured for power up according to these default settings. For the
position of the switches on the board, please see the diagrams on the previous two pages.

1.3.1 Default Switch Settings

Table 1: Default Switch Settings

Diagram of Switch Switches

Default

Setting

Function

SWITCH 4

SW4-1 OFF reserved, must be OFF.

SW4-2 ON reserved, must be ON.

SWITCH 5

SW5-1 OFF Test Switch, must be OFF

SW5-2 ON Test Switch, must beON

SW5-3 OFF SCSI Termination for SCSI # 2 on P2

OFF = Enable, ON = Disable

SW5-4 ON SCSI Termination for SCSI # 1 on P2

OFF = Enable, ON = Disable

SWITCH 6

SW6-1 ON Reset Key Control

ON=Reset Key enable, OFF=Reset Key disable

SW6-2 ON Abort Key Control

ON=Abort Key enable, OFF=Abort Key disable

ON

1
2

ON

1
2
3
4

ON

1
2

FORCE COMPUTERS Page 5

SPARC/CPU-5TE Installation Guide

SWITCH 7

SW7-1 OFF SCSI#1 termination for Front Panel

OFF = Automatic (When a connector is plugged
into the front panel SCSI connector, then termi­nation is disabled. When no connector is
plugged into the front panel SCSI connector,
then termination is enabled.)
ON = disabled

SW7-2 OFF Test Switch, must be OFF

SWITCH 8

SW8-1 OFF Test Switch, must be OFF

SW8-2 ON TRXC on Front Panel Connector for RS-232

ON=Available, OFF=Not Available
(Serial Port B)

SW8-3 ON TRXC on Front Panel Connector for RS-232

ON=Available, OFF=Not Available
(Serial Port A)

SW8-4 OFF TRXC +/- on Front Panel Connector for RS-422

ON=Available, OFF=Not Available
(Serial Port B)

SWITCH 9

SW9-1 ON CTS on Front Panel Connector for RS-232 or

CTS +/- on Front Panel Connector for RS-422
ON=Available, OFF=Not Available
(Serial Port B)

SW9-2 ON RTS on Front Panel Connector for RS-232 or

RTS +/- on Front Panel Connector for RS-422
ON=Available, OFF=Not Available
(Serial Port B)

SW9-3 ON RTS on Front Panel Connector for RS-232 or

RTS +/- on Front Panel Connector for RS-422
ON=Available, OFF=Not Available
(Serial Port A)

SW9-4 OFF TRXC +/- on Front Panel Connector for RS-422

ON=Available, OFF=Not Available
(Serial Port A)

Table 1: Default Switch Settings (cont.)

Diagram of Switch Switches

Default

Setting

Function

ON

1
2

ON

1
2
3
4

ON

1
2
3
4

Installation Guide SPARC/CPU-5TE

Page 6 FORCE COMPUTERS

SWITCH 10

SW10-1 OFF Test Switch, must be OFF

SW10-2 ON VMEbus Slot-1 Device

ON = Automatic Slot-1 Device Recognition

OFF = Not Slot-1 Device

SWITCH 11

SW11-1 ON SYSRESET received from VMEbus

ON = VMEbus SYSRESET generates on-board
RESET
OFF = VMEbus SYSRESET does not
generate on-board RESET

SW11-2 ON VMEbus SYSRESET Generation

ON = SYSRESET is driven to VMEbus if board
is Slot-1 Device or during power-up reset
OFF = SYSRESET is not driven to VMEbus

SWITCH 12

SW12-1 OFF RTXC +/- on Front Panel Connector for RS-422

ON=Available, OFF=Not Available
(Serial Port B)

SW12-2 ON CTS on Front Panel Connector for RS-232 or

CTS +/- on Front Panel Connector for RS-422
ON=Available, OFF=Not Available
(Serial Port A)

SW12-3 OFF RTXC +/- on Front Panel Connector for RS-422

ON=Available, OFF=Not Available
(Serial Port A)

SW12-4 OFF Test Switch, must be OFF

Table 1: Default Switch Settings (cont.)

Diagram of Switch Switches

Default

Setting

Function

ON

1
2

ON

1
2

ON

1
2
3
4

FORCE COMPUTERS Page 7

SPARC/CPU-5TE Installation Guide

CAUTION: To avoid damaging the serial ports, please consider the following regarding

Switch 8, Switch 9 and Switch 12. Do not set the switches (SW8-3 and SW12-4), or (SW9-4
and SW9-3), or (SW12-2 and SW12-3) to ON at the same time and do not set the switches
(SW8-2 and SW8-1), or (SW8-4 and SW9-2), or (SW9-1 and SW12-1) to ON at the same
time!

SWITCH 13

SW13-1 OFF User Flash EPROM write protection

ON = disable, OFF = enable

SW13-2 OFF Boot Flash EPROM write protection

ON = disable, OFF = enable

SW13-3 OFF/ON No function

SW13-4 OFF/ON No function

Table 1: Default Switch Settings (cont.)

Diagram of Switch Switches

Default

Setting

Function

ON

1
2
3
4

Installation Guide SPARC/CPU-5TE

Page 8 FORCE COMPUTERS

1.3.2 Memory Module MEM-5

It is necessary to install the memory module on the board before powering up. For instructions
on installing the MEM-5, please see the document How to Install MEM-5.

Memory Module # 1 must be installed for power up because it holds configuration
information for booting the board. Memory module # 2 is optional for increasing memory
capacity. For the location of the memory module connectors on the board, please see
“Diagram of the CPU-5TE (Top View)” on page 2.

FORCE COMPUTERS Page 9

SPARC/CPU-5TE Installation Guide

1.4 Powering Up

The initial power up can easily be done by connecting a terminal to ttya (serial port A). The
advantage of using a terminal is that no frame buffer, monitor, or keyboard is used for initial
power up, which facilitates a simple startup.

Please see the chapter “Boot the System” on page 14 for more detailed information on booting
the system.

1.4.1 VME Slot-1 Device

The SPARC CPU-5TE can be plugged into any VMEbus slot; however, the default
configuration automatically detects that the board is a VME slot-1 device, which functions as
VME system controller. To configure your CPU-5TE so it is not a VME slot-1 device, the
default configuration must be changed so that SW10-2 is OFF.

CAUTION: Before installing the SPARC CPU-5TE in a miniforce chassis, please first disable
the VMEbus System Controller function by setting switch SW10-2 to OFF.

1.4.2 VMEbus SYSRESET

1.4.2.1 SYSRESET Input

A SYSRESET received from VMEb us generates an on-board RESET if switch SW11-1 is ON
(default setting). When SW11-1 is OFF, the SYSRESET received from the VMEbus does not
generate an on-board RESET.

1.4.2.2 SYSRESET Output

There are several possible ways for the CPU-5TE to generate a SYSRESET signal to the
VMEbus. One way is when the CPU-5TE is a VMEbus slot-1 device and an on-board local
SBus reset occurs, then the CPU-5TE generates the SYSRESET signal to the VMEbus. A
second way for the SYSRESET signal to be generated is by power-up reset. Power-up reset
occurs by switching on the power. Power-up Reset also occurs when the power monitor
detects power fail or the front panel reset key is toggled.
This SYSRESET signal can be disabled by setting the switch SW11-2 to OFF.

1.4.3 Serial Ports

By default, both serial ports are configured as RS-232 interfaces. The chapter “Default Switch
Settings” on page 4 shows the necessary switch settings for RS-232 operation.

Installation Guide SPARC/CPU-5TE

Page 10 FORCE COMPUTERS

1.4.4 RESET and ABORT Key Enable

To enable the RESET and the ABORT functions on the front panel, set switches SW6-1
(RESET) and SW6-2 (ABORT) to ON. This is the default setting.

1.4.5 Front Panel SCSI#1 Termination

Please note how the SCSI#1 termination works on the front panel.Termination for the SCSI#1
interface is disabled when SW7-1 is ON. When switch SW7-1 is OFF, the termination is set
to automatic termination mode. Automatic termination mode means the respective termination
is disabled when you connect a standard SCSI cable to the connector.

1.4.6 P2 SCSI Termination

Termination for the P2 SCSI#1 is disabled when SW5-4 is ON, and this is the default setting.
Termination for the P2 SCSI#2 is enabled when SW5-3 is OFF, and this is the default setting.

FIGURE 3. SCSI Termination

MACIO

SCSI#1

F
R
O
N
T

P
A

N
E
L

MACIO

SCSI#2

#1

#2

SCSI#1

V
M
E
B
u
s

P
2

C

o
n
n
e
c
t
o
r

Termination

SW7-1 controls SCSI#1 termination for Front Panel
OFF = Automatic
ON = Disabled

SW5-3 controls SCSI#2 termination on P2
OFF = Enable
ON = Disabled

OFF = Enable
ON = Disabled

SW5-4 controls SCSI#1
termination on P2

Termination

Termination

FORCE COMPUTERS Page 11

SPARC/CPU-5TE Installation Guide

1.4.7 Boot Flash EPROM Write Protection

Both Boot Flash EPROMs are write protected via the switch SW13-2. When SW13-2 is OFF,
the devices are write protected, and this is the default setting.

1.4.8 User Flash EPROM Write Protection

The optional User Flash EPROMs are write protected via SW13-1. When SW13-1 is OFF, the
User Flash EPROMs are write protected, and this is the default setting.

1.4.9 Reserved Switches

SW5-1, SW5-2, SW7-2, SW8-1, SW10-1 and SW12-4 are reserved for test purposes. SW5-1,
SW7-2, SW8-1, SW10-1 and SW12-4 should always be OFF. SW5-2 should always be ON.

Installation Guide SPARC/CPU-5TE

Page 12 FORCE COMPUTERS

1.4.10 Floppy Interface or SCSI#2 Availability on P2

It is important to understand that the availability of both the floppy and SCSI#2 devices at the
same time is dependent upon the availability of a 5-row P2 connector. When using a 3-row P2
connector, you have the choice of either the floppy or the SCSI#2 on P2. The following
describes how to configure the board for floppy or SCSI#2.

Via a 24-pin configuration switch matrix, it is possible for either the floppy interface or the
SCSI#2 to be available on the VME P2 connector on row C. The default setting enables the
floppy interface via the VME P2 connector, with the configuration switch matrix plugged into
B2/B3 and B10/B9. This means, of course, that by default the SCSI#2 is not available via the
VMEbus P2 connector on row C.

To enable the SCSC#2 via the VME P2 connector, plug the configuration switch matrix in
sockets B3/B1 and B9/B8.

FIGURE 4. Floppy or SCSI #2 Availability on P2

CAUTION: If you use an IOBP-DS, the switch matrix must be located on B3/B1 and B9/B8

in order to route SCSI #2 to P2 row C. If you use an IOBP-10, the switch matrix must be
located on B2/B3 and B10/B9 in order to route the floppy interface to P2 row C.

B2 B3 B1

B10 B9 B8

This 3-piece configuration
switch matrix is used for
choosing either the floppy
interface or SCSI#2.

Plug the interface into
sockets B2/B3 and B10/B9
for the floppy interface.

Or

Plug the interface into
sockets B3/B1 and B9/B8
for the SCSI#2 interface.

FORCE COMPUTERS Page 13

SPARC/CPU-5TE Installation Guide

1.4.11 Network Interface Selection (NIS) for Ethernet

It is important to understand that the Ethernet is selected either via the twisted pair connector
or the AUI (Attachment Unit Interface). When you boot your system and a connection exists
with an AUI network, then the AUI is automatically selected. In other words, when you have
a successful connection with a network, the AUI is used. When you have no connection with
the network, then the twisted pair is selected. This is valid for both Ethernet #1 and
Ethernet #2. The Ethernet#1 channel and the Ethernet#2 channel function independently of
each other. For both Ethernet interfaces there is one Ethernet address. This means that you
don’t have to connect both interfaces to one physical cable.

1.4.12 Parallel Port

The availability of the parallel port is dependent upon the availability of a 5-row P2 connector.
When using a 3-row P2 connector, parallel port is not available.

Installation Guide SPARC/CPU-5TE

Page 14 FORCE COMPUTERS

1.5 OpenBoot Firmware

This chapter describes the use of OpenBoot firmware. Specifically, you will read how to
perform the following tasks.

• Boot the System

• Run Diagnostics

• Display System Information

• Reset the System

• OpenBoot Help

For detailed information concerning OpenBoot, please see the OPEN BOOT PROM 2.0
MANUAL SET. This manual is included in the SPARC CPU-5TE Technical Reference Manual
Set.

1.5.1 Boot the System

The most important function of OpenBoot firmware is booting the system. Booting is the
process of loading and executing a stand-alone program such as the operating system. After it
is powered on, the system usually boots automatically after it has passed the Power On SelfTest
(POST). This occurs without user intervention.

If necessary, you can explicitly initiate the boot process from the OpenBoot command
interpreter. Automatic booting uses the default boot device specified in nonvolatile RAM
(NVRAM); user initiated booting uses either the default boot device or one specified by the
user.

To boot the system from the default boot device, type the following command at the Forth
Monitor prompt.

or, if you are at the Restricted Monitor Prompt, you have to type the following:

ok boot

> b

FORCE COMPUTERS Page 15

SPARC/CPU-5TE Installation Guide

The boot command has the following format:

boot [device-specifier] [filename] [-ah]

The optional parameters are described as follows.

[device-specifier] The name (full path or alias) of the boot device. Typical values

are cdrom, disk, floppy, net or tape.

[filename] The name of the program to be booted. filename is relative to the

root of the selected device. If no filename is specified, the boot
command uses the value of boot-file NVRAM parameter. The
NVRAM parameters used for booting are described in the

following chapter.
[-a] -a prompt interactively for the device and name of the boot file.
[-h] -h halt after loading the program.

NOTE: These options are specific to the operating system and may differ from system to
system.

To explicitly boot from the internal disk, type:

or at the Restricted Monitor prompt:

ok boot disk

> b disk

Installation Guide SPARC/CPU-5TE

Page 16 FORCE COMPUTERS

To retrieve a list of all device alias definitions, type devalias at the Forth Monitor command
prompt. The following table lists some typical device aliases:

Table 2: Device Alias Definitions

Alias Boot Path Description

disk /iommu/sbus/espdma/esp/sd@3,0 Default disk (1st internal) SCSI-ID 3
disk3 /iommu/sbus/espdma/esp/sd@3,0 First internal disk SCSI-ID 3
disk2 /iommu/sbus/espdma/esp/sd@2,0 Additional internal disk SCSI-ID 2
disk1 /iommu/sbus/espdma/esp/sd@1,0 External disk SCSI-ID 1
disk0 /iommu/sbus/espdma/esp/sd@0,0 External disk SCSI-ID 0
tape /iommu/sbus/espdma/esp/st@4,0 First tape drive SCSI-ID 4
tape0 /iommu/sbus/espdma/esp/st@4,0 First tape drive SCSI-ID 4
tape1 /iommu/sbus/espdma/esp/st@5,0 Second tape drive SCSI-ID 5
cdrom /iommu/sbus/espdma/esp/sd@6,0:d CD-ROM partition d, SCSI-ID 6
net /iommu/sbus/ledma/le Ethernet
floppy /obio/SUNW,fdtwo Floppy drive

FORCE COMPUTERS Page 17

SPARC/CPU-5TE Installation Guide

1.5.2 NVRAM Boot Parameters

The OpenBoot firmware holds configuration parameters in NVRAM. At the Forth Monitor
prompt, type printenv to see a list of all available configuration parameters. The OpenBoot
command setenv may be used to set these parameters.

setenv [configuration parameter] [value]

This information refers only to those configuration parameters which are involved in the boot
process. The following table lists these parameters.

When booting an operating system or another stand-alone program, and neither a boot device
nor a filename is supplied, the boot command of the Forth Monitor takes the omitted values
from the NVRAM configuration parameters. If the parameter diag-switch? is false, boot­device and boot-file are used. Otherwise, the OpenBoot firmware uses diag-device and diag­file for booting.

For a detailed description of all NVRAM configuration parameters, please refer to the OPEN

BOOT PROM 2.0 MANUAL SET.

Table 3: Setting Configuration Parameters

Parameter Default Value Description

auto-boot? true If true, boot automatically after power on or reset
boot-device disk Device from which to boot
boot-file empty string File to boot
diag-switch? false If true, run in diagnostic mode
diag-device net Device from which to boot in diagnostic mode
diag-file empty string File to boot in diagnostic mode

Installation Guide SPARC/CPU-5TE

Page 18 FORCE COMPUTERS

1.5.3 Diagnostics

At power on or after reset, the OpenBoot firmware executes POST. If the NVRAM
configuration parameter diag-switch? is true for each test, a message is displayed on a terminal
connected to the first serial port. In case the system is not working correctly, error messages
indicating the problem are displayed. After POST, the OpenBoot firmware boots an operating
system or enters the Forth Monitor if the NVRAM configuration parameter auto-boot? is false.

The Forth Monitor includes several diagnostic routines. These on-board tests let you check
devices such as network controller, SCSI devices, floppy disk system, memory, clock and
installed SBus cards. User installed devices can be tested if their firmware includes a selftest
routine.

The table below lists several diagnostic routines.

Table 4: Diagnostic Routines

To check the on-board SCSI bus for connected devices, type:

Command Description

probe-scsi Identify devices connected to the on-board SCSI bus
probe-scsi-all [device-path] Perform probe-scsi on all SCSI buses installed in the

system below the specified device tree node. (If

device-path is omitted, the root node is used.)

test device-specifier Execute the specified device’s selftest method.

device-specifier may be a device path name or a

device alias.
For example:
test net - test network connection
test /memory - test number of megabytes specified in
the selftest-#megs NVRAM parameter or test all of
memory if diag-switch? is true

test-all [device-specifier] Test all devices (that have a built-in selftest method)

below the specified device tree node. (Ifdevice-path

is omitted, the root node is used.)
watch-clock Monitor the clock function
watch-net Monitor network connection

ok probe-scsi
Target 3

Unit 0 Disk MICROP 1684-07MB1036511AS0C1684

ok

FORCE COMPUTERS Page 19

SPARC/CPU-5TE Installation Guide

To test all the SCSI buses installed in the system, type:

The actual response depends on the devices on the SCSI buses.

To test a single installed device, type:

This executes the device method name selftest of the specified device node.
device-specifier may be a device path name or a device alias as described in Table 2, “Device
Alias Definitions,” on page 16. The response depends on the selftest of the device node.

To test a group of installed devices, type:

All devices below the root node of the device tree are tested. The response depends on the
devices that have a selftest routine. If a device specifier option is supplied at the command line,
all devices below the specified device tree node are tested.

When you use the memory testing routine, the system tests the number of megabytes of
memory specified in the NVRAM configuration parameter selftest-#megs. If the NVRAM
configuration parameter diag-switch? is true, all memory is tested.

The command test-memory is equivalent to test /memory. In the example above, the first
number (0) is the base address of the memory bank to be tested, the second number (27) is the
number of megabytes remaining. If the CPU board is working correctly, the memory is erased

ok probe-scsi-all
/iommu@0,10000000/sbus@0,10001000/esp@2,100000
Target 6

Unit 0 Disk Removable Read Only Device SONY CD-ROM CDU-8012 3.1a

/iommu@0,10000000/sbus@0,10001000/espdma@4,8400000/esp@4,8800000

Target 3

Unit 0 Disk MICROP 1684-07MB1036511AS0C1684

ok

ok test device-specifier

ok test-all

ok test /memory
testing 32 megs of memory at addr 0 27
ok

Installation Guide SPARC/CPU-5TE

Page 20 FORCE COMPUTERS

and tested and you will receive the ok prompt. If the PROM or the on-board memory is not
working, you receive one of a number of possible error messages indicating the problem.

To test the clock function, type:

The system responds by incrementing a number once a second. Press any key to stop the test.

To monitor the network connection, type:

The system monitors the network traffic, displaying “.” each time it receives a valid packet and
displaying “X” each time it receives a packet with an error that can be detected by the network
hardware interface.

ok watch-clock
Watching the ‘seconds’ register of the real time clock chip.
It should be ‘ticking’ once a second.
Type any key to stop.
22
ok

ok watch-net
Using AUI Ethernet Interface
Lance register test -- succeeded.
Internal loopback test -- succeeded.
External loopback test -- succeeded.
Looking for Ethernet packets.
‘.’ is a good packet. ‘X’ is a bad packet.
Type any key to stop.

...........X...........................X..............

ok

FORCE COMPUTERS Page 21

SPARC/CPU-5TE Installation Guide

1.5.4 Display System Information

The Forth Monitor provides several commands to display system information. These
commands let you display the system banner, the Ethernet address for the Ethernet controller,
the contents of the ID PROM, and the version number of the OpenBoot firmware.

The ID PROM contains information specific to each individual machine, including the serial
number, date of manufacture, and assigned Ethernet address.

The following table lists these commands.

Table 5: Commands to Display System Information

Command Description

banner Display system banner.
show-sbus Display list of installed and probed SBus

devices.
.enet-addr Display current Ethernet address.
.idprom Display ID PROM contents, formatted.
.traps Display a list of SPARC trap types.
.version Display version and date of the Boot PROM.
show-devs Display a list of all device tree nodes.
devalias Display a list of all device aliases.

Installation Guide SPARC/CPU-5TE

Page 22 FORCE COMPUTERS

1.5.5 Reset the System

If your system needs to be reset, you either press the reset button on the front panel or, if you
are in the Forth Monitor, type reset on the command line.

The system immediately begins executing the Power On SelfTest (POST) and initialization
procedures. Once the POST finishes, the system either boots automatically or enters the Forth
Monitor, just as it would have done after a power on cycle.

1.5.6 OpenBoot Help

The Forth Monitor contains an on-line help. To get this, type:

A list of all available help categories is displayed. These categories may also contain
subcategories. To get help for special forth words or subcategories just type help [name]. An
example is shown on the next page.

ok reset

ok help
Enter ‘help command-name’ or ‘help category-name’ for more help
(Use ONLY the first word of a category description)
Examples: help select -or- help line
Main categories are:
File download and boot
Resume execution
Diag (diagnostic routines)
Power on reset
>-prompt
Floppy eject
Select I/O devices
Ethernet
System and boot configuration parameters
Line editor
Tools (memory, numbers, new commands, loops)
Assembly debugging (breakpoints, registers, disassembly, symbolic)
Sync (synchronize disk data)
Nvramrc (making new commands permanent)
ok

FORCE COMPUTERS Page 23

SPARC/CPU-5TE Installation Guide

An example of how to get help for special forth words or subcategories.

The on-line help shows you the forth word, the parameter stack before and after execution of
the forth word ( before -- after), and a short description.

The on-line help of the Forth Monitor is located in the boot PROM, so there is not an on-line
help for all forth words.

ok help tools
Category: Tools (memory, numbers, new commands, loops)
Sub-categories are:
Memory access
Arithmetic
Radix (number base conversions)
Numeric output
Defining new commands
Repeated loops
ok
ok help memory
Category: Memory access
dump ( addr length -- ) display memory at addr for length bytes
fill ( addr length byte -- ) fill memory starting at addr with byte
move ( src dest length -- ) copy length bytes from src to dest address
map? ( vaddr -- ) show memory map information for the virtual address
l? ( addr -- ) display the 32-bit number from location addr
w? ( addr -- ) display the 16-bit number from location addr
c? ( addr -- ) display the 8-bit number from location addr
l@ ( addr -- n ) place on the stack the 32-bit data at location addr
w@ ( addr -- n ) place on the stack the 16-bit data at location addr
c@ ( addr -- n ) place on the stack the 8-bit data at location addr
l! ( n addr -- ) store the 32-bit value n at location addr
w! ( n addr -- ) store the 16-bit value n at location addr
c! ( n addr -- ) store the 8-bit value n at location addr
ok

Installation Guide SPARC/CPU-5TE

Page 24 FORCE COMPUTERS

1.6 Front Panel
FIGURE 5. Diagram of the Front Panel

RESET

ABORT

K
B
D

D

I

A
G

M
O
D
E

RUN BM
SYS

S

C

S
I

S
E
R

I
A
L

A
+

B

SPARC
CPU-5TE

UL

ETH-TP 2

ETH-TP 1

FORCE COMPUTERS Page 25

SPARC/CPU-5TE Installation Guide

1.6.1 Features of the Front Panel

• Reset and Abort key

• Status LEDs on the front panel

• Hex display on the front panel

These features are described in detail in Section 3 of the SPARC CPU-5TE Technical
Reference Manual.

1.7. Front Panel Layout

Device Function Name

Switch Reset RESET
Switch Abort ABORT
HEX. Display Diagnostic DIAG
Rotary Switch Diagnostic MODE
LED/LED Run-Halt

VME BM-SYSFAIL

RUN
BM

LED/LED Slavio SYS LED

User LED

SYS

UL
Mini DIN Connector Keyboard/Mouse KBD
Serial Connector Serial Interface A and B SERIAL A+B
SCSI Connector SCSI Interface SCSI
RJ45 Connector Ethernet Interface ETH 2
RJ45 Connector Ethernet Interface ETH 1

Installation Guide SPARC/CPU-5TE

Page 26 FORCE COMPUTERS

1.8 SPARC CPU-5TE Connectors

The connectors on the SPARC CPU-5TE are listed in the following table.

The following pages show the pinouts of the connectors.

Table 6: SPARC CPU-5TE Connectors

Function Location Type

Manufacturer Part

Number

Ethernet # 1
(Twisted Pair)

Front Panel RJ-45 AMP 555131-1

Ethernet # 2
(Twisted Pair)

Front Panel RJ-45 AMP 555131-1

Serial Port A + B Front Panel 26-pin Fine Pitch AMP 749831-2

SCSI Front Panel 50-pin Fine Pitch AMP 749831-5

Keyboard/Mouse Front Panel 8-pin Mini DIN AMP 749232-1

SBus Slot2
(SBus Slave Select 1)

P3 96-pin SMD FUJITSU FCN-234J096-G/V

SBus Slot3
(SBus Slave Select 2)

P4 96-pin SMD FUJITSU FCN-234J096-G/V

VMEbus P1 P1 96-pin VGA Various

VMEbus P2 P2 96-pin VGA Various

FORCE COMPUTERS Page 27

SPARC/CPU-5TE Installation Guide

1.8.1 Twisted Pair Ethernet Connector Pinout

The following table shows the pinout of the twisted pair Ethernet connector. The pinout for
both of the connectors is identical.

FIGURE 6. Twisted Pair Ethernet

Table 7: Twisted Pair Ethernet Connector Pinout

Pin

Number

Signal

Name

1 TPE0

2 TPE1

3 TPE2

4 N.C.

5 N.C.

6 TPE3

7 N.C.

8 N.C.

12 34 5678

RJ45

Installation Guide SPARC/CPU-5TE

Page 28 FORCE COMPUTERS

1.8.2 Serial Port A and B Connector Pinout

The following table is a pinout of the serial port connector. The figure on the next page shows
the serial port connector and location of the pin numbers.

Table 8: Serial Port A and B Connector Pinout

Pin Signal Direction Port Description

1 none none A Not connected

2 TD output A Transmit Data

3 RD input A Receive Data

4 RTS output A Request To Send

5 CTS input A Clear To Send

6 DSR input A Data Set Ready

7 SG none A Signal Ground

8 DCD input A Data Carrier Detect

9 none none Not connected

10 none none Not connected

11 SDTR output B Secondary Data Terminal Ready

12 SDCD input B Secondary Data Carrier Detect

13 SCTS input B Secondary Clear To Send

14 STD output B Secondary Transmit Data

15 TC input A Transmit Clock: DCE Source

16 SRD input B Secondary Receive Data

17 RC input A Receive Clock

18 STC input B Secondary Transmit Clock

19 SRTS output B Secondary Request To Send

20 DTR output A Data Terminal Ready

21 SDSR input B Secondary Data Terminal Ready

22 SRC input B Secondary Receive Clock

23 SSG none B Secondary Signal Ground

24 TC output A Transmit Clock: DTE Source

25 STC output B Transmit Clock: DTE Source

26 none none Not connected

FORCE COMPUTERS Page 29

SPARC/CPU-5TE Installation Guide

FIGURE 7. Serial Ports A and B Connector Pinout

113

1426

Installation Guide SPARC/CPU-5TE

Page 30 FORCE COMPUTERS

1.8.3 Keyboard/Mouse Connector Pinout

The keyboard and mouse port is available on the front panel via a Mini DIN connector.

FIGURE 8. Keyboard/Mouse Connector

Table 9: Keyboard/Mouse Connector Pinout

Pin Function

1

GND

2

GND

3

+5VDC

4

Mouse In

5

Keyboard Out

6

Keyboard In

7

Mouse Out

8

+5VDC

87 6

543

21

FORCE COMPUTERS Page 31

SPARC/CPU-5TE Installation Guide

1.8.4 VME P2 Connector Pinout

The SCSI#2 interface is an alternative to the FDC interface. The signals for rows Z and D are
only available on the 5-row P2 Connector.

Table 10: VME P2 Connector Pinout

Pin # Signal Row Z Signal Row A

Signal Row C
(FDC signals)

Signal Row C

(SCSI#2 signals)

Signal Row D

1 CENTR DS SCSI#1-D0 FPY DENSEL SCSI#2-D0 NC
2 GND SCSI#1-D1 FPY DENSENS SCSI#2-D1 NC
3 CENTR D0 SCSI#1-D2 N.C. SCSI#2-D2 SCSI#2-D0
4 GND SCSI#1-D3 FPY INDEX SCSI#2-D3 SCSI#2-D1
5 CENTR D1 SCSI#1-D4 FPY DRVSEL SCSI#2-D4 SCSI#2-D2
6 GND SCSI#1-D5 N.C. SCSI#2-D5 SCSI#2-D3
7 CENTR D2 SCSI#1-D6 N.C. SCSI#2-D6 SCSI#2-D4
8 GND SCSI#1-D7 FPY MOTEN SCSI#2-D7 SCSI#2-D5

9 CENTR D3 SCSI#1-DP FPY DIR SCSI#2-DP SCSI#2-D6
10 GND GND FPY STEP SCSI#2-ATTN SCSI#2-D7
11 CENTR D4 GND FPY WRDATA SCSI#2-BSY SCSI#2-DP
12 GND GND FPY WRGATE SCSI#2-ACK TERMPWR#2
13 CENTR D5 TERMPWR#1 FPY TRACK0 SCSI#2-RST SCSI#2-ATTN
14 GND GND FPY WRPROT SCSI#2-MSG SCSI#2-BSY
15 CENTR D6 GND FPY RDDATA SCSI#2-SEL SCSI#2-ACK
16 GND SCSI#1-ATTN FPY HEADSEL SCSI#2-CD SCSI#2-RST
17 CENTR D7 GND FPY DISKCHG SCSI#2-REQ SCSI#2-MSG
18 GND SCSI#1-BSY FPY EJECT SCSI#2-IO SCSI#2-SEL
19 CENTR ACK SCSI#1-ACK +12VDC ETH#1_POW SCSI#2-CD
20 GND SCSI#1-RST GND TERMPWR#2 SCSI#2-REQ
21 CENTR BSY SCSI#1-MSG GND GND SCSI#2-IO
22 GND SCSI#1-SEL ETH#1_REC+ ETH#1_REC+ CENTR

SLCTIN
23 CENTR PE SCSI#1-CD ETH#1_REC- ETH#1_REC- MOUSEOUT
24 GND SCSI#1-REQ ETH#1_TRA+ ETH#1_TRA+ ETH#2_POW
25 CENTR AF SCSI#1-IO ETH#1_TRA- ETH#1_TRA- ETH#2_REC+
26 GND MOUSEIN ETH#1_COL+ ETH#1_COL+ ETH#2_REC­27 CENTR INIT TXD_KBD ETH#1_COL- ETH#1_COL- ETH#2_TRA+
28 GND RXD_KBD GND GND ETH#2_TRA­29 CENTR ERR TXD_A TXD_B TXD_B ETH#2_COL+
30 GND RXD_A RXD_B RXD_B ETH#2_COL­31 CENTR SLCT DTR_A DTR_B DTR_B NC
32 GND DCD_A DCD_B DCD_B NC

Installation Guide SPARC/CPU-5TE

Page 32 FORCE COMPUTERS

1.8.5 The IOBP-10 Connectors

The IOBP-10 is an I/O back panel on VMEbus P2 with flat cable connectors for SCSI, serial
I/O, Centronics/floppy interface, and a micro D-Sub connector for the Ethernet#1 interface.
The Centronics interface on the IOBP-10 is not supported by the CPU-5TE. This back panel
can be plugged into the VMEbus P2 connector. The diagram below shows all the connectors.
The IOBP-10 back panel and the IOBP-DS are especially designed for the SPARC CPU-5TE.
Do not use any other I/O back panels on the SPARC CPU-5TE, for example, the IOBP-1.

1.8.5.1 Jumper Setting for IOBP-10

Please make sure that the configuration switch matrix is plugged into sockets B2 / B3 and
B10 / B9, that is, the configuration for floppy interface on P2. This is described in chapter
“Floppy Interface or SCSI#2 Availability on P2” on page 12.

FIGURE 9. The IOBP-10

The pinouts of the connectors (P1) ... (P6) are shown in the following tables.

CAUTION

This IOBP-10 back panel and the IOBP-DS are especially designed for the SPARC CPU-5TE.
Do not use any other I/O back panels on the SPARC CPU-5TE, for example, the IOBP-1.

1

32

1

2

13

14

1

2

33 34

12

39 40

1

2

49 50

8

15

1

9

ABC

FORCE COMPUTERS Page 33

SPARC/CPU-5TE Installation Guide

Table 11: IOBP-10 P1 Pinout

ROW A Signal ROW B Signal ROW C Signal

1 SCSI Data 0 1 N.C. 1 FPY DENSEL

2 SCSI Data 1 2 GND 2 FPY DENSENS

3 SCSI Data 2 3 N.C. 3 N.C.

4 SCSI Data 3 4 N.C. 4 FPY INDEX

5 SCSI Data 4 5 N.C. 5 FPY DRVSEL

6 SCSI Data 5 6 N.C. 6 N.C.

7 SCSI Data 6 7 N.C. 7 N.C.

8 SCSI Data 7 8 N.C. 8 FPY MOTEN

9 SCSI DP 9 N.C. 9 FPY DIR

10 GND 10 N.C. 10 FPY STEP

11 GND 11 N.C. 11 FPY WRDATA

12 GND 12 GND 12 FPY WRGATE

13 TERMPWR 13 N.C. 13 FPY TRACK0

14 GND 14 N.C. 14 FPY WRPROT

15 GND 15 N.C. 15 FPY RDDATA

16 SCSI ATN 16 N.C. 16 FPY HEADSEL

17 GND 17 N.C. 17 FPY DISKCHG

18 SCSI BSY 18 N.C. 18 FPY EJECT

19 SCSI ACK 19 N.C. 19 +12VDC

2

20 SCSI RST 20 N.C. 20 GND

21 SCSI MSG 21 N.C. 21 GND

22 SCSI SEL 22 GND 22 ETH REC+

2

23 SCSI CD 23 N.C. 23 ETH REC-

2

24 SCSI REQ 24 N.C. 24 ETH TRA+

2

25 SCSI IO 25 N.C. 25 ETH TRA-

2

26 RESERVED 26 N.C. 26 ETH COL+

2

27 RESERVED 27 N.C. 27 ETH COL-

2

28 RESERVED 28 N.C. 28 GND

29 TxD Port A 29 N.C. 29 TxD Port B

30 RxD Port A 30 N.C. 30 RxD Port B

31 RTS Port A 31 GND 31 RTS Port B

32 CTS Port A 32 N.C. 32 CTS Port B

Installation Guide SPARC/CPU-5TE

Page 34 FORCE COMPUTERS

Table 12: IOBP-10 P2 Pinout (SCSI #1)

Pin
No.

Signal

Pin
No.

Signal

1 GND 2 SCSI #1 Data 0
3 GND 4 SCSI #1 Data 1
5 GND 6 SCSI #1 Data 2
7 GND 8 SCSI #1 Data 3

9 GND 10 SCSI #1 Data 4
11 GND 12 SCSI #1 Data 5
13 GND 14 SCSI #1 Data 6
15 GND 16 SCSI #1 Data 7
17 GND 18 SCSI #1 DP
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 N.C. 26 TERMPWR #1
27 GND 28 GND
29 GND 30 GND
31 GND 32 SCSI #1 ATN
33 GND 34 GND
35 GND 36 SCSI #1 BSY
37 GND 38 SCSI #1 ACK
39 GND 40 SCSI #1 RST
41 GND 42 SCSI #1 MSG
43 GND 44 SCSI #1 SEL
45 GND 46 SCSI #1 CD
47 GND 48 SCSI #1 REQ
49 GND 50 SCSI #1 IO

FORCE COMPUTERS Page 35

SPARC/CPU-5TE Installation Guide

Table 13: IOBP-10 P3 Pinout (Floppy)

Pin
No.

Signal

Pin
No.

Signal

1 FPY EJECT 2 FPY DENSEL
3 GND 4 FPY DENSENS
5 GND 6 N.C.
7 GND 8 FPY INDEX

9 GND 10 FPY DRVSEL
11 GND 12 N.C.
13 GND 14 N.C.
15 GND 16 FPY MOTEN
17 GND 18 FPY DIR
19 GND 20 FPY STEP
21 GND 22 FPY WRDATA
23 GND 24 FPY WRGATE
25 GND 26 FPY TRACK0
27 N.C. 28 FPY WRPROT
29 GND 30 FPY RDDATA
31 GND 32 FPY HEADSEL
33 GND 34 FPY DISKCHG

Installation Guide SPARC/CPU-5TE

Page 36 FORCE COMPUTERS

Table 14: IOBP-10 P5 Pinout (Serial)

Pin
No.

Signal

Pin
No.

Signal

1 GND 2 RESERVED
3 RESERVED 4 RESERVED
5 TxD Port B 6 TxD Port A
7 RxD Port B 8 RxD Port A

9 RTS Port B 10 RTS Port A
11 CTS Port B 12 CTS Port A
13 GND 14 GND

Table 15: IOBP-10 Pinout (Ethernet)

Pin Function

1

GND

2

Collision+

3

Transmit Data+

4

GND

5

Receive Data+

6

GND

7

N.C.

8

N.C.

9

Collision-

10

Transmit Data-

11

GND

12

Receive Data-

13

+12VDC

14

GND

15

N.C.

FORCE COMPUTERS Page 37

SPARC/CPU-5TE Installation Guide

1.9 IOBP-DS

The IOBP-DS is an I/O back panel on VMEbus P2 with flat cable connectors for SCSI #1,
SCSI #2, serial I/O, keyboard/mouse and a micro D-Sub connector for the Ethernet #1
interface (AUI). This back panel can be plugged into the VMEbus P2 connector. The diagram
below shows all the connectors. The IOBP-I/O back panel and the IOBP-DS are especially
designed for the SPARC CPU-5TE. Do not use any other I/O back panels on the SPARC CPU­5TE, for example, the IOBP-1.

1.9.1 Jumper Setting for IOBP-DS

Please make sure that the configuration switch matrix is plugged into sockets B3/B1 and B9/
B8, that is, the configuration for dual SCSI interface on P2 (3-row connector). This is
described in chapter “Floppy Interface or SCSI#2 Availability on P2” on page 12.

FIGURE 10. The IOBP-DS

The pinouts of the connectors are shown in the following tables.

CAUTION

This IOBP-10 back panel and the IOBP-DS are especially designed for the SPARC CPU-5TE.
Do not use any other I/O back panels on the SPARC CPU-5TE, for example, the IOBP-1.

J2

J1

J4

J3

Ethernet

Keyboard

SCSI 2

SCSI 1

Serial

2

2

1

1

2

1

14

13

P2

J5

F1

C1

C2

R1
R2

C

B

A

1

A32

Installation Guide SPARC/CPU-5TE

Page 38 FORCE COMPUTERS

1.9.2 IOBP-DS P2 Connector Pinout

Pin

#

Signal

Row A

Signal

Row B

Signal Row C

(SCSI#2

signals)

1 SCSI#1-D0 5V SCSI#2-D0
2 SCSI#1-D1 GND SCSI#2-D1
3 SCSI#1-D2 N.C. SCSI#2-D2
4 SCSI#1-D3 N.C. SCSI#2-D3
5 SCSI#1-D4 N.C. SCSI#2-D4
6 SCSI#1-D5 N.C. SCSI#2-D5
7 SCSI#1-D6 N.C. SCSI#2-D6
8 SCSI#1-D7 N.C. SCSI#2-D7

9 SCSI#1-DP N.C. SCSI#2-DP
10 GND N.C. SCSI#2-ATTN
11 GND N.C. SCSI#2-BSY
12 GND GND SCSI#2-ACK
13 TERMPWR#1 5V SCSI#2-RST
14 GND N.C. SCSI#2-MSG
15 GND N.C. SCSI#2-SEL
16 SCSI#1-ATTN N.C. SCSI#2-CD
17 GND N.C. SCSI#2-REQ
18 SCSI#1-BSY N.C. SCSI#2-IO
19 SCSI#1-ACK N.C. ETH#1_POW
20 SCSI#1-RST N.C. TERMPWR#2
21 SCSI#1-MSG N.C. GND
22 SCSI#1-SEL GND ETH#1_REC+
23 SCSI#1-CD N.C. ETH#1_REC­24 SCSI#1-REQ N.C. ETH#1_TRA+
25 SCSI#1-IO N.C. ETH#1_TRA­26 MOUSEIN N.C. ETH#1_COL+
27 TXD_KBD N.C. ETH#1_COL­28 RXD_KBD N.C. GND
29 TXD_A N.C. TXD_B
30 RXD_A N.C. RXD_B
31 DTR_A GND DTR_B
32 DCD_A 5V DCD_B

FORCE COMPUTERS Page 39

SPARC/CPU-5TE Installation Guide

Table 16: IOBP-DS J1 Pinout (SCSI #1)

Pin
No.

Signal

Pin
No.

Signal

1 GND 2 SCSI #1 Data 0
3 GND 4 SCSI #1 Data 1
5 GND 6 SCSI #1 Data 2
7 GND 8 SCSI #1 Data 3

9 GND 10 SCSI #1 Data 4
11 GND 12 SCSI #1 Data 5
13 GND 14 SCSI #1 Data 6
15 GND 16 SCSI #1 Data 7
17 GND 18 SCSI #1 DP
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 N.C. 26 TERMPWR #1
27 GND 28 GND
29 GND 30 GND
31 GND 32 SCSI #1 ATN
33 GND 34 GND
35 GND 36 SCSI #1 BSY
37 GND 38 SCSI #1 ACK
39 GND 40 SCSI #1 RST
41 GND 42 SCSI #1 MSG
43 GND 44 SCSI #1 SEL
45 GND 46 SCSI #1 CD
47 GND 48 SCSI #1 REQ
49 GND 50 SCSI #1 IO

Installation Guide SPARC/CPU-5TE

Page 40 FORCE COMPUTERS

Table 17: IOBP-DS J2 Pinout (SCSI #2)

Pin
No.

Signal

Pin
No.

Signal

1 GND 2 SCSI #2 Data 0

3 GND 4 SCSI #2 Data 1

5 GND 6 SCSI #2 Data 2

7 GND 8 SCSI #2 Data 3

9 GND 10 SCSI #2 Data 4
11 GND 12 SCSI #2 Data 5
13 GND 14 SCSI #2 Data 6
15 GND 16 SCSI #2 Data 7
17 GND 18 SCSI #2 DP
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 N.C. 26 TERMPWR #2
27 GND 28 GND
29 GND 30 GND
31 GND 32 SCSI #2 ATN
33 GND 34 GND
35 GND 36 SCSI #2 BSY
37 GND 38 SCSI #2 ACK
39 GND 40 SCSI #2 RST
41 GND 42 SCSI #2 MSG
43 GND 44 SCSI #2 SEL
45 GND 46 SCSI #2 CD
47 GND 48 SCSI #2 REQ
49 GND 50 SCSI #2 IO

FORCE COMPUTERS Page 41

SPARC/CPU-5TE Installation Guide

Table 18: IOBP-DS J3 Pinout (Ethernet #1 - AUI)

Pin Function

1

GND

2

Collision+

3

Transmit Data+

4

GND

5

Receive Data+

6

GND

7

N.C.

8

GND

9

Collision-

10

Transmit Data-

11

GND

12

Receive Data-

13

+12VDC

14

GND

15

N.C.

Installation Guide SPARC/CPU-5TE

Page 42 FORCE COMPUTERS

Table 19: IOBP-DS J4 Pinout (Serial A and B)

Pin
No.

Signal

Pin

No.

Signal

1 RESERVED 2 RESERVED
3 RESERVED 4 RESERVED
5 TxD Port B 6 TxD Port A
7 RxD Port B 8 RxD Port A

9 RTS Port B 10 RTS Port A
11 CTS Port B 12 CTS Port A
13 GND 14 GND

Table 20: IOBP-DS J5 Pinout (Keyboard/Mouse)

Pin Function

1

GND

2

GND

3

+5VDC

4

Mouse In

5

Keyboard Out

6

Keyboard In

7

N.C.

8

+5VDC

FORCE COMPUTERS Page 43

SPARC/CPU-5TE Installation Guide

1.10 How to Determine the Ethernet Address and Host ID

In order to see the Ethernet address and host ID, type the following command at the prompt:

The information below explains how the SPARC/CPU-5TE Ethernet address and the host ID
are determined.

The 48-bit (6-byte) Ethernet address

The 32-bit (4-byte) host ID

ok banner

47 40 39 32 31 24 23 16 15 8 7 0

00 80 42

Byte 543210

B0XXXX

These 3 bytes always remain

00

16

:8016:42

16

Specific Machine:

0B

16

for SPARC/

CPU-5TE

These 2 bytes are
consecutively
numbered.

32 25 24 15 7

80 YY YY

0

8

16

Y

Y

Byte

3

2

1

0

These 8 bits identify
the architecture type.

The least significant 24 bits contain the
sum of 8B.7000

16

(machine specific
base value) and the rightmost 2 bytes of
the board’s Ethernet address.

Installation Guide SPARC/CPU-5TE

Page 44 FORCE COMPUTERS

1.11 History of the Manual

Below is a description of the publication history of this SPARC/CPU-5TE Installation Guide.

Table 21: History of Manual

Edition No. Description Date of Last Change

1 First Print June 1995
2 Row C of VME P2 Connec-

tor Pinout has been cor­rected.

September 1995

3 Corrected IOBP-DS pinout

description
The section “How to Deter­mine the Ethernet Address
and Host ID” on page 43
has been updated.

October 1996

4 Diagrams of switch in

Table 1, “Default Switch
Settings,” on page 4 have
been corrected.

December 1997

5 Table 10, “VME P2 Con-

nector Pinout,” on page 31
has been corrected.

February 1999