Flaircomm Technologies BTM403 User Manual
FLC-BTM403 Series User Manual
FLC-BTM403 Series
User Manual
Document Type: Bluetooth Module User Manual
Document Number: FLC-BTM403-DS
Document Version: V1.0
Release Date: April 13, 2011
Copyright 2010 ~ 2011 by Flaircomm Technologies Inc., All Right Reserved
Without written permission from Flaircomm Technologies Inc., reproduction, transfer, distribution or
storage of part or all of the contents in this document in any form is prohibited
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FLC-BTM403 Series User Manual
FCC Regulations:
zThis device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This
device may not cause harmful interference, and (2) this device must accept any interference received, including
interference that may cause undesired operation.
zThis device has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the
FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiated radio frequency energy and, if not installed and used in
accordance with the instructions, may cause harmful interference to radio communications. However, there is no
guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try
to correct the interference by one or more of the following measures:
-Reorient or relocate the receiving antenna.
-Increase the separation between the equipment and receiver.
-Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
-Consult the dealer or an experienced radio/TV technician for help.
Changes or modifications not expressly approved by the party responsible for compliance could void the user‘s authority
to operate the equipment.
4RF Exposure Information
This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation
and operating configurations of this transmitter, including any applicable source-based time-averaging duty factor,
antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of §2.1091.
The end user has no manual instructions to remove or install the device and a separate approval is required for all other
operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations.
Maximum antenna gain allowed for use with this device is 0.5 dBi.
When the module is installed in the host device, the FCC ID label must be visible through a window on the final device
or it must be visible when an access panel, door or cover is easily re-moved. If not, a second label must be placed on the
outside of the final device that contains the following text: “Contains FCC ID: TQ6BTM403”.
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CONTENT
1. INTRODUCTION.................................................................................................................................5
1.1 NAMING DECLARATION .......................................................................................................................5
1.2 FEATURES ............................................................................................................................................5
1.3 APPLICATIONS ..................................................................................................................................... 6
2. GENERAL SPECIFICATION ............................................................................................................7
3. PIN DEFINITION.................................................................................................................................8
3.1 PIN CONFIGURATION............................................................................................................................8
3.2 PIN DEFINITION....................................................................................................................................8
4. PHYSICAL INTERFACES ...............................................................................................................10
4.1 POWER SUPPLY ..................................................................................................................................10
4.2 RESET ................................................................................................................................................ 10
4.3 DIGITAL AUDIO INTERFACES ............................................................................................................. 11
4.3.1 PCM Interface Master/Slave .....................................................................................................11
4.3.2 Long Frame Sync ......................................................................................................................12
4.3.3 Short Frame Sync ...................................................................................................................... 13
4.3.4 Multi-slot Operation .................................................................................................................. 13
4.3.5 GCI Interface............................................................................................................................. 14
4.3.6 Slots and Sample Formats .........................................................................................................14
4.3.7 Additional Features ...................................................................................................................15
4.3.8 PCM Timing Information..........................................................................................................15
4.4 RF INTERFACE ...................................................................................................................................19
4.5 GENERAL PURPOSE ANALOGUE IO ....................................................................................................19
4.6 GENERAL PURPOSE DIGITAL IO......................................................................................................... 19
4.7 SERIAL INTERFACES ........................................................................................................................... 19
4.7.1 UART........................................................................................................................................ 19
4.7.2 USB........................................................................................................................................... 20
4.7.3 I2C .............................................................................................................................................22
4.7.4 SPI............................................................................................................................................. 22
5. ELECTRICAL CHARACTERISTIC...............................................................................................24
5.1 ABSOLUTE MAXIMUM RATING ..........................................................................................................24
5.2 RECOMMEND OPERATION CONDITIONS ..............................................................................................24
5.3 POWER CONSUMPTIONS...................................................................................................................... 24
5.4 INPUT/OUTPUT TERMINAL CHARACTERISTICS ................................................................................... 24
5.4.1 Digital Terminals....................................................................................................................... 24
5.4.2 USB........................................................................................................................................... 25
6. REFERENCE DESIGN......................................................................................................................26
7. MECHANICAL CHARACTERISTIC .............................................................................................27
8. RECOMMENDED PCB LAYOUT AND MOUNTING PATTERN..............................................28
9. RECOMMENDED REFLOW PROFILE........................................................................................29
10. ORDERING INFORMATION......................................................................................................30
10.1 PRODUCT PACKAGING INFORMATION ................................................................................................30
10.2 ORDERING INFORMATION................................................................................................................... 31
10.2.1 Product Revision .......................................................................................................................31
10.2.2 Shipping Package ......................................................................................................................31
10.2.3 Product Package ........................................................................................................................31
10.2.4 Product Grade............................................................................................................................31
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TABLE AND FIGURE
Table 1: Naming Declaration.......................................................................................................................... 5
Table 2: General Specification........................................................................................................................ 7
Table 3: Pin Definition.................................................................................................................................... 9
Table 4: Pin Status on Reset..........................................................................................................................11
Table 5: PCM Master Timing .......................................................................................................................16
Table 6: PCM Slave Timing..........................................................................................................................18
Table 7: Possible UART Settings..................................................................................................................20
Table 8: USB Interface Component Values .................................................................................................. 21
Table 9: Absolute Maximum Rating Recommended Operating Conditions................................................. 24
Table 10: Recommended Operating Conditions ........................................................................................... 24
Table 11: Power consumptions ..................................................................................................................... 24
Table 12: Digital Terminal............................................................................................................................ 25
Table 13: USB Terminal ...............................................................................................................................25
Table 14: Product Revision...........................................................................................................................31
Table 15: Shipping Package.......................................................................................................................... 31
Table 16: Product Package............................................................................................................................ 31
Table 17: Product Grade ...............................................................................................................................32
Figure 1: Pin Configuration.............................................................................................................................8
Figure 2: Configured PCM as a Master.........................................................................................................12
Figure 3: Configured PCM as a Slave........................................................................................................... 12
Figure 4: Long Frame Sync (Shown with 8-bit Companded Sample) ..........................................................13
Figure 5: Short Frame Sync (Shown with 16-bit Sample) ............................................................................13
Figure 6: Multi-Slot Operation with Two Slots and 8-bit Companded Samples........................................... 14
Figure 7: GCI Interface .................................................................................................................................14
Figure 8: 16-Bit Slot Length and Sample Formats........................................................................................ 15
Figure 9: PCM Master Timing Long Frame Sync.........................................................................................17
Figure 10: PCM Master Timing Short Frame Sync ......................................................................................17
Figure 11: PCM Slave Timing Long Frame Sync......................................................................................... 18
Figure 12: PCM Master Timing Short Frame Sync ......................................................................................19
Figure 13: USB Connections for Self-Powered Mode ..................................................................................21
Figure 14: USB Connections for Bus-Powered Mode ..................................................................................22
Figure 15: Example EEPROM Connection with I2C Interface ..................................................................... 22
Figure 16: Design SPI for In-System Programming and Debug ...................................................................23
Figure 17: Reference Design......................................................................................................................... 26
Figure 18: Mechanical Characteristic............................................................................................................27
Figure 19: Leave 20mm Clearance Space from the Module chip Antenna................................................... 28
Figure 20: Recommended Reflow Profile..................................................................................................... 29
Figure 21: Product Packaging Information ...................................................................................................31
Figure 22: Ordering Information................................................................................................................... 31
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FLC-BTM403 Series User Manual
1. Introduction
FLC-BTM403/FLC-BTMDC748 is a small form factor and highly economic Bluetooth radio
module(class 1 or class 2) that allows OEM to add wireless capability to their products. The module
supports multiple interfaces that make it simple to design into fully certified embedded Bluetooth
solutions.
With FLC’s AT#™ programming interfaces, designers can easily customize their applications to
support different Bluetooth profiles, such as SPP, DUN, HDP, and etc. class1 module supports
Bluetooth® Enhanced Data Rate (EDR) and delivers up to 3 Mbps data rate for distances up to 300
meters with its integrated chip antenna, class 2 module supports 3Mbps data rate Transmission for
distances up to 10 meters with its integrated chip antenna.
The module is an appropriate product for designers who want to add wireless capability to their
products.
Note: According to the software divided into class1 and class2
1.1 Naming Declaration
New Naming Old Naming
FLC-BTM403A FLC-BTMDC748A(class1)
FLC-BTM403B FLC-BTMDC748B(class1)
FLC-BTM403C FLC-BTMDC748C(class2)
Table 1: Naming Declaration
1.2 Features
z Bluetooth v2.1+EDR
z UART and USB programming and data interfaces
z PCM digital audio interfaces
z 8MB on board flash
z Small form factor
z SMT pads for easy and reliable PCB mounting
z BQB/FCC/CE Certified
z RoHS compliant
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FLC-BTM403 Series User Manual
1.3 Applications
z Cable replacement
z Bar code and RFID scanners
z Measurement and monitoring systems
z Industrial sensors and controls
z Medical devices
z Industrial PCs and laptops
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2. General Specification
Bluetooth Specification
Standard Bluetooth2.1+EDR
Profiles
Frequency Band 2.402G ~ 2.480G
Maximum Data Rate 3Mbps
Antenna Multilayer Ceramic Antenna or UFL port
RF Input Impedance 50 ohms
Baseband Crystal OSC 16MHz
Interface UART, PIO, AIO, USB, SPI, PCM
Sensitivity -84dBm@0.1%BER
RF TX Power +13dBm(class1) +4dbm(class2)
detailed profiles depends on the firmware
SPP, DUN, HDP,
Power
Supply Voltage 3 ~ 3.6V DC
Working Current Depends on profiles, 22mA typical
Standby Current(Connected) <2mA
Operating Environment
Temperature -20ºC to +55ºC
Humidity 10%~90% Non-Condensing
Certifications
Environmental
BQB/FCC/CE
RoHS Compliant
Dimension and Weight
Dimension 35.30mm×14.00mm×2.50mm
Weight 2.00g
Table 2: General Specification
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3. Pin Definition
3.1 Pin Configuration
FLC-BTM403 Series User Manual
Figure 1: Pin Configuration
3.2 Pin Definition
Pin Symbol I/O Type Description
1 GND Ground Ground
2 VDD 3V3 power input 3V3 power input
Bi-directional with
3 PIO2
4 PIO3
5 UART_RTS
6 UART_RX
7 PCM_OUT Bi-directional Synchronous Data Output
8 USB_DP Bi-directional
programmable strength internal
pull-up/down
Bi-directional with
programmable strength internal
pull-up/down
CMOS output, tri-state, with
weak internal pull-up
CMOS input with weak internal
pull-down
USB data plus with selectable internal 1.5Kohm
Programmable input/output line
Programmable input/output line
UART request to send active low
UART data input
pull-up resistor
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9 USB_DN Bi-directional USB data minus
10 UART_CTS
CMOS output, tri-state, with
weak internal pull-down
UART clear to send active low
11 PCM_IN CMOS Input Synchronous Data Input
12 PCM_CLK Bi-directional Synchronous Data Clock
13 PCM_SYNC Bi-directional Synchronous Data Sync
14 GND Ground Ground
15 GND Ground Ground
16 VDD 3.3V power input 3.3V power input
17 RESET
CMOS input with weak internal
pull-down
Reset if high. Input debounced so must be high
for >5ms to cause a reset
Bi-directional with
18 PIO6
programmable strength internal
Programmable input/output line
pull-up/down
Bi-directional with
19 PIO7
programmable strength internal
Programmable input/output line
pull-up/down
Bi-directional with
20 PIO4
programmable strength internal
Programmable input/output line
pull-up/down
21 SPI_CSB
CMOS input with weak internal
22 SPI_CLK
23 SPI_MISO
24 SPI_MOSI
pull-up
input with weak internal pull-
down
CMOS output, tri-state, with
weak internal pull-down
CMOS input, with weak
internal pull-down
Chip select for Synchronous Serial Interface
active low
Serial Peripheral Interface clock
Serial Peripheral Interface output
Serial Peripheral Interface input
Bi-directional with
25 PIO5
programmable strength internal
Programmable input/output line
pull-up/down
26 UART_TX
CMOS input with weak internal
pull-down
UART data output
27 AIO0 Bi-directional Programmable input/output line
28 GND Ground Ground
Table 3: Pin Definition
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4. Physical Interfaces
4.1 Power Supply
The transient response of the regulator is important. If the power rails of the module are supplied
from an external voltage source, the transient response of any regulator used should be 20μs or less.
It is essential that the power rail recovers quickly.
4.2 Reset
The module may be reset from several sources: RESET pin, power-on reset, a UART break
character or via a software configured watchdog timer.
The RESET pin is an active high reset and is internally filtered using the internal low frequency
clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESET being active. It
is recommended that RESET be applied for a period greater than 5ms.
The module has an internal reset circuitry, which keeps reset pin active until supply voltage has
reached stability in the start up. This ensures that supply for the flash memory inside the module will
reach stability before BC4 chip fetches instructions from it. Pull-up or pull-down
not be connected to the reset pin to ensure proper star up of
module
.
resistor
should
At reset the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state. The PIOs
have weak pull-downs.
Pin Name / Group Pin Status on Reset
USB_DP Input with PD
USB_DN Input with PD
UART_RX Input with PD
UART_CTS Input with PD
UART_TX Tri-state output with PU
UART_RTS Tri-state output with PU
SPI_MOSI Input with PD
SPI_CLK Input with PD
SPI_CSB Input with PU
SPI_MISO Tri-state output with PD
PCM_CLK Input with PD
PCM_SYNC Input with PD
PCM_IN Input with PD
PCM_OUT Tri-state with PD
RESETB Input with PU
PIOs Input with weak PD
AIOs Output, driving low
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