first international computer A550 Schematics

5

4

A550 MOTHER BOARD TITLE

1. TOP SHEET

21. HOST/PCI/ISA PULL UP

3

2

1

2. BLOCK DIAGRAM

D D

3. LAYOUT GUIDELINES

4. COPPERMINE(1/2)

5. COPPERMINE(2/2),VOL. REFERENCE

6. GEYSERVILLE

7. CPU VCORE GENERATOR

8. VCORE ID, THERMAL, FAN

9. CPU VIO, CPU 2.5V

C C

10. 443ZX NORTHBRIDGE-1

11. 443ZX NORTHBRIDGE-2

12. CLK GENERATOR,CLK BUFFER

13. SO_DIMM SLOT 0/1

14. VGA SAVAGE MX(1/2)

22. HDD, CDROM CNN.

23. CARDBUS CONTROLLER

24. CARDBUS POWER

25. CARDBUS CNN.

26. AUDIO MAESTRO-3

27. RESET CIRCUIT

28. M38867,K/B,PAD

29. FLASH ROM, I2C

30. SUPER I/O(869)

31. COM, PARALLEL PORT

32. FDD, LS120 CNN

33. MODEM/LAN CNN

34. PORTBAR CNN

35. CHARGE CTRL, 3/5VS PWR-MOS15. VGA SAVAGE MX(2/2)

16. VGA CORE(1.9V) POWER

B B

17. CRT & SVIDEO CNNs

18. LCD CNN

19. PIIX4E 1/2

36. PIC

37. DC_786(3/5V), 12V

38. CHARGER

39. DAUGHTER BOARD CNN.

20. PIIX4E 2/2

IDSEL
AD18
AD16
AD15

A A

AD17
AD21

CHIP
PIIX4(82371EB)
S3 SAVAGE MX N.C.
ESS1980
MODEM/LAN
OZ6833B

CHIPPCIINT
INTA
INTB
INTC
INTD

PCMCIA
LAN MODEM/

/ ESSVGA

USB

5

BUSMASTER

REQ0
REQ1
REQ2
REQ3
REQ4

REQA
REQB
REQC

4

CHIPREQ

PCMCIA

AUDIO ESS
MODEM/LAN
N.C.

CHIPREQ
N.C.
ESS
N.C.

DMA Channel

DMA0
DMA1
DMA2
DMA3
DMA4
DMA5
DMA6
DMA7

3

A550 BOADR STACK UP

LEVEL 1

LEVEL 2
LEVEL 3
LEVEL 4
LEVEL 5
LEVEL 6

LEVEL 7

LEVEL 8

IRQ Channel Desciption

IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7

IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15

FIR

(disable by default)

ECP
FLOPPY DISK
AUDIO
(Cascade)
Unused
Unused
Unused

Device

System timer
Keyboard
(Casacde)
LAN/MODEM
Serial port
AUDIO/VGA/USB
FLOPPY DISK
LPT
RTCIRQ8
ACPI
FIR

(Disable by default)

Cardbus
PS/2 mouse
FPU
HDD
CDROM(/LS-120)

(MODEM/LAN)

2

Signals

Ground
Signals
Signals; Ground

Vcc
Signals

Ground

Signals

(MODEM/LAN)

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

TOP SHEET 0.1

A3

Date: Sheet of

1

1 40Monday, November 22, 1999

5

10-19V

LCD TFT14.1"(15")

INVERTER

BACKLIGHT

D D

ON/OFF CTRL

LCD_CNN

CPU CORE

AGPX2 W/SB

GCL

CPU

COPPERMINE

THERMAL

NORTH

S3

SAVAGE/

EXT
MEMORT

C C

SVIDEO

MX

HDD_CNN

CDROM_CNN

LS120_CNN

AGPCLK

Master

Slove

443ZX

32.768KHZ

SOUTH

82371EB

4

CPU CORE
CPU IO

CPU_HCLK

DCLKO
DCLKRW

BX_HCLK

CD4052

CK100-M

PCICLK

PCMCIA

TI 1225

SERIRQ

3

CKBF-M

MD
MA
SMB

PCI BUS 33MHZ

MEM_CLK[3..0]

CARD BUS

AUDIO

ES1980

2

1

A550 BLOCK
DIAGRAM

SLOT0SLOT1

VPPA

TPS2206

MINI PCI

CNN

VCCA

VPPB
VCCBSERIAL I/F

PCMCIA
SLOT0

PCMCIA
SLOT1

AC97

BOARD TO BOARD

AC97
AMP

USB PORT0,1
EXT KB_CNN
LINE-IN JACK
MIC JACK
LINE-OUT JACK
DC-IN_CNN
VR
FIR

LED INDICATOR
POWERSW
E-MAIL SW
INTERNET SW

DC_IN

CRT

B B

ISA BUS

K/B 38867 37M869

PIC

RJ11

MODEM JACK

BIOS

FDD_CNN

ADIN

ADIN
POWER

SMB

FAN GP

INT K/B
CON

5VS,

A A

3VS
12VS
PMU3V 5V
CHARGER

5

BATTERY

UNIT
CONNECTOR

4

PARALLEL

3

MAX3243CAI

COM

2

LAN JACK

RJ45

DC_IN

ADIN

CRT PORT
USB PORT0

PARALLEL
SERIAL

PS/2 MOUSE
EXT K/B

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

A3

BLOCK.SCH

Date: Sheet of

PORTBAR_CNN

2 40Monday, November 22, 1999

1

0.1

5

4

3

2

1

SYSTEM CLOCK GUIDELINES

Pentium III

D D

HCLK

H

443ZX

J

HCLK

PCLKIN

DCLKO

CK100-M

2.5V

100MHZ

3.3V

33MHZ

C C

HCLKCPU

DCLKO

PCLKZX

PCLKP4

PIIX4E

PCICLK

0.25 inch

CPU0

CLOCK

CPU1

B B

1.

L0

R

443ZX

2.

L0

443ZX SO_DIMM1

3.

A A

4.

DQMA[0..7],CSA[0..3],MA[0..13] TRACE TO TRACE =2H

5.

Trace widths for memory signals should be 5 mil.

443ZX

L0

SO_DIMM[1:0]

5

22 ohm

L1

L2

SO_DIMM1 SO_DIMM0

L1

SO_DIMM0

GCLKO

GCLKO

GCLKIN

GCLKIN

DCLKRD

DCLKWR

DCLKWR

CKBF-M

BUF_IN

PCLKOP

PCLKAUDIO

PCLKCB

MODEM/LAN

AUDIO

PCMCIA

0.5 inch

10p

0.5 inch

10p

SIGNAL MIN.LENGTH MAX.LENGTH Series R

MD[63:0]

DQMA[7..0]
MAB[13..0]

WEA#

SRASA#

SCASA#

SIGNAL

CKE[5..0]

SECTION

L0+L1

L0+L1+L2

SECTION

L0+L1

SECTION

4

L0

L0
L0

CPU

443ZX

L0

MIN.LENGTH

NOTE:

AGP_GCLKO

MEM_CLK0
MEM_CLK1

MEM_CLK2
MEM_CLK3

1.1 inch

1.0 inch

1.0 inchCSA[5..0]

1.0 inch 6.0 inch

AGP
VGA

SO_DIMM0

SO_DIMM1

1.0 inch 10 ohm

6.0 inch

Series RMIN.LENGTH MAX.LENGTHSIGNAL

NONE

6.0 inch

MAX.LENGTH Series R

6.0 inch

NONE

GTL+ BUS LAYOUT GUIDELINES

1.

Mobil Pentium III

3

Clock Layout Guidelines

Variable Trace
HCLKCPU(BX)

J 4 mil 1.25 inch 1.35 inch none
H 4 mil J+0.876 inch J+0.878 inch none

PCLKZX 5 mil HCLKCPU(BX)+J inch HCLKCPU(BX)+J+4 inch 33 ohm
PCLKP4 5 mil PCLKBX-4.5 inch PCLKBX+4.5 inch
PCLKOP 5 mil PCLKBX-4.5 inch PCLKBX+4.5 inch
PCLKCB 5 mil PCLKBX-4.5 inch PCLKBX+4.5 inch
PCLKAUDIO 5 mil PCLKBX-4.5 inch PCLKBX+4.5 inch 33 ohm
PCLKSIO 5 mil PCLKBX-4.5 inch PCLKBX+4.5 inch 33 ohm

DCLKO 5 mil 0 inch 4.0 inch 18 ohm
MEM_CLK0 5 mil 0 inch 4.0 inch 10 ohm
MEM_CLK1 5 mil 0 inch 4.0 inch 10 ohm
MEM_CLK2 5 mil 0 inch 4.0 inch 10 ohm
MEM_CLK3 5 mil 0 inch 4.0 inch 10 ohm
DCLKWR 5 mil HCLKDIM0+2.4 inch HCLKDIM0+2.6 inch 22 ohm

GCLKO 10 mil 0 inch 1 inch none
GCLKI 5 mil 0 inch 8.5 inch 18 ohm
AGP_GCLKO 5 mil 0 inch 8.5 inch 18 ohm

LAYOUT NOTE:
All clocks should have 1:2 widt h-to-spacing ratio.

Processor

(INNER LAYER)

Width
8 mil 2.0 inch 4.5 inch 22 ohm

1.5-6.0 inches

Trace Length(min) Trace Length(max)

AGP INTERFACE LAYOUT GUIDELINES

* The AGP strobe signals must be grouped

with their associated data signals.

- AGP_ADSTBA with AGP_AD[15:0],AGP_C/BE[1:0]

- AGP_ADSTBB with AGP_AD[31:16],AGP_C/BE[3:2]

- AGP_SBSTB with SBA[7:0]

* Pullup Resistor Stub Length

- <0.5" for APG_GNT0,AGP_REQ0,A GP_STOP0,AGP_TRDY0,

443ZX

2

* AGP_C/BE0[3:0],AGP_FRAME0,AGP _DEVESEL0,AGP_IRDY0

* AGP_AD[31:0] Routing

* AGP_GCLKO/AGP_ADSTBA,AGP_ADST BB,AGP_SBSTB Routing

* AGP_AD[31:0],AGP_SBA[7:0]/AGP _ADSTBA,AGP_ADSTBB,

Title

Size Document Number Rev

A3

Date: Sheet of

AGP_IRDY0,AGP_DEVESEL0,AGP_FRAME0,
AGP_RBF0,AGP_PIPE0

- <0.1" for AGP_ADSTBA,AGP_ADSTBB,AGP_SBSTB

AGP_TRDY0,AGP_STOP0,AGP_REQ0,AGP_GNT0,AGPPAR
AGP_PIPE0,AGP_RBF0,AGP_ST[2:0]

- 1"-8.5" 1:1 routing is OK

- 1"-10" 1:2 routing is required

- Prefer 1:2 for all lengtfs when possible

- 1"-4.5" 1:1 routing is OK

- 1"-9.5" 1:2 routing is required

- prefer 1:2 for all lengths when possible

- 1:2 Spacing ALWAYS required for AGP_ADSTBA,
AGP_ADSTBB,AGP_SBSTB

- 1:2 Spacing for AGP_GCLKO

- 1:4 Required if AGP_GCLKO is adjacent to
AGP_ADSTBA,AGP_ADSTBB,AGP_SBSTB

AGP_SBSTB Line Length Matching

- Maximun line length mismatch is 0.5"

- AGP_ADSTBA,AGP_ADSTBB,AGP_SBSTB

must be the longest line in the group

1:1

1:2

1:1

AGP_* at level 3 or 4

AGP_* 5mil

AGP_* length can't over 3 inch

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

A550

LAYOUT GUIDELINES 0.1

Resistor

33 ohm
33 ohm
33 ohm

1

3 40Monday, November 22, 1999

5

GTL_HA0[31..3](10)

GTL_HA03
GTL_HA04
GTL_HA05
GTL_HA06
GTL_HA07
GTL_HA08
GTL_HA09

D D

C C

+VCC_CPU_IO+3VS

B B

A A

R154

FERR0(19)

2N3904 SOT-23 3P

+VCC_CPU_IO

10K 5% 1/16W 0603

Q23

R166

R167

EC

B

1K 5% 1/16W 0603

+VCC_CPU_IO

5

GTL_HREQ0[4..0](10)

GTL_ADS0(10)

IERR0(6)

GTL_BREQ00(10)

GTL_BPRI0(10)

GTL_BNR0(10)

GTL_HLOCK0(10)

GTL_HIT0(10)

GTL_HITM0(10)

GTL_DEFER0(10)

GTL_RS0[2..0](10)

GTL_HTRDY0(10)

GCL_A20M0(6)

1.5K 5% 1/16W 0603

FLUSH0(6)

GCL_IGNNE0(6)

GCL_SMI0(6)

CPU_PWRGD(6)

GCL_STPCLK0(6)

GCL_INTR(6)

GCL_NMI(6)

GCL_INIT0(6)

GTL_CPURST0(10)

HCLK_CPU(10,12)

R256

56.2 1% 1/16W 0603

SLP0(6)

GTL_HA010
GTL_HA011
GTL_HA012
GTL_HA013
GTL_HA014
GTL_HA015
GTL_HA016
GTL_HA017
GTL_HA018
GTL_HA019
GTL_HA020
GTL_HA021
GTL_HA022
GTL_HA023
GTL_HA024
GTL_HA025
GTL_HA026
GTL_HA027
GTL_HA028
GTL_HA029
GTL_HA030
GTL_HA031

T1
T2
T3
T4

GTL_HREQ00
GTL_HREQ01
GTL_HREQ02
GTL_HREQ03
GTL_HREQ04

T9

T11
T12
T13
T15
T16

T17

FERR0_15

R165

0 5% 1/16W 0603

1
1
1
1

1

1
1
1
1
1

GTL_RS00
GTL_RS01
GTL_RS02

1

L3
K3
J2
L4
L1
K5
K1
J1
J3
K4

G1

H1
E4
F1
F4
F2
E1
C4
D3
D1
E2
D5
D4
C3
C1
B3
A3
B2
C2
A4
A5
B4
C5

T2
V4

V2
W3
W5

W2

AB2
AA1

AB1

Y2

E6

V21

AD9

C6

U4

T4

R1

V1

Y4

U3

U1

AA2

W1

Y1

U2

AD10
AC12

AC9
AC13
AB10

V5

AC11
AB12

AB18
AC19

AA10

A6

M3

C207
DUMMY C 0603

4

U7-1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

RP#
ADS#

AERR#
AP0#
AP1#
BERR#
BINIT#
IERR#

BREQ0#
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

RS0#
RS1#
RS2#
RSP#
TRDY#

A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD#

STPCLK#
SLP#

INTR/LINT0
NMI/LINT1

INIT#
RESET#

BLCK

COPPERMINE

4

D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#

DBSY#

DRDY#

THERMDA#
THERMDC#

BSEL0
BSEL1

EDGECTRLP

3

2

1

NU PARTS:

+VCC_CPU_CORE

GTL_HD00

D10

D0#

GTL_HD01

D11

D1#

GTL_HD02

C7

D2#

GTL_HD03

C8

D3#

GTL_HD04

B9

D4#

GTL_HD05

A9

D5#

GTL_HD06

C10

D6#

GTL_HD07

B11

D7#

GTL_HD08

C12

D8#

GTL_HD09

B13

D9#

GTL_HD010

A14

GTL_HD011

B12

GTL_HD012

E12

GTL_HD013

B16

GTL_HD014

A13

GTL_HD015

D13

GTL_HD016

D15

GTL_HD017

D12

GTL_HD018

B14

GTL_HD019

E14

GTL_HD020

C13

GTL_HD021

A19

GTL_HD022

B17

GTL_HD023

A18

GTL_HD024

C17

GTL_HD025

D17

GTL_HD026

C18

GTL_HD027

B19

GTL_HD028

D18
B20
A20
B21
D19
C21
E18
C20
F19
D20
D21
H18
F18
J18
F21
E20
H19
E21
J20
H21
L18
G20
P18
G21
K18
K21
M18
L21
R19
K19
T20
J21
L20
M19
U18
R18

V20
T21
U21
R21
V18
P21
P20
U19

AA3
T1

AA15
AB16

AA12
AB15

AA16

GTL_HD029
GTL_HD030
GTL_HD031
GTL_HD032
GTL_HD033
GTL_HD034
GTL_HD035
GTL_HD036
GTL_HD037
GTL_HD038
GTL_HD039
GTL_HD040
GTL_HD041
GTL_HD042
GTL_HD043
GTL_HD044
GTL_HD045
GTL_HD046
GTL_HD047
GTL_HD048
GTL_HD049
GTL_HD050
GTL_HD051
GTL_HD052
GTL_HD053
GTL_HD054
GTL_HD055
GTL_HD056
GTL_HD057
GTL_HD058
GTL_HD059
GTL_HD060
GTL_HD061
GTL_HD062
GTL_HD063

1
1
1
1
1
1
1
1

THERMDA (8)
THERMDC (8)

R169

CPU_EDGECTRLP

110 1% 1/16W 0603

T18
T19
T20
T21
T22
T23
T24
T25

GTL_DBSY0 (10)
GTL_DRDY0 (10)

10K 5% 1/16W 0603

R238

+VCC_CPU_IO

GTL_HD0[63..0] (10)

+VCC_CPU_IO

C295

+

330uF 20% 6.3V D

R249

1.5K 5% 1/16W 0603

R248

4.7K 5% 0603_NU

RP23

1
2
3
4

1K 5% 1/16W V8V 8P4R

R239
0 5% 1/16W 0603

C249

C211

C282

LAYOUT NOTE:PLACE CLOSE TO CPU

3

LAYOUT NOTE:PLACE CLOSE TO CPU,U1

C198

8
7
6
5

C231

C226

C173

C151

+

330uF 20% 6.3V D

PREQ0

PRDY0

TCK
TDI
TMS
TRST0

+V_CMOSREF

LAYOUT NOTE:
PLACE CLOSE
TO CPU , U1

+VCC_CPU_IO

C269

C218

0.1uF +80/-20% 16V 0603 Y5V

C289

C284

+VGTLREF

C180

0.1uF +80/-20% 16V 0603 Y5V

+VCC_CPU_IO

0 5% 1/16W 0603

0.1uF +80/-20% 16V 0603 Y5V

C236

C288

C225

C283

C259

C296

+

330uF 20% 6.3V D

0.1uF +80/-20% 16V 0603 Y5V

+V_CLKREF

C266

C229

0.1uF +80/-20% 16V 0603 Y5V

R159

20 mil

C292

0.1uF +80/-20% 16V 0603 Y5V

C286

C238

C228

C290

C212

C177

C280

CPU_LO/HI0(6)

+VGTLREF

T26
T27
T28
T29

C281

PICD0
PICD1
PICCLK

T5
T6
T7
T8

TCK
TDI

T10

TMS
TRST0
PREQ0
PRDY0

RTTIMPEDP

T26.1

1

T27.1

1

T28.1

1

T29.1

1

20 mil

C169

+

33uF 20% 20V C

C252

R247

1K 5% 1/16W 0603

C178

R240

56.2 1% 1/16W 0603

0.1uF +80/-20% 16V 0603 Y5V

R242 10K 5% 1/16W 0603
R168 1K 5% 1/16W 0603
R172 1K 5% 1/16W 0603

L61

C5-K2.5L-4R7

2

C255

C247

C261

C285

C176

U7-2

AB21

PICD0

Y20

PICD1

AA18

PICCLK

AA21

1
1
1
1

1

BP2#

Y21

BP3#

W21

BPM0#

W19

BPM1#

AA11

TCK

AD13

TDI

AC15

TDO

AD14

TMS

AA14

TRST#

AB20

PREQ#

W20

PRDY#

P2

CLKREF

AA9

CMOSREF_1

AD18

CMOSREF_2

AD19

RTTIMPEDP

R2

GHI#

E5

VREF_0

E16

VREF_1

E17

VREF_2

F5

VREF_3

F17

VREF_4

U5

VREF_5

Y17

VREF_6

Y18

VREF_7

AD17

TESTHI

Y5

TESTLO1

N5

TESTLO2

AD20

TESTP_1

H4

TESTP_2

AA17

TESTP_3

G4

TESTP_4

L2

PLL1

M2

PLL2

COPPERMINE

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

COPPERMINE-1 0.1

A3

Date: Sheet of

C195C279

C235

C256

C170

C243

+VCC_CPU_CORE

400 mil

C172

0.1uF +80/-20% 16V 0603 Y5V

C219

0.1uF +80/-20% 16V 0603 Y5V

C181

H8

VCC_0

H10

VCC_1

H12

VCC_2

H14

VCC_3

H16

VCC_4

J7

VCC_5

J9

VCC_6

J11

VCC_7

J13

VCC_8

J15

VCC_9

K8

VCC_10

K10

VCC_11

K12

VCC_12

K14

VCC_13

K16

VCC_14

L7

VCC_15

L9

VCC_16

L11

VCC_17

L13

VCC_18

L15

VCC_19

M8

VCC_20

M10

VCC_21

M12

VCC_22

M14

VCC_23

M16

VCC_24

N7

VCC_25

N9

VCC_26

N11

VCC_27

N13

VCC_28

N15

VCC_29

P8

VCC_30

P10

VCC_31

P12

VCC_32

P14

VCC_33

P16

VCC_34

R7

VCC_35

R9

VCC_36

R11

VCC_37

R13

VCC_38

R15

VCC_39

T8

VCC_40

T10

VCC_41

T12

VCC_42

T14

VCC_43

T16

VCC_44

U7

VCC_45

U9

VCC_46

U11

VCC_47

U13

VCC_48

U15

VCC_49

AB19

RSVD

4 40Thursday, December 16, 1999

1

C171

1

T30

C287

C251

5

U7-3

A2

VSS_0

A7

VSS_1

A8

VSS_2

A12

VSS_3

A21

VSS_4

B1

VSS_5

B5

VSS_6

B6

VSS_7

B7

D D

C C

B B

B8
B10
B15
B18

C9
C11
C15
C16
C19

D2

D6

D7

D9

E3

E7

E8

E9
E10
E11
E13
E19

F3

F6

F7

F8

F9
F10
F11
F12
F13
F14
F15
F16
F20

G3
G19

H2

H7

H9
H11
H13
H15
H20

J4

J8
J10
J12
J14
J16
J19

K2

K7

K9
K11
K13
K15
K20

L5

L8
L10
L12
L14
L16
L19

M7

M9
M11
M13
M15
M20

N2

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79

COPPERMINE

GROUND

VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_159
VSS_160
VSS_161

N3
N4
N8
N10
N12
N14
N16
N18
N19
N20
P5
P7
P9
P11
P13
P15
P19
R3
R4
R5
R8
R10
R12
R14
R16
R20
T3
T5
T7
T9
T11
T13
T15
T18
T19
U8
U10
U12
U14
U16
U20
V3
V19
W4
W18
Y3
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y19
AA4
AA13
AA20
AB3
AB5
AB9
AB11
AB13
AB14
AB17
AC1
AC2
AC5
AC10
AC14
AC16
AC18
AC21
AD1
AD5
AD16
AD21

4

100 mil

3

+VCC_CPU_IO +VCC_CPU_IO

W10
W11

G6
G7
G8

G9
G10
G11
G12
G13
G14
G15
G16
G17

H6

H17

J6

J17

K6

K17

L6

L17

M6
M17

N6

N17

P1
P6

P17

R6

R17

T6

T17

U6

U17

V6
V7
V8

V9
V10
V11
V12
V13
V14
V15
V16
V17

W6
W7
W8
W9

U7-4

VCCT_0
VCCT_1
VCCT_2
VCCT_3
VCCT_4
VCCT_5
VCCT_6
VCCT_7
VCCT_8
VCCT_9
VCCT_10
VCCT_11
VCCT_12
VCCT_13
VCCT_14
VCCT_15
VCCT_16
VCCT_17
VCCT_18
VCCT_19
VCCT_20
VCCT_21
VCCT_22
VCCT_23
VCCT_24
VCCT_25
VCCT_26
VCCT_27
VCCT_28
VCCT_29
VCCT_30
VCCT_31
VCCT_32
VCCT_33
VCCT_34
VCCT_35
VCCT_36
VCCT_37
VCCT_38
VCCT_39
VCCT_40
VCCT_41
VCCT_42
VCCT_43
VCCT_44
VCCT_45
VCCT_46
VCCT_47
VCCT_48
VCCT_49
VCCT_50

COPPERMINE

W12

VCCT_51

W13

VCCT_52

W14

VCCT_53

W15

VCCT_54

W16

VCCT_55

W17

VCCT_56

Y6

VCCT_57

Y7

VCCT_58

Y8

VCCT_59

AA6

VCCT_60

AA7

VCCT_61
VCCT_62
VCCT_63
VCCT_64
VCCT_65
VCCT_66
VCCT_67
VCCT_68
VCCT_69
VCCT_70
VCCT_71

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24

VID0
VID1
VID2
VID3
VID4

AA8
AB6
AB7
AB8
AC6
AC7
AC8
AD6
AD7
AD8

A15
A16
A17
C14
D8
D14
D16
E15
G2
G5
G18
H3
H5
J5
M4
M5
P3
P4
AA5
AA19
AC3
AC17
AC20
AD15

AD2
AD3
AD4
AC4
AB4

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

VCCT

100 mil

T31
T32
T33
T34
T35
T36
T37
T38
T39
T40
T41
T42
T43
T44
T45
T46
T47
T48
T49
T50

T52
T53
T54

CPU_VID0 (8)
CPU_VID1 (8)
CPU_VID2 (8)
CPU_VID3 (8)
CPU_VID4 (8)

LAYOUT NOTE:PLACE CLOSE TO CPU

C265

C199

C272

C241

+

150uF 20% 10V 7343 LOW ESR

2

C278

C216 C217

C209

C224

GTL
REFERENCE
VOLTAGE

(2/3)+VCC_CPU_IO

+VCC_CPU_IO

R225
1K 1% 1/16W 0603

+VGTLREF

R235
2K 1% 1/16W 0603

CMOS
REFERENCE
VOLTAGE
(2/3)+VCC_CPU_IO

+VCC_CPU_IO

R170
1K 1% 1/16W 0603

R171
2K 1% 1/16W 0603

C50 TO C69:0.1UBADX

C215

C210 C233

C291

C264

C174

C242

C277

AGP
REFERENCE
VOLTAGE

(2/5)3.3V

+3V

R293

3.48K 1% 1/16W 0603

R288

2.32K 1% 1/16W 0603T51

CLOCK
REFERENCE
VOLTAGE

1.25V

+V25S

R262
2K 1% 1/16W 0603

R263
2K 1% 1/16W 0603

1

C179

0.1uF +80/-20% 16V 0603 Y5V

C175

C182

C260

+VAGPREF

10 mil10 mil

+V_CLKREF+V_CMOSREF

10 mil10 mil

A A

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

COPPERMINE-2 0.1

A3

5

4

3

2

Date: Sheet of

5 40Thursday, December 16, 1999

1

5

4

3

2

1

+3V

+3VS

R128

1.5K 5% 1/16W 0603

GCL_CPUSTP0 (12)

TO CLK GEN.

VR_PWRGD (19,36)

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

GCL 0.1

A3

Date: Sheet of

+V25S

R141

1.5K 5% 1/16W 0603

CPU_PWRGD (4)

1

6 40Thursday, December 16, 1999

2

R144

100K 5% 1/16W 0603
R43

1K 5% 1/16W 0603

+3VS

VR_PWRGDGCL_PWRGD

TO 38867

GCL_SUS_STAT10

D D

CPU BUS PULL RESISTOR

+VCC_CPU_IO

R173

1.5K 5% 1/16W 0603

R174

1.5K 5% 1/16W 0603

R140

1K 5% 1/16W 0603

R138

1.5K 5% 1/16W 0603

R135

1.5K 5% 1/16W 0603

R241

1.5K 5% 1/16W 0603

R139

C C

B B

A A

R142

R137

+3VS

+VCC_CPU_IO

1.5K 5% 1/16W 0603

1.5K 5% 1/16W 0603

680 5% 1/16W 0603

R294

10K 5% 1/16W 0603

R101

1K 5% 1/16W 0603

+3VS

+V_CPUPU

R123

R114

5

R134 0 5% 1/16W 0603

R133 0 0603(NU)

R195

1.5K 5% 1/16W 0603

R203

1.5K 5% 1/16W 0603

R161

4.7K 5% 1/16W 0603

R148

4.7K 5% 1/16W 0603

4.7K 5% 1/16W 0603

R112

1K 5% 1/16W 0603

FLUSH0 (4)

IERR0 (4)

GCL_INIT0

GCL_INTR

GCL_NMI

SLP0 (4)

GCL_SMI0

CPU_LO/HI0

GCL_STPCLK0

GLO/HI0

GCL_VGATE

4.7K 5% 1/16W 0603

A20M0

IGNNE0

INTR

NMI

STPCLK0

CRESET0(10)

C113 27pF 5% 50V 0603 NPO

C131

33pF 5% 50V 0603 NPO

consult crystal vendor regarding capacitor &
resistor values of the crystal circuitry

+V_CPUPU

SMI0

INIT0

+3V

R118
10K 5% 1/16W 0603

CRESET0

12

Y2

SUS_STAT10(19)

CPU_STP0(19)

GCL_LO/HI0(19)

GCL_VGATE(7)

100 5% 1/16W 0603

14R31818M_CX-16F

A20M0(19)

IGNNE0(19)

4

NMI

NMI(19)

INTR

INTR(19)

INIT0

INIT0(19)

SMI0

SMI0(19)

STPCLK0(19)

INTR GCL_INTR

SMI0 GCL_SMI0

INIT0 GCL_INIT0

NMI GCL_NMI

STPCLK0 GCL_STPCLK0

CPU_STP0 GCL_CPUSTP0

A20M0

IGNNE0

STPCLK0
SUS_STAT10
CPU_STP0 GCL_CPUSTP0

GLO/HI0

VR_ON(7,9,36)

GCL_VGATE

1

T277

1

T58

1

T59

R129

CLK_IN
CLK_OUT

1

T61

1

T63

1

T64

1

T66

CLKEN# has internal
pulldown

R160

0 0603_NU

R188

0 0603_NU

R190

0 0603_NU

R136

0 0603_NU

R192

0 0603_NU

R143

0 0603_NU

R124

0 0603_NU

JP4

1 2

JP_0603_INSIDE

JP5

1 2

JP_0603_INSIDE

STUFF for NON-Geyserville Implementation

U14

20

NMI

16

INTR

22

INIT#

24

A20M#

21

IGNNE#

17

SMI#

23 3

STP_CLK# G_STPCLK#

19 11

SUSSTAT1# G_SUSSTAT1#

13 47

CPU_STP_IN# CPU_STP_OUT#

14

G_LO_HI#

15

VR_ON

29

VGATE

43

IGN_VGATE#

28

VR100/50#

44

PLL30/60#

41

CRESET#

26

CLK_IN_A

25

CLK_IN_B

45

CLKEN#

38

STB#

37

DIN

36

DOUT

GND_1

GND_2

GND_3

GND_4

GND_5

618314227730

GCL_SUS_STAT10SUS_STAT10

GCL_A20M0 (4)

GCL_IGNNE0 (4)

3

G_NMI

G_INTR

G_INIT#

G_A20M#

G_IGNNE#

G_SMI#

A_SUSSTAT1#

LO/HI#

CPUPWRGD

VRPWRGD

VRCHGNG#

VR_HI/LO#

LP_TRANS#

TCLKOUT

TMODE2
TMODE1

VCC3_1

VCC3_2

GCL_TQFP48

C99

0.01uF +80/-20% 25V 0603 Y5V

GCL_VGATE

GCL_NMI

1

GCL_INTR

4

GCL_INIT0

8
48
2
5

46
10
9

32

12
33
34

35

39
40

C132

0.01uF +80/-20% 25V 0603 Y5V

GCL_SMI0
GCL_STPCLK0

GCL_SUS_STAT10

CPU_LO/HI0
CPU_PWRGD

GCL_VRCHGNG0
GCL_VR_HI/LO0

+3V

R102

0 0603_NU

1
1

1

1

1

1
1

R99

10K 0603(NU)

GCL_VRCHGNG0

GCL_NMI (4)
GCL_INTR (4)

GCL_INIT0 (4)

T55
T56

GCL_SMI0 (4)

GCL_STPCLK0 (4)

GCL_SUS_STAT10 (11,14)

T57

CPU_LO/HI0 (4)

R100
0 5% 1/16W 0603

GCL_VRCHGNG0 (28)

GCL_VR_HI/LO0 (8)

T60

T62

T65
T67

VR_PWRGD

R103

31.6K 1% 0603_NU

CPU_PWRGD

R104
100K 1% 0603_NU

GCL_VR_HI/LO0

5

CPU CORE

R253

C293

20 5% 1/16W 0603

0.22uF +80/-20% 16V 0603 Y5V

F1

429003 SMD1206

R207

VID4(8)

1M 5% 1/16W 0603

R208

VID0(8)
VID1(8)
VID2(8)
VID3(8)

0 5% 1/16W 0603

1M 0603(NU)

C275

0.22uF +80/-20% 16V 0603 Y5V

B+

D D

C C

B B

+5VS

VR_ON(6,9,36)

C257

1uF +80-20% 25V 0805 Y5V

4

R209

R245
100K 5% 1/16W 0603

C297
470pF 5% 50V 0603 NPO

C30

C35

4.7uF 10% 25V 1210 X5R

U21

1

V+

15

VDD

7

VCC

2

SHDN#

21

SKIP#

20

D0

19

D1

18

D2

17

D3

16

D4

9

REF

5

CC

MAX1711 QSOP 24P

C36

4.7uF 10% 25V 1210 X5R

D19

P N

RB751V UMD2

PGOOD

GNDS

PGND

GND
TON

3

Q6
IRF7807 SOP8

1

8

D

S

2

7
6 3
5

G

C34

4.7uF 10% 25V 1210 X5R

4.7uF 10% 25V 1210 X5R

4

63

5

7

8

D

G

4

S

2

1

63

5

7

8

Q4

D

Q5

G

4

S

2

1

SI4420DY SOP8

SI4420DY SOP8

L8

T06949 2.4uH 10A

D18

P N

EC20QS03 SMT 2P

PATTERN WIDTH=10MM

22

BST

24

DH

23

LX

13

DL

3

FB

12

4

FBS

11
6

ILIM

14
10
8

C263

0.1uF +80/-20% 16V 0603 Y5V

R243 1K 5% 1/16W 0603

GCL_VGATE (6)

R244 1K 5% 1/16W 0603
R216 1K 5% 1/16W 0603

C268

DUMMY C 0603

1

R246

T68

CORE_GND

390K 5% 1/16W 0603

FBS

R230

10 5% 1/16W 0603

PATTERN WIDTH =10 MM

2

C221

CLOSE TO CPU

+VCC_CPU_CORE

1

+VCC_CPU_CORE

CURRENT
LIMIT=10.8A

+

+

+

C189

330uF 20% 6.3V D

1uF +80-20% 25V 0805 Y5V

+

C240

C190

C239

330uF 20% 6.3V D

330uF 20% 6.3V D

330uF 20% 6.3V D

CLOSE TO CPU

CPU_CORE
500MHz
450MHz

A A

5

4

400MHz

1.60V

1.60V

1.35V

3

ICC,MAXCPU

11.1A

10.1A

7.7A

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

CPU CORE 0.1

A3

2

Date: Sheet of

7 40Thursday, December 16, 1999

1

5

4

3

2

1

CPU_VID0(5)
CPU_VID1(5)
CPU_VID2(5)
CPU_VID3(5)
CPU_VID4(5)

+3VS

D D

C C

RP19 1K 5% 1/16W V8V 8P4R

1

8

2

7

3

6

4

R156 1K 5% 1/16W 0603
RP18 1K 5% 1/16W V8V 8P4R

R147 1K 5% 1/16W 0603

5

1

8

2

7

3

6

4

5

4

5

6

SW1

SW-DIP-6

9

8

7

123

121110

GCL_VR_HI/LO0(6)

Automaticnselection
of power supply
voltage.

U18

3

A0

7

A1

11

A2

17

A3

21

A4

4

B0

8

B1

14

B2

18

B3

22

B4

1

BE#

13

BX

SN74CBT3383

GND

VCC

2

C0

6

C1

10

C2

16

C3

20

C4

5

D0

9

D1

15

D2

19

D3

23

D4

24
12

1

T69

1

T70

1

T71

1

T72

1

T73

+5V

C128

0.01uF +80/-20% 25V 0603 Y5V

VID0 (7)
VID1 (7)
VID2 (7)
VID3 (7)
VID4 (7)

+5VS

C

26

B E

DTC144EU

C185

B

0.1uF +80/-20% 16V 0603 Y5V

FANON0(20)

R177
100K 5% 1/16W 0603

Q26
DTC144EUA UMT3

E C

D

6
5
2
1

1 2 3

L63

FCM2012V-601T05

46

5

8

CPH6301

JA

J1

P2

1

MOLEX

2

FAN CNN

3

53398-0390

C155

0.1uF +80/-20% 16V 0603 Y5V

Q25
CPH6301

S

4

3

FAN CONTROL

JUMPER SETTINGS

LOW VOLTAGE:

SW1(6-7) SW1(5-8) SW1(4-9) SW1(3-10) SW1(2-11)

NS NS NS NS NS

NS NS NS
NS NS NS

B B

A A

NS NS
NS
NS
NS
NS
NS
NS
NS
NS

HIGH VOLTAGE:

1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2

5

VID[4..0]

NSNSNS
NSNSNS

1-2
1-2 1-2

1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2

NS NS NS NS

NS NS
NS NS
NS

1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2

1-2 1-21-2

NS NSNS
NS NS
NS
NS

1-2
1-2

1-2 1-2 1-2

NSNS
NSNS

1-2
1-2 1-2

1-2 1-21-2

NS NS
NS
NS
NS

1-2
1-2
1-2 1-2
1-2

1-2 = Populate jumper
NS = No Shunt

NS

1-2
1-2 1-2

NS NSNSNS

1-21-2

1-2
1-2 1-2

NS

1-21-2

NS

1-2
1-2 1-2

NS NSNS

1-21-2

NS
NS

1-2
1-2

NS
NS

THERMAL SENSOR

1-2

NS

NSNSNS

1-2

NS
NSNS

1-2

NS

1-2

NS

NSNS

1-2

NS

1-2

NS

1-2

NS

1-21-2

NO CPU

0.925V

0.950V

0.975V

1.000V

1.025V

1.050V

1.075V

1.100V

1.125V

1.150V

1.175V

1.200V

1.225V

1.250V

1.275V

NO CPU

1.30V

1.35V

1.40V

1.45V

1.50V

1.55V

1.60V

1.65V

1.70V

1.75V

1.80V

1.85V

1.90V

1.95V

2.000V

4

3

+3VS

10 mil

THERMDA(4)

R151
1K 5% 1/16W 0603

THERMDC(4)

0.1uF +80/-20% 16V 0603 Y5V

+3VS

2200pF 5% 50V 0603 X7R

C150

R153
200 5% 1/16W 0603

10 mil

R152

U4

2
3

10

4

6
8

7

MAX1617

C156

2

10K 5% 1/16W 0603

VCC
DXP

DXN

ADD0
ADD1

GND
GND

Title

Size Document Number Rev

Date: Sheet of

15

STBY#

12

SMBDATA

14

SMBCLK

11

ALERT#

1

N/C

5

N/C

9

N/C

13

N/C

16

N/C

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

A550

VCORE ID, THERMAL, FAN 0.1

A3

1
1
1
1
1

R234
10K 5% 1/16W 0603

T74
T75
T76
T77
T78

1

SMBDATA (39)
SMBCLK (39)

ATF_INT0 (28)

8 40Thursday, December 16, 1999

5

4

3

2

1

2.5V FOR CLOCK GEN.

K

MA152K

M1

A2 A1

U25

1

VIN

3

ON/OFF

2

GND

LP2981 MA05A 5P

D21

A1K

CU

A2

MA152K SOT-36 3P

5

VOUT

4

NC

20 mil

+V25S

1

T79

C317

+

10uF 20% 10V A

CURRENT
LIMIT=150MA

4 4

45

UNC4N

C4

1 2 3

20 mil

+3V

3

UMC4N UMT5

1

Q30

4

+

10uF 20% 10V A

C307

47K 5% 1/16W 0603

R252

5

VR_ON(6,7,36)

3 3

2

100 mil

1.5V FOR CPU IO

ICC_MAX=2A
PATTERN
WIDTH=MIN.

+3V

R217

2 2

1 1

5

C33

C29

C276

18m OHM 2% 1/2W SMT3720

10uF 10% 10V 1210 X7R

10uF 10% 10V 1210 X7R

0.47uF +80/-20% 16V 0805 Y5V_F

4

100 mil

1

T80

U22

1

OUT

2

FB

3

SHDN

5

V+

6

CS

8

GND

MAX1627 SOP8

Q27
SI4431DY SOP8

3
2
1

4

REF

7

EXT

8
7
6

S

5

D

G

4

C301

0.1uF +80/-20% 16V 0603 Y5V

3

L9

CDRH-125-100MC 4A 10uH

D17

EC20QS03 SMT 2P

P N

R255

130K 0.5% 1/16W 0603

2MM(100MIL)

100 mil

+

C213
150uF 20% 10V 7343 LOW ESR

R254 20K 5% 1/16W 0603

2

+VCC_CPU_IO

C214

0.1uF +80/-20% 16V 0603 Y5V

+VCC_CPU_IO

FIC International Computer, Inc.

6F., FORMOSA PLASTICS PEAAR BUILDING 201-24
TUN HWA N. RD., TAIPEI, TAIWAN
(886)2716-8527

Title

A550

Size Document Number Rev

A3

CPU I/O

Date: Sheet of

1

9 40Thursday, December 16, 1999

0.1

5

4

3

2

1

GTL_HD0[63..0] (4)

GTL_HD00
GTL_HD01
GTL_HD02
GTL_HD03
GTL_HD04
GTL_HD05

D D

C C

B B

GTL_HD06
GTL_HD07
GTL_HD08
GTL_HD09
GTL_HD010
GTL_HD011
GTL_HD012
GTL_HD013
GTL_HD014
GTL_HD015
GTL_HD016
GTL_HD017
GTL_HD018
GTL_HD019
GTL_HD020
GTL_HD021
GTL_HD022
GTL_HD023
GTL_HD024
GTL_HD025
GTL_HD026
GTL_HD027
GTL_HD028
GTL_HD029
GTL_HD030
GTL_HD031
GTL_HD032
GTL_HD033
GTL_HD034
GTL_HD035
GTL_HD036
GTL_HD037
GTL_HD038
GTL_HD039
GTL_HD040
GTL_HD041
GTL_HD042
GTL_HD043
GTL_HD044
GTL_HD045
GTL_HD046
GTL_HD047
GTL_HD048
GTL_HD049
GTL_HD050
GTL_HD051
GTL_HD052
GTL_HD053
GTL_HD054
GTL_HD055
GTL_HD056
GTL_HD057
GTL_HD058
GTL_HD059
GTL_HD060
GTL_HD061
GTL_HD062
GTL_HD063

U27-1

B22

HD0#

D22

HD1#

E21

HD2#

A22

HD3#

D21

HD4#

C21

HD5#

A21

HD6#

C20

HD7#

B21

HD8#

E20

HD9#

A20

HD10#

E19

HD11#

B20

HD12#

E18

HD13#

D20

HD14#

D19

HD15#

D18

HD16#

C19

HD17#

B19

HD18#

A18

HD19#

A19

HD20#

B18

HD21#

C17

HD22#

E17

HD23#

D17

HD24#

B17

HD25#

C16

HD26#

A17

HD27#

C15

HD28#

B16

HD29#

D16

HD30#

A16

HD31#

B15

HD32#

A15

HD33#

D14

HD34#

D15

HD35#

B13

HD36#

C14

HD37#

E14

HD38#

D13

HD39#

A13

HD40#

D12

HD41#

B12

HD42#

B14

HD43#

C13

HD44#

E13

HD45#

D11

HD46#

A12

HD47#

B11

HD48#

A11

HD49#

B7

HD50#

C12

HD51#

C8

HD52#

B10

HD53#

A10

HD54#

A9

HD55#

A7

HD56#

E11

HD57#

D9

HD58#

C11

HD59#

C10

HD60#

B8

HD61#

A8

HD62#

B9

HD63#

443ZX

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

ADS#

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#

BREQ0#

BPRI#

BNR#

HLOCK#

HITM#

DEFER#

DBSY#

DRDY#

HTRDY#

RS0#

RS1#

RS2#

CPURST#

CRESET#

HCLKIN

HIT#

G25
H22
G23
H23
G24
F26
G26
G22
F22
F23
F24
F25
E23
E26
E25
D25
D26
B25
C26
A25
C25
A24
D24
C23
B24
C24
A23
E22
D23

K21
J22

J23
K24
K25
J25

B26
H26
H24
K22

L24
L22
J26

L23
K23

H25
K26
L26
L25

B23
M26

N23

GTL_HA03
GTL_HA04
GTL_HA05
GTL_HA06
GTL_HA07
GTL_HA08
GTL_HA09
GTL_HA010
GTL_HA011
GTL_HA012
GTL_HA013
GTL_HA014
GTL_HA015
GTL_HA016
GTL_HA017
GTL_HA018
GTL_HA019
GTL_HA020
GTL_HA021
GTL_HA022
GTL_HA023
GTL_HA024
GTL_HA025
GTL_HA026
GTL_HA027
GTL_HA028
GTL_HA029
GTL_HA030
GTL_HA031

GTL_HREQ00
GTL_HREQ01
GTL_HREQ02
GTL_HREQ03
GTL_HREQ04

GTL_RS00
GTL_RS01
GTL_RS02

C338
DUMMY C 0603

GTL_HA0[31..3] (4)

GTL_ADS0 (4)

GTL_HREQ0[4..0] (4)

GTL_BREQ00 (4)

GTL_BPRI0 (4)

GTL_BNR0 (4)

GTL_HLOCK0 (4)

GTL_HIT0 (4)
GTL_HITM0 (4)

GTL_DEFER0 (4)

GTL_DBSY0 (4)
GTL_DRDY0 (4)

GTL_HTRDY0 (4)
GTL_RS0[2..0] (4)

GTL_CPURST0 (4)
CRESET0 (6)

HCLK_CPU (4,12)

MEM_CSA0[3..0](13)

MEM_DQMA[7..0](13)

MEM_WEA0(13)

MEM_SRASA0(13)

MEM_SCASA0(13)

MEM_CKE[3..0](13)

MEM_MAB0[9..0](13)

MEM_MAB10(13)

MEM_MAB0[12..11](13)

MEM_MAB13(13)

T85
T87

T89
T90

T91

T92

T93

T94
T95

T96
T97
T98
T99
T100
T101
T102
T103
T104
T105
T106
T107
T108
T109

MEM_CSA00
MEM_CSA01
MEM_CSA02

MEM_CSA03

1
1

MEM_DQMA0

MEM_DQMA1

MEM_DQMA2

MEM_DQMA3

MEM_DQMA4

MEM_DQMA5

MEM_DQMA6

MEM_DQMA7

1
1

1

1

1

MEM_CKE0

MEM_CKE1

MEM_CKE2

MEM_CKE3

1
1

1
1
1
1
1
1
1
1
1
1
1
1
1
1

MEM_MAB00

MEM_MAB01

MEM_MAB02

MEM_MAB03

MEM_MAB04

MEM_MAB05

MEM_MAB06

MEM_MAB07

MEM_MAB08

MEM_MAB09

MEM_MAB10

MEM_MAB011

MEM_MAB012

MEM_MAB13

440ZX STRAPPING OPTIONS

MEM_MAB06

MEM_MAB07

MEM_MAB10

A A

MEM_MAB012

MEM_MAB011

R323

10K 5% 1/16W 0603

R322

10K 0603(NU)

R330

10K 5% 1/16W 0603

R331

10K 5% 1/16W 0603

R324

10K 0603(NU)

+3V

ADDR

MEM_MAB06

MEM_MAB07

MAM_MAB10

MEM_MAB011

MEM_MAB012

5

LOW HIGH

DESKTOP GTL+ MOBILE LOW POWER GTL+

NORMAL OPERATION TRI-STATES C ERTAIN

STOP CLOCK MODE QUICK START MODE

1(NO PIPELINING) 4(MAX )

66MHZ 100MHZ

MEMORY SIGNALS

4

INTERNAL
RESISTOR

PULL-DOWN

PULL-DOWN

PULL-DOWN

PULL-UP

PULL-DOWN

3

AB14
AF15

AE15
AC15
AD15

AE16
AD13

AC13
AC25

AB26

AE14
AC14

AA22

AA24

AE13
AD14

AE12
AC12

AF16

AA17

AF12

AB13

AE11

AA10

AA23

AA26

AF11
AD12

AA25

AC22

AF23

AE24
AD23
AC23

AF24

AF17

AB16

AE17
AC17

AF18

AE19

AF19
AC18
AC19

AE20
AD20

AF21
AC21

AF25
AD16

AC16
AD17

AB17

AE18
AD19

AB18

AB19

AF20
AC20

AB20

AE21
AD21

AF22

Y22

U27-2

CSA0#/RASA0#
CSA1#/RASA1#
CSA2#/RASA2#
CSA3#/RASA3#
CSA4#/RASA4#
CSA5#/RASA5#

DQMA0/CASA0#
DQMA1/CASA1#
DQMA2/CASA2#
DQMA3/CASA3#
DQMA4/CASA4#
DQMA5/CASA5#
DQMA6/CASA6#
DQMA7/CASA7#

DQMB1/CASB1#
DQMB5/CASB5#

WEA#
WEB#

SRASA#
SRASB#

SCASA#
SCASB#

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7

CKE0/FENA
CKE1/GCKE
CKE2/CSA6#
CKE3/CSA7#
CKE4/CSB6#
CKE5/CSB7#

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

MAB0#
MAB1#
MAB2#
MAB3#
MAB4#
MAB5#
MAB6#
MAB7#
MAB8#
MAB9#
MAB10#
MAB11#
MAB12#
MAB13#

443ZX

CSB0#/RASB0#
CSB1#/RASB1#
CSB2#/RASB2#
CSB3#/RASB3#
CSB4#/RASB4#
CSB5#/RASB5#

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8

MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

DCLKO

DCLKRD

DCLKWR

AE25
AD24
AD26
AC24
AC26
AB23

AF4
AE4
AF5
AD6
AE6
AB7
AC7
AF7
AB8
AB9
AC9
AE9
AB10
AC10
AF10
AD11
Y24
Y25
W23
W24
W26
W25
V26
U24
U23
T22
T23
T26
R24
R25
P23
N25
AC5
AE5
AB6
AC6
AF6
AD7
AE7
AC8
AD8
AF8
AE8
AF9
AD10
AE10
AB11
AC11
Y23
Y26
W22
V22
V23
V25
U22
U25
U26
T24
T25
U21
R23
R26
P24
P25

AB21
AB22
AD25

1
1
1
1
1
1

MEM_MD0
MEM_MD1
MEM_MD2
MEM_MD3
MEM_MD4
MEM_MD5
MEM_MD6
MEM_MD7
MEM_MD8
MEM_MD9
MEM_MD10
MEM_MD11
MEM_MD12
MEM_MD13
MEM_MD14
MEM_MD15
MEM_MD16
MEM_MD17
MEM_MD18
MEM_MD19
MEM_MD20
MEM_MD21
MEM_MD22
MEM_MD23
MEM_MD24
MEM_MD25
MEM_MD26
MEM_MD27
MEM_MD28
MEM_MD29
MEM_MD30
MEM_MD31
MEM_MD32
MEM_MD33
MEM_MD34
MEM_MD35
MEM_MD36
MEM_MD37
MEM_MD38
MEM_MD39
MEM_MD40
MEM_MD41
MEM_MD42
MEM_MD43
MEM_MD44
MEM_MD45
MEM_MD46
MEM_MD47
MEM_MD48
MEM_MD49
MEM_MD50
MEM_MD51
MEM_MD52
MEM_MD53
MEM_MD54
MEM_MD55
MEM_MD56
MEM_MD57
MEM_MD58
MEM_MD59
MEM_MD60
MEM_MD61
MEM_MD62
MEM_MD63

1

T81
T82
T83
T84

All PACKS Please close to 443ZX

T86
T88

RP43 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP44 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP39 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP35 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP45 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP46 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP36 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

RP34 10 5% 16P8R

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8 9

R325 18 5% 1/16W 0603

T110

DCLKWR (12)

2

C387
15PF 5% 50V 0603 NPO

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A500

Size Document Number Rev

443ZX NORTHBRIDGE-1 0.1

A3

Date: Sheet of

MEM_D_MD0
MEM_D_MD1
MEM_D_MD2
MEM_D_MD3
MEM_D_MD4
MEM_D_MD5
MEM_D_MD6
MEM_D_MD7
MEM_D_MD8
MEM_D_MD9
MEM_D_MD10
MEM_D_MD11
MEM_D_MD12
MEM_D_MD13
MEM_D_MD14
MEM_D_MD15
MEM_D_MD16
MEM_D_MD17
MEM_D_MD18
MEM_D_MD19
MEM_D_MD20
MEM_D_MD21
MEM_D_MD22
MEM_D_MD23
MEM_D_MD24
MEM_D_MD25
MEM_D_MD26
MEM_D_MD27
MEM_D_MD28
MEM_D_MD29
MEM_D_MD30
MEM_D_MD31
MEM_D_MD32
MEM_D_MD33
MEM_D_MD34
MEM_D_MD35
MEM_D_MD36
MEM_D_MD37
MEM_D_MD38
MEM_D_MD39
MEM_D_MD40
MEM_D_MD41
MEM_D_MD42
MEM_D_MD43
MEM_D_MD44
MEM_D_MD45
MEM_D_MD46
MEM_D_MD47
MEM_D_MD48
MEM_D_MD49
MEM_D_MD50
MEM_D_MD51
MEM_D_MD52
MEM_D_MD53
MEM_D_MD54
MEM_D_MD55
MEM_D_MD56
MEM_D_MD57
MEM_D_MD58
MEM_D_MD59
MEM_D_MD60
MEM_D_MD61
MEM_D_MD62
MEM_D_MD63

DCLKO (12)

MEM_D_MD[63..0] (13)

10 40Thursday, December 16, 1999

1

5

AGP_AD[31..0](14)

D D

AGP_C/BE00(14)

C C

B B

AGP_C/BE10(14)
AGP_C/BE20(14)
AGP_C/BE30(14)

AGP_FRAME0(14)

AGP_IRDY0(14)

AGP_TRDY0(14)

AGP_DEVSEL0(14)

AGP_PAR(14)

AGP_STOP0(14)

AGP_SBA[7..0](14)

AGP_REQ0(14,29)

AGP_GNT0(14)
AGP_RBF0(14)

AGP_PIPE0(14)

AGP_ADSTBA(14)
AGP_ADSTBB(14)

AGP_SBSTB(14)

AGP_ST[2..0](14)

AGP_GCLKO(14)

R297

18 5% 1/16W 0603

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_ST0
AGP_ST1
AGP_ST2

R299

18 5% 1/16W 0603

AB5
AE2
AD3
AD2
AD1
AC3
AC1
AB4
AB1
AA5
AA3
AA4
AA2
AA1

W1
W2

AB2

W3

W4
W5

M2
M1

M4
M3

AC2

Y5
Y3

V2
U5

V1
U4
U3
U1
T3
T4
T2
T1
U6
R3
R4
R2

Y4
V4
U2

V5

Y2
Y1
K1

N2
P2
P4
P3
R1

L5
L3

T5
N3

L4
L2
L1

N5
P5

U27-3

G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#

G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_PAR
G_STOP#
SBA0

SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

G_REQ#
G_GNT#

RBF#
PIPE#
AD_STBA

AD_STBB
SB_STB

ST0
ST1
ST2

GCLKIN
GCLKO

443ZX

4

C/BE0#
C/BE1#
C/BE2#
C/BE3#

FRAME#

IRDY#

TRDY#

DEVSEL#

STOP#

SERR#
PLOCK#
PHOLD#

PHLDA#

WSC#

PREQ0#
PREQ1#
PREQ2#
PREQ3#
PREQ4#

PGNT0#
PGNT1#
PGNT2#
PGNT3#
PGNT4#

PCIRST#

CLKRUN#

PCLKIN

AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PAR

3

PCI_AD0

K6

AD0

PCI_AD1

K2

AD1

PCI_AD2

K4

AD2

PCI_AD3

K3

AD3

PCI_AD4

K5

AD4

PCI_AD5

J1

AD5

PCI_AD6

J2

AD6

PCI_AD7

H2

AD7

PCI_AD8

H1

AD8

PCI_AD9

J5

AD9

PCI_AD10

H3

PCI_AD11

H5

PCI_AD12

H4

PCI_AD13

G1

PCI_AD14

G2

PCI_AD15

G4

PCI_AD16

D1

PCI_AD17

D3

PCI_AD18

D2

PCI_AD19

C1

PCI_AD20

A2

PCI_AD21

C3

PCI_AD22

B3

PCI_AD23

D4

PCI_AD24

E5

PCI_AD25

A4

PCI_AD26

D5

PCI_AD27

B4

PCI_AD28

B5

PCI_AD29

A5

PCI_AD30

E6

PCI_AD31

C6
J4

G3
E4
C4

E2
E1
F5
F3
G5
F4
F1
F2
B6

D6
AE3
A6

C7
F10
D8
D10

E7
D7
E10
E8
E9

A3
AC4
B2

1

PCI_AD[31..0] (19,23,26,33)

PCI_C/BE00 (19,23,26,33)
PCI_C/BE10 (19,23,26,33)
PCI_C/BE20 (19,23,26,33)
PCI_C/BE30 (19,23,26,33)

PCI_FRAME0 (19,21,23,26,33)
PCI_IRDY0 (19,21,23,26,33)
PCI_TRDY0 (19,21,23,26,33)
PCI_DEVSEL0 (19,21,23,26,33)
PCI_PAR (19,21,23,26,33)
PCI_STOP0 (19,21,23,26,33)
PCI_SERR0 (19,21,23,33)
PCI_LOCK0 (21)

PCI_PHOLD0 (19,21)
PCI_PHLDA0 (19,21)

T114

PCI_REQ00 (19,21,23)
PCI_REQ10 (21,29)
PCI_REQ20 (21,26,29)
PCI_REQ30 (21,29,33)
PCI_REQ40 (21,29)

PCI_GNT00 (21,23)
PCI_GNT10 (21)
PCI_GNT20 (21,26)
PCI_GNT30 (21,33)
PCI_GNT40 (21)

CPCIRST0 (27)

PCI_CLKRUN0 (19,21,23,26,30,33)

PCLKZX (12)

LAYOUT NOTE:
PLACE CLOSE TO 443ZX

3

1 2

SOT-23

+3V

U32

3

VCC

1

GND

C352

MAX809S SOT-23

0.1uF +80/-20% 16V 0603 Y5V

LAYOUT NOTE:
Decoupling caps should be placed
at the corners of the 443BX.

0.1U*2

2

RST

0 5% 1/16W 0603

R313

0.1U*2

2

C371 0.1uF +80/-20% 16V 0603 Y5V
C370 0.1uF +80/-20% 16V 0603 Y5V
C365 0.1uF +80/-20% 16V 0603 Y5V
C366 0.1uF +80/-20% 16V 0603 Y5V

C305 0.01uF +80/-20% 25V 0603 Y5V
C304 0.01uF +80/-20% 25V 0603 Y5V
C303 0.01uF +80/-20% 25V 0603 Y5V
C302 0.01uF +80/-20% 25V 0603 Y5V

C382 100uF 20% 10V D

+

C294 100uF 20% 10V D

+

+VGTLREF

C308 0.1uF +80/-20% 16V 0603 Y5V
C335 0.1uF +80/-20% 16V 0603 Y5V

+VCC_CPU_IO

+3V

R314
10K 0603(NU)

C361
DUMMY C 0603

+VAGPREF

GCL_SUS_STAT10(6,14)

T111
T112
T113

T115

BXPWROK_3

C339 0.01uF +80/-20% 25V 0603 Y5V

FOR ATE TEST

+3V

1

+3V

U27-4

B1

VCC1

F7

VCC2

F9

VCC3

F18

VCC4

F20

VCC5

G6

VCC6

G21

VCC7

J6

VCC8

J21

VCC9

L11

VCC10

L13

VCC11

L14

VCC12

L16

VCC13

M12

VCC14

M15

VCC15

N11

VCC16

N16

VCC17

N22

VCC18

N26

VCC19

P1

VCC20

P11

VCC21

P16

VCC22

R12

VCC23

R15

VCC24

T11

VCC25

T13

VCC26

T14

VCC27

T16

VCC28

V6

VCC29

V21

VCC30

Y6

VCC31

Y21

VCC32

AA7

VCC33

AA9

VCC34

AA18

VCC35

AA20

VCC36

AE1

VCC37

AE26

VCC38

AF2

VCC39

AF14

VCC40

M23

GTL_REFA

E16

GTL_REFB

M24

VTTA

F17

VTTB

C2

REFVCC5_PCI

N4

AGPREF

P22

1
1
1

1

AE22
AE23

NC0
NC1
NC2

M25

TESTIN#

AD4

SUSTAT#

AF3

BXPWROK

443ZX

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66

A1
A14
A26
C5
C9
C18
C22
E3
E12
E15
E24
F6
F8
F19
F21
H6
H21
J3
J24
L12
L15
M5
M11
M13
M14
M16
M22
N1
N12
N13
N14
N15
N24
P12
P13
P14
P15
P26
R5
R11
R13
R14
R16
R22
T12
T15
V3
V24
W6
W21
AA6
AA8
AA19
AA21
AB3
AB12
AB15
AB24
AB25
AD5
AD9
AD18
AD22
AF1
AF13
AF26

A A

443ZX

0.1U*2 0.1U*2

5

4

3

2

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

443ZX NORTHBRIDGE-2 0.1

A3

Date: Sheet of

11 40Thursday, December 16, 1999

1

5

4

MAKE A GND SHAPE ON PCB SURFACE UNDERNEATH THIS PARTS
AND CONNECT IT TO THE GND LAYER WITH 4 OR MORE THROUGH HOLES

3

2

1

CLOSE TO CLOCK CHIP

Y6

+3VS_CLK

D D

R341

R343

10K 5% 1/16W 0603

10K 5% 1/16W 0603

SUSA0(19)

GCL_CPUSTP0(6)

PCI_STP0(19)

+V25S

C C

D35 RB751V UMD2

L73 HCB1608K-601T10

L78 HCB1608K-601T10

+3VS

PN

+V25S_CLK

+3VS_CLK

+

+

C41422uF 20% 10V B

C39210uF 20% 10V A

C3880.01uF +80/-20% 25V 0603 Y5V

2 3

16
17
18
20

25

8
12
19
28

1 2

14R31818M_CX-16F

C369
10pF 5% 50V 0603

U33

X1 X2

SEL100/66#
PWR_DWN#
CPU_STOP#
PCI_STOP#

VDDQ2

VDDQ3
VDDQ3
VDDQ3
VDDQ3

REF1/SPREAD#

REF0/SEL48#

24/48MHZ/OE

W137 SSOP 28P

48MHZ

CPU1
CPU0

PCI5
PCI4
PCI3
PCI2
PCI1

PCI_F

GND
GND
GND
GND
GND

C368
10pF 5% 50V 0603

26
27

23
24

11
10
9
6
5

4
13

14

10K 5% 1/16W 0603

1
7
15
21
22

PLACE RESISTORS AS CLOSE AS POSIBLE(LESS THAN 1")
TO THE DEIVER PIN AS POSSIBLE

R327 22 5% 1/16W 0603
R326 22 5% 1/16W 0603

R319 22 5% 1/16W 0603

R351

1

R336 22 5% 1/16W 0603

T116

R340 33 5% 1/16W 0603
R337 33 5% 1/16W 0603
R335 33 5% 1/16W 0603
R333 22 5% 1/16W 0603
R332 33 5% 1/16W 0603

R329 33 5% 1/16W 0603
R346 22 5% 1/16W 0603

+3VS_CLK

C396

C413

C380

C386

C373

C376

C391

C397

C402

C381

C403

14MHZ_CLKP4 (19)
14MHZ_CLKSIO (30)

14MHZ_CLKVGA (14)
HCLK_CPU (4,10)

PCLKSIO (30)
PCLKAUDIO (26)
PCLKCB (23)
PCLKOP (33)
PCLKZX (11)

PCLKP4 (19)
USB_CLK (19)

C393

C404

0.01uF +80/-20% 25V 0603 Y5V

C3840.01uF +80/-20% 25V 0603 Y5V

C3830.01uF +80/-20% 25V 0603 Y5V+C39510uF 20% 10V A

0.01uF +80/-20% 25V 0603 Y5V

10pF 5% 50V 0603 NPO

+3V

R328

B B

A A

SDAATF(29,39)
SCLATF(29,39)

DCLKO(10)
SUSA0(19)

PN

RB751V UMD2

10K 5% 1/16W 0603

L72 HCB1608K-601T10

+3V

C379

C399

0.01uF +80/-20% 25V 0603 Y5V

0.01uF +80/-20% 25V 0603 Y5V

MAKE A GND SHAPE ON PCB SURFACE UNDERNEATH THIS PARTS
AND CONNECT IT TO THE GND LAYER WITH 4 OR MORE THROUGH HOLES

U34

1

14

SDATA

15

SCLOCK

9

BUF_IN

20

C416

C4080.01uF +80/-20% 25V 0603 Y5V

C4150.01uF +80/-20% 25V 0603 Y5V

C4170.01uF +80/-20% 25V 0603 Y5V

C4190.01uF +80/-20% 25V 0603 Y5V

C3850.01uF +80/-20% 25V 0603 Y5V

OE

13

VDDIIC

1

VDD

5

VDD

10

VDD

19

VDD

24

VDD

28

VDD

W40S11-02 SSOP 28P

SDRAM9
SDRAM8
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0

VSSIIC

18
11
27
26
23
22
7
6
3
2

16
4

VSS

8

VSS

12

VSS

17

VSS

21

VSS

25

VSS

T118

1

T119

1

T120

1

T121

1

T122

PLACE RESISTORS AS CLOSE(LESS THAN 1)
TO THE DEIVER PIN AS POSSIBLE

R357 22 5% 1/16W 0603

R356 10 5% 1/16W 0603
R355 10 5% 1/16W 0603
R354 10 5% 1/16W 0603
R353 10 5% 1/16W 0603D28

ATTENTION

PLEASE REFER TO THE 100MHZ BANISTER DESIGN GUIDE
FOR THE TRACE DESIGN

5

4

3

10pF 5% 50V 0603 NPO X 11

C418
15PF 5% 50V 0603 NPO

C422

10pF 5% 50V 0603 NPO X 4

2

DCLKWR (10)

MEM_CLK3 (13)
MEM_CLK2 (13)
MEM_CLK1 (13)

C423

C424

C425

FIC International Computer, Inc.

118, NAN-LIN RD., TAISHAN HSIANG,
TAIPEI HSIEN, TAIWAN
[phone]

Title

A550

Size Document Number Rev

CLK GEN. 0.1

A3

Date: Sheet of

MEM_CLK0 (13)

1

12 40Thursday, December 16, 1999