Finisar’s FTLX8571D3BCL 10Gb/s SFP+ transceivers are designed for use in 10-Gigabit
Ethernet links over multimode fiber. They are compliant with SFF-84311, SFF-84322,
IEEE 802.3ae 10GBASE-SR/SW
diagnostics functions are available via a 2-wire serial interface, as specified in SFF-
84725. The FTLX8571D3BCL is a “limiting module”, i.e., it employs a limiting receiver.
Host board designers using an EDC PHY IC should follow the IC manufacturer’s
recommended settings for interoperating the host-board EDC PHY with a limiting
receiver SFP+ module. The transceiver is RoHS compliant and lead free per Directive
2002/95/EC6, and Finisar Application Note AN-20387.
FTLX8571D3BCL Product Specification – September 2009
A
A
I. Pin Descriptions
Pin Symbol Name/Description Ref.
1 V
2 T
3 T
EET
FAULT
Transmitter Disable. Laser output disabled on high or open. 3
DIS
4 SDA 2-wire Serial Interface Data Line 4
5 SCL 2-wire Serial Interface Clock Line 4
6 MOD_ABS Module Absent. Grounded within the module 4
7 RS0 No connection required
8 RX_LOS Loss of Signal indication. Logic 0 indicates normal operation. 5
9 RS1
10 V
11 V
12 RD-
EER
EER
13 RD+ Receiver Non-inverted DATA out. AC Coupled
14 V
15 V
16 V
17 V
EER
Receiver Power Supply
CCR
Transmitter Power Supply
CCT
EET
18 TD+ Transmitter Non-Inverted DATA in. AC Coupled.
19 TD20 V
EET
Notes:
1. Circuit ground is internally isolated from chassis ground.
2. T
is an open collector/drain output, which should be pulled up with a 4.7k – 10k Ohms resistor on
FAULT
the host board if intended for use. Pull up voltage should be between 2.0V to Vcc + 0.3V. A high
output indicates a transmitter fault caused by either the TX bias current or the TX output power
exceeding the preset alarm thresholds. A low output indicates normal operation. In the low state, the
output is pulled to <0.8V.
3. Laser output disabled on T
4. Should be pulled up with 4.7kΩ – 10kΩ on host board to a voltage between 2.0V and 3.6V.
MOD_ABS pulls line low to indicate module is plugged in.
5. LOS is open collector output. Should be pulled up with 4.7kΩ – 10kΩ on host board to a voltage
between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.
Figure 1. Diagram of Host Board Connector Block Pin Numbers and Names.
Transmitter Ground (Common with Receiver Ground) 1
Transmitter Fault. 2
No connection required
Receiver Ground (Common with Transmitter Ground) 1
Receiver Ground (Common with Transmitter Ground) 1
Receiver Inverted DATA out. AC Coupled
Receiver Ground (Common with Transmitter Ground) 1
Transmitter Ground (Common with Receiver Ground) 1
Transmitter Inverted DATA in. AC Coupled.
Transmitter Ground (Common with Receiver Ground) 1
FTLX8571D3BCL Product Specification – September 2009
II. Absolute Maximum Ratings
Exceeding the limits below may damage the transceiver module permanently.
Parameter Symbol Min Typ Max Unit Ref.
Maximum Supply Voltage Vcc -0.5 4.0 V
Storage Temperature T
Case Operating Temperature T
S
A
Relative Humidity RH 0 85 % 1
Notes:
I. Non-condensing.
III. Electrical Characteristics (T
Parameter Symbol Min Typ Max Unit Ref.
Supply Voltage Vcc 3.14 3.46 V
Supply Current Icc 250 mA
Transmitter
Input differential impedance R
Differential data input swing Vin,pp
Transmit Disable Voltage V
Transmit Enable Voltage V
Receiver
Differential data output swing Vout,pp
Data output rise time, fall time tr 28 ps 3
LOS Fault V
LOS Normal V
Power Supply Noise Tolerance VccT/VccR
Notes:
1. Connected directly to TX data input pins. AC coupling from pins into laser driver IC.
2. Into 100Ω differential termination.
3. 20 – 80 % . Measured with Module Compliance Test Board and OMA test pattern. Use of four 1’s
and four 0’s in sequence in the PRBS^9 is an acceptable alternative. SFF-8431 Rev 3.0
4. LOS is an open collector output. Should be pulled up with 4.7kΩ – 10kΩ on the host board.
Normal operation is logic 0; loss of signal is logic 1. Maximum pull-up voltage is 5.5V.
5. Testing methodology per SFF-8431. Rev 3.0
6. The FTLX8571D3BCL is a “limiting module”, i.e., it employs a limiting receiver. Host board
designers using an EDC PHY IC should follow the IC manufacturer’s recommended settings for
interoperating the host-board EDC PHY with a limiting receiver SFP+ module.
FTLX8571D3BCL Product Specification – September 2009
400 MHz-km 66
OM2
50μm
Notes:
1. 10GBASE-SR/SW. Contact Finisar for higher data-rate support.
2. Tested with a 2
500 MHz-km
OM3
2000 MHz-km
31
– 1 PRBS
Lmax
82
300
m
VI. Environmental Specifications
Finisar 850nm SFP transceivers have a commercial operating temperature range from
0°C to +70°C case temperature.
Parameter Symbol Min Typ Max Units Ref.
Case Operating Temperature T
Storage Temperature T
op
sto
0 70 °C
-40 85 °C
VII. Regulatory Compliance
Finisar transceivers are Class 1 Laser Products and comply with US FDA regulations.
These products are certified by TÜV and CSA to meet the Class 1 eye safety
requirements of EN (IEC) 60825 and the electrical safety requirements of
EN (IEC) 60950. Copies of certificates are available at Finisar Corporation upon request.
FTLX8571D3BCL Product Specification – September 2009
VIII. Digital Diagnostic Functions
Finisar FTLX8571D3BCL SFP+ transceivers support the 2-wire serial communication
protocol as defined in the SFF-8472. It is very closely related to the E2PROM defined in
the GBIC standard, with the same electrical specifications.
The standard SFP+ serial ID provides access to identification information that describes
the transceiver’s capabilities, standard interfaces, manufacturer, and other information.
Additionally, Finisar SFP+ transceivers provide an enhanced digital diagnostic
monitoring interface, which allows real-time access to device operating parameters such
as transceiver temperature, laser bias current, transmitted optical power, received optical
power and transceiver supply voltage. It also defines a sophisticated system of alarm and
warning flags, which alerts end-users when particular operating parameters are outside of
a factory set normal range.
SFF-8472 defines a 256-byte memory map in E2PROM that is accessible over a
2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic
monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally
defined serial ID memory map remains unchanged. The interface is identical to, and is
thus fully backward compatible with both the GBIC Specification and the SFP Multi
Source Agreement. The complete interface is described in Finisar Application Note AN2030: “Digital Diagnostics Monitoring Interface for SFP Optical Transceivers”.
The operating and diagnostics information is monitored and reported by a Digital
Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed
through a 2-wire serial interface. When the serial protocol is activated, the serial clock
signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the
SFP transceiver into those segments of the E2PROM that are not write-protected. The
negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod
Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with
SCL to mark the start and end of serial protocol activation. The memories are organized
as a series of 8-bit data words that can be addressed individually or sequentially.
For more information, please see the SFF-8472 documentation and Finisar Application
Note AN-2030.
FTLX8571D3BCL Product Specification – September 2009
X. Mechanical Specifications
Finisar FTLX8571D3BCL SFP+ transceivers are compatible with the SFF-8432
specification for improved pluggable form factor, and shown here for reference purposes
only. Bail color is beige.