Fairchild Semiconductor SI9934DY Datasheet

Si9934DY

Dual P-Channel 2.5V Specified PowerTrench



MOSFET

Si9934DY

January 2001

General Description

This P-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 12V).

Applications

• Load switch

• Motor drive

• DC/DC conversion

• Power management

D1

D

D1

D

D2

D

D2

D

SO-8

Pin 1

SO-8

S2

Absolute Maximum Ratings T

G1

G

S1

S

G2

S

S

=25oC unless otherwise noted

A

Features

• –5 A, –20 V, R
R

• Extended V

• Low gate charge

• High performance trench technology for extremely

low R

• High power and current handling capability

GSS

DS(ON)

5
6
7
8

= 50 mΩ @ VGS = –4.5 V

DS(ON)

= 74 mΩ @ VGS = –2.5 V

DS(ON)

range (±12V) for battery applications

4

Q1

Q2

3
2
1

Symbol Parameter Ratings Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous (Note 1a)

– Pulsed
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6

(Note 1b)
(Note 1c)

Operating and Storage Junction Temperature Range –55 to +175

–20
±12

–5

–30

1

0.9

V
V
A

W

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient (Note 1a) 78
Thermal Resistance, Junction-to-Case (Note 1) 40

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

9934 Si9934DY 13’’ 12mm 2500 units

2001 Fairchild Semiconductor International

°C/W
°C/W

Si9934DY Rev A(W)

Si9934DY

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics

BV

DSS

∆BVDSS
∆T

J

I

DSS

I

GSSF

I

GSSR

Drain–Source Breakdown Voltage
Breakdown Voltage Temperature

Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse

V

= 0 V, ID = –250 µA

GS

ID = –250 µA, Referenced to 25°C
V

= –16 V, VGS = 0 V –1

DS

V

= –12 V, VDS = 0 V –100 nA

GS

V

= 12 V, VDS = 0 V 100 nA

GS

–20 V

–16

mV/°C

On Characteristics (Note 2)

V

GS(th)

∆VGS(th)
∆T

J

R

DS(on)

I

D(on)

g

FS

= VGS, ID = –250 µA

Gate Threshold Voltage
Gate Threshold Voltage

V

DS

ID = –250 µA, Referenced to 25°C

Temperature Coefficient

V

= –4.5 V, ID = –5 A

Static Drain–Source
On–Resistance

On–State Drain Current

GS

= –2.5 V, ID = –3 A

V

GS

= –4.5 V, ID = –5, TJ=125°C

V

GS

V

= –4.5 V, VDS = –5 V –15 A

GS

Forward Transconductance VDS = –5 V, ID = –5 A 13 S

–0.6 –1.0 –1.5 V

3

36
56
49

50
74
80

mV/°C

mΩ

Dynamic C haracteristics

C

iss

C

oss

C

rss

Input Capacitance 1015 pF
Output Capacitance 446 pF
Reverse Transfer Capacitance

V

= –10 V, V

DS

f = 1.0 MHz

GS

= 0 V,

118 pF

Switching Characteristics (Note 2)

V

= –5 V, ID = –1 A,

t
t
t
t
Q
Q
Q

d(on)

r

d(off)

f

Turn–On Delay Time 11 20 ns
Turn–On Rise Time 18 32 ns
Turn–Off Delay Time 34 55 ns
Turn–Off Fall Time

g

gs

gd

Total Gate Charge 9.7 16 nC
Gate–Source Charge 2.2 nC
Gate–Drain Charge

DD

= –4.5 V, R

V

GS

V

= –5 V, ID = –5 A,

DS

= –4.5 V

V

GS

GEN

= 6 Ω

34 55 ns

2.4 nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward

VGS = 0 V, IS = –1.3 A (Note 2) –0.7 –1.2 V

Voltage

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

is guaranteed by design while R

θJC

is determined by the user's board design.

θCA

–1.3

µA

A

a) 78°C/W when

mounted on a

0.5in2 pad of 2
oz copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

b) 125°C/W when

mounted on a

0.02 in2 pad of
2 oz copper

c) 135°C/W when

mounted on a
minimum pad.

Si9934DY Rev A(W)