Fairchild Semiconductor SI9435DY Datasheet

Si9435DY
P-Channel Logic Level PowerTrench

Si9435DY
January 2001
General Description
This P-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
Applications
DC/DC converter
Load switch
Motor Drive
D
D
D
D
G
S
SO-8
Absolute Maximum Ratings T
S
S
=25oC unless otherwise noted
A
Features
–5.3 A, –30 V. R
Low gate charge
Fast switching speed
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
5 6 7 8
R
DS(ON)
DS(ON)
= 50 m @ V = 80 m @ V
GS
GS
4 3 2 1
= –10 V = –4.5 V
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage –30 V Gate-Source Voltage Drain Current – Continuous (Note 1a) -5.3 A
– Pulsed -20
Power Dissipation for Single Operation (Note 1a) 2.5
(Note 1b) (Note 1c)
Operating and Storage Junction Temperature Range -55 to +150
±20
1.2
1.0
V
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 50 Thermal Resistance, Junction-to-Case (Note 1) 25
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
9435 Si9435DY 13’’ 12mm 2500 units
2001 Fairchild Semiconductor International
°C/W °C/W
Si9435DY Rev A(W)
Si9435DY
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
BV
DSS
BVDSST
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage Breakdown Voltage Temperature
Coefficient
= 0 V, ID = –250 µA
V
GS
I
= –250 µA, Referenced to 25°C
D
Zero Gate Voltage Drain Current VDS = –24 V, VGS = 0 V –1 Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA
–30 V
–22
mV/°C
On Characteristics (Note 2)
V
GS(th)
VGS(th)T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage Gate Threshold Voltage
Temperature Coefficient Static Drain–Source
On–Resistance
= VGS, ID = –250 µA
V
DS
I
= –250 µA, Referenced to 25°C
D
VGS = –10 V, ID = –5.3 A
= –10 V, ID = –5.3 A, TJ=125°C
V
GS
V
= –4.5 V, ID = –4.2A,
GS
On–State Drain Current VGS = –10 V, VDS = –5 V –20 A Forward Transconductance VDS = –15 V, ID = –5.3 A 12 S
–1 –1.7 –3 V
4
38 54 55
50 79 80
mV/°C
m
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 690 pF Output Capacitance 306 pF Reverse Transfer Capacitance
= –15 V, V
V
DS
f = 1.0 MHz
GS
= 0 V,
77 pF
Switching Characteristics (Note 2)
t t t t Q Q Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 7 14 ns Turn–On Rise Time 10 18 ns
= –15 V, ID = –1 A,
V
DD
= –10 V, R
V
GS
GEN
= 6
Turn–Off Delay Time 19 34 ns Turn–Off Fall Time Total Gate Charge 14 23 nC Gate–Source Charge 2.4 nC
V
= –15 V, ID = –5.3 A,
DS
= –10 V
V
GS
Gate–Drain Charge
11 20 ns
4.8 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
Maximum Continuous Drain–Source Diode Forward Current –5.3 A Drain–Source Diode Forward
Voltage
is guaranteed by design while R
θJC
θCA
V
= 0 V, IS = –5.3 A (Note 2) –0.86 –1.2 V
GS
is determined by the user's board design.
µA
a) 50°C/W when
mounted on a 1in pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
2
b) 105°C/W when
mounted on a .04 in pad of 2 oz copper
2
c) 125°C/W when mounted on a
minimum pad.
Si9435DY Rev A(W)
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