Fairchild Semiconductor SI6926DQ Datasheet

SI6926DQ
Dual N-Channel 2.5V Specified PowerTrench

SI6926DQ
April 2001
General Description
This N-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been opt imized for power management applications with a wide range of gate drive voltage (2.5V – 12V).
Applications
Load switch
Motor drive
DC/DC conversion
Power management
G
2
S
2
S
2
D
2
G
S
S
1
D
1
TSSOP-8
Pin 1
Features
5.5 A, 20 V. R R
Extended V
Low gate charge
High performance trench te chnology for extremely
low R
Low profile TSSOP-8 package
1
1
DS(ON)
GSS
= 0.021 @ VGS = 4.5 V
DS(ON)
= 0.035 @ VGS = 2.5 V
DS(ON)
range (±12V) for battery applications
1 2 3 4
8 7 6 5
Absolute Maximum Ratings T
o
=25
C unless otherwise noted
A
Symbol Parameter Ratings Units
V
Drain-Source Voltage 20 V
DSS
V
Gate-Source Voltage
GSS
ID Drain Current – Continuous (Note 1a) 5.5 A – Pulsed 30 PD Power Dissipation (Note 1a) 1.0 W
TJ, T
STG
Operating and Storage Junction Temperature Range -55 to +150
(Note 1b)
±12
0.6
V
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1a) 125 (Note 1b)
208
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
6926 SI6926DQ 13’’ 12mm 3000 units
2001 Fairchild Semiconductor Corporation
SI6926DQ Rev A(W)
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
BVDSS T
I
Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1
DSS
I
GSSF
I
GSSR
Breakdown Voltage Temperature Coefficient
J
Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA
V
= 0 V, ID = 250 µA
GS
= 250 µA,Referenced to 25°C
I
D
20 V
14
mV/°C
µA
On Characteristics (Note 2)
V
Gate Threshold Voltage
GS(th)
VGS(th)TJ
R
DS(on)
Gate Threshold Voltage Temperature Coefficient
Static Drain–Source
On–Resistance
I
On–State Drain Current VGS = 4.5 V, VDS = 5 V 30 A
D(on)
V
= VGS, ID = 250 µA
DS
I
= 250 µA,Referenced to 25°C
D
= 4.5 V, ID = 5.5 A
V
GS
= 2.5 V, ID = 4.2 A
V
GS
= 4.5 V, ID = 5.5A, TJ=125°C
V
GS
0.6 0.8 1.5 V –3.2
17 24 23
21 35 34
mV/°C
m
gFS Forward Transconductance VDS = 5 V, ID = 5.5 A 26 S
Dynamic Characteristics
C
Input Capacitance 1082 pF
iss
C
Output Capacitance 277 pF
oss
C
Reverse Transfer Capacitance
rss
= 10 V, V
V
DS
f = 1.0 MHz
= 0 V,
GS
130 pF
Switching Characteristics (Note 2)
t
Turn–On Delay Time 8 20 ns
d(on)
tr Turn–On Rise Time 8 27 ns t
Turn–Off Delay Time 24 38 ns
d(off)
tf Turn–Off Fall Time Qg Total Gate Charge 12 17 nC Qgs Gate–Source Charge 2 nC Qgd Gate–Drain Charge
= 10 V, ID = 1 A,
V
DD
= 4.5 V, R
V
GS
= 10 V, ID = 5.5 A,
V
DS
V
= 4.5 V
GS
GEN
= 6
8 16 ns
3 nC
SI6926DQ
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 0.83 A VSD Drain–Source Diode Forward
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
a) R
is 125°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
θJA
b) R
is 208 °C/W (steady state) when mounted on a minimum copper pad on FR-4.
θJA
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
VGS = 0 V, IS = 0.83 A (Note 2) 0.7 1.2 V
SI6926DQ Rev. A (W)
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