
Si4963DY
Dual P-Channel 2.5V Specified PowerTrench MOSFET
January 200 1
General Description
This P-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 12V).
Applications
• Load switch
• Motor drive
• DC/DC conversion
• Power management
D1
D
D1
D
D2
D
D2
D
S2
S
G1
G
S1
S
G2
S
=25oC unless otherwise noted
A
SO-8
SO-8
Pin 1
Absolute Maximum Ratings T
Features
• –6.2 A, –20 V,R
R
• Extended V
• Low gate charge
• High performance trench technology for extremely
low R
• High power and current handling capability
GSS
DS(ON)
5
6
7
8
= 33 m Ω @ VGS = –4.5 V
DS(ON)
= 50 m Ω @ VGS = –2.5 V
DS(ON)
range (±12V) for battery applications
4
Q1
Q2
3
2
1
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
STG
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous (Note 1a)
– Pulsed
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range –55 to +175 °C
–20
±12
–6.2
–40
1
0.9
V
V
A
W
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
4963 Si4963DY 13’’ 12mm 2500 units
2001 Fairchild Semiconductor International Si4963DY Rev A(W)

Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VGS = 0 V, ID = –250 µA –20 V
ID = –250 µA, Referenced to 25°C –16 mV/°C
VDS = –16 V, VGS = 0 V –1 µA
VGS = –12 V, VDS = 0 V –100 nA
VGS = 12 V, VDS = 0 V 100 nA
On Characteristics (Note 2)
V
GS(th)
∆VGS( th)
∆T
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
VDS = VGS, ID = –250 µA
ID = –250 µA, Referenced to 25°C
Temperature Coefficient
Static Drain–Source
On–Resistance
VGS = –4.5 V, ID = –6.2 A
VGS = –2.5 V, ID = –5 A
VGS = –4.5 V, ID = –6.2A,
TJ=125°C
On–State Drain Current
VGS = –4.5 V, VDS = –5 V –15 A
Forward Transconductance VDS = –5 V, ID = –6.2 A 19 S
–0.6 –1.0 –1.5 V
3
23
34
45
33
50
56
mV/°C
m Ω
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 1456 pF
Output Capacitance 300 pF
Reverse Transfer Capacitance
VDS = –10 V, V
f = 1.0 MHz
GS
= 0 V,
150 pF
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn–On Delay Time 15 27 ns
Turn–On Rise Time 11 20 ns
Turn–Off Delay Time 57 91 ns
Turn–Off Fall Time
Total Gate Charge 14 20 nC
Gate–Source Charge 3 nC
Gate–Drain Charge
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, R
GEN
= 6 Ω
VDS = –10 V, ID = –6.2 A,
VGS = –4.5 V
37 59 ns
5 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = –1.3 A (Note 2) –0.7 -1.2 V
Voltage
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
θJA
the drain pins. R
is guaranteed by design while R
θJC
a) 78°C/W when
mounted on a
0.5in2 pad of 2
oz copper
is determined by the user's board design.
θCA
b) 125°C/W when
mounted on a
0.02 in2 pad of
2 oz copper
–1.3
c) 135°C/W when
mounted on a
minimum pad.
A
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Si4963DY Rev A(W)