Fairchild Semiconductor SI3456DV Datasheet
Si3456DV
N-Channel PowerTrenchÒ MOSFET
Si3456DV
June 2002
General Description
These N-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor’s advanced Power
Trench process that has been especially tailored to
minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
· 5.1 A, 30 V. R
R
· High performance trench technology for extremely
low R
DS(ON)
· Low gate charge
· High power and current handling capability
= 45 mW @ VGS = 10 V
DS(ON)
= 65 mW @ VGS = 4.5 V
DS(ON)
S
D
D
1
2
6
5
G
SuperSOT -6
TM
D
D
Absolute Maximum Ratings T
=25oC unless otherwise noted
A
3
4
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
D
TJ, T
STG
Drain-Source Voltage 30 V
Gate-Source Voltage
Drain Current – Continuous (Note 1a) 5.1 A
– Pulsed 20
Maximum Power Dissipation (Note 1a) 1.6 WP
(Note 1b)
Operating and Storage Junction Temperature Range –55 to +150
±20
0.8
V
°C
Thermal Characteristics
R
qJA
R
qJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78
Thermal Resistance, Junction-to-Case (Note 1) 30
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.456 Si3456DV 7’’ 8mm 3000 units
Ó2002 Fairchild Semiconductor Corpor ation
°C/W
Si3456DV Rev B
Si3456DV
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
DBVDSS
DT
J
I
DSS
I
GSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
= 0 V, ID = 250 mA
V
GS
I
= 250 mA, Referenced to 25°C
D
Zero Gate Voltage Drain Current VDS = 30 V, VGS = 0 V 1
TJ=70°C
Gate–Body Leakage
= ±20 V, VDS = 0 V ±100
V
GS
30 V
25
mV/°C
5
mA
nA
On Characteristics (Note 2)
V
GS(th)
DVGS(th)
DT
J
R
DS(on)
I
D(on)
g
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
= VGS,ID = 250 mA
V
DS
I
= 250 mA, Referenced to 25°C
D
= 10 V, ID = 5.1 A
V
GS
= 4.5 V, ID = 4.3 A
V
GS
= 10 V, ID = 5.1 A, TJ=125°C
V
GS
On–State Drain Current VGS = 10 V, VDS = 5 V 15 A
Forward Transconductance VDS = 10 V, ID = 5.1 A 12 S
11.5 2 V
–4
33
44
49
45
65
71
mV/°
mW
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance 463 pF
Output Capacitance 109 pF
Reverse Transfer Capacitance
Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.1
= 15 V, V
V
DS
f = 1.0 MHz
GS
= 0 V,
44 pF
W
Switching Characteristics (Note 2)
= 15 V, ID = 1 A,
V
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
Turn–On Delay Time 6.3 13 nS
Turn–On Rise Time 6 12 nS
Turn–Off Delay Time 20 36 nS
Turn–Off Fall Time
g
gs
gd
Total Gate Charge 9 12.6 nC
Gate–Source Charge 1.4 nC
Gate–Drain Charge
DS
= 10 V, R
V
GS
V
= 15 V, ID = 5.1 A,
DS
= 10 V
V
GS
GEN
= 6 W
2.3 4.6 nS
1.6 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Maximum Continuous Drain–Source Diode Forward Current 1.3 A
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time 18 nS
Diode Reverse Recovery Charge
V
= 0 V, IS = 1.3 A (Note 2) 0.77 1.2 V
GS
= 5.1A
I
F
= 100 A/µs (Note 2)
d
iF/dt
17 nC
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
qJA
a. 78°C/W when mounted on a 1in
b. 156°C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width £ 300 ms, Duty Cycle £ 2.0%
is guaranteed by design while R
pins. R
qJC
is determined by the user's board design.
qCA
2
pad of 2oz copper on FR-4 board.
Si3456DV Rev B
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