Fairchild Semiconductor NM24C32LM8, NM24C32N, NM24C32M8, NM24C32EN, NM24C32EM8 Datasheet

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NM24C32 Rev. C.2

NM24C32 32K-Bit Extended 2-Wire Bus Interface

Serial EEPROM with Write Protect

PRELIMINARY

March 1999

© 1999 Fairchild Semiconductor Corporation

NM24C32
32K-Bit Extended 2-Wire Bus Interface
Serial EEPROM with Write Protect

General Description:

The NM24C32 devices are 32,768 bits of CMOS nonvolatile
electrically erasable memory. These devices offer the designer
different low voltage and low power options, and they conform to
all specifications in the Extended IIC 2-wire protocol. Furthermore,
they are designed to minimize device pin count and simplify PC
board layout requirements.

The upper half of the memory can be disabled (Write Protection)
by connecting the WP pin to VCC. This section of memory then
becomes ROM.

This communication protocol uses CLOCK (SCL) and DATA I/O
(SDA) lines to synchronously clock data between the master (for
example a microprocessor) and the slave EEPROM device(s).

Fairchild EEPROMs are designed and tested for applications
requiring high endurance, high reliability, and low power con­sumption.

Block Diagram

Features:

■ Extended operating voltage 2.7V – 5.5V

■ 400 KHz clock frequency (F) at 2.7V - 5.5V

■ 200µA active current typical

10µA standby current typical
1µA standby typical (L)

0.1µA standby typical (LZ)

■ IIC compatible interface
– Provides bidirectional data transfer protocol

■ 32 byte page write mode
– Minimizes total write time per byte

■ Self timed write cycle
Typical write cycle time of 6ms

■ Hardware write protect for upper block

■ Endurance: 1,000,000 data changes

■ Data retention greater than 40 years

■ Packages available: 8-pin SO, 8-pin DIP

■ Low VCC programming lockout (3.8V - on Standard V

CC

devices only).

DS500073-1

H.V. GENERATION

TIMING &CONTROL

E2PROM

ARRAY

YDEC

DATA REGISTER

XDEC

CONTROL

LOGIC

WORD
ADDRESS
COUNTER

SLAVE ADDRESS

REGISTER &

COMPARATOR

START

STOP

LOGIC

WRITE

LOCKOUT

START CYCLE

CK

D

IN

R/W

LOAD INC

SDA

SCL

WP

V

CC

D

OUT

A2
A1
A0

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NM24C32 Rev. C.2

NM24C32 32K-Bit Extended 2-Wire Bus Interface

Serial EEPROM with Write Protect

Connection Diagram

Dual-In-Line Package (N)

and 8-Pin SO Package (M8)

Top View

See Package Number N08E and M08A

Pin Names

A0, A1, A2 Device Address Input

V

SS

Ground
SDA Data I/O
SCL Clock Input

WP Write Protect
V

CC

Power Supply

Ordering Information
NM 24 C XX F LZ E XX Letter Description

Package N 8-Pin DIP

M8 8-Pin SOIC

Temp. Range None 0 to 70°C

V -40 to +125°C
E -40 to +85°C

Voltage Operating Range Blank 4.5V to 5.5V

L 2.7V to 4.5V
LZ 2.7V to 4.5V and

<1µA Standby Current

SCL Clock Frequency Blank 100KHz

F 400KHz

Density 32 32K with Write Protect

C CMOS

Interface 24 IIC

NM Fairchild Non-Volatile

Memory

A0
A1
A2

V

SS

V

CC

WP
SCL
SDA

8
7
6
5

1
2
3
4

NM24C32

DS500073-2

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NM24C32 Rev. C.2

NM24C32 32K-Bit Extended 2-Wire Bus Interface

Serial EEPROM with Write Protect

Product Specifications
Absolute Maximum Ratings

Ambient Storage Temperature –65°C to +150°C
All Input or Output Voltages

with Respect to Ground 6.5V to –0.3V

Lead Temperature

(Soldering, 10 seconds) +300°C

ESD Rating 2000V min.

Operating Conditions

Ambient Operating Temperature

NM24C32 0°C to +70°C
NM24C32E -40°C to +85°C
NM24C32V -40°C to +125°C

Positive Power Supply

NM24C32 4.5V to 5.5V
NM24C32L 2.7V to 4.5V
NM24C32LZ 2.7V to 4.5V

Standard VCC (4.5V to 5.5V) DC Electrical Characteristics

Symbol Parameter Test Conditions Limits Units

Min

Typ (Note 1)

Max

I

CCA

Active Power Supply Current f

SCL

= 100 kHz 0.2 1.0 mA

I

SB

Standby Current VIN = GND or V

CC

10 50 µA

I

LI

Input Leakage Current VIN = GND to V

CC

0.1 1 µA

I

LO

Output Leakage Current V

OUT

= GND to V

CC

0.1 1 µA

V

IL

Input Low Voltage –0.3 VCC x 0.3 V

V

IH

Input High Voltage VCC x 0.7 VCC + 0.5 V

V

OL

Output Low Voltage I

OL

= 3 mA 0.4 V

Low VCC (2.7V to 4.5V) DC Electrical Characteristics

Symbol Parameter Test Conditions Limits Units

Min

Typ (Note 1)

Max

I

CCA

Active Power Supply Current f

SCL

= 100 kHz 0.2 1.0 mA

I

SB

Standby Current for L VIN = GND or V

CC

110µA

(Note 1) Standby Current for LZ VIN = GND or V

CC

0.1 1 µA

I

LI

Input Leakage Current VIN = GND to V

CC

0.1 1 µA

I

LO

Output Leakage Current V

OUT

= GND to V

CC

0.1 1 µA

V

IL

Input Low Voltage –0.3 V

CC

x 0.3 V

V

IH

Input High Voltage VCC x 0.7 VCC + 0.5 V

V

OL

Output Low Voltage IOL = 3 mA 0.4 V

Capacitance T

A

= +25°C, f = 100/400 KHz, VCC = 5V (Note 2)

Symbol Test Conditions Max Units

C

I/O

Input/Output Capacitance (SDA) V

I/O

= 0V 8 pF

C

IN

Input Capacitance (A0, A1, A2, SCL) VIN = 0V 6 pF

Note 1: Typical values are for TA = 25°C and nominal supply voltage (5V).
Note 2: This parameter is periodically sampled and not 100% tested.

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NM24C32 Rev. C.2

NM24C32 32K-Bit Extended 2-Wire Bus Interface

Serial EEPROM with Write Protect

AC Conditions of Test

Input Pulse Levels VCC x 0.1 to VCC x 0.9
Input Rise and Fall Times 10 ns
Input & Output Timing Levels VCC x 0.5
Output Load 1 TTL Gate and CL = 100 pF

Read and Write Cycle Limits (Standard and Low VCC Range - 2.7V-5.5V)

Symbol Parameter 100 KHz 400 KHz Units

Min Max Min Max

f

SCL

SCL Clock Frequency 100 400 kHz

T

I

Noise Suppression Time Constant at
SCL, SDA Inputs (Minimum V

IN

100 50 ns

Pulse width)

t

AA

SCL Low to SDA Data Out Valid 0.3 3.5 0.1 0.9 µs

t

BUF

Time the Bus Must Be Free before 4.7 1.3 µs
a New Transmission Can Start

t

HD:STA

Start Condition Hold Time 4.0 0.6 µs

t

LOW

Clock Low Period 4.7 1.5 µs

t

HIGH

Clock High Period 4.0 0.6 µs

t

SU:STA

Start Condition Setup Time 4.7 0.6 µs
(for a Repeated Start Condition)

t

HD:DAT

Data in Hold Time 0 0 ns

t

SU:DAT

Data in Setup Time 250 100 ns

t

R

SDA and SCL Rise Time 1 0.3 µs

t

F

SDA and SCL Fall Time 300 300 ns

t

SU:STO

Stop Condition Setup Time 4.7 0.6 µs

t

DH

Data Out Hold Time 300 50 ns

t

WR

Write Cycle Time - NM24C32 10 10 ms

(Note 3) - NM24C32L, NM24C32LZ 15 15

Note 3: The write cycle time (tWR) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the
NM24C32 bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address