Fairchild Semiconductor NDT456P Datasheet
December 1998
NDT456P
P-Channel Enhancement Mode Field Effect Transistor
General Description Features
Power SOT P-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance and provide superior
switching performance. These devices are particularly
suited for low voltage applications such as notebook
computer power management, battery powered circuits,
and DC motor control.
______________________________________________________________________________
-7.5 A, -30 V. R
R
High density cell design for extremely low R
= 0.030 Ω @ VGS = -10 V
DS(ON)
= 0.045 Ω @ VGS = -4.5 V.
DS(ON)
DS(ON)
.
High power and current handling capability in a widely
used surface mount package.
D
D S
G
D
G
S
Absolute Maximum Ratings T
Symbol Parameter NDT456P Units
V
DSS
V
GSS
I
D
P
D
TJ,T
THERMAL CHARACTERISTICS
R
θ
R
θ
Drain-Source Voltage -30 V
Gate-Source Voltage ±20 V
Drain Current - Continuous (Note 1a) ±7.5 A
- Pulsed ±20
Maximum Power Dissipation (Note 1a) 3 W
(Note 1b) 1.3
(Note 1c)
Operating and Storage Temperature Range -65 to 150 °C
STG
Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W
JA
Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W
JC
= 25°C unless otherwise noted
A
1.1
© 1998 Fairchild Semiconductor Corporation
NDT456P Rev. F
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA -30 V
Zero Gate Voltage Drain Current VDS = -24 V, V
= 0 V -1 µA
GS
TJ = 55°C -10 µA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage VDS = VGS, ID = - 250 µA -1 -1.5 -3 V
TJ = 125°C -0.5 -1.1 -2.6
R
DS(ON)
Static Drain-Source On-Resistance VGS = -10 V, ID = -7.5 A 0.026 0.03
Ω
TJ = 125°C 0.035 0.054
VGS = - 4.5 V, ID = -6 A 0.041 0.045
I
D(on)
On-State Drain Current VGS = -10 V , VDS = - 5 V -20 A
VGS = -4.5 V, VDS = - 5 V -10
G
fs
Forward Transconductance VGS = -10 V, ID = -7.5 A 13 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -15 V, V
Output Capacitance 905 pF
f = 1.0 MHz
GS
= 0 V,
1440 pF
Reverse Transfer Capacitance 355 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = -15 V, ID = -7 A,
V
= -10 V, R
Turn - On Rise Time 65 120 ns
GEN
GEN
= 12 Ω
10 20 ns
Turn - Off Delay Time 70 130 ns
Turn - Off Fall Time 70 130 ns
Total Gate Charge VDS = -10 V,
Gate-Source Charge 5 nC
ID = -7.5 A, VGS = -10 V
47 67 nC
Gate-Drain Charge 12 nC
NDT456P Rev. F
Electrical Characteristics (T
(t)
T
−
T
θJA
T
−
T
θJC+RθCA
(t)
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
t
rr
Notes:
P
1. R
D
solder mounting surface of the drain pins. R
typical R
Maximum Continuous Drain-Source Diode Forward Current -2.5 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = - 2.5 A (Note 2) - 0.85 -1.2 V
Reverse Recovery Time VGS = 0 V, IF = - 2.5 A dIF/dt = 100 A/µs 140 ns
J
A
=
R
is found to be:
JA
θ
a. 42oC when mounted on a 1 in2 pad of 2oz copper.
b. 95oC when mounted on a 0.066in2 pad of 2oz copper.
c. 110oC/W when mounted on a 0.00123in2 pad of 2oz copper.
J
=
(t)
R
2
A
= I
(t)
is guaranteed by design while R
JC
θ
×R
DS(ON)@T
D
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the
JA
θ
J
is defined by users. For general reference: Applications on 4.5"x5" FR-4 PCB under still air environment,
CA
θ
1a
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
1b
1c
NDT456P Rev. F
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