Fairchild Semiconductor NDS9925A Datasheet
NDS9925A
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description Features
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as notebook computer
power management and other battery powered circuits
where fast switching, low in-line power loss, and
resistance to transients are needed.
4.5 A, 20 V. R
R
= 0.060 Ω @ VGS = 4.5 V
DS(ON)
DS(ON)
High density cell design for extremely low R
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
= 0.075 Ω @ VGS = 2.7 V.
May 1998
.
DS(ON)
SOT-23
D2
D2
D1
D1
SO-8
NDS
9925A
1
pin
S1
Absolute Maximum Ratings T
SuperSOTTM-8
G2
S2
G1
= 25°C unless otherwise noted
A
SO-8
SOT-223SuperSOTTM-6
5
6
7
8
SOIC-16
4
3
2
1
Symbol Parameter NDS9925A Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 20 V
Gate-Source Voltage ±8 V
Drain Current - Continuous (Note 1a) 4.5 A
- Pulsed 15
P
D
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,T
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
θJA
R
J
θ
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
C
© 1998 Fairchild Semiconductor Corporation
NDS9925A Rev. A
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 20 V
Zero Gate Voltage Drain Current VDS = 16 V, V
= 0 V 1 µA
GS
Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse VGS = -8 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
V
R
GS(th)
DS(ON)
Gate Threshold Voltage V
= V
, I
DS
= 250 µA 0.4 1 V
GS
D
Static Drain-Source On-Resistance VGS = 4.5 V, ID = 4.5 A 0.06
VGS = 2.7 V, ID = 4 A 0.075
I
D(on)
On-State Drain Current VGS = 4.5 V, VDS = 5 V 15 A
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes :
1. R
θ
guaranteed by design while R
Maximum Continuous Drain-Source Diode Forward Current 1.3 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
is determined by the user's board design.
CA
θ
(Note 2) 1.2 V
Ω
is
JC
θ
a. 78OC/W on a 0.5 in
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
pad of 2oz copper.
2
b. 125OC/W on a 0.02 in
pad of 2oz copper.
2
c. 135OC/W on a 0.003 in
pad of 2oz copper.
2
NDS9925A Rev. A
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