Fairchild Semiconductor NDS9435A Datasheet
NDS9435A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description Features
May 1996
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited
-5.3A, -30V. R
R
R
High density cell design for extremely low R
= 0.05Ω @ VGS = -10V
DS(ON)
= 0.07Ω @ VGS = -6V
DS(ON)
= 0.09Ω @ VGS = -4.5V.
DS(ON)
DS(ON).
High power and current handling capability in a widely
used surface mount package.
for low voltage applications such as notebook computer
power management and other battery powered circuits
where fast switching, low in-line power loss, and resistance
to transients are needed.
____________________________________________________________________________________________
D
D
D
D
G
SO-8
1
pin
S
S
S
5
6
7
8
4
3
2
1
Absolute Maximum Ratings T
Symbol Parameter NDS9435A Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -30 V
Gate-Source Voltage ± 20 V
Drain Current - Continuous (Note 1a) ± 5.3 A
= 25°C unless otherwise noted
A
- Pulsed ± 20
P
D
TJ,T
THERMAL CHARACTERISTICS
R
θ
R
θ
© 1999 Fairchild Semiconductor Corporation
Maximum Power Dissipation (Note 1a) 2.5 W
(Note 1b)
(Note 1c)
Operating and Storage Temperature Range -55 to 150 °C
STG
Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W
JA
Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
JC
1.2
1
NDS9435A Rev B
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
I
I
DSS
DSS
GSSF
GSSR
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -30 V
Zero Gate Voltage Drain Current VDS = -24 V, V
VDS = -15 V, V
= 0 V -1 µA
GS
= 0 V TJ = 70°C -5 µA
GS
Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage V
DS
= V
, I
= -250 µA -1 -1.4 V
GS
D
TJ = 125°C -0.7 -1
R
DS(ON)
Static Drain-Source On-Resistance VGS = -10 V, ID = -5.3 A 0.038 0.05
Ω
TJ = 125°C 0.054 0.1
VGS = -6 V, ID = -4.7 A 0.046 0.07
VGS = -4.5 V, ID = -4.2 A 0.064 0.09
I
D(on)
On-State Drain Current VGS = -10 V, VDS = -5 V -20 A
VGS = -4.5, VDS = -5V -5
g
FS
Forward Transconductance VDS = 15 V, ID = 5.3 A 10 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 15 V, V
Output Capacitance 610 pF
f = 1.0 MHz
GS
= 0 V,
950 pF
Reverse Transfer Capacitance 220 pF
SWITCHING CHARACTERISTICS (Note 2)
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Turn - On Delay Time VDD = -15 V, ID = -1 A,
V
= -10 V, R
Turn - On Rise Time 18 60 ns
GEN
GEN
= 6 Ω
10 30 ns
Turn - Off Delay Time 80 120 ns
Turn - Off Fall Time 45 100 ns
Total Gate Charge VDS = -15 V,
Gate-Source Charge 3 nC
ID = -5.3 A, VGS = -10 V
29 40 nC
Gate-Drain Charge 9 nC
NDS9435A Rev B
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
t
rr
Notes:
1. R
by design while R
P
Typical R
Maximum Continuous Drain-Source Diode Forward Current -1.9 A
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -5.3 A
(Note 2) 0.85 -1.3 V
Reverse Recovery Time VGS = 0V, IF = -5.3 A, dIF/dt = 100 A/µs 100 ns
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
(t)
D
is determined by the user's board design.
CA
θ
T
=
R
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
JA
θ
a. 50oC/W when mounted on a 1 in2 pad of 2oz cpper.
b. 105oC/W when mounted on a 0.04 in2 pad of 2oz cpper.
c. 125oC/W when mounted on a 0.006 in2 pad of 2oz cpper.
1a
J−TA
θJ A
T
J−TA
2
=
(t)
+
R
R
θJ C
(t)
= I
×R
DS(ON)@T
D
(t)
θCA
J
1b
1c
is guaranteed
JC
θ
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS9435A Rev B
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