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NDS8934
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description Features
March 1996
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly
suited for low voltage applications such as notebook
-3.8A, -20V. R
R
High density cell design for extremely low R
= 0.07Ω @ VGS = -4.5V
DS(ON)
= 0.1Ω @ VGS = -2.7V.
DS(ON)
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
computer power management and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
_________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter NDS8934 Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage -8 V
Drain Current - Continuous (Note 1a) -3.8 A
- Pulsed -15
P
D
Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,T
Operating and Storage Temperature Range -55 to 150 °C
STG
THERMAL CHARACTERISTICS
R
θ
R
θ
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
JA
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
JC
NDS8934.SAM
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Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Zero Gate Voltage Drain Current
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
VDS = -16 V, V
VDS = -10 V, V
= 0 V
GS
= 0 V, TJ = 70°C -5 µA
GS
VGS = 8 V, VDS = 0 V
VGS = -8 V, VDS= 0 V
-1 µA
100 nA
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
GS(th)
DS(ON)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
TJ = 125°C
Static Drain-Source On-Resistance VGS = -4.5 V, ID = -3.8 A 0.06 0.07
TJ = 125°C
-0.5 -0.7 -1 V
-0.3 -0.5 -0.8
Ω
0.085 0.14
VGS = -2.7 V, ID = -3.2 A 0.082 0.1
I
D(on)
On-State Drain Current
VGS = -4.5 V, VDS = -5 V
-15 A
VGS = -2.7 V, VDS = -5 V -5
g
FS
Forward Transconductance
VDS = 10 V, ID = -3.8 A
9 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = -10 V, VGS = 0 V,
Output Capacitance 470 pF
f = 1.0 MHz
1120 pF
Reverse Transfer Capacitance 145 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
Turn - On Delay Time
Turn - On Rise Time 53 70 ns
VDD = -5 V, ID = -1 A,
V
= -4.5 V, R
GEN
GEN
= 6 Ω
Turn - Off Delay Time 60 80 ns
Turn - Off Fall Time 33 40 ns
g
gs
gd
Total Gate Charge
Gate-Source Charge 2.4 nC
Gate-Drain Charge 5.5 nC
VDS = -10 V,
ID = -3.8 A, VGS = -4.5 V
13 20 ns
19 30 nC
NDS8934.SAM