Fairchild Semiconductor NDS8426 Datasheet

NDS8426 Single N-Channel Enhancement Mode Field Effect Transistor
General Description Features
September 1997
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer
9.9 A, 20 V. R R
High density cell design for extremely low R
= 0.015 @ VGS= 4.5 V.
DS(ON)
= 0.020 @ VGS= 2.7 V.
DS(ON)
DS(ON)
.
High power and current handling capability in a widely used surface mount package.
power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
____________________________________________________________________________________________
5
6
7 8
4 3 2
1
= 25°C unless otherwise noted
A
Symbol Parameter NDS8426 Units
V
DSS
V
GSS
I
D
Drain-Source Voltage 20 V Gate-Source Voltage 8 V Drain Current - Continuous (Note 1a) 9.9 A
- Pulsed 20
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 2.5 W
(Note 1b)
(Note 1c)
Operating and Storage Temperature Range -55 to 150 °C
STG
1.2 1
THERMAL CHARACTERISTICS
R
θJA
R
θJC
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 50 °C/W Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
NDS8426 Rev.E
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV I
DSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 20 V Zero Gate Voltage Drain Current
VDS = 16 V, V
GS
= 0 V
1 µA
TJ= 55°C 10 µA
I
GSSF
I
GSSR
Gate - Body Leakage, Forward
VGS = 8 V, VDS = 0 V
Gate - Body Leakage, Reverse VGS = -8 V, VDS= 0 V -100 nA
100 nA
ON CHARACTERISTICS (Note 2)
V
GS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
0.4 0.6 1 V
TJ= 125°C 0.3 0.34 0.8
R
I g
D(on)
FS
DS(ON)
Static Drain-Source On-Resistance
On-State Drain Current Forward Transconductance
VGS = 4.5 V, ID = 9.9 A
TJ= 125°C VGS = 2.7 V, ID = 8.8 A VGS = 4.5 V, VDS = 5 V VDS = 5 V, ID = 9.9 A
0.013 0.015
0.017 0.027
0.016 0.02
20 A
38 S
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance VDS = 10 V, V Output Capacitance 940 pF
f = 1.0 MHz
GS
= 0 V,
1765 pF
Reverse Transfer Capacitance 360 pF
SWITCHING CHARACTERISTICS (Note 2)
t t t t Q Q Q
D(on)
r
D(off)
f
Turn - On Delay Time Turn - On Rise Time 30 55 ns
VDD = 5 V, ID = 1 A, V
= 4.5 V, R
GEN
GEN
= 6
Turn - Off Delay Time 120 220 ns Turn - Off Fall Time 58 100 ns
g
gs
gd
Total Gate Charge Gate-Source Charge 3 nC Gate-Drain Charge 18 nC
VDS =10 V, ID = 9.9 A, VGS = 4.5 V
15 30 ns
46 64 nC
NDS8426 Rev.E
ELECTRICAL CHARACTERISTICS (T
(t)
θ
J
A
(t)
R+R(t
)
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
V
SD
Notes:
1. R design while R
P
Typical R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Continuous Source Diode Current 2.1 A Drain-Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
D
is determined by the user's board design.
CA
θ
T
T
T
J
=
R
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
JA
θ
a. 50oC/W when mounted on a 1 in2 pad of 2oz copper. b. 105oC/W when mounted on a 0.04 in2 pad of 2oz copper. c. 125oC/W when mounted on a 0.006 in2 pad of 2oz copper.
T
A
J
A
=
1a
VGS = 0 V, IS = 2.1 A
1b
(Note 2)
1c
0.65 1.2 V
is guaranteed by
JC
θ
NDS8426 Rev.E
Loading...
+ 7 hidden pages