Fairchild Semiconductor NDS356P Datasheet
NDS356P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
March 1996
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
-1.1 A, -20V. R
= 0.3Ω @ VGS = -4.5V.
DS(ON)
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter NDS356P Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage - Continuous ± 12 V
Maximum Drain Current - Continuous (Note 1a) ±1.1 A
- Pulsed ±10
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 0.5 W
(Note 1b)
Operating and Storage Temperature Range -55 to 150 °C
STG
0.46
THERMAL CHARACTERISTICS
R
JA
θ
R
JC
θ
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient
(Note 1a)
Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W
250 °C/W
NDS356P Rev. E1
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
I
GSSF
I
GSSR
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Zero Gate Voltage Drain Current
VDS = -16 V, V
GS
= 0 V
TJ =125°C
-5 µA
-20 µA
Gate - Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
Gate - Body Leakage, Reverse
VGS = -12 V, VDS = 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
I
D(ON)
g
GS(th)
DS(ON)
FS
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.8 -1.6 -2.5 V
-0.5 -1.3 -2.2
0.3
0.4
0.21
-3 A
1.8 S
Static Drain-Source On-Resistance
On-State Drain Current
Forward Transconductance
TJ =125°C
VGS = -4.5 V, ID = -1.1 A
TJ =125°C
VGS = -10 V, ID = -1.3 A
VGS = -4.5 V, VDS = -5 V
VDS = -5 V, ID = -1.1 A
Ω
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 255 pF
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
Reverse Transfer Capacitance 60 pF
180 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn - On Delay Time VDD = -10 V, ID = -1 A,
Turn - On Rise Time 17 30 ns
VGS = -10 V, R
GEN
= 50 Ω
7 15 ns
Turn - Off Delay Time 56 90 ns
Turn - Off Fall Time 41 80 ns
Total Gate Charge VDS = -10 V, ID = -1.1 A,
Gate-Source Charge 1.5 nC
VGS = -5 V
3.5 5 nC
Gate-Drain Charge 2 nC
NDS356P Rev. E1
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