NDS336P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
June 1997
SuperSOTTM-3 P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low voltage
applications such as notebook computer power management,
portable electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are needed
in a very small outline surface mount package.
-1.2 A, -20 V, R
R
Very low level gate drive requirements allowing direct
operation in 3V circuits. V
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface Mount
package.
= 0.27 Ω @ VGS= -2.7 V
DS(ON)
= 0.2 Ω @ V
DS(ON)
GS(th)
GS
< 1.0V.
= -4.5 V.
DS(ON)
.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings T
= 25°C unless otherwise noted
A
Symbol Parameter NDS336P Units
V
DSS
V
GSS
I
D
Drain-Source Voltage -20 V
Gate-Source Voltage - Continuous ±8 V
Maximum Drain Current - Continuous (Note 1a) -1.2 A
- Pulsed -10
P
D
TJ,T
Maximum Power Dissipation (Note 1a) 0.5 W
(Note 1b)
Operating and Storage Temperature Range -55 to 150 °C
STG
0.46
THERMAL CHARACTERISTICS
R
θJA
R
θJC
© 1997 Fairchild Semiconductor Corporation
Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W
Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W
NDS336P Rev. E
Electrical Characteristics (T
= 25°C unless otherwise noted)
A
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BV
I
DSS
I
GSS
I
GSS
DSS
Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
Zero Gate Voltage Drain Current
VDS = -16 V, V
GS
= 0 V
TJ =55°C
-1 µA
-10 µA
Gate - Body Leakage Current VGS = 8 V, VDS = 0 V 100 nA
Gate - Body Leakage Current
VGS = -8 V, VDS = 0 V
-100 nA
ON CHARACTERISTICS (Note 2)
V
R
I
g
GS(th)
DS(ON)
D(ON)
FS
Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.5 -0.78 -1 V
TJ =125°C
-0.3 -0.58 -0.8
Static Drain-Source On-Resistance VGS = -2.7 V, ID = -1.2 A 0.22 0.27
0.34 0.49
0.16 0.2
-2 A
-3 S
On-State Drain Current
Forward Transconductance
VGS = -4.5 V, ID = -1.3 A
VGS = -2.7 V, VDS = -5 V
VDS = -5 V, I
= -1.2 A
D
TJ =125°C
Ω
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 170 pF
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
Reverse Transfer Capacitance 60 pF
360 pF
SWITCHING CHARACTERISTICS (Note 2)
t
t
t
t
Q
Q
Q
D(on)
r
D(off)
f
g
gs
gd
Turn - On Delay Time VDD = -5 V, ID = -1 A,
Turn - On Rise Time 29 50 ns
VGS = -4.5 V, R
GEN
= 6 Ω
8 15 ns
Turn - Off Delay Time 33 60 ns
Turn - Off Fall Time 23 45 ns
Total Gate Charge VDS = -10 V, ID = -1.2 A,
Gate-Source Charge 0.7 nC
VGS = -4.5 V
5.7 8.5 nC
Gate-Drain Charge 1.8 nC
NDS336P Rev. E