Fairchild Semiconductor NC7S14CW, NC7S14P5, NC7S14M5X, NC7S14M5, NC7S14P5X Datasheet

© 2000 Fairchild Semiconductor Corporation DS012135 www.fairchildsemi.com
January 1996 Revised June 2000
NC7S14 TinyLogic
HS Inverter with Schmitt Trigger Input
NC7S14 TinyLogic
General Description
The NC7S14 is a sing le high perfo rmance CMOS Inverter with Schmitt Trigger input. The circuit desig n provide s hys­teresis between the positive-going and negative going input thresholds thereby improving noise margins.
Advanced Silicon Gate CMOS fabrication assures high speed and low pow er circuit operation over a broad V
CC
range. ESD protectio n diodes inherently gu ard both input and output with respect to the V
CC
and GND rails.
Features
Space saving SOT23 or SC70 5-lead package
Schmitt input hysteresis:
> 1V typ
High speed: t
PD
4.5 ns typ
Low quiescent power: I
CC
< 1 µA
Balanced output drive: 2 mA I
OL
, 2 mA I
OH
Broad VCC operating range: 2V – 6V
Balanced propagatio n delay s
Specified for 3V operation
Ordering Code:
Logic Symbol
IEEE/IEC
Connection Diagram
(Top View)
Pin Descriptions Function Table
H = HIGH Logic Level L = LOW Logic Level
TinyLogic is a trademark of Fairchild Semiconductor Co rporation.
Order Number
Package Product Code
Package Descript ion Supplied As
Number Top Mark
NC7S14M5 MA05B 7S14 5-Lead SOT23, JEDEC MO-178, 1.6mm 250 Units on Tape and Reel NC7S14M5X MA05B 7S14 5-Lead SOT23, JEDEC MO-178, 1.6mm 3k Units on Tape and Reel NC7S14P5 MAA05A S14 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 250 Units on Tape and Reel NC7S14P5X MAA05A S14 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel
Pin Names Description
A Input YOutput
NC No Connect
Y = A
Input Output
AY
LH HL
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NC7S14
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, with­out exception, to ensure that the system design is reliable over its power supply, temperature, and ou tput/inp ut loadi ng varia bles. Fairchild does no t recommend operat ion of circuits outside the dat abook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They ma y not float.
DC Electrical Characteristics
Supply Voltage (VCC) 0.5V to +7.0V DC Input Diode Current (I
IK
)
@V
IN
0.5V 20 mA
@V
IN
VCC +0.5V +20 mA
DC Input Voltage (V
IN
) 0.5V to VCC +0.5V
DC Output Diode Current (I
OK
)
@V
OUT
< 0.5V 20 mA
@V
OUT
> VCC +0.5V +20 mA
DC Output Voltage (V
OUT
) 0.5V to VCC +0.5V
DC Output Source or Sink
Current (I
OUT
) ±12.5 mA
DC V
CC
or Ground Current per
Output Pin (I
CC
or I
GND
) ±25 mA
Storage Temperature (T
STG
) 65°C to +150°C
Junction Temperature (T
J
)150°C
Lead Temperature (T
L
)
(Soldering, 10 seconds) 260
°C
Power Dissipation (P
D
) @ +85°C
SOT23-5 200 mW SC70-5 150 mW
Supply Voltage (V
CC
) 2.0V to 6.0V
Input Voltage (V
IN
)0V to V
CC
Output Voltage (V
OUT
)0V to V
CC
Operating Temperature (TA) 40°C to +85°C Thermal Resistance (
θ
JA
)
SOT23-5 300
°C/W
SC70-5 425
°C/W
Symbol Parameter
VCC T
A
= +25°CT
A
= 40°C to +85°C
Units Conditions
(V) Min Typ Max Min Max
V
P
Positive Threshold Voltage 2.0 1.0 1.29 1.5 1.0 1.6
V
3.0 1.5 1.90 2.2 1.5 2.2
4.5 2.3 2.73 3.15 2.3 3.15
6.0 3.0 3.56 4.2 3.0 4.2
V
N
Negative Threshold Voltage 2.0 0.3 0.70 0.9 0.3 0.9
V
3.0 0.6 1.05 1.35 0.6 1.35
4.5 1.13 1.66 2.0 1.13 2.0
6.0 1.5 2.24 2.6 1.5 2.6
V
H
Hysteresis Voltage 2.0 0.3 0.59 1.0 0.3 1.0
V
3.0 0.4 0.85 1.3 0.4 1.3
4.5 0.6 1.08 1.4 0.6 1.4
6.0 0.8 1.31 1.7 0.8 1.7
V
OH
HIGH Level Output Voltage 2.0 1.90 2.0 1.90
V
3.02.903.0 2.90 IOH = 20 µA
4.54.404.5 4.40 VIN = V
IL
6.05.906.0 5.90
V
VIN = V
IL
3.0 2.68 2.87 2.63 IOH = 1.3 mA
4.5 4.18 4.37 4.13 IOH = 2 mA
6.0 5.68 5.86 5.63 IOH = 2.6 mA
V
OL
LOW Level Output Voltage 2.0 0.0 0.10 0.10
V
3.0 0.0 0.10 0.10 IOH = 20 µA
4.5 0.0 0.10 0.10 VIN = V
IH
6.0 0.0 0.10 0.10
V
VIN = V
IH
3.0 0.1 0.26 0.33 IOL = 1.3 mA
4.5 0.1 0.26 0.33 IOL = 2 mA
6.0 0.1 0.26 0.33 IOL = 2.6 mA
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NC7S14
DC Electrical Characteristics (Continued)
AC Electrical Characteristics
Note 3: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating cu rrent by the expression:
I
CCD
= (CPD) (VCC) (fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and str ay capacitance Input PR R = 1.0 MHz, t
w
= 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveforms; PRR = variable; Duty Cycle = 50%
FIGURE 2. I
CCD
Test Circuit
FIGURE 3. AC Waveforms
Symbol Parameter
V
CC
T
A
= +25°CT
A
= 40°C to +85°C
Units Conditions
(V) MinTypMaxMinMax
I
IN
Input Leakage Current 6.0 ±0.1 ±1.0 µAVIN = VCC, GND
I
CC
Quiescent Supply Current 6.0 1.0 10.0 µAVIN = VCC, GND
Symbol Parameter
V
CC
TA = +25°CT
A
= 40°C to +85°C
Units Conditions Fig. No.
(V) Min Typ Max Min Max
t
PLH
Propagation Delay 5.0 4.5 21 ns CL = 15 pF
Figures
1, 3
t
PHL
2.0 20 100 125
ns CL = 50 pF
3.0 12 27 35
4.5 8.5 20 25
6.0 7.5 17 21
t
TLH
Output Transition Time 5.0 3 8 ns CL = 15 pF
Figures
1, 3
t
THL
2.0 25 125 145
ns CL = 50 pF
3.0 16 35 45
4.5 11 25 30
6.0 9 21 24
C
IN
Input Capacitance Open 2 10 10 pF
C
PD
Power Dissipation Capacitance 5.0 7 pF (Note 3) Figure 2
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