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Data Sheet December 2001
75A, 100V, 0.014 Ohm, N-Channel,
UltraFET® Power MOSFETs
Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN
(FLANGE)
HUF75645P3
HUF75645S3S
DRAIN
(FLANGE
HUF75645P3, HUF75645S3S
Features
• Ultra Low On-Resistance
-r
DS(ON)
= 0.014Ω,
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and Saber Thermal Impedance Mode ls
- www.fairchildsemi.com
• Peak Cu rrent vs Pulse Width Curve
V
= 10V
GS
Symbol
D
G
S
Absolute Maximum Ratings
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain Current
Continuous (T
Continuous (TC= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Figures 6, 14, 15
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
NOTES:
= 25oC to 150oC.
1. T
J
CAUTION: Stresses above those listed in “Absol24ute Maximum Ratin gs” may cause p ermanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
C
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
TC = 25oC, Unless Otherwise Specified
• UIS Rating Curve
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75645P3 TO-220AB 75645P
HUF75645S3S TO-263AB 75645S
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75645S3ST.
HUF75645P3, HUF75645S3S UNITS
DSS
DGR
GS
D
D
DM
D
, T
J
STG
L
pkg
100 V
100 V
±20 V
75
65
Figure 4
310
2.07
-55 to 175
300
260
A
A
W
W/oC
o
C
o
C
o
C
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corpo ration HUF75645P3, HUF75645S3S Rev. B
For severe environments, see our Automotive HUFA series.
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HUF75645P3, HUF75645S3S
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
Thermal Resistance Junction to
Ambient
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
GATE CHARGE SPECIFICATIONS
DSSID
DSS
VDS = 95V, VGS = 0V - - 1 µA
V
GSS
GS(TH)VGS
DS(ON)ID
θJC
R
θJA
ON
d(ON)
VGS = ±20V - - ±100 nA
TO-220 and TO-263 - - 0.48oC/W
VDD = 50V, ID = 75A
V
R
(Figures 18, 19)
r
d(OFF)
f
OFF
= 250µA, VGS = 0V (Figure 11) 100 - - V
= 90V, VGS = 0V, TC = 150oC - - 250 µA
DS
= VDS, ID = 250µA (Figure 10) 2 - 4 V
= 75A, VGS = 10V (Figure 9) - 0.0115 0.014 Ω
--62oC/W
- - 197 ns
= 10V,
GS
GS
= 2.5Ω
-14-ns
- 117 - ns
-41-ns
- 97 - ns
- - 207 ns
Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
g(TOT)VGS
g(10)
g(TH)
Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
ISS
OSS
RSS
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
SD
RR
= 0V to 20V VDD = 50V,
= 75A,
I
VGS = 0V to 10V - 106 127 nC
VGS = 0V to 2V - 6.8 8.2 nC
gs
gd
D
I
= 1.0mA
g(REF)
(Figures 13, 16, 17)
VDS = 25V, VGS = 0V,
- 198 238 nC
-14-nC
-41-nC
- 3790 - pF
f = 1MHz
(Figure 12)
- 810 - pF
- 230 - pF
ISD = 75A - - 1.25 V
I
= 35A - - 1.00 V
SD
rr
ISD = 75A, dISD/dt = 100A/µs - - 145 ns
ISD = 75A, dISD/dt = 100A/µs - - 360 nC
©2001 Fairchild Semiconductor Corpo ration HUF75645P3, HUF75645S3S Rev. B
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Typical Performance Curves
HUF75645P3, HUF75645S3S
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 17
125
150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATI ON vs CASE
TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
SINGLE PULSE
0.01
-5
10
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
80
60
V
GS
40
, DRAIN CURRENT (A)
20
D
I
0
25
50 75 100 125 150
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
1
NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-2
10
-1
10
θJC
10
1/t2
0
x R
θJC
+ T
= 10V
t
2
C
175
10
1
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
2000
1000
, PEAK CURRENT (A)
DM
I
100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
50
-5
10
VGS = 10V
-4
10
-3
10
-2
10
-1
10
t, PULSE WIDTH (s)
TC = 25oC
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
175 - T
I = I
25
0
10
C
150
10
FIGURE 4. PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corpo ration HUF75645P3, HUF75645S3S Rev. B
1